Solar cell, cell assembly and photovoltaic system

Abstract

The invention discloses a solar cell, a cell module and a photovoltaic system. According to the solar cell, a first surface of a substrate is provided with a first series connection area and a second series connection area; the first surface of the substrate is also provided with a plurality of first collection grid lines and a plurality of second collection grid lines; the first collection grid lines are discontinuous at the first tandem connection area and are continuous at the second tandem connection area; the second collection grid lines are discontinuous at the second tandem connection area and are continuous at the first tandem connection area; the first series connection area and the second series connection area are used for arranging welding strips; the ratio of the size of the substrate in the first direction to the distance between the adjacent first cascading areas is smaller than a first set value, and / or the ratio of the size of the substrate in the first direction to the distance between the adjacent second cascading areas is smaller than a second set value. The photoelectric conversion efficiency of the solar cell can be improved.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to a solar cell, a battery module and a photovoltaic system. Background Technology

[0002] Solar cells, as a highly efficient and clean energy conversion device, are widely used in various photovoltaic power generation systems. A solar cell consists of a silicon substrate and electrodes disposed on the silicon substrate. The electrodes and the silicon substrate are in ohmic contact, responsible for effectively collecting electrons and holes (charge carriers) generated by the silicon material under sunlight, and then converting them into usable electrical energy.

[0003] However, existing solar cells have relatively low photoelectric conversion efficiency. Summary of the Invention

[0004] This application provides a solar cell, a battery module, and a photovoltaic system to improve the photoelectric conversion efficiency of solar cells.

[0005] According to one aspect of this application, a solar cell is provided, comprising:

[0006] A substrate; the first surface of the substrate is provided with a plurality of first serial connection areas and a plurality of second serial connection areas; the first serial connection areas and the second serial connection areas are arranged alternately along a first direction;

[0007] The first surface of the substrate is further provided with a plurality of first collection grid lines and a plurality of second collection grid lines. The first collection grid lines and the second collection grid lines extend along a first direction, and the first collection grid lines and the second collection grid lines are alternately arranged along a second direction. The first direction and the second direction intersect. The first collection grid lines are discontinuous at the first serial connection area and continuous at the second serial connection area. The second collection grid lines are discontinuous at the second serial connection area and continuous at the first serial connection area.

[0008] The first serial connection area and the second serial connection area are used to set the solder strip;

[0009] The ratio of the dimension of the substrate along the first direction to the spacing between adjacent first interconnecting areas is less than a first set value, and / or the ratio of the dimension of the substrate along the first direction to the spacing between adjacent second interconnecting areas is less than a second set value; wherein the first set value is less than or equal to 18; and the second set value is less than or equal to 18.

[0010] Optionally, the ratio of the dimension of the substrate along the first direction to the spacing between adjacent first interconnecting regions is greater than 11 and less than 18.

[0011] The ratio of the dimension of the substrate along the first direction to the spacing between adjacent second interconnection areas is greater than 11 and less than 18.

[0012] Optionally, the total number of the first serial connection area and the second serial connection area is greater than or equal to 26.

[0013] Optionally, the total number of the first serial connection area and the second serial connection area is 26, 28, 30 or 32.

[0014] Optionally, the number of the first serial connection area and the number of the second serial connection area are equal.

[0015] Optionally, along the first direction, the spacing between at least partially adjacent first serialization areas is unequal; and / or, along the first direction, the spacing between at least partially adjacent second serialization areas is unequal.

[0016] Optionally, the first surface includes a first edge region and a second edge region disposed opposite to each other along a first direction, and a central region disposed between the first edge region and the second edge region;

[0017] In the first edge region and the second edge region, the spacing between adjacent first concatenation regions is greater than the spacing between adjacent first concatenation regions in the central region;

[0018] In the first edge region and the second edge region, the spacing between adjacent second serialized regions is greater than the spacing between adjacent second serialized regions in the central region.

[0019] Optionally, along the first direction, in the central region, the spacing between adjacent first serialization areas gradually decreases first and then gradually increases, or the spacing between adjacent first serialization areas is the same.

[0020] Along the first direction, in the central region, the spacing between adjacent second serial connection areas first gradually decreases and then gradually increases, or the spacing between adjacent second serial connection areas is the same.

[0021] Optionally, the spacing between adjacent first concatenation areas in the first edge region is equal to the spacing between adjacent first concatenation areas in the second edge region.

[0022] The spacing between adjacent second serialized areas in the first edge region is equal to the spacing between adjacent second serialized areas in the second edge region.

[0023] Optionally, the first surface includes a first edge and a second edge disposed opposite to each other along a first direction;

[0024] Along the direction from the first edge to the second edge, the spacing between adjacent first serialization areas first gradually decreases and then gradually increases, and / or the spacing between adjacent second serialization areas first gradually decreases and then gradually increases.

[0025] Optionally, the first serial connection area includes a plurality of first pads, and the first pads are electrically connected to the second collection gate lines in the first serial connection area in a one-to-one correspondence.

[0026] The second serial connection area includes a plurality of second pads, and the second pads are electrically connected to the first collection gate lines in the second serial connection area in a one-to-one correspondence.

[0027] The first pad and the second pad are used for electrical connection with the solder strip.

[0028] Optionally, the linewidth of the portion of the second collection gate line located in the first serial area is greater than the linewidth of the portion located in other areas, and the first pad is the second collection gate line located in the first serial area.

[0029] Alternatively, the first pad may be a conductive layer disposed on the side of the second collection gate line away from or adjacent to the substrate, and the second pad may be a conductive layer located on the side of the first collection gate line away from or adjacent to the substrate.

[0030] According to another aspect of this application, a battery assembly is provided, including the solar cell described in any embodiment of this application.

[0031] According to another aspect of this application, a photovoltaic system is provided, including the battery module described in any embodiment of this application.

[0032] This embodiment of the application sets the ratio of the dimension of the substrate along the first direction to the spacing between adjacent first series regions to be less than a first preset value, where the first preset value is less than or equal to 18. This ensures that the number of first series regions on the entire substrate is large and the density of the first series regions is high, thereby improving the carrier collection efficiency of the first series regions. Similarly, by setting the ratio of the dimension of the substrate along the first direction to the spacing between adjacent second series regions to be less than a second preset value, where the second preset value is less than or equal to 18, this ensures that the number of second series regions on the entire substrate is large and the density of the second series regions is high, thereby improving the carrier collection efficiency of the second series regions. Therefore, this embodiment of the application improves the current collection efficiency of the entire solar cell and enhances the photoelectric conversion efficiency.

[0033] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of a solar cell provided in an embodiment of this application;

[0036] Figure 2 This is a schematic diagram of a solar cell provided in an embodiment of this application;

[0037] Figure 3 This is a schematic diagram of another type of solar cell provided in the embodiments of this application.

[0038] Reference numerals: 10-substrate, 101-first edge region, 102-second edge region, 103-central region, 61-first serial connection region, 62-second serial connection region, 41-first collection gate line, 42-second collection gate line, 51-first pad, 52-second pad, 11-first edge, 12-second edge, 21-first bus gate line, 22-second bus gate line, 31-first edge bus gate line, 32-second edge bus gate line. Detailed Implementation

[0039] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0041] This application provides a solar cell. Figure 1 This is a schematic diagram of a solar cell provided in an embodiment of this application, with reference to... Figure 1 The solar cells include:

[0042] The substrate 10 has a first surface provided with a plurality of first serial connection areas 61 and a plurality of second serial connection areas 62; the first serial connection areas 61 and the second serial connection areas 62 are arranged alternately along the first direction X.

[0043] The first surface of the substrate 10 is further provided with a plurality of first collection grid lines 41 and a plurality of second collection grid lines 42; the first collection grid lines 41 and the second collection grid lines 42 extend along a first direction X, and the first collection grid lines 41 and the second collection grid lines 42 are alternately arranged along a second direction Y, and the first direction X and the second direction Y intersect; the first collection grid lines 41 are interrupted at the first serial connection area 61 and continuous at the second serial connection area 62; the second collection grid lines 42 are interrupted at the second serial connection area 62 and continuous at the first serial connection area 61.

[0044] The first cascading area 61 and the second cascading area 62 are used to set the solder strip;

[0045] The ratio of the dimension of the substrate 10 along the first direction X to the spacing L1 between adjacent first interconnect regions 61 is less than a first preset value, and / or the ratio of the dimension of the substrate 10 along the first direction X to the spacing L2 between adjacent second interconnect regions 62 is less than a second preset value; wherein the first preset value is less than or equal to 18; and the second preset value is less than or equal to 18. The substrate 10 is the foundation of the solar cell, and may include a silicon substrate and various functional layers stacked on the silicon substrate; that is, the substrate 10 is the part of the solar cell excluding the metallized electrode pattern. The functional layers include a first doped layer and a second doped layer, and may also include tunneling layers or other films. The first doped layer may be an n-type doped layer, and the second doped layer may be a p-type doped layer. The silicon substrate can be either an n-type or p-type silicon substrate. The silicon substrate, together with the p-type or n-type doped layer, forms a pn junction, generating a photovoltaic effect. When light shines on the solar cell, photons excite electrons to transition from the valence band to the conduction band, forming electron-hole pairs. These charge carriers separate at the pn junction due to the electric field, generating current. The substrate 10 has opposing light-facing and back-light-receiving surfaces. The light-facing surface of the substrate 10 is the light-receiving surface, and the first surface of the substrate 10 can be the back-light-receiving surface.

[0046] A first collection gate line 41 and a second collection gate line 42 are disposed on a substrate 10. The first collection gate line 41 and the second collection gate line 42 are used to collect carriers generated by the substrate 10. The first collection gate line 41 is disposed on one side of the first doped layer and is in electrical contact with the first doped layer. The first collection gate line 41 is used to collect carriers from the first doped layer. The second collection gate line 42 is disposed on one side of the second doped layer and is in electrical contact with the second doped layer. The second collection gate line 42 is used to collect carriers from the second doped layer. A first series connection region 61 is provided with a first connection structure connected to a solder pad, and the first connection structure is electrically connected to the second collection gate line 42. A second series connection region 62 is provided with a second connection structure connected to a solder pad, and the second connection structure is electrically connected to the first collection gate line 41. For example, both the first connection structure and the second connection structure can be solder pads. The solder pad is electrically connected to the second collection gate line 42 through the first connection structure to collect carriers from the second collection gate line 42. The solder strip is electrically connected to the first collection grid line 41 through the second connection structure to collect the charge carriers of the first collection grid line 41.

[0047] The first and second set values ​​can be equal or unequal. The first and second set values ​​can be set as needed. For example, the first set value can be 17, 16, 15, 14, 13, 12, etc., and the second set value can also be 17, 16, 15, 14, 13, 12, etc. The spacing L2 between the first series regions 61 affects the number and density of the first series regions 61 on the substrate 10, and affects the carrier collection efficiency of the first series regions 61. The spacing L2 between the second series regions 62 affects the number and density of the second series regions 62 on the substrate 10, and affects the carrier collection efficiency of the second series regions 62.

[0048] In this embodiment, the ratio of the dimension of the substrate 10 along the first direction X to the spacing L1 between adjacent first series regions 61 is set to be less than a first preset value, which is less than or equal to 18. This ensures that the number of first series regions 61 on the entire substrate 10 is large and the density of the first series regions 61 is high, thereby improving the carrier collection efficiency of the first series regions 61. Similarly, by setting the ratio of the dimension of the substrate 10 along the first direction X to the spacing L2 between adjacent second series regions 62 to be less than a second preset value, which is less than or equal to 18, the number of second series regions 62 on the entire substrate 10 is large and the density of the second series regions 62 is high, thereby improving the carrier collection efficiency of the second series regions 62. Therefore, this embodiment improves the current collection efficiency and photoelectric conversion efficiency of the entire solar cell.

[0049] It should be noted that, Figure 1 The first serial connection area 61 and the second serial connection area 62 are shown only by way of example and are not intended to limit the scope of this application.

[0050] Based on the above embodiments, optionally, the ratio of the dimension of the substrate 10 along the first direction X to the spacing L1 between adjacent first interconnection areas 61 is greater than 11 and less than 18.

[0051] The ratio of the dimension of the substrate 10 along the first direction X to the spacing L2 between the adjacent second serial connection area 62 is greater than 11 and less than 18.

[0052] Specifically, if the spacing L1 between adjacent first series connection regions 61 is too small, the number of first series connection regions 61 on the substrate 10 will be too large. Similarly, if the spacing L2 between adjacent second series connection regions 62 is too small, the number of second series connection regions 62 on the substrate 10 will be too large, increasing the manufacturing difficulty of the solar cell and causing material waste. In this embodiment, by setting the ratio of the dimension of the substrate 10 along the first direction X to the spacing L1 between adjacent first series connection regions 61 to be greater than 11 and less than 18, and the ratio of the dimension of the substrate 10 along the first direction X to the spacing L2 between adjacent second series connection regions 62 to be greater than 11 and less than 18, a large number and high density of first series connection regions 61 and second series connection regions 62 on the substrate 10 are ensured, thus guaranteeing high photoelectric conversion efficiency of the solar cell, while reducing the manufacturing difficulty and minimizing material waste.

[0053] For example, the size of the base 10 along the first direction X is greater than or equal to 192 mm, such as 192 mm or 210 mm, the number of the first serial connection area 61 is greater than or equal to 13, and the number of the second serial connection area 62 is greater than or equal to 13.

[0054] Based on the above embodiments, optionally, the total number of the first serial connection area 61 and the second serial connection area 62 is greater than or equal to 26.

[0055] This configuration ensures that there are a large number and a higher density of the first series regions 61 on the substrate 10, and a large number and a higher density of the second series regions 62 on the substrate 10. This allows for better collection of charge carriers, further improving the charge carrier collection efficiency and the photoelectric conversion efficiency of the solar cell.

[0056] Based on the above embodiments, optionally, the total number of the first serial connection area 61 and the second serial connection area 62 is 26, 28, 30 or 32.

[0057] This configuration ensures a large number and high density of the first series connection region 61 and the second series connection region 62 on the substrate 10, thereby guaranteeing high photoelectric conversion efficiency of the solar cell. At the same time, it reduces the difficulty of the manufacturing process and minimizes material waste.

[0058] Based on the above embodiments, optionally, the number of the first serial connection area 61 and the second serial connection area 62 are equal.

[0059] This configuration allows the solar cell to efficiently and evenly collect electrons and holes, thereby improving the photoelectric conversion efficiency of the solar cell.

[0060] Figure 2 This is a schematic diagram of a solar cell provided in an embodiment of this application. Optionally, based on the above embodiments, refer to... Figure 2Along the first direction X, the spacing L1 between at least partially adjacent first serialization areas 61 is unequal; and / or, along the first direction X, the spacing L2 between at least partially adjacent second serialization areas 62 is unequal.

[0061] Specifically, since the current distribution is different in different regions on the substrate 10, the spacing between the first series connection areas 61 and the spacing between the second series connection areas 62 can be set according to the current distribution in different regions. For example, for regions with higher current, the spacing L1 between the first series connection areas 61 is set to be smaller and the spacing L2 between the second series connection areas 62 is set to be smaller. For regions with lower current, the spacing L1 between the first series connection areas 61 is set to be larger and the spacing L2 between the second series connection areas 62 is set to be larger.

[0062] This embodiment sets the spacing L1 between at least partially adjacent first series connection areas 61 along the first direction X to be unequal; and / or the spacing L2 between at least partially adjacent second series connection areas 62 along the first direction X to be unequal, so that the distribution of the first series connection areas 61 and the second series connection areas 62 matches the current distribution, thereby improving the current collection efficiency, reducing material waste, and reducing the manufacturing difficulty of solar cells.

[0063] Based on the above embodiments, optionally, the first surface includes a first edge region 101 and a second edge region 102 disposed opposite to each other along the first direction X, and a central region 103 disposed between the first edge region 101 and the second edge region 102;

[0064] In the first edge region 101 and the second edge region 102, the distance L1 between adjacent first serialized regions 61 is greater than that in the central region 103;

[0065] In the first edge region 101 and the second edge region 102, the distance L2 between adjacent second serialized regions 62 is greater than the distance L2 between adjacent second serialized regions 62 in the central region 103.

[0066] Specifically, because the light intensity received at the edge of the substrate 10 is weaker than at the center, and there is a passivation difference between the edge and central regions, there are more defects at the edge than at the center, resulting in relatively fewer charge carriers at the edge. Therefore, the current in the edge region of the substrate 10 is less than the current in the central region 103. By setting the spacing L1 between the first series-connected regions 61 and L2 between the second series-connected regions 62 in the central region 103 to be smaller, the first series-connected regions 61 and 62 can collect more current from the central region 103. By setting the spacing L1 between the first series-connected regions 61 and L2 between the second series-connected regions 62 in the first edge region 101 and 102 to be larger, the number of series-connected regions in the first edge region 101 and 102 can be reduced while ensuring good current collection, thus reducing material waste and simplifying the manufacturing process.

[0067] Figure 3 This is a schematic diagram of another solar cell provided in the embodiments of this application. Optionally, based on the above embodiments, refer to... Figure 2 and Figure 3 Along the first direction X, in the central region 103, the spacing L1 between adjacent first serial connection regions 61 first gradually decreases and then gradually increases. Figure 3 ), or, the spacing L1 between adjacent first serial connection areas 61 is the same ( Figure 2 );

[0068] Along the first direction X, in the central region 103, the spacing L2 between adjacent second serial connection regions 62 first gradually decreases, and then gradually increases. Figure 3 ), or, the spacing L2 between adjacent second serial connection areas 62 is the same ( Figure 2 ).

[0069] For details, please refer to Figure 3 The closer to the center of the substrate 10, the higher the current. By setting the spacing L1 between adjacent first series connection areas 61 in the central region 103 along the first direction X to gradually decrease and then gradually increase, and the spacing L2 between adjacent second series connection areas 62 to gradually decrease and then gradually increase, the spacing of the first series connection areas 61 and the spacing of the second series connection areas 62 at the center of the central region 103 is minimized, and the spacing of the second series connection areas 62 is minimized as the distance from the center increases. This results in a high density of series connection areas where the current is high, which can collect the current more efficiently. The density of series connection areas is low where the current is low. Under the premise of good current collection, the material usage can be reduced and the process difficulty can be reduced.

[0070] Alternatively, in the central region 103, the spacing L1 between adjacent first series connection regions 61 can be the same, and the spacing L2 between adjacent second series connection regions 62 can be the same. This can reduce the manufacturing difficulty of solar cells while ensuring good current collection.

[0071] Based on the above embodiments, optionally, the spacing L1 between adjacent first serialization areas 61 in the first edge region 101 is equal to the spacing L1 between adjacent first serialization areas 61 in the second edge region 102.

[0072] The spacing L2 between adjacent second serialized areas 62 in the first edge region 101 is equal to the spacing L2 between adjacent second serialized areas 62 in the second edge region 102.

[0073] Specifically, the first edge region 101 and the second edge region 102 are both located at the edge of the substrate 10, and the current magnitudes are similar. Setting the spacing L1 of the first series connection region 61 in the first edge region 101 and the second edge region 102 to be equal, and the spacing L2 of the second series connection region 62 to be equal, can reduce the manufacturing difficulty of the solar cell and ensure that the current can be collected better.

[0074] Based on the above embodiments, optionally, refer to Figure 3 The first surface includes a first edge 11 and a second edge 12 disposed opposite to each other along a first direction X;

[0075] Along the direction from the first edge 11 to the second edge 12, the spacing L1 between adjacent first serialization areas 61 gradually decreases and then gradually increases, and / or the spacing L2 between adjacent second serialization areas 62 gradually decreases and then gradually increases.

[0076] Specifically, along the first direction X, the current at the edge of the substrate 10 is smaller, while the current at the center is larger. By setting the direction from the first edge 11 to the second edge 12, the spacing L1 between adjacent first series connection areas 61 gradually decreases and then gradually increases, and the spacing L2 between adjacent second series connection areas 62 gradually decreases and then gradually increases. That is, from the edge position to the center position, the spacing of the first series connection areas 61 gradually increases and decreases, and the spacing of the second series connection areas 62 gradually decreases. This makes the first series connection areas 61 and the second series connection areas 62 more densely packed closer to the center, which can better improve the current collection efficiency and the light conversion efficiency of the solar cell.

[0077] Based on the above embodiments, optionally, refer to Figure 1 The first serial connection area 61 includes a plurality of first pads 51, and the first pads 51 are electrically connected to the second collection gate lines 42 in the first serial connection area 61 in a one-to-one correspondence.

[0078] The second serial connection area 62 includes a plurality of second pads 52, and the second pads 52 are electrically connected to the first collection gate line 41 in the second serial connection area 62 in a one-to-one correspondence.

[0079] The first pad 51 and the second pad 52 are used for electrical connection with the solder strip.

[0080] Specifically, the charge carriers collected by the first collection gate line 41 are transferred to the solder strip through the second pad 52, and the charge carriers collected by the second collection gate line 42 are transferred to the solder strip through the first pad 51.

[0081] Based on the above embodiments, optionally, the line width of the portion of the second collection gate line 42 located in the first serial area 61 is greater than the line width located in other areas, the first pad 51 is the second collection gate line 42 located in the first serial area 61, the line width of the portion of the first collection gate line 41 located in the second serial area 62 is greater than the line width located in other areas, and the second pad 52 is the first collection gate line 41 located in the second serial area 62;

[0082] Alternatively, the first pad 51 is a conductive layer disposed on the side of the second collection gate line 42 away from the substrate 10 or on the side adjacent to the substrate 10, and the second pad 52 is a conductive layer located on the side of the first collection gate line 41 away from the substrate 10 or on the side adjacent to the substrate 20.

[0083] Specifically, the first collection gate line 41 within the second serial connection area 62 can be thickened, and the thickened first collection gate line 41 can serve as the second pad 52. The second collection gate line 42 within the first serial connection area 61 can also be thickened, and the thickened second collection gate line 42 can serve as the first pad 51. Alternatively, a conductive layer can be separately provided as either the first pad 51 or the second pad 52.

[0084] In addition, refer to Figure 1 and Figure 2 The first surface of the substrate 10 further includes a first edge busbar 31 and a second edge busbar 32. The first edge busbar 31 is electrically connected to at least a portion of the first collection gate 41, and the second busbar 32 is electrically connected to at least a portion of the second busbar 42. The first surface of the substrate 10 also includes a first busbar 21 and a second busbar 22. The first busbar 21 is connected to at least a portion of the first collection gate 41 for collecting carriers on the first collection gate 41, and the second busbar 21 is connected to at least a portion of the second collection gate 42 for collecting carriers on the second collection gate 42. The first busbar 21 may be located in a first edge region 101, and the second busbar 22 may be located in a second edge region 102. The first busbar 21 is connected to at least one second pad 52, and the second busbar 22 is connected to at least one first pad 51.

[0085] This application also provides a battery assembly, including the solar cell described in the above embodiments.

[0086] A battery module may include multiple solar cells, which can be connected in series to form a battery string. The battery strings can be connected in series, in parallel, or in a series-parallel combination to achieve current output. For example, the connection between individual cells can be achieved by welding ribbons, or the connection between battery strings can be achieved by busbars.

[0087] The battery module may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the light-facing side of the solar cell and the photovoltaic glass, the back-facing side and the backsheet, and adjacent cells. As a filler, it can be a transparent colloid with good light transmittance and aging resistance; for example, EVA film or POE film can be used, and the choice is based on the specific circumstances and is not limited here. The photovoltaic glass can cover the encapsulating film on the light-facing side of the solar cell. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, the light transmittance of ultra-clear glass can reach over 92%, which can protect the solar cell while minimizing the impact on its efficiency. Simultaneously, the encapsulating film can bond the photovoltaic glass and the solar cell together, and its presence provides sealing, insulation, waterproofing, and moisture protection for the solar cell.

[0088] The backsheet can be attached to the encapsulating film on the back side of the solar cell. The backsheet protects and supports the solar cell, providing reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, and aluminum alloy TPT composite encapsulating film, etc., with specific choices depending on the circumstances. The backsheet, solar cell, encapsulating film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0089] The battery module in this application embodiment belongs to the same application concept as the solar cell described in the above embodiments of this application and has corresponding beneficial effects. For technical details not covered in this embodiment, please refer to the solar cell described in any embodiment of this application.

[0090] This application also provides a photovoltaic module, including the battery module described in the above embodiments.

[0091] Photovoltaic systems can be applied in photovoltaic power plants, such as ground-mounted, rooftop, and floating power plants, as well as in equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it's understandable that the application scenarios of photovoltaic systems are not limited to these; that is, photovoltaic systems can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation network as an example, a photovoltaic system can include photovoltaic arrays, combiner boxes, and inverters. A photovoltaic array can be a combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic arrays are connected to combiner boxes, which collect the current generated by the photovoltaic arrays. The collected current flows through an inverter and is converted into AC power required by the mains grid before being connected to the mains grid to achieve solar power supply.

[0092] The beneficial effects of the photovoltaic system in this embodiment are equivalent to the beneficial effects of the battery module described above, and will not be repeated here.

[0093] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this application can be achieved, and this is not limited herein.

[0094] The specific embodiments described above do not constitute a limitation on the scope of protection of this application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A solar cell, characterized in that, include: Base; The first surface of the substrate is provided with a plurality of first serial connection areas and a plurality of second serial connection areas; the first serial connection areas and the second serial connection areas are arranged alternately along a first direction; The first surface of the substrate is further provided with a plurality of first collecting grid lines and a plurality of second collecting grid lines, the first collecting grid lines and the second collecting grid lines extending along a first direction, the first collecting grid lines and the second collecting grid lines alternating along a second direction, the first direction and the second direction intersecting; the first collecting grid lines are discontinuous at the first serial connection area and continuous at the second serial connection area; the second collecting grid lines are discontinuous at the second serial connection area and continuous at the first serial connection area; the first serial connection area and the second serial connection area are used to provide solder strips; The ratio of the dimension of the substrate along the first direction to the spacing between adjacent first interconnecting areas is less than a first set value, and / or the ratio of the dimension of the substrate along the first direction to the spacing between adjacent second interconnecting areas is less than a second set value; wherein, the first set value is less than or equal to 18; and the second set value is less than or equal to 18.

2. The solar cell according to claim 1, characterized in that: The ratio of the dimension of the substrate along the first direction to the spacing between adjacent first interconnecting regions is greater than 11 and less than 18. The ratio of the dimension of the substrate along the first direction to the spacing between adjacent second interconnection areas is greater than 11 and less than 18.

3. The solar cell according to claim 1, characterized in that: The total number of the first serial connection area and the second serial connection area is greater than or equal to 26.

4. The solar cell according to claim 3, characterized in that: The total number of the first serial connection area and the second serial connection area is 26, 28, 30 or 32.

5. The solar cell according to claim 1, characterized in that: The number of the first serial connection area and the number of the second serial connection area are equal.

6. The solar cell according to claim 1, characterized in that: Along the first direction, the spacing between at least partially adjacent first serialization areas is unequal; and / or, along the first direction, the spacing between at least partially adjacent second serialization areas is unequal.

7. The solar cell according to claim 1 or 6, characterized in that: The first surface includes a first edge region and a second edge region disposed opposite to each other along a first direction, and a central region disposed between the first edge region and the second edge region; In the first edge region and the second edge region, the spacing between adjacent first concatenation regions is greater than the spacing between adjacent first concatenation regions in the central region; In the first edge region and the second edge region, the spacing between adjacent second serialized regions is greater than the spacing between adjacent second serialized regions in the central region.

8. The solar cell according to claim 7, characterized in that: Along the first direction, in the central region, the spacing between adjacent first serial areas first gradually decreases and then gradually increases, or the spacing between adjacent first serial areas is the same. Along the first direction, in the central region, the spacing between adjacent second serial connection areas first gradually decreases and then gradually increases, or the spacing between adjacent second serial connection areas is the same.

9. The solar cell according to claim 7, characterized in that: The spacing between adjacent first concatenation areas in the first edge region is equal to the spacing between adjacent first concatenation areas in the second edge region. The spacing between adjacent second serialized areas in the first edge region is equal to the spacing between adjacent second serialized areas in the second edge region.

10. The solar cell according to claim 1 or 6, characterized in that: The first surface includes a first edge and a second edge disposed opposite to each other along a first direction; Along the direction from the first edge to the second edge, the spacing between adjacent first serialization areas first gradually decreases and then gradually increases, and / or the spacing between adjacent second serialization areas first gradually decreases and then gradually increases.

11. The solar cell according to claim 1, characterized in that: The first serial connection area includes a plurality of first pads, and the first pads are electrically connected to the second collection gate lines in the first serial connection area in a one-to-one correspondence. The second serial connection area includes a plurality of second pads, and the second pads are electrically connected to the first collection gate lines in the second serial connection area in a one-to-one correspondence. The first pad and the second pad are used for electrical connection with the solder strip.

12. The solar cell according to claim 11, characterized in that: The linewidth of the second collection gate line located in the first serial area is greater than the linewidth of the second collection gate line located in other areas. The first pad is the second collection gate line located in the first serial area. The linewidth of the first collection gate line located in the second serial area is greater than the linewidth of the second collection gate line located in other areas. The second pad is the first collection gate line located in the second serial area. Alternatively, the first pad may be a conductive layer disposed on the side of the second collection gate line away from or adjacent to the substrate, and the second pad may be a conductive layer located on the side of the first collection gate line away from or adjacent to the substrate.

13. A battery assembly, characterized in that, Includes the solar cell described in any one of claims 1 to 12.

14. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 13.

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