Processing method of open MEMS chip
By forming and bonding shallow trenches on the structural and substrate layers of MEMS chips, and combining photolithography and dry etching processes, the difficulties in fabricating and separating wafer-level open structures of MEMS chips have been solved, enabling mass production and rapid verification.
Patent Information
- Application Number
- CN202511075521.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-01
- Publication Date
- 2025-12-19
AI Technical Summary
In existing technologies, the wafer-level open structure of MEMS chips is difficult to process and subsequently difficult to separate, resulting in low R&D efficiency and easy to cause design and bonding process abnormalities. In addition, the laser drilling method poses a risk of dust contamination, affecting the consistency of test data. The low rigidity of the double-layer structure chip makes it impossible to mass-produce.
The process involves forming shallow trenches and bonding them on the structural layer or substrate layer, thinning the structural layer, separating the film from the wafer, releasing the structure through photolithography and etching, forming an open MEMS chip, using a silicon wafer or SOI wafer as the structural layer, combining photolithography and dry etching processes, fabricating electrodes, and forming the chip through wafer cleaving.
It enables batch processing and easy separation of wafer-level MEMS chips, allows for rapid verification of chip performance, solves the problem of batch processing of open structures, and ensures consistency of processing status and testing accuracy.
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Figure CN121158722A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of MEMS chip processing, and particularly relates to a processing method of an open MEMS chip. BACKGROUND
[0002] The capacitive "sandwich" structure is a common mainstream structure form of MEMS chips, and generally, MEMS technology is divided into three parts of forming, bonding and interconnection lead, wherein the forming part can process various silicon parts such as the core structure of a gravimeter and the silicon-based sensitive structure of a high-sensitivity sensor, and the silicon-based sensitive structure often needs to be combined with a substrate to form a suspended movable structure, at this time, the substrate is connected with the sensitive structure to form a support through the bonding process, and the second bonding process can also realize the sealing of the entire MEMS chip, and finally the connection between the internal and external signals of the chip is realized through the interconnection lead.
[0003] In the chip development, on the one hand, the chip needs to be verified and tried for the structure, and the matching of the structure and the design parameters needs to be understood, the complexity and long periodicity of the second bonding process result in low time efficiency of the development chip, and the design and the bonding process are difficult to separate; on the other hand, after the MEMS chip is made, the correlation between the Q value and the structure sealing air pressure needs to be confirmed, and the common method is to use laser drilling to form an open table head after the whole chip is completed, and then to measure, the laser drilling process has the risk of dust pollution of the redundant material, and the aperture size affects the consistency of the air pressure measurement inside and outside the cavity, which will cause the test data to deviate and affect the test effect, finally, some MEMS chips are designed as a double-layer structure, but the core sensitive structure has low rigidity, and since the wafer cannot be used for dicing, it cannot be separated into chips, and the chip can only be made by connecting the auxiliary beam, so that the substrate and the sensitive structure can only be processed separately and bound by adhesive, for example, the device such as a gravimeter greatly limits the applicability and economy of the product.
[0004] As shown in Figure 1 , this structure is an open structure, can form a complete functional MEMS chip and keep the sensitive structure open. For the open structure, at present, the chip is usually pasted on the substrate wafer in a single-chip manner, and the dry etching and bonding are completed at the chip level, which is low in efficiency and cannot form batch data, or the open chip is formed by laser drilling of the whole wafer. Another way is as described above, that is, the forming is completed through the auxiliary beam, and the open structure is obtained by mechanical destruction and release of the structure, which is low in efficiency and easy to produce redundant materials. SUMMARY
[0005] The application aims to provide a processing method of an open MEMS chip, which is used for solving the problems of difficult processing of a wafer-level MEMS open structure and difficult separation afterwards, and providing a more perfect wafer-level MEMS open structure process solution for MEMS chip verification and product trial production.
[0006] The technical scheme of the application is implemented as follows: A processing method of an open MEMS chip, comprising the following steps: forming a shallow groove on a structure layer or a substrate layer, bonding the two, thinning the structure layer to a designed thickness to obtain a wafer; performing film pasting on the surface of the structure layer of the wafer; performing pre-cutting and scribing to scribe a blind groove with a certain depth in the substrate layer; performing separation of the film and the wafer; making electrodes on the structure layer, then performing photolithography, and finally retaining the patterned photoresist on the structure layer; performing etching to release the structure, and forming the final required chip through scribing.
[0007] As a further scheme of the application, a silicon wafer or an SOI wafer is selected as the structure layer, a shallow groove is formed through a photolithography etching process, the thickness of the shallow groove is 2-50 microns, and the structure layer with the shallow groove is bonded with the substrate layer.
[0008] As a further scheme of the application, when the material of the substrate layer is borosilicate glass, anodic bonding is performed; when the material of the substrate layer is a silicon wafer, silicon-silicon bonding is performed.
[0009] As a further scheme of the application, the structure layer is thinned to a designed thickness, when the structure layer is an SOI wafer, the support layer and the buried oxygen layer of the SOI wafer are removed, and finally the silicon layer with the designed thickness is retained.
[0010] As a further scheme of the application, the wafer is pasted with a film on a film pasting machine, and a blue film or a UV film is covered on the surface of the structure layer.
[0011] As a further scheme of the application, pre-cutting and scribing are performed, the scribing depth is determined according to the thickness of the substrate layer, when the material of the substrate layer is borosilicate glass, the depth of the blind groove is 5 / 8-4 / 5 of the thickness of the substrate layer, and when the material of the substrate layer is a silicon wafer, the depth of the blind groove is 1 / 2-3 / 4 of the thickness of the substrate layer.
[0012] As a further scheme of the application, when the film is a blue film, the temperature needs to be controlled during peeling, the temperature range is 40-50 DEG C, and the temperature is maintained for 5-20 minutes; when the film is a UV film, peeling needs to be performed through ultraviolet irradiation.
[0013] As a further scheme of the application, the electrodes are made on the structure layer, specifically: The metal layer is plated on the surface of the structure layer of the wafer by sputtering or evaporation plating; The electrode is formed after back alignment photolithography patterning and metal etching; The metal layer material is Al, composite metal Ti / Au or Cr / Au, and the thickness of the metal layer is 100 nm-2 μm.
[0014] As a further scheme of the present application, the electrode on the structure layer is made, specifically: The silicon wafer or glass substrate with designed hollow structure is used as a hard mask to cooperate with the wafer after DRIE etching and removal of photoresist to make the electrode, and effective ohmic contact is formed after annealing.
[0015] As a further scheme of the present application, the wafer needs to be adhered to a dry etching back sheet for fixation during DRIE etching, and the normal dry etching process is completed, and finally the required chip is formed by breaking the sheet; The material of the dry etching back sheet is a silicon wafer.
[0016] Compared with the prior art, the present application has the following beneficial effects: 1. The present application retains the original process complexity, and forms a set of methods for double-layer MEMS chip open structure by local process development and optimization, realizes the manufacturing of wafer-level MEMS chip open structure, and is easy to separate into chips, and the subsequent device performance can be quickly verified through chip-level ceramic packaging, and the batch processing problem of open structure is solved.
[0017] 2. The present application can ensure wafer-level dry etching in the processing process, can fully reflect the actual production processing state, and can batch-produce open chips, and provides a more perfect wafer-level MEMS open structure process solution for MEMS chip verification, product trial production, etc.
[0018] The present application will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 The present application is an open structure with a pre-planned blind slot; Figure 2 The present application is an SOI wafer or silicon wafer with a micro groove and a substrate layer, and an anodic bonding or silicon-silicon bonding is completed; Figure 3 The present application is a film pasting and pre-cut wafer slicing schematic diagram; Figure 4 The present application is a metal electrode schematic diagram; Figure 5 The present application is a DRIE photolithography schematic diagram; Figure 6 A schematic diagram of DRIE etching of the present application; Figure 7 A schematic diagram of hard mask metal plating of the present application.
[0020] In the figure, the reference signs are: 1-open chip area after dicing, 2-structure layer, 3-substrate layer, 4-metal electrode, 5-pre-dicing blind groove, 6-photolithography glue, 7-blue film (or UV film), 8-hard mask, 9-shallow groove, 10-dry etching back sheet. DETAILED DESCRIPTION
[0021] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme of the embodiments of the present application will be described in more detail below with reference to the drawings in the embodiments of the present application.
[0022] In the drawings, the same or similar reference signs represent the same or similar elements or elements having the same or similar functions throughout. The described embodiments are part of the embodiments of the present application, not all of the embodiments.
[0023] The embodiments described below with reference to the drawings are exemplary and are intended to explain the present application, and cannot be understood as a limitation of the present application. All other embodiments obtained by those skilled in the art on the basis of the embodiments in the present application without creative labor belong to the scope of protection of the present application.
[0024] The embodiments of the present application will be described in detail below with reference to the drawings. Figures 1-7 The embodiments of the present application will be described in detail below with reference to the drawings.
[0025] Embodiment 1 The present application provides a processing method of an open MEMS chip, which comprises the following steps: Step 1: Select a silicon wafer as a structure layer 2, form a shallow groove 9 by a photolithography etching process, the shallow groove thickness is 2 μm~50 μm, anode bond the structure layer 2 with a substrate layer 3 after forming the shallow groove, then thin the structure layer 2 to the designed thickness to obtain a wafer. The material of the substrate layer 3 is borosilicate glass sheet.
[0026] Step 2: Complete the film pasting on the wafer in the film pasting machine, and cover the blue film 7 on the surface of the structure layer. Here, the blue film material can be replaced by UV film.
[0027] Step 3: Pre-cut dicing, the dicing depth is determined according to the thickness of the substrate layer 3. Assuming that the thickness of the substrate layer 3 is 400 μm, the blind groove depth is pre-cut according to 250 μm~320 μm. If the blind groove is too deep, the wafer is easy to break in the subsequent process. If the blind groove depth is insufficient, the strength of the substrate layer 3 is too large, and it is not easy to separate after completing the chip.
[0028] Step 4: peel off the blue film 7, and control the temperature during the peeling process, the temperature range is 40-50℃, and the peeling process needs to be maintained for 5-20 minutes, and then the blue film can be carefully removed. If a UV film is selected, the UV film needs to be separated by ultraviolet irradiation.
[0029] Step 5: a metal layer is plated on the surface of the structure layer of the wafer reaching the designed thickness, the metal layer can be Al or other composite metals commonly used for electrodes such as Ti / Au or Cr / Au, and the total thickness of the metal layer is recommended to be 100 nm-2 μm, the metal layer is too thin to meet the requirements of gold wire bonding, and the metal layer is too thick to affect the subsequent high-precision photolithography precision.
[0030] Step 6: after the photolithography and metal etching, electrodes are formed; the photoresist 6 finally completed the patterning is reserved on the structure layer 2, and the photoresist 6 needs to be post-baked, and a hot plate or an oven can be selected.
[0031] Step 7: DRIE etching is performed, and the wafer with the pre-scribed blind groove 5 needs to be fixed on a dry etching back sheet 10 due to the influence of back helium during etching, and the normal dry etching process is completed, wherein the material of the dry etching back sheet is a silicon wafer.
[0032] Step 8: the chip finally completed with electrodes can be effectively separated by slight dicing, and subsequent ceramic vacuum packaging or open chip testing and verification can be performed as needed.
[0033] Embodiment 2 The application provides a processing method of an open MEMS chip, which comprises the following steps: Step 1: an SOI wafer is selected as the structure layer 2, a silicon wafer is selected as the substrate layer 3, a shallow groove 9 is formed on the substrate layer 3 through a photolithography etching process, the thickness of the shallow groove is 2-50 μm, the substrate layer 3 with the formed shallow groove is bonded with the structure layer 2 through silicon-silicon bonding, and then the structure layer 2 is thinned to a designed thickness to obtain a wafer.
[0034] Step 2: the wafer is completed with film pasting on a film pasting machine, and a blue film 7 is covered on the surface of the structure layer, and the material of the blue film can be considered to be replaced by a UV film.
[0035] Step 3: pre-dicing is performed, the dicing depth is determined according to the thickness of the substrate layer 3, assuming that the thickness of the substrate layer 3 is 400 μm, the blind groove depth is pre-cut according to 250-320 μm, the blind groove is too deep, the wafer is easily broken in the subsequent process, the blind groove depth is insufficient, and the strength of the substrate layer 3 is too large, and the wafer is not easy to separate after the chip is completed.
[0036] Step 4: peel off the blue film 7, which needs to be controlled in temperature, the temperature range is 40-50℃, and it needs to be kept for 5-20 minutes, and then it can be carefully removed. If the UV film is selected, it needs to be separated by ultraviolet irradiation.
[0037] Step 5: DRIE etching is performed, and the wafer with the pre-scribed blind groove 5 needs to be fixed on the dry etching back sheet 10 due to the influence of back helium during etching, and the normal dry etching process is completed, wherein the material of the dry etching back sheet is a silicon wafer.
[0038] Step 6: using a silicon wafer or glass substrate with a designed hollow structure as a hard mask, the electrode is made after cooperating with the wafer completed by DRIE etching, and effective ohmic contact is formed after annealing. Specifically, the silicon wafer, glass substrate or metal material is used to make the hard mask 8, and the hollow pattern is processed according to the design requirements. The metal layer is plated through the hard mask 8 which has been processed, and the electron beam evaporation plating process or sputtering process is recommended. After back alignment photolithography patterning and metal etching, the electrode is formed, and then effective ohmic contact is formed after annealing. Finally, the patterned photoresist 6 is retained on the structure layer 2, and the photoresist 6 needs to be completed after baking, and the hot plate or oven can be selected.
[0039] The metal layer can be Al, or other composite metals commonly used for making electrodes such as Ti / Au or Cr / Au, etc. The total thickness of the metal layer is recommended to be 100 nm-2 μm. If the metal layer is too thin, it cannot meet the requirements of gold wire bonding, and if the metal layer is too thick, it will affect the subsequent high-precision photolithography precision.
[0040] Step 7: after separating the hard mask 8, the MEMS chip with the pre-scribed blind groove 5 is finally completed, and at this time, batch testing can be performed through the probe station, and if necessary, the chip can be separated along the pre-scribed blind groove 5 to form an independent open MEMS chip.
[0041] Example 3 The present application is described by a set of process flows, and the key steps include the following steps: Step 1: select a silicon wafer as the structure layer 2, which can also be an SOI wafer, and the structure layer of the SOI wafer is determined by design. A shallow groove 9 is formed by photolithography etching process, and the thickness of the shallow groove is 2-50 μm. The structure layer 2 with the shallow groove is anodically bonded with the substrate layer 3, wherein the material of the substrate layer 3 is borosilicate glass sheet, and the material can also be a silicon wafer, and when the silicon wafer is used, the bonding process is replaced by silicon-silicon bonding; as shown in Figure 2
[0042] Step 2: complete the film sticking on the wafer sticking machine, and cover the structure layer surface with the blue film 7, wherein the blue film material can be replaced by the UV film; as shown in Figure 3 As shown.
[0043] Step 3: Perform pre-dicing. The dicing depth is determined based on the thickness of substrate layer 3. Assuming substrate layer 3 is 400μm thick, if substrate layer 3 is a borosilicate glass sheet, the dicing depth should be 250μm~320μm; if substrate layer 3 is a silicon wafer, the dicing depth should be 200μm~300μm. If the dicing is too deep, the wafer will be prone to fragmentation in subsequent processes. If the dicing depth is insufficient, the strength of substrate layer 3 will be too high, making it difficult to separate the wafer after chip completion. Figure 3 As shown.
[0044] Step 4: Peel off the blue film 7. Temperature control is required when peeling off the blue film 7; the temperature range should be 40℃~50℃, maintained for 5~20 minutes, then carefully peel it off. If a UV film is used, separation via ultraviolet irradiation is required; Figure 6 As shown.
[0045] Step 5: Deposit a metal layer on the surface of the wafer with the substrate layer, once the designed thickness structural layer has been achieved. This metal layer can be Al, or other composite metals commonly used for electrodes, such as Ti / Au or Cr / Au. The total thickness of the metal film is recommended to be 100nm~2μm. If the metal film is too thin, the gold wire bonding requirements cannot be met; if the film is too thick, it will affect the accuracy of subsequent high-precision photolithography. After photolithographic patterning and metal etching, electrodes are formed; such as... Figure 3 As shown.
[0046] Step 6: Thin structure layer 2 to the designed thickness. If structure layer 2 is an SOI wafer, remove the SOI wafer support layer and buried oxide layer, ultimately retaining the silicon layer of the designed thickness. Perform photolithography on top of structure layer 2, finally completing the patterned photoresist 6 on structure layer 2. The photoresist needs to be post-baked, which can be done using a hot plate or oven; Figure 5 As shown.
[0047] Step 7: Perform DRIE etching. Typically, wafers with pre-defined blind trenches 5 require attachment to a silicon wafer as a dry etching backing film 10 for fixation during etching due to the influence of back helium, thus completing the normal dry etching process; For example... Figure 6 As shown.
[0048] Step 8: If process limitations or other issues prevent the metal electrode fabrication from being completed in the first step, refer to this step. The hard mask 8, which has already been processed, is typically made of silicon wafer and features a cutout pattern according to the design requirements. It can also be made of metal. The metal film deposition is primarily achieved using the hard mask 8. Electron beam evaporation deposition is recommended, although sputtering can also be used. Figure 7 As shown.
[0049] Step 9: After the hard mask 8 is removed, the MEMS chip with the pre-etched blind trench 5 is finally completed, and can be tested in batches through a probe station. If necessary, the chip can be separated along the pre-etched blind trench 5 through a dicing operation, as shown in Figure 1
[0050] Through the method, the open-structure MEMS chip can be effectively processed.
[0051] Thus, the purpose of the present application is achieved.
[0052] The above merely describes the preferred embodiments of the present application, but not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A method for fabricating an open MEMS chip, characterized in that, Includes the following steps: Shallow trenches are formed on the structural layer or the substrate layer, the two are bonded together, and then the structural layer is thinned to the designed thickness to obtain a wafer; Apply a film to the surface of the wafer structure layer; Pre-cutting and dicing are performed to create blind grooves of a certain depth in the substrate layer; Separate the film from the wafer; Electrodes are fabricated on the structural layer, then photolithography is performed, and finally the patterned photoresist is left on the structural layer. The structure is etched to release it, and the final chip is formed by cleaving.
2. The fabrication method for an open MEMS chip according to claim 1, characterized in that, A silicon wafer or SOI wafer is selected as the structural layer, and shallow trenches are formed by photolithography etching process. The thickness of the shallow trenches is 2μm~50μm. The structural layer with shallow trenches is then bonded to the substrate layer.
3. The fabrication method for an open MEMS chip according to claim 2, characterized in that, When the substrate material is borosilicate glass, anodic bonding is performed; when the substrate material is silicon, silicon-silicon bonding is performed.
4. The fabrication method for an open MEMS chip according to claim 2, characterized in that, The structural layer is thinned to the designed thickness. If the structural layer is an SOI wafer, the support layer and buried oxide layer of the SOI wafer are removed, and finally the silicon layer of the designed thickness is retained.
5. The fabrication method for an open MEMS chip according to claim 1, characterized in that, The wafer is coated with a film on a film laminator, and a blue film or UV film is applied to the surface of the structural layer.
6. The fabrication method for an open MEMS chip according to claim 3, characterized in that, Pre-cutting and dicing are performed, and the dicing depth is determined according to the thickness of the substrate. When the substrate material is borosilicate glass, the blind trench depth is 5 / 8 to 4 / 5 of the substrate thickness; when the substrate material is silicon wafer, the blind trench depth is 1 / 2 to 3 / 4 of the substrate thickness.
7. The fabrication method for an open MEMS chip according to claim 5, characterized in that, When the film is blue, the peeling process requires temperature control, with a temperature range of 40℃~50℃, and a duration of 5~20 minutes; when the film is UV, the peeling process requires ultraviolet irradiation.
8. The fabrication method for an open MEMS chip according to claim 1, characterized in that, The fabrication of electrodes on the structural layer specifically involves: Metal layers are deposited on the surface of the structural layer of the wafer using sputtering or evaporation methods. Electrodes are formed after back-aligned photolithography patterning and metal etching. The metal layer material is Al, a composite metal Ti / Au, or Cr / Au, and the thickness of the metal layer is 100nm~2μm.
9. The fabrication method for an open MEMS chip according to claim 1, characterized in that, The fabrication of electrodes on the structural layer specifically involves: Using a silicon wafer or glass substrate with a designed hollow structure as a hard mask, electrodes are fabricated in conjunction with a wafer after DRIE etching and photoresist removal, and then annealed to form effective ohmic contacts.
10. The fabrication method for an open MEMS chip according to claim 1, characterized in that, During DRIE etching, the wafer needs to be fixed on the dry etching backing to complete the normal dry etching process. Finally, the wafer is cleaved to form the final chip. The backsheet material for dry etching is a silicon wafer.