Memory mapping method and electronic equipment

Abstract

The invention provides a memory mapping method and electronic equipment. In the method, the electronic equipment detects an access request for a first virtual address, responds to the access request and detects whether a preset condition for performing large page mapping is met or not; if a preset condition for carrying out large page mapping is met, establishing large page mapping comprising the first virtual address; and if the preset condition for carrying out large page mapping is not met, establishing standard page mapping of the first virtual address. Through the method, a proper memory mapping mode can be dynamically selected. Compared with a memory mapping mode only adopting a standard page, the memory mapping frequency can be reduced, the memory mapping efficiency can be improved, and the waste of processing performance can be reduced. Compared with a fixed-size large-page mapping mode, memory expansion caused by the large-page mapping mode can be reduced, memory waste can be reduced, and large-page performance can be optimized.

Description

Technical Field

[0001] This application relates to the field of computer storage, and more particularly to a memory mapping method and an electronic device. Background Technology

[0002] The memory management uses a paging memory management mechanism. The application's virtual memory space is divided into multiple fixed-size virtual pages, also known as "standard pages" or "small pages." The physical memory space is divided into physical pages of the same size. For example, the standard page size in electronic devices such as mobile phones is generally 4 kilobytes (KB), also known as 4K. Large pages, also called large page memory, refer to physical pages that are many times larger than standard pages, such as 16K large pages, 32K large pages, 64K large pages, and 128K large pages.

[0003] To enhance the flexibility of memory management, hybrid big-page technologies such as microkernel dynamic big-page and transparent big-page exist, which can achieve dynamic allocation of memory. By dynamically allocating big pages and standard pages with different memory granularities, the efficiency of memory management can be improved.

[0004] In the field of memory mapping, determining the granularity of mapping memory pages from virtual addresses to physical addresses is also worth studying. Summary of the Invention

[0005] This application provides a memory mapping method and an electronic device, which provides a technical solution that can dynamically select a suitable memory mapping method, thereby achieving a balance between memory mapping efficiency and memory waste.

[0006] In a first aspect, this application provides a memory mapping method that can be executed by an electronic device. The method includes: detecting an access request to a first virtual address; responding to the access request, detecting whether a preset condition for performing massive page mapping is met; when the preset condition is met, establishing a first mapping relationship between L consecutive virtual addresses and L consecutive physical addresses; wherein the L consecutive virtual addresses encompass the first virtual address, and L is a positive integer greater than 1; and when the preset condition is not met, establishing a second mapping relationship between the first virtual address and the first physical address.

[0007] In this method, when a program needs to access memory, memory mapping is performed in response to the program's access. Based on pre-configured judgment conditions, it is determined whether to perform huge page mapping or standard page mapping. This allows for dynamic selection of the appropriate memory mapping method. In some scenarios, huge page mapping can reduce the number of memory mappings and improve memory mapping efficiency, while in other scenarios, standard page mapping can reduce memory waste and optimize huge page performance. The term "covering" in this embodiment can be understood as the first virtual address being located between the start and end addresses of the N consecutive virtual addresses; that is, the huge page window corresponding to the N consecutive virtual addresses covers the virtual standard page corresponding to the first virtual address.

[0008] In one possible scenario, the preset conditions include, but are not limited to, at least one of the following:

[0009] (1) The virtual addresses within the first M consecutive large page windows adjacent to the first large page window containing the first virtual address have all been mapped to physical addresses using large pages; or, the first N consecutive virtual addresses adjacent to the first large page window have all been mapped to physical addresses using standard pages; or, the virtual addresses of the first Q consecutive pages adjacent to the first large page window have all been mapped to physical addresses using corresponding pages, wherein the first Q consecutive pages include L1 large page windows and L2 standard pages; wherein M, N, L1, and L2 are positive integers greater than 1; or,

[0010] (2) The first virtual address is located within a preset range before the first large page window; wherein, the preset range is used to indicate the proportion of the memory region from the starting virtual address of the first large page window to the first virtual address, which is less than a preset proportion threshold.

[0011] In this scenario, the probability of whether the current access is a continuous access can be determined by whether the preceding part of the memory space adjacent to the virtual address being accessed has been accessed. For example, if the current part of the memory space has been accessed, it can be determined that the probability of the current access is a continuous access, so a large page mapping method can be used to reduce the number of memory mappings. On the other hand, if the current part of the memory space has not been accessed, it can be determined that the probability of the current access is a continuous access is low, so a standard page mapping method can be used to reduce memory waste.

[0012] In one possible scenario, the method further includes: saving the first mapping relationship to a page table; wherein the first mapping relationship corresponds to a page table entry in the page table; or, saving the second mapping relationship to the page table; wherein the second mapping relationship corresponds to a page table entry in the page table.

[0013] In this scenario, by storing the mapping relationships of massive page mappings or standard page mappings in the page table, it is possible to achieve true access to physical memory based on the virtual addresses and page tables accessed by the program, thereby ensuring the accurate execution of the program. Furthermore, by dynamically selecting an appropriate mapping method, a balance can be achieved between memory mapping efficiency and memory waste. For example, massive page mapping can improve memory mapping efficiency, while standard page mapping can reduce memory waste. Specifically, the page table entries corresponding to the first mapping relationship can implement mapping when the program accesses multiple virtual addresses, thus avoiding the need for memory mapping every time the program accesses a virtual address.

[0014] In one possible scenario, the access request is the first access request to the first virtual address. In this scenario, in response to the program's first access to the virtual address, the electronic device can trigger memory mapping and dynamically select an appropriate memory mapping method to establish a mapping between the virtual address and the physical address.

[0015] In one possible scenario, the first virtual address corresponds to a first virtual standard page in a first virtual memory space, which is the virtual memory space allocated by the electronic device for the first program, and the size of the first virtual standard page is 4K.

[0016] In one possible scenario, the first physical address corresponds to the first physical standard page in the first physical memory space, and the size of the first physical standard page is 4K.

[0017] In one possible scenario, L is 2 to the power of P, where P is a positive integer greater than or equal to 1.

[0018] Secondly, this application provides an electronic device that includes multiple functional modules; the multiple functional modules interact with each other to implement the methods performed by the electronic device in the first aspect and its various embodiments described above.

[0019] The multiple functional modules can be implemented based on software, hardware, or a combination of software and hardware, and the multiple functional modules can be arbitrarily combined or divided based on specific implementations.

[0020] Thirdly, this application provides an electronic device including at least one processor and at least one memory, wherein the at least one memory stores computer program instructions, and when the electronic device is running, the at least one processor executes the methods described in the first aspect and its various embodiments.

[0021] Fourthly, this application also provides a computer program product containing instructions that, when the computer program product is run on a computer, cause the computer to perform the method executed by the electronic device in any of the above aspects and embodiments.

[0022] Fifthly, this application also provides a computer-readable storage medium storing a computer program that, when executed by a computer, causes the computer to perform the method executed by the electronic device in any of the above aspects and embodiments.

[0023] Sixthly, this application also provides a chip for reading a computer program stored in a memory and executing the method performed by the electronic device in any of the above aspects and embodiments.

[0024] Seventhly, this application also provides a chip system including a processor for supporting a computer device in implementing the methods executed by the electronic devices in any of the above aspects and embodiments. In one possible design, the chip system further includes a memory for storing programs and data necessary for the computer device. The chip system may be composed of chips or may include chips and other discrete devices.

[0025] For details on the beneficial effects of any of the second to seventh aspects and their possible designs, please refer to the beneficial effects of the various possible designs in the first aspect above; they will not be repeated here. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of a memory mapping method;

[0027] Figure 2 A schematic diagram of the hardware structure of a possible electronic device is shown;

[0028] Figure 3 A software architecture block diagram of an electronic device provided in an embodiment of this application;

[0029] Figure 4 A flowchart illustrating a memory mapping method provided in an embodiment of this application;

[0030] Figure 5 One of the example diagrams of large page mapping provided in the embodiments of this application;

[0031] Figure 6 Example diagram two of the large page mapping provided for embodiments of this application;

[0032] Figure 7 Example diagram three of the large page mappings provided in the embodiments of this application;

[0033] Figure 8 Example diagram four of the large page mapping provided for embodiments of this application;

[0034] Figure 9 Fifth example diagram of large page mapping provided for embodiments of this application;

[0035] Figure 10 Example diagram six of the large page mapping provided for embodiments of this application;

[0036] Figure 11 This is another flowchart illustrating a memory mapping method provided in an embodiment of this application. Detailed Implementation

[0037] The embodiments of this application will now be described in detail with reference to the accompanying drawings and examples.

[0038] The method provided in this application can be applied to the field of computer storage technology in electronic devices, and specifically to the field of memory management technology in hybrid big-page scenarios.

[0039] First, some technical concepts involved in this application will be explained:

[0040] (1) Virtual page, also known simply as "virtual page". A virtual page is an abstract concept in a computer system that divides a program's virtual memory space into fixed-size blocks called "pages". The standard size of each page is usually 4K, and the entire virtual memory space is divided into contiguous pages. Each virtual memory space corresponds to a virtual address, and to improve memory management efficiency, programs typically access virtual addresses. One program can correspond to one process; in more complex cases, one program can correspond to multiple processes. This application uses a program as an example for illustration.

[0041] (2) Memory Mapping. Virtual pages operate based on paging-based memory management. After the operating system allocates virtual memory space for a program, when the program needs to access a virtual address within that virtual memory space for the first time, the operating system first establishes a mapping between that virtual address and a physical address in the physical memory space. The operating system then stores this mapping in the program's corresponding page table. Therefore, when the program subsequently accesses that virtual address, it can determine its corresponding physical address by querying the page table, thus enabling actual access to physical memory. This access can include reading or writing.

[0042] Therefore, address mapping is implemented through page tables. Each program has its own page table. The page table records the mapping relationship between virtual addresses and physical addresses in memory. By looking up the page table, the operating system can find the required physical page in order to read the data stored in that physical page or write data to that physical page.

[0043] For example, Figure 1 This is a schematic diagram of a memory mapping method. Memory mapping methods can include massive page mapping and standard page mapping.

[0044] like Figure 1 Page table 1 in the example shows the mapping relationship obtained using the big page mapping method, which can map the virtual addresses of big page windows 101 to 104 to physical addresses. Page table 1 uses a big page window of 16K, which includes four standard pages, as an example. After establishing the mapping between virtual and physical addresses using the big page mapping method, as shown... Figure 1 Page table 1 shown may include 4 page table entries, that is, large page windows 101 to 104 each correspond to 1 page table entry.

[0045] After establishing such Figure 1 After the mapping shown in Table 1, the four consecutive virtual standard pages covered by large page window 101 can be called "virtual large pages" (large page windows 102-104 are similar), and the four consecutive physical standard pages corresponding to these virtual large pages can be called "physical large pages". There is a mapping relationship between the virtual addresses corresponding to the four consecutive virtual standard pages covered by large page window 101 and the physical addresses corresponding to the four consecutive physical standard pages mentioned above.

[0046] like Figure 1 Page table 2 in the diagram shows the mapping relationship obtained using the standard page mapping method, which can map the virtual addresses of standard pages 105 to 120 to physical addresses. Additionally, as... Figure 1 As shown, a small rectangle in the physical address space represents a 4KB standard page, with black indicating that the page is already in use. After establishing the mapping between virtual and physical addresses using standard page mapping, as shown... Figure 1 Page table 2 shown may include 16 page table entries, that is, standard pages 105 to 120 each correspond to 1 page table entry.

[0047] Therefore, compared to the standard page mapping method, using big page mapping can reduce the number of page table entries, thus reducing the number of mappings and improving memory mapping efficiency and time efficiency. However, on the other hand, it may lead to memory bloat, which means wasting memory space and reducing space efficiency.

[0048] In view of this, embodiments of this application provide a memory mapping method. In this method, when a scenario where big page mapping is detected is possible, load awareness determines whether to use big page mapping to establish the mapping between virtual and physical addresses if preset conditions are met; otherwise, standard page mapping is used. Therefore, the method provided by this application can dynamically select a suitable memory mapping method. Furthermore, in some implementations, when performing big page mapping, a suitable big page granularity (or a suitable big page size) can be dynamically selected. This reduces the number of memory mapping operations compared to using only 4K standard pages, improving memory mapping efficiency and reducing wasted processing performance. Moreover, compared to using fixed-size big page mapping, it reduces memory bloat caused by big page mapping, reduces memory waste, and optimizes big page performance.

[0049] The technical solutions in this application can be applied to electronic devices, which can be any device that requires memory mapping. For example, electronic devices can be mobile phones, tablets, wearable devices (e.g., watches, bracelets, etc.), in-vehicle devices, augmented reality (AR) / virtual reality (VR) devices, smart home devices (e.g., smart TVs, etc.), and other similar devices. It is understood that this application does not impose any limitations on the specific type of electronic device.

[0050] The electronic devices to which this application's embodiments can be applied include, but are not limited to, those equipped with... Alternatively, it can be an electronic device running another operating system. For example, the electronic device described in the foregoing embodiments can be used.

[0051] Figure 2 A schematic diagram of the hardware structure of a possible electronic device is shown. The electronic device 200 includes components such as: a radio frequency (RF) circuit 210, a power supply 220, a processor 230, a memory 240, an input unit 250, a display unit 260, an audio circuit 270, a communication interface 280, and a Wi-Fi module 290. Those skilled in the art will understand that... Figure 2 The hardware structure of the electronic device 200 shown in the figure does not constitute a limitation on the electronic device 200. The electronic device 200 provided in the embodiments of this application may include more or fewer components than shown, may combine two or more components, or may have different component configurations. Figure 2 The various components shown can be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application-specific integrated circuits.

[0052] The following is combined with Figure 2 The various components of the electronic device 200 will be described in detail below:

[0053] The RF circuit 210 can be used for receiving and transmitting data during communication or a call. Specifically, after receiving downlink data from the base station, the RF circuit 210 sends it to the processor 230 for processing; additionally, it sends uplink data to be transmitted to the base station. Typically, the RF circuit 210 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier (LNA), a duplexer, etc.

[0054] Furthermore, the RF circuit 210 can also communicate with other devices via a wireless communication network. The wireless communication can use any communication standard or protocol, including but not limited to Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), email, and Short Messaging Service (SMS).

[0055] Wi-Fi technology is a short-range wireless transmission technology. The electronic device 200 can connect to an access point (AP) via the Wi-Fi module 290, thereby enabling access to the data network. The Wi-Fi module 290 can be used for receiving and sending data during communication.

[0056] The electronic device 200 can physically connect to other devices through the communication interface 280. Optionally, the communication interface 280 can be connected to the communication interfaces of other devices via a cable to enable data transmission between the electronic device 200 and other devices.

[0057] The electronic device 200 can also perform communication services and interact with other electronic devices. Therefore, the electronic device 200 needs to have data transmission capabilities, meaning it needs to include a communication module. Although Figure 2The RF circuit 210, the Wi-Fi module 290, and the communication interface 280 are shown, but it is understood that the electronic device 200 contains at least one of the above-mentioned components or other communication modules (such as a Bluetooth module) for data transmission.

[0058] The memory 240 can be used to store software programs and modules. The processor 230 executes various functional applications and data processing of the electronic device 200 by running the software programs and modules stored in the memory 240. Optionally, the memory 240 may mainly include a program storage area and a data storage area. The program storage area may store the operating system (mainly including the software programs or modules corresponding to the kernel layer, system layer, application framework layer, and application layer).

[0059] Furthermore, the memory 240 may include RAM 241, i.e., high-speed random access memory, and may also include ROM 242, i.e., non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. In this embodiment, during program execution, a technical solution is provided to map the virtual address of RAM 241 to the physical address of RAM 241. Memory mapping can be achieved through a suitable memory mapping method, and a suitable large page granularity (or suitable large page size) can be dynamically selected.

[0060] The input unit 250 can be used to receive editing operations on various types of data objects, such as numbers or characters, input by the user, and to generate key signal inputs related to user settings and function control of the electronic device 200. Optionally, the input unit 250 may include a touch panel 251 and other input devices 252.

[0061] The touch panel 251, also known as a touch screen, can collect user touch operations on or near it (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near the touch panel 251), and drive corresponding connection devices according to a pre-set program. In this embodiment, the touch panel 251 can collect user operations on or near it.

[0062] Optionally, the other input device 252 may include, but is not limited to, one or more of the following: physical keyboard, function keys (such as volume control buttons, power buttons, etc.), trackball, mouse, joystick, etc.

[0063] The display unit 260 can be used to display information input by the user or information provided to the user, as well as various menus of the electronic device 200. The display unit 260 is the display system of the electronic device 200, used to present the interface and realize human-computer interaction. The display unit 260 may include a display panel 261. Optionally, the display panel 261 may be configured as a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like. In this embodiment, the display unit 260 can be used to display the user interface.

[0064] The processor 230 is the control center of the electronic device 200. It connects various components via various interfaces and lines, and executes software programs and / or modules stored in the memory 240, as well as calling data stored in the memory 240, to perform various functions and process data of the electronic device 200, thereby enabling various services based on the electronic device 200. In this embodiment, the processor 230 can be used to implement a memory mapping method provided in this embodiment.

[0065] The electronic device 200 also includes a power supply 220 (such as a battery) for supplying power to various components. Optionally, the power supply 220 can be logically connected to the processor 230 through a power management system, thereby enabling the power management system to manage functions such as charging, discharging, and power consumption.

[0066] like Figure 2 As shown, the electronic device 200 also includes an audio circuit 270, a microphone 271, and a speaker 272, providing an audio interface between the user and the electronic device 200. The audio circuit 270 converts audio data into signals recognizable by the speaker 272 and transmits the signals to the speaker 272, where the speaker 272 converts them into sound signals for output. The microphone 271 collects external sound signals (such as human speech or other sounds) and converts the collected external sound signals into signals recognizable by the audio circuit 270, sending them to the audio circuit 270. The audio circuit 270 can also convert the signals transmitted by the microphone 271 into audio data, and then output the audio data to the RF circuit 210 for transmission to, for example, another electronic device, or output the audio data to the memory 240 for further processing.

[0067] Although not shown, the electronic device 200 may also include a camera, at least one sensor, etc., which will not be described in detail here. The at least one sensor may include, but is not limited to, a pressure sensor, a barometric pressure sensor, an accelerometer, a distance sensor, a fingerprint sensor, a touch sensor, a temperature sensor, etc.

[0068] The operating system (OS) involved in this application embodiment is the most basic system software running on the electronic device 200. The software system of the electronic device 200 can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application embodiment takes an operating system adopting a layered architecture as an example to illustrate the software architecture of the electronic device 200.

[0069] Figure 3 This is a software architecture block diagram of an electronic device provided as an embodiment of this application. For example... Figure 3 As shown, the software architecture of an electronic device can be a layered architecture. For example, the software can be divided into several layers, each with a clear role and division of labor. Layers communicate with each other through software interfaces. In some embodiments, the operating system is divided into five layers, from top to bottom: the application layer, the application framework layer (framework, FWK), the runtime and system libraries, the kernel layer, and the hardware layer.

[0070] The application layer can include a series of application packages. For example... Figure 3 As shown, the application layer can include the user interface (UI), camera, settings, skin modules, third-party applications, etc. Third-party applications can include, for example, wireless local area network (WLAN) applications, music, call functions, Bluetooth, and video.

[0071] In one possible implementation, the application can be developed using Java, by calling the application programming interface (API) provided by the application framework layer. Developers can then interact with the underlying operating system layers (such as the hardware layer and kernel layer) to develop their own applications. This application framework layer primarily consists of a series of services and management systems within the operating system.

[0072] The application framework layer provides application programming interfaces and a programming framework for applications within the application layer. The application framework layer includes some predefined functions. For example... Figure 3As shown, the application framework layer may include a view system, activity manager, window manager, content provider, phone manager, resource manager, notification manager, etc.

[0073] The Activity Manager manages the lifecycle of each application and provides commonly used navigation and back functions, offering an interactive interface for all program windows.

[0074] The window manager is used to manage windowed applications. It can obtain the screen size, determine if a status bar is present, lock the screen, and capture screenshots. The content provider stores and retrieves data, making this data accessible to applications. This data may include videos, images, audio, made and received phone calls, browsing history and bookmarks, phone books, etc.

[0075] A view system includes both visual and non-visual controls, such as controls that display text and controls that display images. View systems can be used to build applications. A display interface can consist of one or more views. For example, a display interface including a text message notification icon could include views that display text and views that display images.

[0076] A phone manager is used to provide communication functions for electronic devices. For example, it manages call status (including connection and disconnection).

[0077] The file explorer provides applications with various resources, such as localized strings, icons, images, layout files, video files, and more.

[0078] The notification manager allows applications to display notifications in the status bar. These notifications can be used to deliver informational messages and can disappear automatically after a short pause, requiring no user interaction. For example, the notification manager can be used to notify users of download completion or message alerts. The notification manager can also display notifications as icons or scrolling text in the top status bar, such as notifications from background applications, or as dialog boxes on the screen. Examples include displaying text messages in the status bar, emitting sounds, vibrating electronic devices, and flashing indicator lights.

[0079] The runtime includes the core libraries and the virtual machine. The runtime is responsible for the scheduling and management of the operating system.

[0080] The core library consists of two parts: one part contains the functionalities that the Java language needs to call, and the other part contains the core libraries of the operating system. The application layer and application framework layer run in the virtual machine. The virtual machine executes the Java files of the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0081] A system library can include multiple functional modules. For example: a surface manager, a media framework, a 3D graphics processing library (e.g., OpenGL ES), a 2D graphics engine (e.g., SGL), etc.

[0082] The Surface Manager is used to manage the display subsystem and provides the blending of 2D and 3D layers for multiple applications.

[0083] The media framework supports playback and recording of various commonly used audio and video formats, as well as still image files. It supports multiple audio and video encoding formats, such as MPEG4, H.264, MP3, AAC, AMR, JPG, and PNG.

[0084] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0085] A 2D graphics engine is a drawing engine for 2D drawing.

[0086] In some embodiments, a 3D graphics processing library can be used to draw 3D motion trajectory images, and a 2D graphics engine can be used to draw 2D motion trajectory images.

[0087] The kernel layer is the layer between hardware and software. The kernel layer contains at least the display driver, camera driver, audio driver, and sensor driver.

[0088] The hardware layer can include various types of sensors, such as accelerometers, gravity sensors, and touch sensors.

[0089] Typically, an electronic device 200 can run multiple applications simultaneously. In a simpler scenario, one application corresponds to one process; in a more complex scenario, one application can correspond to multiple processes. Each process has a unique process ID.

[0090] It should be understood that in the embodiments of this application, "at least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c can be single or multiple. "Multiple" refers to two or more. "And / or" is used to describe the association relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship.

[0091] In addition, it should be understood that in the description of this application, the words "first" and "second" are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance or order.

[0092] It should be understood that the hardware structure of electronic devices can be as follows: Figure 2 As shown, the software system architecture can be as follows: Figure 3 As shown, the software programs and / or modules corresponding to the software system architecture in the electronic device can be stored in the memory 240, and the processor 230 can run the software programs and applications stored in the memory 240 to execute the flow of a memory mapping method provided in this application embodiment.

[0093] To facilitate understanding of the memory mapping method provided in this application, the following is combined with... Figures 4 to 11 The content shown describes the implementation process of the method provided in this application.

[0094] The method provided in this application can be applied to the field of memory management technology. It can be used to dynamically select an appropriate memory mapping method to establish a mapping between virtual addresses and physical addresses when it is necessary to establish a mapping between virtual addresses and physical addresses (such as when a program accesses a virtual address for the first time).

[0095] In one possible example, Figure 4 This is a flowchart illustrating a memory mapping method provided in an embodiment of this application. The method can be applied to electronic devices, specifically to memory mapping between virtual addresses and physical addresses. The process may include the following steps:

[0096] Step 400: Trigger memory mapping.

[0097] For example, when an electronic device detects processes such as mmap, populate, and page fault, it determines that page table mapping needs to be established, which triggers memory mapping. mmap is used to allocate virtual addresses for memory. When a program needs to access memory and a page fault is detected, it triggers the mapping of the virtual address to a physical address, thus enabling the mapping of a file or other object into memory. Populate is also a method of memory mapping, typically performing the mapping immediately without waiting for the program to access it.

[0098] In some embodiments, mmap, populate, page fault, etc., can be methods (or interfaces, functions) provided by the operating system. When these methods are called by a program running in the operating system, the operating system can detect such a call, thereby recognizing that memory mapping has been triggered. It is understood that this description only exemplifies several existing methods in the operating system that can trigger memory mapping, and the embodiments of this application do not limit the specific mechanism for triggering memory mapping.

[0099] Step 401: Check if large page mapping is possible. If yes, proceed to step 402; otherwise, proceed to step 404.

[0100] Electronic devices can detect whether large page mapping is possible in several ways. The following are some possible detection methods:

[0101] In method A), the operating system can determine whether large page mapping is possible based on predefined flags in the system settings.

[0102] For example, if the flag indicates big page mapping, then big page mapping can be performed; if the flag indicates standard page mapping, then big page mapping cannot be performed.

[0103] In some embodiments, the flag can indicate a large page mapping by using "1" and a small page mapping by using "0".

[0104] In method B), the operating system can determine whether massive page mapping is possible based on the program's access address. As explained above, the program's access address is generally a virtual address in the virtual memory space.

[0105] In some embodiments, the operating system can predefine virtual and physical addresses as large page groups. It is understood that when performing large page mapping between virtual and physical addresses, the predefined large page groups can be referenced to determine whether large page mapping is possible. This facilitates memory management and reduces the computational load of determining whether large page mapping is possible. Optionally, when the operating system performs large page mapping based on the program's access address, if it determines that none of the standard pages included in the target physical large page are mapped, then large page mapping is deemed possible; if it determines that the target physical large page contains mapped standard pages, then large page mapping is deemed not possible.

[0106] For example, Figure 5 An example diagram of a large page mapping provided for an embodiment of this application. For example... Figure 5As shown, a small rectangle in a virtual address can represent a standard page of 4K size. Taking the virtual address of an electronic device, which includes 0-15, as an example, large page groups can be formed on the virtual address, with each large page group serving as a large page window (or "large page window" etc.). For example, it could be: large page window 501 including virtual addresses 0-3, large page window 502 including virtual addresses 4-7, large page window 503 including virtual addresses 8-11, and large page window 504 including virtual addresses 12-15. Figure 5 The large page windows shown include four standard pages. Additionally, each large page window has a corresponding starting address; for example, large page window 501 starts at virtual address 0, large page window 502 starts at virtual address 4, large page window 503 starts at virtual address 8, and large page window 504 starts at virtual address 12.

[0107] like Figure 5 As shown, a small rectangle in the physical address can also represent a standard page of 4KB. Taking the physical addresses of an electronic device, which include 0-19, as an example, large page groups can also be formed on the physical addresses. These can be pre-configured as follows: large page group 505 including physical addresses 0-3, large page group 506 including physical addresses 4-7, large page group 507 including physical addresses 8-11, large page group 508 including physical addresses 12-15, and large page group 509 including physical addresses 16-19. Based on the large page grouping of virtual and physical addresses, during memory mapping, the large page window on the virtual address is mapped to the large page group on the physical address. This improves the efficiency of large page mapping and facilitates memory management.

[0108] In one possible scenario, when a program requests access to large page window 501, the operating system performs memory mapping in response to the program's access. Optionally, when the operating system maps large page group 505 as the destination physical large page to large page window 501, since the standard pages at physical addresses 0 and 1 included in large page group 505 have already been mapped, large page mapping is detected as not possible, i.e., large page mapping is unavailable. Alternatively, when the operating system maps large page group 506 as the destination physical large page to large page window 501, since the four standard pages included in large page group 506 are all free (or unmapped), large page mapping is detected as possible when large page window 501 is accessed, i.e., large page mapping is available.

[0109] Method C) can also detect whether big page mapping can be performed based on the access address, the size of consecutive free physical addresses, etc.

[0110] For example, Figure 6 Another example diagram of the large page mapping provided for embodiments of this application. For example... Figure 6As shown, a small rectangle in a physical address can represent a standard page of 4KB. Black indicates that the page is already occupied, for example, it has been mapped to a virtual address. Using the example of an electronic device's physical address range of 0-19, there are no pre-defined restrictions on the large page groups that can be mapped onto physical addresses.

[0111] In one possible scenario, the large page window 601 at the virtual address is a 16K large page. When a program requests access to the large page window 601, and the operating system intends to map the large page window 601 to memory starting from physical address 0, since the consecutive free memory pages starting from physical address 0 only include the three standard pages corresponding to 0-2, with a size of only 12K, it cannot meet the mapping requirement of a 16K large page. Therefore, it detects that large page mapping cannot be performed, that is, large page mapping is unavailable.

[0112] In another possible scenario, the virtual address big page window 601 is a 16K big page. When a program requests access to big page window 601, if the operating system intends to map big page window 601 to memory starting at physical address 4, then the contiguous free memory pages starting at physical address 4 include the four standard pages corresponding to 4-7, with a size of 16K, which can meet the mapping requirement of 16K big pages. Therefore, it is detected that big page mapping can be performed, that is, big page mapping is available.

[0113] Step 402: Determine whether to use massive page mapping based on preset conditions. If the preset conditions are met, massive page mapping can be used, and then proceed to step 403. If the preset conditions are not met, massive page mapping can be discontinued, and then proceed to step 404. The preset conditions are used for load awareness.

[0114] For example, preset conditions may include, but are not limited to, the following:

[0115] Method 1: Check whether the virtual address in the preceding large page window adjacent to the virtual address being accessed is mapped to the physical address using a large page mapping method.

[0116] If the virtual address in the preceding large page window adjacent to the virtual address being accessed is mapped to a physical address using a large page method, then according to the principle of spatial locality, the virtual address in the large page window containing the currently accessed virtual address has a higher probability of being accessed subsequently. Spatial locality is an important concept in computer science, referring to the tendency for accessed memory units to cluster in a small, contiguous region; this trend is particularly pronounced during program execution.

[0117] Therefore, if a large page mapping method is used to establish the mapping between the virtual address and the physical address within the large page window where the virtual address of the current access is located, then when the virtual address within the large page window where the virtual address of the current access is located is accessed subsequently, it is not necessary to perform the operation of establishing the mapping between the virtual address and the physical address again. This improves the efficiency of establishing the mapping between the virtual address and the physical address, that is, improves the efficiency of memory mapping.

[0118] For example, Figure 7 This is another example diagram of a large page mapping provided in an embodiment of this application. Assume the large page window containing the accessed virtual address is large page window 702, which contains four 4KB standard pages. If it is detected that the virtual address in the preceding large page window 701 adjacent to large page window 702 has already been mapped to a physical address using large page mapping, it can be determined that the virtual address in large page window 702 is likely to be accessed subsequently. Therefore, it can be determined that large page mapping should be used to establish the mapping relationship between the virtual address and the physical address in large page window 702. Thus, after establishing the mapping relationship between the virtual address and the physical address in large page window 702 using large page mapping, when the virtual address in large page window 702 is accessed subsequently, it is not necessary to perform the virtual address to physical address mapping operation again, thereby improving memory mapping efficiency.

[0119] Method 2: Have the virtual addresses of the preceding consecutive standard pages adjacent to the large page window containing the virtual address accessed this time been mapped to their physical addresses?

[0120] If the virtual addresses of the preceding consecutive standard pages adjacent to the page window containing the currently accessed virtual address have all been mapped to their physical addresses, then according to the principle of spatial locality, the virtual address within the page window containing the currently accessed virtual address has a higher probability of being accessed subsequently. The number of standard pages in the aforementioned "preceding consecutive standard pages" can be equal to the number of standard pages within the page window containing the currently accessed virtual address.

[0121] Therefore, if a large page mapping method is used to establish the mapping between the virtual address and the physical address within the large page window where the virtual address of the current access is located, then when the virtual address within the large page window where the virtual address of the current access is located is accessed subsequently, it is not necessary to perform the operation of establishing the mapping between the virtual address and the physical address again. This improves the efficiency of establishing the mapping between the virtual address and the physical address, that is, improves the efficiency of memory mapping.

[0122] For example, Figure 8This is another example diagram of a large page mapping method provided in this application embodiment. Assume the large page window containing the accessed virtual address is large page window 805, which contains four 4KB standard pages. If the virtual addresses of the four consecutive standard pages 801-804 adjacent to large page window 805 have already been mapped to physical addresses, it can be determined that the virtual address within large page window 805 is likely to be accessed subsequently. Therefore, it can be determined that large page mapping is used to establish the mapping relationship between the virtual address and the physical address within large page window 805. Thus, after establishing the mapping relationship between the virtual address and the physical address within large page window 805 using large page mapping, when the virtual address within large page window 805 is accessed subsequently, it is not necessary to perform the virtual address to physical address mapping operation again, thereby improving memory mapping efficiency.

[0123] It should be noted that methods 1 and 2 above are only one possible example.

[0124] For example, in Method 1, the criterion for determining whether to use the big page mapping method to establish the mapping between the virtual address and the physical address within the big page window containing the virtual address accessed this time can be "whether all the virtual addresses within the M consecutive big page windows adjacent to the big page window containing the virtual address accessed this time are mapped to the physical address using the big page mapping method". Here, M is a positive integer greater than or equal to 1.

[0125] For example, in Method 2, the criterion for determining whether to use big-page mapping to establish the mapping between virtual addresses and physical addresses within the big-page window containing the virtual address being accessed can be: whether the virtual addresses of the N consecutive standard pages adjacent to the big-page window containing the virtual address being accessed have all been mapped to physical addresses. Here, N is a positive integer greater than or equal to 1. N can be less than or greater than the number of standard pages within the big-page window containing the virtual address being accessed.

[0126] Alternatively, since the preceding pages adjacent to the large page window containing the virtual address being accessed may include large pages or standard pages, methods 1 and 2 above can be combined. For example, Figure 9This is another example diagram of a large page mapping provided in this application embodiment. Assume the large page window containing the accessed virtual address is large page window 904, which contains four 4KB standard pages. If the virtual addresses of the preceding large page window 903 and the preceding two standard pages 901-902 adjacent to large page window 904 have already been mapped to their physical addresses using the corresponding page method (which can also be understood as large page window 903 using large page method and standard pages 901-902 using standard page method), then it can be determined that the virtual address within large page window 904 has a high probability of being accessed subsequently. Therefore, it can be determined that large page mapping is used to establish the mapping relationship between the virtual address and the physical address within large page window 904. Thus, after establishing the mapping relationship between the virtual address and the physical address within large page window 904 using large page mapping, when the virtual address within large page window 904 is accessed subsequently, it is not necessary to perform the virtual address to physical address mapping operation again, thereby improving memory mapping efficiency.

[0127] based on Figure 9 For example, in this embodiment of the application, the criteria for determining whether to use the big page mapping method to establish the mapping between the virtual address and the physical address within the big page window containing the virtual address of the current access can be: whether the virtual addresses of the preceding L1 large page windows and the preceding L2 standard pages adjacent to and consecutive to the big page window containing the virtual address of the current access have all been mapped to physical addresses. Optionally, the sum of L1 and L2 can be set to Q, where Q can be a preset value, such as 3. This allows for a forward determination of whether the three adjacent consecutive pages (which can be large page windows or standard pages) have all been mapped, thereby determining whether to use the big page mapping method to establish the mapping between the virtual address and the physical address within the big page window containing the virtual address of the current access.

[0128] In some embodiments, M, N, L1, and L2 can be pre-configured.

[0129] In some embodiments, M, N, L1, and L2 can be adaptively adjusted based on memory usage. For example, when there is little free memory remaining, M, N, L1, and L2 can be adjusted to larger values ​​to increase the admission criteria for using the big page mapping method, thereby ensuring the success rate of big page mapping when it is determined to be used. Conversely, when there is plenty of free memory remaining, M, N, L1, and L2 can be adjusted to smaller values ​​to lower the admission criteria for using the big page mapping method, thereby increasing the likelihood of big page mapping and improving memory mapping efficiency.

[0130] Method 3: Is the virtual address being accessed located in the first half of the large page window containing the virtual address being accessed?

[0131] If the virtual address being accessed is located in the first half of the page window containing that virtual address, then using page mapping to establish the mapping between the virtual address and the physical address within the page window results in less memory waste. In other words, the memory region between the start address of the page window containing the virtual address and the virtual address itself occupies a smaller proportion of the entire virtual memory region covered by the page window.

[0132] Therefore, if a large page mapping method is used to establish the mapping between the virtual address and the physical address within the large page window where the virtual address of the current access is located, then when the virtual address within the large page window where the virtual address of the current access is located is accessed subsequently, it is not necessary to perform the operation of establishing the mapping between the virtual address and the physical address again. This improves the efficiency of establishing the mapping between the virtual address and the physical address, that is, improves the efficiency of memory mapping.

[0133] For example, Figure 10 This is yet another example diagram of a large page mapping provided for an embodiment of this application.

[0134] For example, let's take virtual address 5 as the virtual address accessed in this instance. Assume that, based on system configuration, the virtual memory region covered by the large page window 1001 containing virtual address 5 is virtual address 4 to virtual address 7. Then, the memory region between the starting address of large page window 1001 (virtual address 4) and the virtual address accessed in this instance (virtual address 5) accounts for 1 / 4 of the entire virtual memory region covered by large page window 1001. This proportion is relatively small, therefore, it can be determined that a large page mapping method should be used to establish the mapping between the virtual address and physical address of large page window 1001. Wherein, Figure 10 The slashes in the text indicate memory regions that the program may actually access.

[0135] Combination Figure 10 As shown, virtual addresses 4-7 within the large page window 1001 can be mapped to the memory space corresponding to physical addresses 4-7. Although the memory waste rate is 25% (the memory space corresponding to virtual address 4 and physical address 4 is often difficult to utilize), this single large page mapping enables direct access to the memory spaces corresponding to the three standard pages (virtual address 5-7 and physical address 5-7) without requiring further virtual-to-physical address mapping during subsequent accesses. This improves memory mapping efficiency and reduces performance loss.

[0136] Another example is taken, using virtual address 12 as the virtual address accessed in this instance. Assume that, based on system configuration, the virtual memory region covered by the large page window 1002 containing virtual address 12 is virtual address 8 to virtual address 15. Then, the memory region between the starting address of large page window 1002 (virtual address 8) and the virtual address accessed in this instance (virtual address 12) occupies 1 / 2 of the entire virtual memory region covered by large page window 1002, a relatively large proportion. Using large page mapping would result in significant memory waste (the memory space corresponding to virtual address 8-11 and physical address 8-11 would often be difficult to utilize). Therefore, it can be determined that large page mapping should not be used to establish the mapping between virtual and physical addresses within large page window 1002. Combined with... Figure 10 As shown, in scenarios where large page mapping is not used, standard page mapping can be performed on virtual address 12, virtual address 13, virtual address 14 and virtual address 15 respectively, thereby reducing memory waste (the memory space corresponding to virtual address 8-11 and physical address 8-11 can be reused).

[0137] from Figure 10 As can be seen from the embodiments of this application, there can be various large-page mappings with different granularities, such as Figure 10 The large page window 1001 shown is a 16K large page, and the large page window 1002 is a 32K large page. For example, the operating system can determine the granularity of large page mapping based on factors such as the size of memory requested by a program. It can be understood that the larger the size of memory requested by a program, the more granular the large page mapping can be determined by the operating system, thereby reducing the number of mapping operations.

[0138] It should be noted that the sequence numbers of virtual addresses and physical addresses do not need to correspond one-to-one. For example, virtual address 4-7 can also correspond to physical address 16-19, etc. The embodiments of this application do not limit the correspondence between virtual address 4-7 and physical address 4-7.

[0139] In some embodiments, a proportion threshold can also be configured. If the proportion of the memory region between the start address of the current virtual address and the current virtual address within the entire page window containing the current virtual address is less than the proportion threshold, then it can be determined that the mapping between the virtual address and the physical address within the page window containing the current virtual address will be established using big page mapping. Conversely, if the proportion of the memory region between the start address of the current virtual address and the current virtual address within the entire page window containing the current virtual address is greater than or equal to the proportion threshold, then it can be determined that the mapping between the virtual address and the physical address within the page window containing the current virtual address will not be established using big page mapping, and instead, standard page mapping will be used.

[0140] Optionally, the percentage thresholds for large pages of different granularities (or large page windows of different sizes) can be different. For example, the percentage threshold for a 16K large page could be 50%, for a 32K large page it could be 25%, and for a 64K large page it could be 12.5%. That is, the larger the large page window size, the smaller the corresponding percentage threshold. This avoids excessive memory waste caused by coarse-grained large pages (or large page window sizes).

[0141] It's important to note that, similar to the M, N, L1, and L2 settings in Methods 1 and 2, the ratio threshold can also be adaptively adjusted based on memory usage. For example, when there is little free memory remaining, the ratio threshold can be adjusted to a smaller value to increase the threshold for using big page mapping. This can be understood as ensuring that big page mapping only occurs when memory waste is minimal, thus preventing further rapid memory consumption when free memory is already scarce. Conversely, when there is plenty of free memory remaining, the ratio threshold can be adjusted to a larger value to lower the threshold for using big page mapping, thereby increasing the likelihood of big page mapping and improving memory mapping efficiency.

[0142] Step 403: Perform large page mapping.

[0143] It should be noted that the page granularity of big page mapping is not limited in this embodiment. The big page for big page mapping can include L standard pages. Here, L is 2 to the power of P, and P is a positive integer greater than or equal to 1. For example, L can be 16 (i.e., P is 4), in which case the big page for big page mapping can be 16K big pages; or L can be 32 (i.e., P is 5), in which case the big page for big page mapping can be 32K big pages, etc., or it can be big page mapping with various page granularities including 16K big pages and 32K big pages, etc. Big page mapping can reduce the number of memory mapping operations and reduce system performance loss.

[0144] Step 404: Perform standard page mapping. Standard page mapping can reduce the memory waste that may occur when mapping large pages.

[0145] The above process provides a method for determining the page granularity of memory mapping. By detecting different scenarios, it is possible to determine whether to use big page mapping or standard page mapping, thus balancing system performance and memory waste. When memory waste is low or the probability of big page access is high, big page mapping can be used to reduce system performance loss. Alternatively, when memory waste is high or the probability of big page access is low, standard page mapping can be used to reduce memory waste.

[0146] Based on the same concept, embodiments of this application also provide a memory mapping method, which can be executed by an electronic device. Figure 11This is another flowchart illustrating a memory mapping method provided in an embodiment of this application, referred to... Figure 11 The method includes the following steps:

[0147] S1101: An access request to the first virtual address was detected. For example, the access request may be the first access request to the first virtual address.

[0148] S1102: In response to the access request, detect whether the preset conditions for performing large page mapping are met.

[0149] S1103: When the preset condition is detected, a first mapping relationship is established between L consecutive virtual addresses and L consecutive physical addresses; wherein the L consecutive virtual addresses cover the first virtual address, and L is a positive integer greater than 1. It should be noted that the preset condition can be referred to the description of Method 1 and Method 2 in step 402 above, and will not be described in detail here.

[0150] S1104: When the preset condition is not met, a second mapping relationship is established between the first virtual address and the first physical address.

[0151] It is understandable that after establishing the first or second mapping relationship, the electronic device can save the first or second mapping relationship to the page table as a page table entry. In this way, when determining the physical memory actually accessed by the program, the electronic device can determine the physical address corresponding to the virtual address accessed by the program by querying the page table entry, thus enabling true access to physical memory.

[0152] It should be noted that this application Figure 11 The memory mapping method shown can be referred to in the above embodiments of this application for specific implementation, and repeated parts will not be described again.

[0153] Based on the above embodiments, this application also provides an electronic device, which includes multiple functional modules; the multiple functional modules interact to realize the functions performed by the electronic device in the methods described in the embodiments of this application. The multiple functional modules can be implemented based on software, hardware, or a combination of software and hardware, and the multiple functional modules can be arbitrarily combined or divided based on specific implementations. For example, [the following is an example of implementation details]. Figure 11 Steps 1101 to 1104 are performed by the electronic device in the illustrated embodiment.

[0154] Based on the above embodiments, this application also provides an electronic device, which includes at least one processor and at least one memory, wherein the at least one memory stores computer program instructions. When the electronic device is running, the at least one processor executes the functions performed by the electronic device in the various methods described in the embodiments of this application. For example, when executing... Figure 11 Steps 1101 to 1104 are performed by the electronic device in the illustrated embodiment.

[0155] Based on the above embodiments, this application also provides a computer program product, which includes a computer program (also referred to as code or instructions) that, when run, causes a computer to perform the methods described in the embodiments of this application.

[0156] Based on the above embodiments, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a computer, causes the computer to perform the methods described in the embodiments of this application.

[0157] Based on the above embodiments, this application also provides a chip for reading computer programs stored in a memory to implement the methods described in the embodiments of this application.

[0158] Based on the above embodiments, this application provides a chip system including a processor for supporting a computer device in implementing the methods described in the embodiments of this application. In one possible design, the chip system further includes a memory for storing necessary programs and data of the computer device. This chip system may be composed of chips or may include chips and other discrete devices. Those skilled in the art will understand that the embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0159] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0160] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0161] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0162] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope of protection of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A memory mapping method applied to electronic devices, characterized in that, The method includes: An access request to the first virtual address was detected; In response to the access request, check whether the preset conditions for large page mapping are met; When the preset condition is met, a first mapping relationship is established between L consecutive virtual addresses and L consecutive physical addresses; wherein, the L consecutive virtual addresses cover the first virtual address, and L is a positive integer greater than 1; When the preset conditions are not met, a second mapping relationship is established between the first virtual address and the first physical address.

2. The method according to claim 1, characterized in that, The preset conditions include at least one of the following: The virtual addresses within the first M consecutive large page windows adjacent to the first large page window containing the first virtual address have all been mapped to physical addresses using large pages; or, the first N consecutive virtual addresses adjacent to the first large page window have all been mapped to physical addresses using standard pages; or, the virtual addresses of the first Q consecutive pages adjacent to the first large page window have all been mapped to physical addresses using corresponding pages, wherein the first Q consecutive pages include L1 large page windows and L2 standard pages; wherein M, N, L1, and L2 are positive integers greater than 1; or, The first virtual address is located within a preset range before the first large page window; wherein, the preset range is used to indicate the proportion of the memory region from the starting virtual address of the first large page window to the first virtual address, which is less than a preset proportion threshold.

3. The method according to claim 1 or 2, characterized in that, The method further includes: Save the first mapping relationship to a page table; wherein the first mapping relationship corresponds to a page table entry in the page table; or... The second mapping relationship is saved to the page table; wherein the second mapping relationship corresponds to a page table entry in the page table.

4. The method according to any one of claims 1 to 3, characterized in that, The access request is the first access request to the first virtual address.

5. The method according to any one of claims 1 to 4, characterized in that, The first virtual address corresponds to the first virtual standard page in the first virtual memory space, which is the virtual memory space allocated by the electronic device for the first program, and the size of the first virtual standard page is 4 kilobytes (KB).

6. The method according to any one of claims 1 to 5, characterized in that, The first physical address corresponds to the first physical standard page in the first physical memory space, and the size of the first physical standard page is 4K.

7. The method according to any one of claims 1 to 6, characterized in that, L is 2 to the power of P, and P is a positive integer greater than or equal to 1.

8. An electronic device, characterized in that, Including processor and memory; The processor is configured to execute instructions stored in the memory to cause the electronic device to perform the method as described in any one of claims 1-7.

9. A computer storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the method as described in any one of claims 1-7.

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