Ion implantation method and device, storage medium and program product
By forming ion implantation layers with different implantation depths in multiple test structures, obtaining resistance values, and determining the relationship between implantation energy and depth, the problem of high cost of ion implantation detection is solved, and cost-effective ion implantation process control is achieved.
Patent Information
- Application Number
- CN202511312758.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-12
- Publication Date
- 2025-12-19
AI Technical Summary
In existing technologies, the detection cost of ion implantation effect is high, and the TOF-SIMS detection scheme is disposable, which means that the wafer cannot be reused.
By performing ion implantation in multiple test structures to form ion implantation layers with different implantation depths, the active region resistance value is obtained. The relationship between implantation depth and energy is determined by utilizing the relationship between implantation energy and dose, thereby determining the target implantation energy and avoiding fragmentation detection.
It reduces the detection cost of ion implantation effect, provides a reliable quantitative reference for ion implantation process, and reduces detection time and material waste.
Smart Images
Figure CN121171933A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to an ion implantation method, device, storage medium and program product. BACKGROUND
[0002] Ion implantation process is a core step in the transistor manufacturing process, and ion implantation determines the performance of the device.
[0003] The impact of ion implantation process on the device is usually determined by two important parameters: implantation energy and implantation dose. According to the actual needs, it is often necessary to continuously adjust the implantation energy and implantation dose in the same ion implantation process, so that the performance of the device reaches the target value.
[0004] Currently, the effect of implanted ions is detected by time-of-flight secondary ion mass spectrometry (TOF-SIMS). However, the TOF-SIMS detection scheme is a one-time detection, and after the wafer is processed, it cannot be used again, resulting in high implementation cost.
[0005] Under this background, how to provide a technical solution to reduce the detection cost of ion implantation effect has become a technical problem that technicians in the field need to solve urgently. SUMMARY
[0006] Therefore, the present application provides an ion implantation method, device, storage medium and program product, which can reduce the detection cost of ion implantation effect.
[0007] The present application provides an ion implantation method, comprising:
[0008] providing a plurality of test structures, each test structure comprising a substrate, the substrate having at least one active region, each active region having a predetermined active region width;
[0009] performing ion implantation on each test structure respectively to form an ion implantation layer in the substrate of the active region, wherein the implantation depth of the ion implantation layer in each test structure is the same, the implantation depth of the ion implantation layer between different test structures is different, and the implantation dose of each ion implantation is the same;
[0010] obtaining the active region resistance value of the ion implantation layer at different implantation depths in the substrate of the active region;
[0011] determining the relationship between the implantation depth and the implantation energy of the ion implantation layer in the substrate according to a plurality of active region resistance values and implantation energies, implantation doses and active region widths having a corresponding relationship;
[0012] determining the target implantation energy based on the target ion implantation layer to be formed by using the relationship between the implantation depth and the implantation energy.
[0013] Optionally, performing ion implantation on each test structure to form an ion implantation layer within the substrate of the active region includes:
[0014] A patterned photoresist layer is formed on the substrate of each test structure, the photoresist layer exposing the active region for forming the ion implantation layer;
[0015] Based on the photoresist layer, ion implantation is performed on the substrate corresponding to the exposed active region;
[0016] Remove the photoresist layer.
[0017] Optionally, the test structure further includes a silicide barrier layer located on the substrate;
[0018] During the formation of the patterned photoresist layer, the silicide barrier layer exposed by the photoresist layer is also removed.
[0019] Optionally, the active region resistance value of the ion implantation layer at different implantation depths within the substrate can be obtained through wafer acceptability testing.
[0020] Optionally, determining the relationship between the implantation depth and implantation energy of the ion implantation layer within the substrate based on multiple corresponding active region resistance values, implantation energy, implantation dose, and active region width includes:
[0021] Based on the active region resistance value, the active region width, and the resistance law, a first relationship between the active region resistance value, resistivity, and depth is determined.
[0022] Based on the injected dose and the active region width, a second relationship between the injected dose and resistivity is determined;
[0023] Based on the first relationship and the second relationship, a third relationship is determined between the active region resistance value and the injection depth;
[0024] Based on the third relational expression, and the corresponding active region resistance value and injected energy, the relationship between injection depth and injected energy is determined through a polynomial regression analysis algorithm.
[0025] Optionally, the third relation is:
[0026] R i :totaldose / (W*h i ) 2
[0027] Among them, R irepresents the resistance value of the active region of the ith test structure, total dose represents the injected dose, W represents the active region width, h i represents the injection depth of the ion implanted layer in the ith test structure.
[0028] Optionally, the determining of the target implantation energy based on the target ion implanted layer according to the relationship between the injection depth and the implantation energy comprises:
[0029] determining the injection depth information of the target ion implanted layer in the substrate according to the target ion implanted layer, the injection depth information comprising at least one target injection depth;
[0030] determining the target implantation energy corresponding to the at least one target injection depth according to the relationship between the injection depth and the implantation energy.
[0031] Optionally, the number of the active regions is one, and the resistance value of the test structure is taken as the resistance value of the active region.
[0032] Alternatively, the number of the active regions is more than one, and the resistance value of the test structure is taken as the resistance value of the active region divided by the number of the active regions.
[0033] Optionally, the type of the ion implanted in each test structure is the same.
[0034] Optionally, the ion implanted layer comprises at least one of:
[0035] N well;
[0036] P well;
[0037] N channel with normal threshold voltage;
[0038] P channel with normal threshold voltage;
[0039] P channel with high threshold voltage;
[0040] N channel with high threshold voltage;
[0041] N type deep field;
[0042] P type body region;
[0043] N type lightly doped drain region;
[0044] P type lightly doped drain region;
[0045] Heavily doped N type region;
[0046] Heavily doped P type region.
[0047] Correspondingly, the present application further provides an ion implantation device, comprising:
[0048] a processor configured to determine a target implant energy based on a target ion implant layer to be formed using a relationship between implant depth and implant energy, and generate a corresponding ion implant signal;
[0049] an ion implanter coupled to the processor and configured to perform ion implantation according to the target implant energy in response to the ion implant signal;
[0050] The relationship between implant depth and implant energy is determined by providing a plurality of test structures, each of which includes a substrate having at least one active region, each of the active regions having a predetermined active region width; performing ion implantation on each of the test structures to form an ion implant layer in the substrate of the active region, wherein the implant depth of the ion implant layer is the same in each of the test structures, the implant depth of the ion implant layer is different between different groups of test structures, and the implant dose of each ion implantation is the same; obtaining the active region resistance values of the ion implant layer at different implant depths in the substrate of the active region; and determining the relationship between implant depth and implant energy of the ion implant layer in the substrate based on a plurality of active region resistance values and implant energies, implant doses, and active region widths having a corresponding relationship.
[0051] The present application also provides a data processing device including a memory and a processor, wherein the memory is adapted to store one or more computer instructions, and the processor executes the computer instructions to perform the ion implant method of any one of the preceding embodiments.
[0052] The present application also provides a computer readable storage medium storing computer instructions, which, when executed, perform the ion implant method of any one of the preceding embodiments.
[0053] The present application also provides a computer program product including computer instructions, which, when executed by a processor, implement the ion implant method of any one of the preceding embodiments.
[0054] Compared with the prior art, the technical scheme of the present application has the following advantages:
[0055] The ion implantation method provided by the application can form an ion implantation layer in the substrate of the active region by performing ion implantation on each test structure. In each test structure, the implantation depth of the ion implantation layer is the same, and the implantation depth of the ion implantation layer is different between different test structures, so that the resistance value of the active region at different implantation depths of the ion implantation layer in the substrate can be obtained. The implantation energy determines the implantation depth, so according to the corresponding relationship between the resistance value of the active region and the implantation energy, the implantation dose and the width of the active region, the relationship between the implantation depth of the ion implantation layer in the substrate and the implantation energy can be determined. Thus, in determining the target ion implantation layer to be formed, the target implantation energy can be determined based on the relationship between the implantation depth and the implantation energy. That is, by determining the reliable quantitative relationship between the implantation energy and the implantation depth, the application can provide a reference for the selection of ion implantation process, without the need for fragment detection, so as to reduce the detection cost of ion implantation effect. BRIEF DESCRIPTION OF DRAWINGS
[0056] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the application or the prior art. Obviously, the drawings described below are only some embodiments of the application, and other drawings can also be obtained by those skilled in the art without creative labor.
[0057] Figure 1 A flowchart of an ion implantation method in an embodiment of the application is shown;
[0058] Figure 2 A schematic diagram of a test structure with different implantation depths in an embodiment of the application is shown;
[0059] Figure 3 And Figure 4 A schematic diagram of an ion implantation process of a test structure in an embodiment of the application is shown;
[0060] Figure 5 A flowchart of a method for determining the relationship between implantation depth and implantation energy in an embodiment of the application is shown;
[0061] Figure 6 A semiconductor structure with an ion implantation layer in an embodiment of the application is shown;
[0062] Figure 7 A schematic diagram of an ion implantation device in an embodiment of the application is shown. DETAILED DESCRIPTION
[0063] As described in the background, the TOF-SIMS detection scheme is a one-time detection, and the wafer cannot be used again after the fragment processing, and the implementation cost is high.
[0064] In the initial stage of research and development, the ion implantation process can be calibrated by TOF-SIMS. However, in the experimental stage, it is obviously unrealistic to use TOF-SIMS to detect the ion implantation process, because a complete transistor needs to be manufactured by performing multiple ion implantations, and the energy and dose of each ion implantation need to be adjusted, which makes the demand for monitoring fragments (for fragment detection) and testing extremely large, and the cost is too expensive, and a large amount of testing time is also required.
[0065] In order to solve the above technical problems, the present application provides an ion implantation method, which can form an ion implantation layer in the base of the active region by performing ion implantation on each test structure. In each test structure, the implantation depth of the ion implantation layer is the same, and the implantation depth of the ion implantation layer between different test structures is different, so that the resistance value of the active region of the ion implantation layer at different implantation depths in the base can be obtained. The implantation energy determines the implantation depth, so according to a plurality of groups of active region resistance values and implantation energies, implantation doses and active region widths, the relationship between the implantation depth of the ion implantation layer in the base and the implantation energy can be determined. Thus, in determining the target ion implantation layer to be formed, based on the relationship between the implantation depth and the implantation energy, the target implantation energy can be determined.
[0066] That is, by determining the reliable quantitative relationship between the implantation energy and the implantation depth, the present application can provide a reference for the selection of ion implantation process, without the need for fragment detection, so as to reduce the detection cost of ion implantation effect.
[0067] In order to make those skilled in the art have a clearer understanding of the technical concepts, technical principles, advantages and the like contained in the present application, the following will be described in detail with reference to the accompanying drawings, through specific embodiments, and in combination with specific application scenarios.
[0068] Referring to Figure 1 and Figure 2 , Figure 1 is a flowchart of an ion implantation method in an embodiment of the present application, Figure 2 is a schematic diagram of a test structure with different implantation depths in an embodiment of the present application.
[0069] As shown in Figure 1 and Figure 2 , steps S11 to S15 can be performed.
[0070] Step S11, providing a plurality of test structures, each of which includes a substrate having at least one active region, each of which has a preset active region width.
[0071] In some embodiments, the test structure can be a sheet resistance test structure. The formation of the sheet resistance test structure can refer to the description in the prior art.
[0072] In some embodiments, as shown in Figure 2 Three test structures G1, G2 and G3 are shown.
[0073] Further, each test structure can include a substrate 10 and an isolation structure 20 located in the substrate 10, wherein the area between any two adjacent isolation structures 20 is an active region, and one active region and the isolation structures 20 on both sides thereof constitute a test unit.
[0074] In this case, one test structure can include three test units.
[0075] In other words, by forming the isolation structure 20 in one substrate 10, the test structure is divided into one or more test units.
[0076] In some embodiments, the substrate 10 has at least one active region (not labeled in the figure), each of which has a preset active region width W, which can refer to the distance between adjacent isolation structures 20 in the direction parallel to the surface of the substrate 10.
[0077] In some embodiments, for one test structure, the substrate 10 has a preset length L.
[0078] It should be noted that first, Figure 2 The shape, number, etc. of the test structure are only examples for illustrating the test structure for performing ion implantation, and cannot be understood as a limitation of the present application; second, the test structure and the semiconductor device in the wafer are manufactured in the same semiconductor process, and the test structure and the semiconductor device have a mutual correspondence relationship. Each layer of interconnection line in the semiconductor device corresponds to the test line at the same layer in the test structure, and each plug in the semiconductor device corresponds to the test plug at the same layer in the test structure. Since the test structure and the semiconductor device are prepared in the same process and have a mutual correspondence relationship, the performance of the test structure can be determined by detecting the performance of the test structure, and the performance of the semiconductor device in the wafer can be determined; third, in the present embodiment, the active region width W can be 2 microns, and the preset length L can be 40 microns.
[0079] Step S12: Ion implantation is performed on each test structure to form an ion implantation layer in the substrate of the active region. The implantation depth of the ion implantation layer is the same in each test structure, but the implantation depth of the ion implantation layer is different between different test structures, and the implantation dose is the same for each ion implantation.
[0080] In some embodiments, ion implantation is performed on all test structures with different implantation energies but a consistent implantation dose. Since the implantation energy determines the implantation depth, ion implantation layers of varying depths can be formed within the active region substrate.
[0081] For example, see Figure 2 By performing ion implantation, ion implantation layers 30 with different implantation depths are formed within the active region substrate 10. Specifically, the implantation depth of the ion implantation layer 30 gradually increases with increasing implantation energy.
[0082] For example, for Figure 2 The three test structures shown employ different ion implantation energies during ion implantation to form an ion implantation layer 30 with an implantation depth of h1 in test structure G1, an ion implantation layer 30 with an implantation depth of h2 in test structure G2, and an ion implantation layer 30 with an implantation depth of h3 in test structure G3. Where h3 is greater than h2, and h2 is greater than h1.
[0083] In some embodiments, the implantation depth of the ion implantation layer 30 is the same for the same test structure. For example, for test structure G1, the implantation depth of the ion implantation layer 30 in the substrate 10 is h1; for test structure G2, the implantation depth of the ion implantation layer 30 in the substrate 10 is h2; and for test structure G3, the implantation depth of the ion implantation layer 30 in the substrate 10 is h3.
[0084] In some embodiments, the same implantation dose for each ion implantation means that the total ion dose implanted by the ion implanter in one session is the same.
[0085] Furthermore, by ensuring that the implantation dose is the same for each ion implantation, the resistance of the test structure depends on the implantation energy. Therefore, through data analysis, the relationship between implantation energy and resistance can be determined.
[0086] In some embodiments, the test structure may further include a gate structure, and the ion implantation layer may include, with the gate structure as the boundary, an ion implantation layer formed before the gate structure and an ion implantation layer formed on and after the gate structure.
[0087] For example, the ion implantation layer can include at least one of an N-well (NW), a P-well (PW), a regular threshold voltage N-channel (RVTN), a regular threshold voltage P-channel (RVTP), a high threshold voltage P-channel (HVTP), a high threshold voltage N-channel (HVTN), an N-type deep field (NDF), a P-type body region (Pbody), an N-type light doped drain region (NLDD), a P-type light doped drain region (PLDD), a heavily doped N-type region (NP), and a heavily doped P-type region (PP).
[0088] The voltage range of the regular threshold voltage N-channel is 0.3V to 0.5V, the voltage range of the regular threshold voltage P-channel is -0.5V to -0.3V, the voltage range of the high threshold voltage P-channel is -0.7V to -0.5V, the voltage range of the high threshold voltage N-channel is 0.5V to 0.7V, and the depth of the N-type deep field is about 2 microns.
[0089] It should be noted that, first, the types of the ion implantation layer listed in the above examples are only illustrative, and are used to represent the relationship between the implantation depth and the implantation energy of different ion implantation layers that can be obtained by the present scheme, and cannot be understood as a limitation on the present application; second, when a same semiconductor device includes multiple ion implantation layers, the ion implantation layers can be distributed in the substrate according to the distribution manner of the existing scheme; third, Figure 2 The position of the illustrative ion implantation layer is also illustrative, and is used to represent that the implantation depth can be changed by changing the implantation energy while other conditions remain unchanged.
[0090] In some embodiments, the step S12 can include: forming a patterned photoresist layer on the substrate of each test structure, the photoresist layer exposing an active region for forming an ion implantation layer; performing ion implantation on the substrate corresponding to the exposed active region based on the photoresist layer; and removing the photoresist layer.
[0091] Specifically, a photoresist layer is formed on the substrate surface, and then the photoresist layer is patterned to form a patterned photoresist layer, so that the photoresist layer can expose an active region, wherein the exposed substrate surface is used to provide an area for performing an ion implantation process. Then, the ion implantation process is performed with the photoresist layer as a mask, for example, with an incident angle of 90°. Moreover, by making each test structure have different implantation energies, ion implantation layers with different implantation depths can be formed. Finally, the photoresist layer is removed.
[0092] In some embodiments, when performing ion implantation, the type of the implanted ions can be P-type, such as B ions, Ga ions, or In ions, or N-type, such as P ions, As ions, or Sb ions.
[0093] In some embodiments, each test structure is implanted with the same type of ions, the difference being that the ion implantation layer has different implantation depths in different test structures.
[0094] In other words, the type of ions implanted is the same when ion implantation is performed on each test structure.
[0095] In some embodiments, the test structure further includes a silicide barrier layer located on the substrate.
[0096] Correspondingly, during the process of forming the patterned photoresist layer, the silicide barrier layer exposed by the photoresist layer is also removed.
[0097] By forming a silicide barrier layer, it is possible to prevent the formation of metal silicides on the exposed substrate surface during ion implantation, thereby improving the accuracy of the active region resistance.
[0098] See Figure 3 and Figure 4 The diagram shown is a schematic diagram of the ion implantation process of the test structure in one embodiment of the present invention. The similarities between this embodiment and the previous embodiment will not be described again. The difference is that the test structure may also include a silicide barrier layer 40, which is located on the substrate 10.
[0099] Accordingly, during the ion implantation step, the silicide barrier layer 40 exposed by the photoresist layer is also removed, and an opening K is formed in the silicide barrier layer 40, which exposes the surface of the substrate 10 of the active region.
[0100] For more information on methods for forming ion implantation layers by performing ion implantation, please refer to existing examples, which will not be described here.
[0101] Step S13: Obtain the active region resistance value of the ion implantation layer at different implantation depths within the substrate.
[0102] In some embodiments, the implantation energy determines the implantation depth, and the implantation dose determines the implantation concentration. Thus, with a consistent implantation dose in the ion implantation layer, the active region resistance primarily depends on the implantation energy. The implantation dose, in turn, determines the implantation depth, creating a direct correlation between the implantation depth and the active region resistance.
[0103] Furthermore, since the injection depth is different, the active region resistance value is also different, thus it is possible to obtain the injection depth and active region resistance value with a corresponding relationship.
[0104] In some embodiments, the active region resistance of the ion implantation layer at different implantation depths within the substrate is obtained by wafer acceptability testing (WAT).
[0105] Specifically, the four-probe method is used to obtain the resistance value of the active region.
[0106] Specifically, four probes are pressed on the surface of the sample (i.e., a wafer) under a certain pressure, a current I is passed between two of the probes, and a certain voltage V is generated between the other two probes. The sheet resistance is calculated based on the voltage V, the measurement method, and the current I.
[0107] For example, a current is passed between the first and fourth probes, and a voltage V is measured between the second and third probes. Based on the obtained current and voltage with the corresponding relationship, the resistance value of the active region can be determined.
[0108] In some embodiments, the number of active regions is one, i.e., one test structure includes one resistance region, and the resistance value of the test structure is taken as the resistance value of the active region.
[0109] By using a test structure with one active region, the implementation is simple, and the required test time can be reduced.
[0110] In some embodiments, the number of active regions is multiple, i.e., one test structure includes multiple resistance regions, and the ratio of the resistance value of the test structure to the number of active regions is taken as the resistance value of the active region.
[0111] By using a test structure with multiple active regions, on the one hand, the resistance value can be amplified, so that the total resistance value can be amplified to a range that can be accurately detected by an instrument; on the other hand, if there is a random error (such as noise or temperature drift) in the measurement, the influence of the random error on the total resistance value will be distributed to each active region resistance, significantly improving the feasibility and accuracy of resistance measurement.
[0112] In step S14, the relationship between the implantation depth and the implantation energy of the ion implantation layer in the substrate is determined based on the multiple active region resistance values with the corresponding relationship and the implantation energy, the implantation dose, and the active region width.
[0113] In some embodiments, for the same ion implantation layer, the implantation dose used in the ion implantation process is the same, the active region width is the same and fixed, and the active region resistance value is mainly affected by the implantation energy. When the respective active region resistance values corresponding to different implantation energies are obtained, the relationship between the implantation depth and the implantation energy can be determined.
[0114] Referring to Figure 5 the flowchart of the method for determining the relationship between the implantation depth and the implantation energy in an embodiment of the present application, as shown in Figure 5 the flowchart includes steps S51 to S54.
[0115] Step S51, according to the active region resistance value and the active region width, and the resistance law, determine the first relationship between the active region resistance value and the resistivity and the depth.
[0116] In some embodiments, by the foregoing example, the active region resistance value under different implant depths can be determined. The active region resistance value is determined by the resistivity and the cross-sectional area of the ion implant layer, so that the relationship expression between the active region resistance value and the resistivity and the cross-sectional area of the ion implant layer can be established.
[0117] For example, according to the resistance law R = p * L / S, in the case of L (i.e. the base width) being a constant value, the resistance R is determined by the resistivity p and the cross-sectional area S. For the test structure, when the ion implant layer is formed in the base, S = W * h, where h is the implant depth and W is the active region width of the implant depth. In the case of W being a constant value, the resistance R is determined by p and h.
[0118] Therefore, the first relationship between the active region resistance value and the resistivity and the depth is R = p * L / (W * h).
[0119] Step S52, according to the implant dose and the active region width, determine the second relationship between the implant dose and the resistivity.
[0120] In some embodiments, the resistivity p is related to the carrier concentration. In chip manufacturing technology, when the ion implant method is used for doping treatment, the resistivity p is related to total dose / (W * L * h), where total dose is the total dose of ions injected at one time by the ion implant machine.
[0121] In short, the resistivity p is positively related to total dose / (W * L * h).
[0122] Step S53, according to the first relationship and the second relationship, determine the third relationship between the active region resistance value and the implant depth.
[0123] In some embodiments, according to the first relationship and the second relationship, the specific expression of the third relationship can be:
[0124] R i : total dose / (W * h i ) 2
[0125] Where R i represents the active region resistance value of the i-th test structure, total dose represents the implant dose, W represents the active region width, and h irepresents the implant depth of the ion implantation layer in the ith test structure, represents R i correlation with W, h i positively correlated.
[0126] Step S54, according to the third relationship and the active region resistance value and the implant energy with the corresponding relationship, the relationship between the implant depth and the implant energy is determined by the polynomial regression analysis algorithm.
[0127] In some embodiments, for the same ion implantation layer, a plurality of active region resistance values can be obtained, and a plurality of third expressions can be obtained. When performing ion implantation, different implant energies are used, so that one implant energy corresponds to one active region resistance value. By taking the active region resistance value as a medium, the relationship between the implant energy and the implant depth can be determined.
[0128] Specifically, R i correlation with E i , and R i can be represented by the total dose, the active region width W and the implant depth h i , so that E i and the implant depth h i positively correlated. Wherein, E i represents the implant energy when the ion implantation is performed on the ith test structure.
[0129] In this way, by performing ion implantation processes with different implant depths multiple times, a plurality of relationship expressions between the implant energy E i and the implant depth h i can be obtained. The relationship between the implant depth and the implant energy is determined by the polynomial regression analysis algorithm.
[0130] Specifically, the polynomial degree (for example: first order, second order, third order polynomial, etc.) is selected, and the generalization ability of different degrees is evaluated by K-fold cross-validation; then, the polynomial feature is constructed, and the least square method is used to determine the relationship between the implant depth and the implant energy.
[0131] Therefore, by using the above scheme, the relationship between the implant depth and the implant energy of different ion implantation layers can be determined.
[0132] Step S15, using the relationship between the implant depth and the implant energy, based on the target ion implantation layer to be formed, the target implant energy is determined.
[0133] Wherein, the target ion implantation layer is one of the ion implantation layers.
[0134] In some embodiments, by executing steps S11 to S14, the relationship between the implantation depth and implantation energy of different ion implantation layers can be determined. In the actual ion implantation process, the target ion implantation layer and its implantation depth can be known, and the target implantation energy can be determined based on the implantation depth. This target implantation energy can then be used to implant ions into the corresponding film layer.
[0135] In some embodiments, a target ion implantation layer may require multiple ion implantation processes, and the target implantation energy can be determined based on each ion implantation process.
[0136] For example, based on the target ion implantation layer, the implantation depth information of the target ion implantation layer in the substrate is determined, the implantation depth information including at least one target implantation depth; based on the relationship between the implantation depth and the implantation energy, a target implantation energy corresponding to at least one of the target implantation depths is determined.
[0137] See Figure 6 The semiconductor structure with an ion implantation layer shown in one embodiment of the present invention is as follows: Figure 6 As shown, the semiconductor structure may include a substrate 100, and a first well region 102 and a second well region 104 located within the substrate 100 and adjacent to each other, wherein the first well region 102 and the second well region 104 are of different types. For example, the first well region 102 is N-type, while the second well region 104 is P-type.
[0138] A gate structure 106 is located on the substrate 100. Exemplarily, the gate structure 106 is located on the substrate 100 of the first well region 102 and the second well region 104, respectively.
[0139] Source and drain doped regions 108 are located on both sides of the gate structure 106 and within the substrate 100. The source and drain doped regions 108 serve as the source and drain regions, respectively.
[0140] A lightly doped region 110 (e.g., a lightly doped drain region and a lightly doped source region) is located within the source / drain doped region 108, and the lightly doped region 110 is flush with the surface of the substrate 100. The lightly doped region 110 is formed by ion implantation.
[0141] In some other embodiments, the semiconductor structure may further include: a gate dielectric layer 112 located between the substrate 100 and the gate structure 106; a sidewall 114 located on the sidewall of the gate structure 106; and a barrier layer conformally covering the gate structure 106, wherein the barrier layer includes: an oxide layer 116 and a nitride 118.
[0142] Metal silicide 120 is located between gate structure 106 and barrier layer.
[0143] Further, the semiconductor structure further comprises an isolation structure 122, and the isolation structure 122 is used for isolating the source-drain doped region 108 located in the first well region 102 and the second well region 104 respectively.
[0144] In actual manufacturing, three ion implantations are involved for the first well region 102 (for example, N-well), wherein the first one is the shallowest, VT imp, located near the channel region; the second one is anti-punch through (APT) imp, located near the depth of the source-drain region; and the third one is channel stop imp, located below the STI.
[0145] In this way, when determining the positions of the ion implantation processes, the implantation energies of the ion implantations can be determined according to the relationship between the implantation depth and the implantation energy.
[0146] In some embodiments, the three ion implantations have respective functions.
[0147] For example, the first VT imp is mainly used for forming LDD, and thus, after the implantation energy and depth relationship of the VT IMP and the LDD IMP are determined, the VT IMP and the LDD IMP can be controlled to be in a suitable relative position at the depth in the actual MOS tube.
[0148] The second APT IMP mainly functions with the P+ / N+ IMP, and the depth relationship therebetween also needs to be controlled to avoid serious punch through of the device due to the change of the relative position.
[0149] The third channel stop imp firstly needs to have a high enough energy to form an isolation region through the STI, and secondly, the energy cannot be too high, which will result in poor isolation effect.
[0150] It should be noted that, in order to facilitate the description of the present scheme and highlight the innovative part of the present application, the specific steps of forming the ion implantation layer by ion implantation process are not described in detail in the embodiments of the present application, and the specific steps of the ion implantation process can be referred to the existing examples.
[0151] The present application further provides an ion implantation device corresponding to the ion implantation method described in any of the above embodiments, which is described below. It should be noted that the content of the ion implantation device described below can be mutually corresponding and referred to the content of the ion implantation method described above.
[0152] Referring to Figure 7 As shown in the structural schematic diagram of an ion implantation device in an embodiment of the present application, the ion implantation device M can comprise: Figure 7
[0153] The processor M1 is configured to determine a target implantation energy based on a target ion implantation layer to be formed by using a relationship between implantation depth and implantation energy, and generate a corresponding ion implantation signal.
[0154] The ion implanter M2 is coupled to the processor M1 and configured to perform ion implantation according to the target implantation energy in response to the ion implantation signal.
[0155] The relationship between the implantation depth and the implantation energy is determined by providing a plurality of test structures, each of which includes a substrate having at least one active region, each of which has a preset active region width; performing ion implantation on each test structure respectively to form an ion implantation layer in the substrate of the active region, wherein the implantation depth of the ion implantation layer in each test structure is the same, the implantation depth of the ion implantation layer between different groups of test structures is different, and the implantation dose of each ion implantation is the same; obtaining the active region resistance value of the ion implantation layer at different implantation depths in the substrate of the active region; and determining the relationship between the implantation depth of the ion implantation layer in the substrate and the implantation energy according to a plurality of active region resistance values and implantation energies, implantation doses and active region widths corresponding to each other.
[0156] It should be noted that more descriptions about the relationship between the implantation depth and the implantation energy can be referred to the foregoing examples, which will not be described here.
[0157] The specific working principles and processes of the processor M1 and the ion implanter M2 can be referred to the foregoing examples.
[0158] The present application also provides a data processing device, which can include a memory and a processor, and the memory and the processor can communicate through a communication bus; the memory stores computer instructions executable on the processor, and the processor executes the computer instructions to perform the ion implantation method of any one of the foregoing embodiments, which can be referred to the foregoing related content, and will not be described here.
[0159] In specific implementations, the processor can include a central processing unit, a field programmable logic gate array, etc.
[0160] The memory can include a random access memory (RAM), a read-only memory (ROM), a non-volatile memory (NVM), etc.
[0161] In particular implementations, the computer instructions can include any suitable type of codes, e.g., source codes, compiled codes, interpreted codes, executable codes, static codes, dynamic codes, encrypted codes, and the like implemented by using any suitable high-level, low-level, object-oriented, visual, compiled and / or interpreted programming language.
[0162] In some examples, the data processing device can further include a display interface and a display accessed through the display interface. The display interface can communicate with the memory and the processor through the communication bus. The display can display results obtained by the processor performing the ion implantation method provided by the present application.
[0163] In some examples, the data processing device can further include a data output interface, which can communicate with the memory and the processor through the communication bus to output various data in the ion implantation method.
[0164] It should be noted that the above-mentioned data processing device can further include other devices that can not be essential to the present application; since these other devices can not be essential to the understanding of the disclosure of the embodiments of the present application, the present application does not introduce them one by one.
[0165] Correspondingly, the present application further provides a computer program product, which includes computer programs / instructions, and the computer programs / instructions are executed by a processor to implement the ion implantation method provided by the present application.
[0166] The present application further provides a storage medium, which stores one or more computer instructions, and the one or more computer instructions are used to implement the ion implantation method shown in the foregoing embodiments.
[0167] The above-mentioned embodiments of the present application are combinations of elements and features of the present application. Unless otherwise mentioned, elements or features can be considered optional. Individual elements or features can be practiced without some other elements or features that are described. In addition, embodiments of the present application can be constructed by combining some elements and / or features. The order of the operations described in embodiments of the present application can be rearranged. Some configurations of any embodiment can be included in another embodiment, and can be replaced with a corresponding configuration of another embodiment. It is obvious to those skilled in the art that claims that are not explicitly referenced in each other in the attached claims can be combined as embodiments of the present application, or can be included in a modification after the submission of the present application as new claims.
[0168] Embodiments of the present application can be implemented in various means, for example, in hardware, firmware, software, or a combination thereof. In a hardware configuration, the method according to an exemplary embodiment of the present application can be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), processors, controllers, micro-controllers, microprocessors, and the like.
[0169] In a firmware or software configuration, the embodiments of the present application can be implemented in the form of modules, procedures, functions, and the like. Software code can be stored in a memory unit and executed by a processor. The memory unit is located at the interior or exterior of the processor and can deliver data to and receive data from the processor via various known means.
[0170] While the application has been disclosed with reference to the embodiments described above, it should be understood that various modifications can be made without departing from the spirit of the application, which is defined by the following claims, and that the scope of the application should be interpreted only in conjunction with such claims.
Claims
1. An ion implantation method, characterized in that, include: Multiple test structures are provided, each test structure including a substrate, the substrate having at least one active region, each active region having a preset active region width; Ion implantation is performed on each test structure to form an ion implantation layer in the substrate of the active region. The implantation depth of the ion implantation layer is the same in each test structure, but the implantation depth of the ion implantation layer is different between different test structures, and the implantation dose is the same for each ion implantation. Obtain the active region resistance value of the ion implantation layer at different implantation depths within the active region substrate; Based on multiple corresponding active region resistance values and implantation energies, implantation doses and active region widths, the relationship between the implantation depth and implantation energy of the ion implantation layer in the substrate is determined. By utilizing the relationship between implantation depth and implantation energy, the target implantation energy is determined based on the target ion implantation layer to be formed.
2. The ion implantation method according to claim 1, characterized in that, The step of performing ion implantation on each test structure to form an ion implantation layer within the substrate of the active region includes: A patterned photoresist layer is formed on the substrate of each test structure, the photoresist layer exposing the active region for forming the ion implantation layer; Based on the photoresist layer, ion implantation is performed on the substrate corresponding to the exposed active region; Remove the photoresist layer.
3. The ion implantation method according to claim 2, characterized in that, The test structure also includes a silicide barrier layer located on the substrate; During the formation of the patterned photoresist layer, the silicide barrier layer exposed by the photoresist layer is also removed.
4. The ion implantation method according to claim 1, characterized in that, The active region resistance of the ion implantation layer at different implantation depths within the substrate was obtained through wafer acceptability testing.
5. The ion implantation method according to claim 1, characterized in that, The method of determining the relationship between the implantation depth and implantation energy of the ion implantation layer within the substrate based on multiple corresponding active region resistance values, implantation energy, implantation dose, and active region width includes: Based on the active region resistance value, the active region width, and the resistance law, a first relationship between the active region resistance value, resistivity, and depth is determined. Based on the injected dose and the active region width, a second relationship between the injected dose and resistivity is determined; Based on the first relationship and the second relationship, a third relationship is determined between the active region resistance value and the injection depth; Based on the third relational expression, and the corresponding active region resistance value and injected energy, the relationship between injection depth and injected energy is determined through a polynomial regression analysis algorithm.
6. The ion implantation method according to claim 5, characterized in that, The third relation is: R i :total dose / (W*h i ) 2 Among them, R i The active region resistance value of the i-th test structure is represented by total dose, the injected dose is represented by W, and the active region width is represented by h. i This represents the implantation depth of the ion implantation layer in the i-th test structure.
7. The ion implantation method according to claim 1, characterized in that, The method of determining the target implantation energy based on the desired ion implantation layer by utilizing the relationship between implantation depth and implantation energy includes: Based on the target ion implantation layer, the implantation depth information of the target ion implantation layer in the substrate is determined, and the implantation depth information includes at least one target implantation depth; Based on the relationship between the injection depth and the injection energy, a target injection energy corresponding to at least one of the target injection depths is determined.
8. The ion implantation method according to claim 1, characterized in that, The number of active regions is one, and the resistance value of the test structure is used as the resistance value of the active region; Alternatively, if there are multiple active regions, the ratio of the resistance value of the test structure to the number of active regions is used as the resistance value of the active region.
9. The ion implantation method according to claim 1, characterized in that, When performing ion implantation on each test structure, the type of ions implanted is the same.
10. The ion implantation method according to claim 1, characterized in that, The ion implantation layer includes at least one of the following: N-well; P-trap; N-channel with normal threshold voltage; P-channel with normal threshold voltage; P-channel with high threshold voltage; N-channel with high threshold voltage; N-type deep field; P-type body region; N-type lightly doped drain region; P-type lightly doped drain region; Heavily doped N-type regions; Heavily doped P-type region.
11. An ion implantation device, characterized in that, include: The processor is used to determine the target implantation energy based on the target ion implantation layer to be formed, by utilizing the relationship between implantation depth and implantation energy, and to generate the corresponding ion implantation signal. An ion implanter, coupled to the processor, is configured to perform ion implantation in response to the ion implantation signal and according to the target implantation energy; The relationship between implantation depth and implantation energy is determined as follows: Multiple test structures are provided, each including a substrate with at least one active region and a preset active region width. Ion implantation is performed on each test structure to form an ion implantation layer within the substrate of the active region. Within each test structure, the implantation depth of the ion implantation layer is the same, but the implantation depth differs between different groups of test structures, and the implantation dose is the same for each ion implantation. The active region resistance value of the ion implantation layer at different implantation depths within the substrate of the active region is obtained. Based on multiple corresponding active region resistance values, implantation energy, implantation dose, and active region width, the relationship between the implantation depth and implantation energy of the ion implantation layer within the substrate is determined.
12. A data processing device, characterized in that, The device includes a memory and a processor, wherein the memory is adapted to store one or more computer instructions, and the processor, when executing the computer instructions, performs the ion implantation method according to any one of claims 1 to 10.
13. A computer-readable storage medium, characterized in that, The device stores computer instructions that, when executed, perform the ion implantation method according to any one of claims 1 to 10.
14. A computer program product, characterized in that, Includes computer instructions that, when executed by a processor, implement the ion implantation method according to any one of claims 1 to 10.