A low noise amplifier and a receiving system

Abstract

This invention discloses a low-noise amplifier and receiving system. The low-noise amplifier includes: an input matching circuit, a primary circuit, an interstage matching circuit, a secondary circuit, an output matching circuit, and a common bias circuit. The input matching circuit is connected to the primary circuit and the common bias circuit; the interstage matching circuit is connected to the primary circuit and the secondary circuit; the secondary circuit is connected to the common bias circuit and the output matching circuit; the common bias circuit is connected to a power supply; and the power supply voltage is connected to the primary circuit and the secondary circuit. For the primary and secondary amplifier circuits used to amplify signals, the active bias structure of the common bias circuit effectively reduces the number of components in the multi-stage cascaded amplifier circuit, thereby reducing the overall chip area and mitigating the coupling and parasitic risks caused by component layout and wiring within a limited layout area.

Description

Technical Field

[0001] This invention relates to the field of satellite communication technology, and in particular to a low-noise amplifier and receiving system. Background Technology

[0002] In the field of satellite communications, C-band low-noise amplifiers are crucial, but they currently face many technical challenges and difficulties. Passive bias circuits composed of resistors are commonly used in low-noise amplifiers, achieved through resistor voltage division, resulting in a simple and easy-to-implement structure.

[0003] However, when the temperature changes, the passive bias circuit using resistors provides a constant bias voltage, but the process parameters of the internal transistors (such as the threshold voltage, mobility, oxide thickness, etc.) will change. In particular, the change in the threshold voltage of the transistor in the amplifier circuit will also change the operating area of ​​the transistor, which in turn affects the on-resistance and quiescent current.

[0004] Therefore, for low-noise amplifiers with multi-stage cascaded amplifier circuits, the traditional approach is to set a separate static operating point for each stage of the amplifier circuit. This involves a large number of components, which leads to a large overall chip area. Consequently, within a limited layout area, this results in high coupling and parasitic risks due to factors such as layout and wiring. Summary of the Invention

[0005] In order to overcome the shortcomings of the prior art, the present invention aims to provide a low-noise amplifier and receiving system. For low-noise amplifiers with multi-stage cascaded amplifier circuits, the number of components can be reduced, thereby effectively reducing the overall chip area and reducing the coupling and parasitic risks caused by layout, wiring and other factors under limited layout area.

[0006] To solve the above problems, the present invention is implemented according to the following solution:

[0007] A low-noise amplifier is provided, comprising: an input matching circuit, a primary circuit, an interstage matching circuit, a secondary circuit, an output matching circuit, and a common bias circuit; the input matching circuit is connected to the primary circuit and the common bias circuit, the interstage matching circuit is connected to the primary circuit and the secondary circuit, the secondary circuit is connected to the common bias circuit and the output matching circuit, the common bias circuit is connected to a power supply, and the power supply voltage is connected to the primary circuit and the secondary circuit;

[0008] After impedance matching by the input matching circuit, the radio frequency signal outputs a first-stage signal. Under the bias of the common bias circuit, the first-stage circuit outputs a first amplified signal based on the first-stage signal. After bandwidth expansion by the inter-stage matching circuit, the first amplified signal outputs a second-stage signal. Under the bias of the common bias circuit, the second-stage circuit outputs a second amplified signal based on the second-stage signal. After impedance matching by the output matching circuit, the radio frequency amplified signal is output.

[0009] Compared with the prior art, the beneficial effects of the low-noise amplifier of the present invention are as follows: For the two-stage amplifier circuits used to amplify signals, the active bias structure of the shared bias circuit is used to reduce the number of components in the multi-stage amplifier cascade circuit, thereby effectively reducing the overall chip area and reducing the coupling and parasitic risks caused by the layout and wiring of components in a limited layout area.

[0010] Optionally, the input matching circuit includes a first capacitor and a first inductor; the first capacitor is connected to the first inductor and the first stage circuit, and the first inductor is connected to the common bias circuit.

[0011] Optionally, the first-stage circuit includes a first-stage amplifier circuit and a first-stage bias circuit; the first-stage amplifier circuit is connected to the first-stage bias circuit, the input matching circuit, and the inter-stage matching circuit, and the first-stage bias circuit is connected to the power supply voltage.

[0012] Optionally, the first-stage amplifier circuit includes a first transistor and a second inductor, and the first-stage bias circuit includes a first resistor, a second capacitor, a third inductor, and a fourth inductor.

[0013] The gate of the first transistor is connected to the input matching circuit, the drain of the first transistor is connected to the first resistor and the interstage matching circuit, and the source of the first transistor is grounded through the second inductor; the third inductor is connected to the first resistor, the second capacitor and the fourth inductor, the second capacitor is grounded, and the fourth inductor is connected to the supply voltage.

[0014] Optionally, the interstage matching circuit includes a second resistor, a third capacitor, a fourth capacitor, and a fifth inductor; the third capacitor is connected to the fourth capacitor, the fifth inductor, and the first-stage circuit; the fourth capacitor is connected to the second-stage circuit; and the fifth inductor is grounded through the second resistor.

[0015] Optionally, the secondary circuit includes a secondary amplifier circuit and a secondary bias circuit; the secondary amplifier circuit is connected to the secondary bias circuit, the interstage matching circuit, and the common bias circuit, and the secondary bias circuit is connected to the power supply voltage and the output matching circuit.

[0016] Optionally, the secondary amplifier circuit includes a second transistor, and the secondary bias circuit includes a fifth capacitor, a sixth inductor, and a seventh inductor;

[0017] The gate of the second transistor is connected to the interstage matching circuit and the common bias circuit. The drain of the second transistor is connected to the sixth inductor. The source of the second transistor is grounded. The sixth inductor is connected to the seventh inductor and the output matching circuit. The seventh inductor is connected to the fifth capacitor and the power supply voltage. The fifth capacitor is grounded.

[0018] Optionally, the common bias circuit includes a third transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth capacitor, a seventh capacitor, and a sixth resistor;

[0019] The gate of the third transistor is connected to the drain of the third transistor, the third resistor, and the fourth resistor. The source of the third transistor is grounded. The third resistor is connected to the power supply. The fourth resistor is connected to the fifth resistor and the sixth capacitor. The fifth resistor and the sixth capacitor are grounded. The sixth capacitor is connected to the seventh capacitor, the sixth resistor, and the input matching circuit. The seventh capacitor is grounded. The sixth resistor is connected to the secondary circuit.

[0020] Optionally, the output matching circuit includes an eighth capacitor and an eighth inductor; the eighth capacitor is connected to the eighth inductor and the secondary circuit.

[0021] A receiving system is also provided, including the aforementioned low-noise amplifier. Attached Figure Description

[0022] Figure 1 This is a structural block diagram of the low-noise amplifier of the present invention;

[0023] Figure 2 This is a circuit diagram of the low-noise amplifier of the present invention;

[0024] Figure 3 This is a schematic diagram of the simulation results of the low-noise amplifier of the present invention. Figure 1 ;

[0025] Figure 4 This is a schematic diagram of the simulation results of the low-noise amplifier of the present invention. Figure 2 ;

[0026] Figure 5 This is a schematic diagram of the simulation results of the low-noise amplifier of the present invention. Figure 3 ;

[0027] Figure 6 This is a schematic diagram of the simulation results of the low-noise amplifier of the present invention. Figure 4 ;

[0028] Figure 7 This is a schematic diagram of the simulation results of the low-noise amplifier of the present invention. Figure 5 ;

[0029] The following are the labels in the attached diagram: 1. Input matching circuit; 2. First stage circuit; 201. First stage amplifier circuit; 202. First stage bias circuit; 3. Interstage matching circuit; 4. Second stage circuit; 401. Second stage amplifier circuit; 402. Second stage bias circuit; 5. Output matching circuit; 6. Common bias circuit. Detailed Implementation

[0030] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0031] In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims. In the description of this application, it should be understood that the terms "first," "second," "third," etc., are used only to distinguish similar objects and are not necessarily used to describe a specific order or sequence, nor should they be construed as indicating or implying relative importance. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0032] See Figure 1-2 As shown, a low-noise amplifier of the present invention includes: an input matching circuit 1, a primary circuit 2, an interstage matching circuit 3, a secondary circuit 4, an output matching circuit 5, and a common bias circuit 6; the input matching circuit 1 is connected to the primary circuit 2 and the common bias circuit 6, the interstage matching circuit 3 is connected to the primary circuit 2 and the secondary circuit 4, the secondary circuit 4 is connected to the common bias circuit 6 and the output matching circuit 5, the common bias circuit 6 is connected to the power supply Vgg, and the power supply voltage Vdd is connected to the primary circuit 2 and the secondary circuit 4;

[0033] The RF signal RFIN is impedance matched by the input matching circuit 1 and outputs a first-stage signal. The first-stage circuit 2 outputs a first amplified signal based on the first-stage signal under the bias of the common bias circuit 6. The first amplified signal is bandwidth-extended by the inter-stage matching circuit 3 and outputs a second-stage signal. The second-stage circuit 4 outputs a second amplified signal based on the second-stage signal under the bias of the common bias circuit 6. The output matching circuit 5 performs impedance matching on the second amplified signal and outputs the RF amplified signal RFOUT.

[0034] In one embodiment of the present invention, the input matching circuit 1 includes a first capacitor C1 and a first inductor L1; the first capacitor C1 is connected to the first inductor L1 and the first stage circuit 2, and the first inductor L1 is connected to the common bias circuit 6; the input matching circuit 1 is an L-type input matching network with a low Q value, which can achieve good impedance matching over a wide bandwidth; and the first inductor L1 is used as a choke inductor, and using a large choke inductor (first inductor L1) can further optimize the noise figure, and the larger the inductance, the better the noise figure; when determining the specific inductance of the first inductor L1 in practical applications, it is necessary to consider both the chip layout area and the circuit stability.

[0035] In one embodiment of the present invention, the first-stage circuit 2 includes a first-stage amplifier circuit 201 and a first-stage bias circuit 202; the first-stage amplifier circuit 201 is connected to the first-stage bias circuit 202, the input matching circuit 1, and the interstage matching circuit 3, and the first-stage bias circuit 202 is connected to the power supply voltage Vdd.

[0036] In one embodiment of the present invention, a first-stage amplifier circuit 201 includes a first transistor M1 and a second inductor L2, and a first-stage bias circuit 202 includes a first resistor R1, a second capacitor C2, a third inductor L3, and a fourth inductor L4. The gate of the first transistor M1 is connected to the input matching circuit 1, the drain of the first transistor M1 is connected to the first resistor R1 and the inter-stage matching circuit 3, and the source of the first transistor M1 is grounded through the second inductor L2. The third inductor L3 is connected to the first resistor R1, the second capacitor C2, and the fourth inductor L4. The second capacitor C2 is grounded, and the fourth inductor L4 is connected to the supply voltage Vdd. Specifically, the gate of the first transistor M1 is connected to the input matching circuit 1, and the gate of the first transistor M1 is connected to the first capacitor C1.

[0037] In this invention, the first-stage amplifier circuit 201 and the input matching circuit 1 adopt a common-source structure to achieve a low noise figure; the first-stage bias circuit 202 is connected to the drain of the first transistor M1 to provide a drain voltage to the first transistor M1 through the first-stage bias circuit 202; the second inductor L2, which is connected in series with the source of the first transistor M1 to ground, optimizes the input return loss and enhances the circuit stability. The larger the inductance of the second inductor L2, the better the return loss.

[0038] In one embodiment of the present invention, the interstage matching circuit 3 includes a second resistor R2, a third capacitor C3, a fourth capacitor C4, and a fifth inductor L5; the third capacitor C3 is connected to the fourth capacitor C4, the fifth inductor L5, and the first-stage circuit 2; the fourth capacitor C4 is connected to the second-stage circuit 4; and the fifth inductor L5 is grounded through the second resistor R2; wherein, the third capacitor C3 is connected to the first-stage circuit 2, specifically, the third capacitor C3 is connected to the drain of the first transistor M1.

[0039] In this invention, the interstage matching circuit 3 is a CLC-structured T-type matching network. The Q value is reduced through the second resistor R2, thereby achieving broadband matching. If the interstage matching circuit 3 does not have the second resistor R2, the interstage Q value of the lossless T-type network is... After adding the second resistor R2, the Q value becomes... , among which, Optimal load resistor for the preamplifier. The resistance value of the second resistor R2 is used to increase the losses in the circuit, thereby actively reducing the Q value of the interstage matching circuit 3; simultaneously, the bandwidth BW... It can be seen that reducing the Q value can expand the bandwidth, making the gain frequency response curve flatter and effectively eliminating the peak at the center frequency point.

[0040] In one embodiment of the present invention, the secondary circuit 4 includes a secondary amplifier circuit 401 and a secondary bias circuit 402; the secondary amplifier circuit 401 is connected to the secondary bias circuit 402, the interstage matching circuit 3, and the common bias circuit 6, and the secondary bias circuit 402 is connected to the power supply voltage Vdd and the output matching circuit 5.

[0041] In one embodiment of the present invention, the secondary amplifier circuit 401 includes a second transistor M2, and the secondary bias circuit 402 includes a fifth capacitor C5, a sixth inductor L6, and a seventh inductor L7. The gate of the second transistor M2 is connected to the interstage matching circuit 3 and the common bias circuit 6, the drain of the second transistor M2 is connected to the sixth inductor L6, the source of the second transistor M2 is grounded, the sixth inductor L6 is connected to the seventh inductor L7 and the output matching circuit 5, the seventh inductor L7 is connected to the fifth capacitor C5 and the power supply voltage Vdd, and the fifth capacitor C5 is grounded. Specifically, the gate of the second transistor M2 is connected to the interstage matching circuit 3, and the gate of the second transistor M2 is connected to the fourth capacitor C4.

[0042] In one embodiment of the present invention, the common bias circuit 6 includes a third transistor M3, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth capacitor C6, a seventh capacitor C7, and a sixth resistor R6. The gate of the third transistor M3 is connected to the drain of the third transistor M3, the third resistor R3, and the fourth resistor R4. The source of the third transistor M3 is grounded. The third resistor R3 is connected to the power supply Vgg. The fourth resistor R4 is connected to the fifth resistor R5 and the sixth capacitor C6. The fifth resistor R5 and the sixth capacitor C6 are grounded. The sixth capacitor C6 is connected to the seventh capacitor C7, the sixth resistor R6, and the input matching circuit 1. The seventh capacitor C7 is grounded. The sixth resistor R6 is connected to the secondary circuit 4. Specifically, the sixth capacitor C6 is connected to the input matching circuit 1 and is connected to the first inductor L1. The sixth resistor R6 is connected to the secondary circuit 4 and is connected to the gate of the second transistor M2.

[0043] In one embodiment of the present invention, the common bias circuit 6 adopts a current mirror structure, and the first transistor M1, the second transistor M2, and the third transistor M3 are all GaAs pHEMT transistors. By adjusting the dimensions of the first transistor M1, the second transistor M2, and the third transistor M3, a suitable bias point is provided for the first transistor M1 and the second transistor M2, thereby ensuring that the drain current of the first transistor M1 and the second transistor M2 as amplifying transistors is as stable and consistent as possible, improving the robustness of the low-noise amplifier. At the same time, the common bias circuit adopts a two-stage common-source shared structure, so that the first-stage amplifier circuit 201 and the second-stage amplifier circuit 401 share the same bias circuit, providing gate voltage for the first transistor M1 and the second transistor M2, significantly reducing the number of components and simplifying the matching network, thereby reducing the circuit area and lowering the cost.

[0044] This invention employs a shared bias circuit with an active bias structure to prevent the bias voltage from remaining constant when the process parameters of the first transistor M1 or the second transistor M2 change due to temperature variations. This would cause changes in the operating region of the first transistor M1 or the second transistor M2, further altering their on-resistance and quiescent current. Therefore, by reducing the fluctuation of the bias current under temperature changes through the active bias structure, the gate currents of the first transistor M1 and the second transistor M2 as amplifier transistors are kept as stable and consistent as possible, thus achieving circuit performance stability under temperature variations.

[0045] In this invention, the common bias circuit 6 has a large bias resistor (fourth resistor R4) before the gates of the first transistor M1 and the second transistor M2 are introduced. At the same time, a fifth resistor R5 is connected in parallel, which greatly reduces the value of the fourth resistor R4. Without affecting the original performance, the maximum input power can be increased by about 3dB. The smaller the value of the fifth resistor R5, the greater its increase in input power. However, too small an impedance will lead to the deterioration of other performance of the low noise amplifier.

[0046] Meanwhile, the first inductor L1 and the sixth capacitor C6 can choke the AC signal and discharge it to ground. However, the GaAs pHEMT transistor used in this invention has a different structure than ordinary transistors. Its gate is usually a metal stack and the channel is usually an n-type doped InGaAs layer. Therefore, a Schottky barrier diode is formed between the gate and source of the transistor. However, this is not an ideal switching diode. From the moment of power-on, as long as its gate-source voltage Vgs is not infinitely negative, there is a small reverse leakage current Is. When there is an RF signal input, the instantaneous gate-source voltage Vgs fluctuates near the static bias point Vgs1. When the input power increases, the increase of the AC signal causes the gate-source voltage Vgs to rise to a level sufficient to turn on the gate-source diode (transistor), generating a DC component.

[0047] By adding a fifth resistor R5, the DC component generated by rectification can be discharged to ground through the fifth resistor R5, thereby greatly reducing the gate voltage Vg. The drain voltage Vd does not change significantly, so the final gate-drain voltage Vdg will decrease, thus improving the maximum input power of the transistor.

[0048] In practical applications, the nonlinearity of the transistor directly generates IM3 and other harmonics. The second harmonic component is fed back to the gate of the first transistor M1 through the common bias circuit 6 or the parasitic capacitance CDG, and is mixed with the base frequency signal again through the nonlinearity of the transistor to generate an additional IM3 component.

[0049] When the sixth resistor R6 is used, the circuit consisting of the gate of the second transistor M2, the sixth resistor R6, the first inductor L1, and the gate of the first transistor M1 provides pure real impedance, which can effectively discharge the second harmonic current. At the same time, there is no phase shift at the second harmonic frequency, so that the IM3 component generated by the feedback is almost completely out of phase with the direct IM3 component, thereby maximizing the cancellation effect and achieving the best linearity. If an inductor is used, the inductor exhibits high inductive reactance at the second harmonic frequency, and the inductive reactance increases with frequency. This results in high second harmonic termination impedance and a phase shift of about 90 degrees. The high inductive reactance prevents the effective discharge of the second harmonic current, increases the amplitude of the second harmonic voltage, and the phase difference is not 180 degrees. The IM3 component generated by the feedback may even superimpose with the direct IM3 component, thus causing a deterioration in linearity. If a series combination of inductor and resistor is used, the series combination provides composite impedance, but the phase shift introduced by the inductor changes the overall impedance phase, destroying the optimal phase condition of pure resistance. The phase difference between the IM3 component generated by the feedback and the direct IM3 component is no longer 180 degrees, and the cancellation effect is incomplete. Therefore, the linearity is slightly lower than that of pure resistance.

[0050] In one embodiment of the present invention, the output matching circuit 5 includes an eighth capacitor C8 and an eighth inductor L8; the eighth capacitor C8 is connected to the eighth inductor L8 and the secondary circuit 4; wherein the connection between the eighth capacitor C8 and the secondary circuit 4 is specifically that the eighth capacitor C8 is connected to the sixth inductor L6.

[0051] In this invention, the secondary circuit 4 adopts a common-source structure to improve gain and reduce noise figure; the output matching network is a T-type matching network, which compensates for the capacitive output impedance of the second transistor M2 in the low-frequency band by connecting the sixth inductor L6 in series, and forms resonance with the parasitic capacitance of the second transistor M2 by connecting the seventh inductor L7 in parallel, thus solving the intermediate frequency matching; at the same time, an adjustable resonant point is created by connecting the eighth capacitor C8 in series and the eighth inductor L8, which can compensate for high-frequency roll-off while suppressing harmonics, thereby achieving good impedance matching throughout the entire broadband and improving the linearity of the high-frequency band.

[0052] The low-noise amplifier of this invention was simulated based on the 0.15m E-mode GaAs pHEMT process. (See attached text.) Figure 3-7 As shown, the simulation results for the low-noise amplifier are presented:

[0053] Figure 3 The simulation results of the broadband S-parameters show that the matching bandwidth can be extended by adding a second resistor R2 to the interstage matching circuit 3.

[0054] Figure 4The simulation results of the actual noise figure nf(2) show that in the frequency band of 2GHz-6GHz, the noise figure nf(2) < 0.56dB, and the change in the entire operating bandwidth is only 0.1dB. This indicates that the low noise amplifier of the present invention can achieve extremely low noise and has a good noise figure effect throughout the entire bandwidth.

[0055] Figure 5 The figure shows the simulation curve of the three-temperature gain of the low-noise amplifier. As can be seen from the figure, by adopting an active bias structure, the low-noise amplifier of this invention also has good circuit performance stability under temperature changes.

[0056] Figure 6 The simulation results of the burnout resistance of the low noise amplifier are shown in the figure. As can be seen from the figure, after adding a ground branch to the common bias circuit 6, the gate drain voltage Vdg is reduced by reducing the gate voltage Vg of the third transistor M3. At this time, the maximum input capability of the low noise amplifier is improved by 3dB.

[0057] Figure 7 The simulation results for the first stage linearity of the low-noise amplifier show that using the sixth resistor R6 can improve the terminal harmonic matching of the first-stage circuit 2. As shown in the figure, the input power in the linear range of the first stage using the resistor is higher than that using the inductor (the IIP3 of the resistor is -26dBm, and the IIP3 of the inductor is -54dBm). Therefore, using the sixth resistor R6 can improve the linearity of the first-stage circuit 2, ultimately improving the circuit OIP3.

[0058] A receiving system according to the present invention includes the low-noise amplifier described above.

[0059] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A low-noise amplifier, characterized in that, include: Input matching circuit, first-stage circuit, inter-stage matching circuit, second-stage circuit, output matching circuit, and common bias circuit; The input matching circuit is connected to the first-stage circuit and the common bias circuit; the inter-stage matching circuit is connected to the first-stage circuit and the second-stage circuit; the second-stage circuit is connected to the common bias circuit and the output matching circuit; the common bias circuit is connected to the power supply; and the power supply voltage is connected to the first-stage circuit and the second-stage circuit. The interstage matching circuit includes a second resistor, a third capacitor, a fourth capacitor, and a fifth inductor; the third capacitor is connected to the fourth capacitor, the fifth inductor, and the first-stage circuit; the fourth capacitor is connected to the second-stage circuit; and the fifth inductor is grounded through the second resistor, which is used to extend the bandwidth. The common bias circuit includes a third transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth capacitor, a seventh capacitor, and a sixth resistor. The gate of the third transistor is connected to its drain, the third resistor, and the fourth resistor. The source of the third transistor is grounded. The third resistor is connected to the power supply. The fourth resistor is connected to the fifth resistor and the sixth capacitor. The fifth resistor and the sixth capacitor are grounded. The sixth capacitor is connected to the seventh capacitor, the sixth resistor, and the input matching circuit. The seventh capacitor is grounded. The sixth resistor is connected to the secondary circuit. The sixth capacitor and the first inductor of the input matching circuit are used to choke and discharge the AC signal to ground. The fifth resistor is used to discharge the DC component to ground. The DC component is a radio frequency signal generated by the rectification of the transistor in the primary circuit. The transistor in the primary circuit is a GaAs pHEMT transistor. The sixth resistor is used to achieve terminal harmonic matching of the primary circuit and improve linearity. The radio frequency signal is impedance matched by the input matching circuit and then outputs a first-stage signal. The first-stage circuit outputs a first amplified signal based on the first-stage signal under the bias of the common bias circuit. The first amplified signal is bandwidth-extended by the inter-stage matching circuit and then outputs a second-stage signal. The second-stage circuit outputs a second amplified signal based on the second-stage signal under the bias of the common bias circuit. The output matching circuit performs impedance matching on the second amplified signal and then outputs a radio frequency amplified signal.

2. The low-noise amplifier according to claim 1, characterized in that, The input matching circuit includes a first capacitor and a first inductor; the first capacitor is connected to the first inductor and the first stage circuit, and the first inductor is connected to the common bias circuit.

3. A low-noise amplifier according to claim 1, characterized in that, The first-stage circuit includes a first-stage amplifier circuit and a first-stage bias circuit; the first-stage amplifier circuit is connected to the first-stage bias circuit, the input matching circuit, and the inter-stage matching circuit, and the first-stage bias circuit is connected to the power supply voltage.

4. A low-noise amplifier according to claim 3, characterized in that, The first-stage amplifier circuit includes a first transistor and a second inductor, and the first-stage bias circuit includes a first resistor, a second capacitor, a third inductor, and a fourth inductor. The gate of the first transistor is connected to the input matching circuit, the drain of the first transistor is connected to the first resistor and the interstage matching circuit, and the source of the first transistor is grounded through the second inductor; the third inductor is connected to the first resistor, the second capacitor and the fourth inductor, the second capacitor is grounded, and the fourth inductor is connected to the supply voltage.

5. A low-noise amplifier according to claim 1, characterized in that, The secondary circuit includes a secondary amplifier circuit and a secondary bias circuit; the secondary amplifier circuit is connected to the secondary bias circuit, the interstage matching circuit, and the common bias circuit, and the secondary bias circuit is connected to the power supply voltage and the output matching circuit.

6. A low-noise amplifier according to claim 5, characterized in that, The secondary amplifier circuit includes a second transistor, and the secondary bias circuit includes a fifth capacitor, a sixth inductor, and a seventh inductor. The gate of the second transistor is connected to the interstage matching circuit and the common bias circuit. The drain of the second transistor is connected to the sixth inductor. The source of the second transistor is grounded. The sixth inductor is connected to the seventh inductor and the output matching circuit. The seventh inductor is connected to the fifth capacitor and the power supply voltage. The fifth capacitor is grounded.

7. A low-noise amplifier according to claim 1, characterized in that, The output matching circuit includes an eighth capacitor and an eighth inductor; the eighth capacitor is connected to the eighth inductor and the secondary circuit.

8. A receiving system, characterized in that, Includes a low-noise amplifier as described in any one of claims 1-7.

Images