Energy storage type doubly-fed phase modifier phase-locked loop control method considering small signal stability

Abstract

The invention discloses an energy storage type doubly-fed phase modifier phase-locked loop control method considering small signal stability, and particularly relates to a phase-locked loop improvement method of an energy storage type doubly-fed phase modifier for improving small signal stability when considering that a line is inductive and resistive under the condition of a weak power grid. According to the method, one zero point and one pole are added for proportional-integral control of the phase-locked loop in a scene that the grid-connected impedance ratio Rg / Lg is low under the condition of a weak power grid, namely, a lead-lag link is connected in series, so that the grid-connected stability of the phase modifier can be effectively improved; for a scene with a high grid-connected impedance ratio Rg / Lg under a weak power grid condition, two zero points and two poles are added to phase-locked loop proportional-integral control, that is, a band-pass filtering link is connected in series, so that the grid-connected stability of the phase modifier can be effectively improved. According to the method, the problem of instability of the energy storage type double-fed phase modifier in a high-proportion new energy original access scene is solved, the grid-connected stability of the energy storage type double-fed phase modifier when the line impedance is relatively high and relatively low is effectively improved, and the method is suitable for stability optimization in a high-proportion new energy power grid.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power system control, and particularly relates to a phase-locked loop control method of energy storage type double-fed phase modifier considering small signal stability. BACKGROUND

[0002] With large-scale access of new energy to the power grid, high-proportion new energy power systems present new characteristics of low inertia, low short-circuit capacity and weak damping, which leads to a series of frequency and voltage stability problems. In order to solve the frequency and voltage instability problems, a new energy storage type double-fed phase modifier device has been proposed in recent years. The energy storage type double-fed phase modifier is essentially different from the traditional synchronous phase modifier. It uses a double-fed motor to phase-modulate, increases a flywheel energy storage on the mechanical rotor to improve the inertia support capability, and uses a power electronic converter on the rotor side to improve the power response dynamics. Due to its inherent fast voltage regulation and frequency support capability, the energy storage type double-fed phase modifier has a development prospect in the power system dominated by power electronics.

[0003] In order to synchronize with the grid-connected point voltage, the double-fed synchronous phase modifier obtains the phase of the voltage through the phase-locked loop. The grid-connected point voltage is affected by the phase-locked loop controller to cause phase angle disturbance, which further affects the grid-connected current through the control loop, and affects the grid-connected point voltage through the grid impedance. Therefore, the phase-locked loop provides a coupling channel for the control loop of the energy storage type double-fed phase modifier and the grid impedance, causing synchronization instability problems. When the phase modifier is connected to a new energy station cluster, the new energy device access leads to weakening of the grid strength. In the weak grid condition, the line impedance is large, the voltage fluctuates frequently, and the line impedance, the phase-locked loop and the controller are deeply coupled. At the same time, the resistive component in the weak grid line impedance cannot be ignored, which further increases the coupling degree of the amplitude and phase control loop, making the stability further deteriorate.

[0004] Therefore, as a bridge for coupling the line impedance and the controller, loop shaping of the phase-locked loop is an effective method to improve the synchronization stability. There is an urgent need for an improved method of the phase-locked loop of the energy storage type double-fed phase modifier to improve the small signal stability under the condition of weak grid and inductive and resistive-inductive line. SUMMARY

[0005] The application proposes an improved method of the phase-locked loop of the energy storage type double-fed phase modifier to improve the small signal synchronization stability under the condition of weak grid and in different grid impedance ratio Rg / Lg scenarios. For the scenario of weak grid and grid impedance ratio Rg / Lg less than 0.15, one zero and one pole are added to the proportional integral control of the phase-locked loop, that is, a series lead-lag link is added; for the scenario of weak grid and high grid impedance ratio Rg / Lg greater than 0.15, two zeros and two poles are added to the proportional integral control of the phase-locked loop, that is, a series band-pass filter link is added. Finally, the stability and time domain response indicators are comprehensively considered to select the phase-locked loop control parameters.

[0006] The application is realized by the following technical solutions:

[0007] A method for controlling a phase-locked loop of a storage-type doubly-fed phase modifier considering small-signal stability, comprising the following steps:

[0008] (1) Establishing a small-signal model of the storage-type doubly-fed phase modifier; the modeling method of the small-signal model is to separate the phase-locked loop from other loops of the phase modifier, which is represented as two curves in a Bode diagram; the model uses a single-input single-output form to represent the interaction between the phase-locked loop and other loops; based on the model, the oscillation mechanism of the phase modifier under different grid impedance ratios Rg / Lg caused by the phase-locked loop is obtained;

[0009] (2) For the scenario that the grid impedance ratio Rg / Lg is less than 0.15 under weak grid conditions, a zero point and a pole point are added to the proportional-integral control of the phase-locked loop, i.e., a series lead-lag link;

[0010] (3) For the scenario that the grid impedance ratio Rg / Lg is greater than 0.15 under weak grid conditions, two zero points and two pole points are added to the proportional-integral control of the phase-locked loop, i.e., a series band-pass filter link.

[0011] Further, the step (1) is specifically:

[0012] The storage-type doubly-fed phase modifier is composed of a doubly-fed asynchronous motor and a controller thereof;

[0013] The phase modifier realizes synchronization with the grid point voltage through a phase-locked loop, and its dynamic equation is as follows:

[0014] θ=u sq (k p_PLL +k i_PLL / s) / s=u sq f PLL (s);

[0015] Wherein, k p_PLL and k i_PLL are the proportional and integral coefficients of the phase-locked loop; θ is the phase angle of the phase-locked loop; u sq is the stator-side q-axis voltage of the storage-type doubly-fed phase modifier; f PLL (s) is the proportional-integral control equation of the phase-locked loop;

[0016] A small-signal model of the storage-type doubly-fed phase modifier is established, and according to the voltage and flux linkage equations of the doubly-fed asynchronous motor in the synchronous rotating coordinate system, a small-signal disturbance Δx=[Δx d ,Δx q ] T is added at the grid point, wherein (x=u s , u r , i si r ) represents the small signal disturbance of stator and rotor voltage and current; the following formula is obtained:

[0017]

[0018]

[0019] wherein L m is the mutual inductance between stator and rotor winding, L r is the self-inductance of stator winding, L s is the self-inductance of stator and rotor winding. R s and R r are the resistances of stator and rotor winding respectively; ω and ω r are the angular velocities of stator and rotor respectively.

[0020] The input admittance of the energy storage type doubly-fed phase modifier is derived by the small signal expressions of the current loop and the power loop.

[0021] The energy storage type doubly-fed phase modifier and the power grid are equivalent to a cascade system, which shows the characteristics of a multi-input multi-output system. In order to facilitate the conversion of the control loop, the signal flow graph of the linearized model of the system is further simplified:

[0022]

[0023] wherein Δu g is the voltage disturbance caused by the phase angle disturbance of the phase-locked loop, θ g is the phase angle of the bus voltage of the power grid, U is the voltage amplitude of the bus of the power grid, Z g is the impedance matrix of the d-q coordinate system, Y g is the admittance matrix of the d-q coordinate system, and E is the unit matrix.

[0024] Since the phase-locked loop of the main system affects the dynamic of the phase loop, only the phase loop needs to be concerned, and the amplitude loop is converted to the phase loop, so that the multi-input multi-output system is equivalent to a single-input single-output system; let G g = Z g Y + E, and the simplified signal flow graph is obtained:

[0025]

[0026] wherein f(s) represents the relationship between the difference between the phase angle of the bus voltage of the power grid and the phase angle of the control loop and the q-axis stator voltage under the action of the power grid line and the energy storage type doubly-fed phase modifier and its control system; the f(s) equation describes the forward channel formed by the power grid line and the energy storage type doubly-fed phase modifier and its control system; and the f PLL (s) equation describes the feedback channel formed by the phase-locked loop.

[0027] Specifically, the controller comprises a cascade control structure, the outer loop is active power control and reactive power control, and the inner loop is rotor current decoupling control.

[0028] Further, the input admittance of the energy storage type doubly-fed phase modifier is derived by small signal expressions of the derived current loop and power loop, specifically:

[0029]

[0030] wherein k p_i and k i_i are proportional and integral coefficients of the current loop, and ω2 is the difference between the stator and rotor angular velocities;

[0031] The small signal expression of the power loop is derived as follows:

[0032]

[0033] wherein k p_PQ and k i_PQ are proportional and integral coefficients of the active power loop, P ref and Q ref are active and reactive power reference values, P and Q are actual active and reactive power outputs, U sd0 and U sq0 are steady-state working points of stator voltages in the d-q coordinate system, I sd0 and I sq0 are steady-state working points of stator currents in the d-q coordinate system;

[0034] Finally, the input admittance of the energy storage type doubly-fed phase modifier is derived as follows:

[0035]

[0036] wherein E is a unit matrix, and G1 is:

[0037] G1=G ir (E-G ur (G dr -G ci ) -1 .

[0038] Further, the step (2) is specifically:

[0039] For the scenario that the grid-connected impedance ratio R g / L g is less than 0.15 under weak grid conditions, 1 / f PLL(s) equation and f(s) equation Bode diagram, both have phase difference of gain cross frequency point Therefore, the improvement method of adding a zero point and a pole to the proportional integral control of phase-locked loop is needed; the zero point is used to provide 1 / f PLL (s) equation provides phase lag, and the pole is used to increase 1 / f PLL (s) equation high frequency band amplitude to speed up the response speed of phase-locked loop;

[0040] The dynamic equation of the improved phase-locked loop becomes:

[0041]

[0042] Where, k p_PLL and k i_PLL are the proportional and integral coefficients of the phase-locked loop respectively; T1 is the lead time constant, and T2 is the lag time constant.

[0043] 1 / H1(s) is a correction link added to the original proportional integral control link of the phase-locked loop, and the Bode diagram of the correction link 1 / H1(s) has a maximum phase lag point, and the frequency f of the point is:

[0044]

[0045] The maximum phase lag provided by the 1 / f PLL (s) equation is:

[0046]

[0047] In actual parameter selection, the values of f and can be determined by selecting appropriate values of T1 and T2; since the correction link 1 / H1(s) has a maximum phase lag at the frequency point f, f is selected to be equal to the gain cross frequency, and then is selected to be the phase value that needs to be changed; when f is determined, the numerical difference between T1 and T2 is positively correlated with the distance between the added zero point and the pole, and is also positively correlated with the maximum phase lag value that the correction link can provide.

[0048] Further, the step (3) is specifically:

[0049] When the grid-connected impedance ratio R g / L g is high, since the phase-locked loop still uses the original proportional integral control to obtain 1 / f PLL (s) equation and f(s) equation Bode diagram, at this time, 1 / f PLL (s) equation and f(s) equation gain cross frequency point has a phase difference, and the phase-locked loop needs to be further improved; that is, by reducing 1 / f PLL ​(s) equation at the amplitude of the reverse peak of the f(s) equation, avoiding intersection with the f(s) equation; a shaping method of connecting a proportional integral control of a phase-locked loop with a band-pass filter in series is adopted, and the proportional integral control is increased by two zero points and two poles;

[0050] The improved phase-locked loop dynamic equation becomes:

[0051]

[0052] Wherein, ε1, ε2 are damping ratio coefficients, ω n is a band-pass filter frequency;

[0053] 1 / H2(s) is a correction link added to the original proportional integral control link of the phase-locked loop, and the Bode diagram of the correction link 1 / H2(s) is obtained, and the amplitude is minimum at the filter frequency ω n PLL The maximum amplitude attenuation provided by the (s) equation is ε2 / ε1, and the amplitude attenuation speed near ω n is determined by ε2.

[0054] In actual parameter selection, appropriate ω n , ε1, ε2 need to be selected; since the amplitude of the correction link 1 / H2(s) is minimum at the frequency point ω n , ω n is selected to be equal to the resonance frequency of the f(s) equation, and ε2 / ε1 is selected to be equal to the amplitude to be reduced, and then ε2 is selected to be the required amplitude attenuation speed; therefore, after ω n and ε2 / ε1 are determined, the size of ε2 is negatively correlated with the amplitude attenuation speed of the correction link 1 / H1(s) at ω n , but is positively correlated with the phase increase and decrease at ω n .

[0055] The beneficial effects of the present application are as follows:

[0056] In order to improve the stability of the energy storage type doubly-fed phase-modulated generator grid-connected system, the phase-locked loop control is improved in the present application. For the scenario of weak grid condition with grid impedance ratio Rg / Lg less than 0.15, a zero point and a pole are added to the proportional integral control of the phase-locked loop, i.e. a lead-lag link is connected in series; for the scenario of weak grid condition with grid impedance ratio Rg / Lg greater than 0.15, two zero points and two poles are added to the proportional integral control of the phase-locked loop, i.e. a band-pass filter link is connected in series. The results show that when the grid impedance ratio is low under weak grid condition, the phase margin is improved after the phase-locked loop control is connected with the lead-lag correction; when the grid impedance ratio is high under weak grid condition, the phase margin is improved after the phase-locked loop control is connected with the band-pass filter. The phase-locked loop control improvement method can effectively improve the phase margin of the phase-modulated generator grid-connected system. BRIEF DESCRIPTION OF DRAWINGS ​

[0057] Figure 1 Signal flow graph of linearization model of energy storage type doubly-fed phase-modulated generator grid-connected system of the present application;

[0058] Figure 2 Shaping diagram of phase-locked loop for improving stability under low line impedance ratio of the present application; wherein, (a) is signal flow graph of linearization model of energy storage type doubly-fed phase-modulated generator grid-connected system in multi-input multi-output form after simplification, and (b) is signal flow graph in single-input single-output form after loop conversion;

[0059] Figure 3 Bode diagram of 1 / fPLL(s) equation and f(s) equation when grid-connected impedance ratio is equal to 0.03 of the present application;

[0060] Figure 4 Time-domain response waveform diagram of phase-locked loop before and after series lead-lag correction of the present application;

[0061] Figure 5 Bode diagram of 1 / fPLL(s) equation and f(s) equation when grid-connected impedance ratio is equal to 0.3 of the present application;

[0062] Figure 6 Shaping diagram of phase-locked loop for improving stability under high line impedance ratio of the present application; wherein, (a) is 1 / H1(s) Bode diagram, and (b) is stability analysis diagram after shaping of phase-locked loop;

[0063] Figure 7 Time-domain response waveform diagram of phase-locked loop before and after series lead-lag correction; wherein, (a) is frequency waveform diagram of phase-locked loop, (b) is three-phase voltage and current waveform diagram before correction of phase-locked loop, and (c) is three-phase voltage and current waveform diagram after correction of phase-locked loop;

[0064] Figure 8 Time-domain response waveform diagram of phase-locked loop before and after series band-pass filter; wherein, (a) is frequency waveform diagram of phase-locked loop, (b) is three-phase voltage and current waveform diagram before correction of phase-locked loop, and (c) is three-phase voltage and current waveform diagram after correction of phase-locked loop. DETAILED DESCRIPTION

[0065] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0066] In combination with all the drawings, the present application adopts the following technical solutions to achieve the above objects:

[0067] (1)A modeling method of energy storage type doubly-fed phase modifier phase-locked loop considering small signal stability is proposed. The phase-locked loop is separated from other loops of the phase modifier, and the interaction between the phase-locked loop and other loops is intuitively presented in the form of single-input single-output. The oscillation mechanism of the phase modifier caused by the phase-locked loop under different grid impedance ratios Rg / Lg is clarified.

[0068] (2)For the scenario of low grid impedance ratio Rg / Lg under weak grid conditions, a zero and a pole are added to the proportional-integral control of the phase-locked loop, i.e. a series lead-lag link.

[0069] (3)For the scenario of high grid impedance ratio Rg / Lg under weak grid conditions, two zeros and two poles are added to the proportional-integral control of the phase-locked loop, i.e. a series band-pass filter link.

[0070] The step (1) is specifically:

[0071] The phase modifier achieves synchronization with the grid point voltage through the phase-locked loop, and its dynamic equation is as follows:

[0072] θ = u sq (k p_PLL +k i_PLL / s) / s = u sq f PLL (s);

[0073] Where k p_PLL and k i_PLL are the proportional and integral coefficients of the phase-locked loop, respectively. θ is the phase angle of the phase-locked loop; u sq is the stator side q-axis voltage of the energy storage type doubly-fed phase modifier; f PLL (s) is the proportional-integral control equation of the phase-locked loop.

[0074] The small signal model of the energy storage type doubly-fed phase modifier is established by motor convention. According to the voltage and flux linkage equations of the doubly-fed motor in the synchronous rotating coordinate system, small signal disturbances Δx = [Δx d , Δx q ] T are added at the grid point, where (x = u s , u r , i s , i r ) represents the small signal disturbance of the stator and rotor voltage and current. The disturbance is separated to obtain the following matrix equation:

[0075]

[0076] Where L m is the mutual inductance between the stator and rotor windings, L r is the stator winding self-inductance, and L s is the stator winding self-inductance. Rs and R r are the stator and rotor winding resistances, respectively; ω and ω r are the stator and rotor angular velocities, respectively.

[0077] The small-signal expression of the current loop can be derived as:

[0078]

[0079] The small-signal expression of the power loop can be derived as:

[0080]

[0081] where k p_PQ and k i_PQ are the proportional and integral coefficients of the active power loop, respectively, P ref and Q ref are the active and reactive power references, P and Q are the actual active and reactive power outputs. U sd0 and U sq0 are the steady-state operating points of the stator voltages in the d-q frame, I sd0 and I sq0 are the steady-state operating points of the stator currents in the d-q frame.

[0082] The input admittance of the energy-storage dual-fed phase modulator can be derived as:

[0083]

[0084] where E is the identity matrix, and G1 is:

[0085] G1 = G ir (E - G ur (G dr - G ci ) -1 ;

[0086] The energy-storage dual-fed phase modulator and the power grid are equivalent to a cascade system, which exhibits the characteristics of a multi-input multi-output system. The signal flow graph of the linearized model of the system is shown in Fig. Figure 1 where Δu g is the voltage disturbance caused by the phase angle disturbance of the phase-locked loop, θ g is the phase angle of the bus voltage of the power grid, U is the voltage amplitude of the bus of the power grid, Z g is the impedance matrix of the power grid in the d-q frame, and Y g is the admittance matrix of the power grid in the d-q frame.

[0087] To facilitate the observation of the conversion of the control loop, the signal flow graph is further simplified as shown in Fig. Figure 2 (a).

[0088]

[0089] Let G g = Z g Y+E, the simplified signal flow chart is shown in Fig. (a) of the drawing. Figure 2

[0090] Since the phase-locked loop link mainly affects the dynamic of the phase loop of the dominant system, the phase loop can be focused on, and the amplitude loop can be converted to the phase loop, so that the multi-input multi-output system is equivalent to a single-input single-output system, as shown in Fig. (b) of the drawing: Figure 2

[0091]

[0092] Wherein, f(s) represents the difference between the phase angle of the grid bus voltage and the phase angle of the control loop and the relationship between the q-axis stator voltage under the action of the grid line and the energy storage type double-fed phase modifier and the control system of the energy storage type double-fed phase modifier. The f(s) equation describes the forward channel formed by the grid line and the energy storage type double-fed phase modifier and the control system of the energy storage type double-fed phase modifier. The f PLL (s) equation describes the feedback channel formed by the phase-locked loop. It can be seen that the phase-locked loop provides a coupling path for the energy storage type double-fed phase modifier and the grid, and is the root cause of the small signal synchronization problem under the dominant phase loop.

[0093] The step (2) is specifically:

[0094] Figure 3 The 1 / fPLL(s) equation and the f(s) equation Bode diagram of the grid-connected impedance ratio of the present application is equal to 0.03; for the scenario that the grid-connected impedance ratio R g / L g is low under the weak grid condition, an improved method of adding a zero point and a pole point (i.e. lead-lag correction) to the proportional integral control of the phase-locked loop is adopted. The zero point is used to provide phase lag for the 1 / f PLL (s) equation, and at the same time, reduce the amplitude of the 1 / f PLL (s) equation at the amplitude reverse peak of the f(s) equation, to avoid the intersection of the two equations to generate a new gain cross frequency point. The pole point is used to increase the high frequency band amplitude of the 1 / f PLL (s) equation to speed up the response speed of the phase-locked loop.

[0095] The dynamic equation of the improved phase-locked loop becomes:

[0096]

[0097] Wherein, T1 is a lead time constant, and T2 is a lag time constant.

[0098] Figure 4 ​​(a) gives the Bode plot of the correction element 1 / H1(s), which has a maximum phase lag point at frequency f:

[0099]

[0100] may be 1 / f PLL The maximum phase lag provided by the equation of 1 / H1(s) is:

[0101]

[0102] In actual parameter selection, the values of f and can be selected to determine the values of T1 and T2. Since the correction element 1 / H1(s) has a maximum phase lag at the frequency point f, f can be selected to be equal to the gain crossover frequency, and then is selected to be the phase value that needs to be changed. It can be found that after f is determined, the greater the numerical difference between T1 and T2, that is, the farther the distance between the added zero point and the added pole, the greater the maximum phase lag that the correction element can provide.

[0103] The step (3) is specifically:

[0104] When the grid-connected impedance ratio R g / L g is high, the 1 / f PLL (s) equation and the Bode plot of the equation f(s) are as shown in Figure 5 The amplitude reverse peak of the equation f(s) and the phase lag near the resonance peak increase. If the loop correction method of adding a zero point and a pole to the proportional integral control of the phase-locked loop is still used, a larger value needs to be selected, which will cause the time-domain step response of the phase-locked loop to be too long. Therefore, the amplitude of the 1 / f PLL (s) equation at the amplitude reverse peak of the equation f(s) can be reduced to avoid intersection with the equation f(s) to solve the problem. A shaping method of connecting a band-pass filter in series with the proportional integral control of the phase-locked loop is adopted, that is, two zero points and two poles are added to the proportional integral control.

[0105] The improved dynamic equation of the phase-locked loop becomes:

[0106]

[0107] wherein ε1 and ε2 are damping ratio coefficients, and ω n is the band-pass filter frequency.

[0108] Figure 6 The figure (a) in the equation (1) gives the Bode plot of the correction element 1 / H2(s), which has a minimum amplitude of 1 / f n at the filter frequency ω PLL(s) the maximum amplitude attenuation provided by the equation is ε2 / ε1, ω n The amplitude attenuation speed near ω

[0109] In actual parameter selection, appropriate ω n , ε1 and ε2 need to be selected. n The amplitude of the correction link 1 / H2(s) is minimum, ω n equals the resonance frequency of the equation f(s), ε2 / ε1 equals the amplitude to be reduced, and then ε2 is selected as the required amplitude attenuation speed. n It can be found that after ω n and ε2 / ε1 are determined, the larger ε2 is, the slower the amplitude attenuation speed of the correction link 1 / H1(s) near ω n is, and the phase increases above ω g .

[0110] Figure 6 (b) the stability analysis Bode diagram of the phase-locked loop series band-pass filter correction is given.

[0111] The key parameters of the energy storage type double-fed phase modulation machine analyzed in the application are shown in Table 1.

[0112] Table 1

[0113]

[0114]

[0115] The application carries out numerical simulation on the grid-connected system of the double-fed energy storage phase modulation machine based on electromagnetic simulation. Figure 7 The time domain response waveforms of the phase-locked loop proportional integral control series lead-lag correction before and after the correction under the condition of a weak power grid and when the grid impedance ratio R g / L g is low are given. Figure 7 In the figure (a), the phase-locked loop frequency response waveform of the system is shown, Figure 7 in the figure (b), the three-phase voltage and three-phase current waveforms before the phase-locked loop correction are shown, Figure 7 and in the figure (c), the three-phase voltage and three-phase current waveforms after the phase-locked loop correction are shown. It can be seen that before the phase-locked loop shaping, the phase-locked loop output frequency oscillates and diverges, the amplitude amplifies with time, the three-phase current amplitude oscillates, and the system is unstable. After the improvement, the phase-locked loop output frequency converges, the three-phase current waveform is stable, and the system is stable.

[0116] Figure 8 The time domain response waveforms of the phase-locked loop proportional integral control series band-pass filter before and after the correction under the condition of a weak power grid and when the grid impedance ratio R g / L g is high are given. Figure 8Figure (a) in the drawings is the phase-locked loop frequency response waveform of the system, Figure 8 Figure (b) in the drawings is the three-phase voltage and three-phase current waveforms before the phase-locked loop correction, Figure 8 Figure (c) in the drawings is the three-phase voltage and three-phase current waveforms after the phase-locked loop correction. It can be seen that the phase-locked loop output frequency oscillation diverges before the phase-locked loop loop shaping, the amplitude amplifies with time, the three-phase current amplitude oscillates, and the system is unstable. The improved phase-locked loop output frequency converges, and the three-phase current waveform is stable.

[0117] Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. It is intended that the application cover any and all variations of the application that come within the scope of the

[0118] It is to be understood that the application is not limited to the precise details of construction and the arrangement of components described above and illustrated in the drawings and that various modifications and changes can be made without departing from the scope thereof.

Claims

1. A method for controlling a phase-locked loop of a doubly-fed inverter considering small-signal stability, the method comprising: The method comprises the following steps: (1) establishing a small signal model of the energy storage type doubly-fed phase modifier; the modeling method of the small signal model is to separate the phase-locked loop circuit from other circuits of the phase modifier, which is expressed as two curves in a Bode diagram; the model uses a single-input single-output form to represent the interaction between the phase-locked loop and other circuits; and the oscillation mechanism of the phase modifier under different grid impedance ratio Rg / Lg scenarios caused by the phase-locked loop is obtained based on the model; (2) for the scenario that the grid impedance ratio Rg / Lg is less than 0.15 under a weak power grid condition, a zero point and a pole point are added to the proportional integral control of the phase-locked loop, namely a series lead-lag link; (3) for the scenario that the grid impedance ratio Rg / Lg is greater than 0.15 under a weak power grid condition, two zero points and two pole points are added to the proportional integral control of the phase-locked loop, namely a series band-pass filter link.

2. The method of claim 1, wherein the small signal stability is considered. The step (1) is specifically as follows: The energy storage type doubly-fed phase modifier is composed of a doubly-fed asynchronous motor and a controller thereof; The phase modifier realizes synchronization with a grid connection point voltage through a phase-locked loop, and its dynamic equation is as follows: θ = u sq (k p_PLL +k i_PLL / s) / s = u sq f PLL (s); where k p_PLL and k i_PLL are the phase-locked loop proportional and integral coefficients, respectively; θ is the phase-locked loop phase angle; u sq is the energy storage type double-fed phase modifier stator side q-axis voltage; f PLL (s) is the phase-locked loop proportional integral control equation; The small signal model of the energy storage type doubly-fed phase modifier is established. According to the voltage and flux linkage equations of the doubly-fed asynchronous motor in the synchronous rotating coordinate system, small signal disturbances Δx = [Δx d , Δx q ] T are added at the grid connection point, where (x = u s , u r , i s , i r ) represents the small signal disturbance of the stator and rotor voltage and current; the following formula is obtained: where L m is the mutual inductance between stator and rotor windings, L r is the self-inductance of the stator winding, L s is the self-inductance of the stator and rotor windings; R s and R r are the stator and rotor winding resistances, respectively; ω and ω r are the stator and rotor angular velocities, respectively; The small signal expression of the current loop circuit and the power loop circuit derived is used to derive the input admittance of the energy storage type doubly-fed phase modifier; The energy storage type doubly-fed phase modifier and the power grid are equivalent to a cascade system, which has the characteristics of a multiple-input multiple-output system; in order to facilitate the conversion of the control loop, the signal flow of the linearized model of the system is further simplified: where Δu g is the voltage disturbance caused by the PLL phase angle disturbance, θ g is the phase angle of the grid bus voltage, U is the voltage amplitude of the grid bus, Z g is the grid impedance matrix in the d-q coordinate system, Y g is the grid admittance matrix in the d-q coordinate system, E is the identity matrix; Because the phase-locked loop loop part of the dominant system affects the dynamic of the phase loop, only the phase loop is concerned, the amplitude loop is converted to the phase loop, and the multi-input and multi-output system is equivalent to a single-input and single-output system; let G g = Z g Y + E, the simplified signal flow is obtained. wherein f(s) represents the relationship between the difference between the phase angle of the grid bus voltage and the phase angle of the control loop and the q-axis stator voltage under the action of the grid line and the energy storage type doubly-fed phase modifier and its control system; the f(s) equation describes a forward channel formed by the grid line and the energy storage type doubly-fed phase modifier and its control system, f PLL The f(s) equation describes a feedback channel formed by the phase-locked loop.

3. The improved method of phase-locked loop as claimed in claim 2 wherein, The controller comprises a cascade control structure, the outer loop is active power control and reactive power control, and the inner loop is rotor current decoupling control.

4. The method of claim 2, wherein the small signal stability is considered. The small signal expression of the power loop circuit is derived as follows: where k p_i and k i_i are the proportional and integral coefficients of the current loop, respectively, and ω2is the difference between the rotor and stator angular velocities. The small signal expression of the power loop circuit is derived as follows: where k p_PQ and k i_PQ are the proportional and integral coefficients of the active power loop, P ref and Q ref are the active and reactive power reference values, P and Q are the actual active and reactive power outputs; U sd0 and U sq0 are the steady-state operating points of the stator voltage in the d-q coordinate system, I sd0 and I sq0 are the steady-state operating points of the stator current in the d-q coordinate system; Finally, the input admittance of the energy storage type doubly-fed phase modifier is derived as follows: Wherein, E is a unit matrix, G1 is: G1 = G ir (E - G ur (G dr - G ci ) -1 .

5. The phase-locked loop improvement method of claim 1, wherein, The step (2) is specifically as follows: The grid impedance ratio R g / L g Less than 0.15, due to the phase-locked loop to adopt the original proportional integral control to get 1 / f PLL (s) equation and f(s) equation Bode diagram, both have the phase difference of gain cross frequency point, therefore, need to use the improvement method of adding a zero point and a pole to the proportional integral control of the phase-locked loop; the zero point is used to provide phase lag for 1 / f PLL (s) equation, and the pole is used to increase the amplitude of the high frequency band of 1 / f PLL (s) equation to speed up the response speed of the phase-locked loop; The dynamic equation of the improved phase-locked loop becomes: where k p_PLL and k i_PLL are the phase-locked loop proportional and integral coefficients, respectively; T1 is the lead time constant, and T2 is the lag time constant. 1 / H1(s) is a correction link added to the original proportional integral control link of the phase-locked loop, and the Bode diagram of the correction link 1 / H1(s) has a maximum phase lag point, and the frequency f of the point is: can be 1 / f PLL The maximum phase lag provided by equation (s) is: In actual parameter selection, the value of f and can determine the value of T1 and T2; since the correction link 1 / H1(s) has the maximum phase lag at the frequency point f, f is selected as the gain crossover frequency, and then is selected as the phase value to be changed; when f is determined, the size of the numerical difference between T1 and T2 is positively correlated with the distance of the increased zero point and pole, and is also positively correlated with the size of the maximum phase lag value that the correction link can provide. ​ 6. The improved phase-locked loop method of claim 1, wherein, The step (3) is specifically as follows: When the grid impedance ratio R g / L g is higher, since the phase-locked loop still adopts the original proportional integral control to obtain 1 / f PLL (s) equation and f(s) equation Bode diagram, at this time, the gain cross frequency point of 1 / f PLL (s) equation and f(s) equation has a phase difference, and the phase-locked loop needs to be further improved; that is, by reducing the amplitude of 1 / f PLL (s) equation at the amplitude reverse peak of f(s) equation, the intersection with f(s) equation is avoided. The shaping method of connecting a band-pass filter in series with the proportional integral control of the phase-locked loop is adopted, and the proportional integral control is increased by two zero points and two pole points; The dynamic equation of the improved phase-locked loop becomes: wherein ε1, ε2 are damping ratio coefficients, ω n is a band-pass filter frequency; 1 / H2(s) is a correction link attached to the original proportional integral control link of the phase-locked loop, and the Bode diagram of the correction link 1 / H2(s) is obtained, and the filter frequency ω n is the minimum amplitude, which is 1 / f PLL The maximum amplitude attenuation provided by the equation of s) is ε2 / ε1, and the attenuation speed of the amplitude near ω n is determined by ε2. In actual parameter selection, appropriate ω n , ε1, ε2 should be selected; since in the frequency point ω n , the amplitude of the correction link 1 / H2(s) is minimum, ω n is equal to the resonance frequency of the f(s) equation, and ε2 / ε1 is equal to the amplitude to be reduced, and then ε2 is selected as the required amplitude decay rate; therefore, after ω n and ε2 / ε1 are determined, the size of ε2 is negatively correlated with the amplitude decay rate of the correction link 1 / H1(s) at ω n , but is positively correlated with the phase increase and decrease of the above at ω n .

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