A solar cell, a solar cell module, and a photovoltaic system

Abstract

This invention relates to the field of photovoltaic module technology and provides a solar cell, a solar cell module, and a photovoltaic system. The solar cell module includes a silicon substrate with alternating grid lines on its surface. The grid lines are connected to a solder strip via at least one row of welding media. The welding media includes multiple welding media points along a first direction. The solder strip at least partially covers the welding media points and is also connected to the silicon substrate via several adhesive members. Several clearance areas are provided on the at least one row of welding media. At least part of the adhesive members are located within the clearance areas, where no welding media is present. By providing clearance areas, the adhesive members are prevented from flowing during extrusion and contacting the welding media points, thus preventing contamination of the welding media points by the adhesive members. This also optimizes stress distribution and offers advantages such as preventing contamination of the welding media points by the adhesive members, improving welding reliability, reducing cold solder joints and voids, optimizing stress distribution, and extending service life.

Description

Technical Field

[0001] This invention belongs to the field of photovoltaic module technology, and particularly relates to a solar cell, a solar cell module, and a photovoltaic system. Background Technology

[0002] With the development of the photovoltaic industry, the requirements for the power output and long-term reliability of modules are increasing. In the manufacturing process of solar cells, multiple cells are typically connected in series with solder ribbons to form a cell string, thereby achieving electrical interconnection. To ensure a reliable connection between the solder ribbon and the cell busbar, solder paste soldering is commonly used. This involves pre-setting solder paste dots on the cell busbar, and after high-temperature reflow soldering, the solder paste melts, thus welding the solder ribbon and the cell together to form a low-resistance ohmic contact, which guarantees the "electrical connection".

[0003] However, solder joints are inherently fragile. During long-term use of modules, thermal expansion and contraction (due to diurnal and seasonal temperature differences) and external vibrations can generate mechanical stress, which can easily lead to microcracks in the cells or fatigue fracture of the solder joints. To address this, the industry typically adds an adhesive application process to the welding process. This involves applying adhesive dots (such as silicone) next to the solder ribbon, utilizing the elasticity of the adhesive to absorb and release mechanical stress, protecting the cells and solder joints. This ensures both "mechanical connection" and "lifespan."

[0004] In existing technologies, solder paste dots and adhesive dots are usually arranged adjacent to each other. However, due to space constraints, solder paste dots are often densely packed. Even if adhesive dots are placed in the gaps next to solder paste dots, the liquid adhesive is easily expanded and flowed during dispensing (especially when using pressure dispensing). Once the expanded adhesive comes into contact with or covers adjacent solder paste dots, it will contaminate the solder paste. Particularly in the subsequent soldering process, the adhesive will hinder the evaporation and cleaning effect of the flux in the solder paste, leading to defects such as poor wetting, cold solder joints, and voids during soldering, severely reducing connection reliability and component power output. Summary of the Invention

[0005] The solar cell provided by this invention aims to solve the technical problem that existing solar cells are prone to reduced connection reliability during the soldering process due to the adhesive flowing under pressure and coming into contact with solder paste.

[0006] The present invention is implemented as follows: a solar cell, comprising:

[0007] Silicon substrate;

[0008] The surface of the silicon substrate is alternately provided with a plurality of gate lines, the gate lines are connected to the solder strip through at least one row of soldering medium, the soldering medium includes a plurality of soldering medium points along a first direction, and the solder strip at least partially covers the soldering medium points;

[0009] The solder strip is also connected to the silicon substrate by a number of adhesives. A number of clearance areas are provided on the at least one row of soldering medium. The adhesives are at least partially located in the clearance areas, and no soldering medium is provided in the clearance areas.

[0010] Furthermore, the avoidance area includes a first avoidance area and a second avoidance area, which are staggered in a second direction.

[0011] Furthermore, along the first direction, the avoidance area is located at opposite ends of the weld strip in the second direction, and the first avoidance area and the second avoidance area are spaced apart.

[0012] Furthermore, the plurality of welding medium points are arranged into a plurality of dot matrices, the dot matrices including a first dot matrices and a second dot matrices, the first dot matrices and the second dot matrices being located at two opposite edges of the welding strip along the second direction, and the first dot matrices and the second dot matrices being spaced apart;

[0013] The first avoidance area is located on the other edge opposite to the first dot matrix, and the second avoidance area is located on the other edge opposite to the second dot matrix.

[0014] Furthermore, the width of at least one of the first avoidance area and the second avoidance area along the second direction is 0.5mm-3.5mm.

[0015] Furthermore, the width of the welding medium dots included in the first dot matrix along the second direction is 0.3mm-4mm;

[0016] The width of the welding medium dots included in the second dot matrix along the second direction is 0.3mm-4mm.

[0017] Furthermore, the plurality of welding medium points are arranged in a third dot matrix, and along the second direction, the two endpoints of the welding medium points in the third dot matrix are equidistant from the edge of the weld strip.

[0018] Furthermore, the absolute value of the distance from the welding medium point of the third dot matrix to the two edges of the welding strip is 0mm-2mm.

[0019] Furthermore, the solder strip covers at least a portion of the adhesive component.

[0020] Furthermore, the ratio of the area of ​​the portion of the solder strip covering a single adhesive element to the total area of ​​the single adhesive element is less than 0.6.

[0021] Furthermore, the ratio of the area of ​​the portion of the solder strip covering all the adhesive components to the total area of ​​all the adhesive components ranges from 10% to 60%.

[0022] Furthermore, the grid line includes a first grid line and a second grid line, the welding medium includes a first welding medium and a second welding medium, the adhesive includes a first adhesive and a second adhesive, and the solder strip includes a first solder strip and a second solder strip;

[0023] The surface of the silicon substrate is alternately provided with the first gate line and the second gate line. The first gate line is connected to the first solder ribbon through the first welding medium. The first solder ribbon is connected to the silicon substrate through the first adhesive. The second gate line is connected to the second solder ribbon through the second welding medium. The second solder ribbon is connected to the silicon substrate through the second adhesive.

[0024] Furthermore, the silicon substrate includes a first region and a second region, wherein a first doped layer is disposed on the first region and a second doped layer is disposed on the second region, and the first doped layer and the second doped layer have different polarities.

[0025] The first gate line is located in the first region, and the second gate line is located in the second region.

[0026] Furthermore, the first welding medium includes a first dot matrix located at a first edge of the first weld strip, and the first welding medium includes a second dot matrix located at a second edge of the first weld strip. The first dot matrix and the second dot matrix are spaced apart. The first clearance area is located at the second edge of the first weld strip, and the second clearance area is located at the first edge of the first weld strip.

[0027] Furthermore, the first dot matrix of the second welding medium is located at the second edge of the second weld strip, the second dot matrix of the second welding medium is located at the first edge of the second weld strip, the first dot matrix and the second dot matrix are spaced apart, the first clearance area is located at the first edge of the second weld strip, and the second clearance area is located at the second edge of the second weld strip.

[0028] Furthermore, the silicon substrate is further provided with a third solder strip and a fourth solder strip. The first gate line is connected to the third solder strip through the third soldering medium, and the third solder strip is connected to the silicon substrate through the third adhesive. The second gate line is connected to the fourth solder strip through the fourth soldering medium, and the fourth solder strip is connected to the silicon substrate through the fourth adhesive.

[0029] Furthermore, the first welding medium and the first adhesive, the fourth welding medium and the fourth adhesive are arranged in the same way on the silicon substrate, and the second welding medium and the second adhesive, the third welding medium and the third adhesive are arranged in the same way on the silicon substrate.

[0030] Furthermore, the distance between the adhesive and at least one edge of the solder strip is 0.5mm-2mm.

[0031] Furthermore, the distance between the plurality of welding medium points along the first direction is 0.4mm-1.5mm.

[0032] Furthermore, the adhesive is made of an adhesive material, including at least one of UV adhesive, double-sided adhesive, pressure-sensitive adhesive, and thermosetting adhesive.

[0033] A solar cell module includes the solar cell described in any of the preceding claims, the solar cell module comprising a plurality of solar cells connected in series along the first direction, the plurality of solar cells being connected by the solder strip.

[0034] A photovoltaic system includes the solar cell module described above.

[0035] The beneficial effects achieved by this invention are as follows: A plurality of gate lines are alternately arranged on the surface of the silicon substrate. The gate lines are connected to the solder strip via at least one row of welding medium. The welding medium includes multiple welding medium points along a first direction, and the solder strip at least partially covers these welding medium points. The solder strip is also connected to the silicon substrate via a plurality of adhesives. A plurality of clearance areas are provided on the at least one row of welding medium. The adhesives are at least partially located in the clearance areas, where no welding medium is provided. By providing clearance areas, the adhesives are prevented from flowing during extrusion and from contacting the welding medium points, thereby preventing contamination of the welding medium points by the adhesives. Simultaneously, stress distribution is optimized. This invention offers advantages such as preventing contamination of the welding medium points by the adhesives, improving welding reliability, reducing cold solder joints and void defects, optimizing stress distribution, and extending service life. Attached Figure Description

[0036] Figure 1 This is a planar schematic diagram of a solar cell provided in an embodiment of the present invention;

[0037] Figure 2 This is yet another planar schematic diagram of the solar cell provided in an embodiment of the present invention;

[0038] Figure 3 This is a three-dimensional schematic diagram of a solar cell module provided in an embodiment of the present invention;

[0039] Figure 4This is a partial planar schematic diagram of a solar cell module provided in an embodiment of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0041] In existing technologies, solder paste dots and adhesive dots are typically arranged adjacent to each other. However, due to space constraints, solder paste dots are often densely packed. Even if adhesive dots are placed in the gaps next to solder paste dots, the liquid adhesive is prone to expansion and flow during dispensing (especially when using pressure dispensing). Once the expanded adhesive comes into contact with or covers adjacent solder paste dots, it will contaminate the solder paste. Particularly in subsequent soldering stages, the adhesive will hinder the evaporation and cleaning effect of flux in the solder paste, leading to defects such as poor wetting, cold solder joints, and voids during soldering, severely reducing connection reliability and component power output. This application involves alternatingly arranged gate lines on the surface of a silicon substrate. The gate lines are connected to a solder strip via at least one row of soldering medium. The soldering medium includes multiple soldering medium points along a first direction, and the solder strip at least partially covers the soldering medium points. The solder strip is also connected to the silicon substrate via several adhesives. Several clearance areas are provided on the at least one row of soldering medium. The adhesives are at least partially located in the clearance areas, where no soldering medium is provided. By providing clearance areas, the adhesives are prevented from flowing during extrusion and from contacting the soldering medium points, thereby preventing the adhesives from contaminating the soldering medium points. At the same time, the stress distribution is optimized, which has the advantages of avoiding contamination of the soldering medium points by the adhesives, improving welding reliability, reducing cold solder joints and void defects, optimizing stress distribution, and extending service life.

[0042] Example 1

[0043] Please see Figure 1 The present invention is implemented as follows: a solar cell 100 includes:

[0044] Silicon substrate 1001;

[0045] A plurality of gate lines (not shown) are alternately disposed on the surface of the silicon substrate 1001. The gate lines are connected to the solder strip 50 through at least one row of soldering medium 10. The soldering medium 10 includes a plurality of soldering medium points 101 along the first direction A. The solder strip 50 at least partially covers the soldering medium points 101.

[0046] The solder ribbon 50 is also connected to the silicon substrate 1001 by a number of adhesives 60. At least one row of soldering medium 10 is provided with a number of clearance areas 609. The adhesives 60 are at least partially located in the clearance areas 609. No soldering medium 10 is provided in the clearance areas 609.

[0047] In this embodiment, the avoidance area 609 refers to the blank area reserved when the welding medium points 101 are arranged. The adhesive 60 is disposed in the blank area. When the solder ribbon 50 is connected to the silicon substrate 1001 through the adhesive 60, the adhesive 60 will deform under pressure and flow to the periphery. Since the adhesive 60 is disposed in the avoidance area 609, it can avoid contact with the welding medium 10 when the adhesive 60 deforms and flows to the periphery.

[0048] The soldering medium point 101 refers to the conductive material that enables the electrical connection between the solder strip 50 and the grid line. Specifically, it can be composed of solder paste, silver paste or conductive adhesive, and is discretely distributed along a specific direction. It is understood that in this embodiment, the soldering medium point 101 is solder paste. In other embodiments, the soldering medium point 101 can also be composed of materials other than solder paste, silver paste or conductive adhesive. The specific design can be made according to the actual situation and is not limited here.

[0049] The adhesive 60 is made of an adhesive material, including at least one of UV adhesive, double-sided adhesive, pressure-sensitive adhesive, and thermosetting adhesive. It should be noted that the main purpose of the adhesive 60 is to connect the solder ribbon 50 to the silicon substrate 1001. Therefore, in other embodiments, the adhesive 60 can also be made of other materials with adhesive properties. The specific choice can be made according to the actual situation and is not limited here.

[0050] Furthermore, the solar cell 100 can be a back contact cell, that is, several grid lines of the solar cell 100 are located on the back of the solar cell 100, and there are no grid lines blocking the front side, thereby maximizing the utilization of incident light and significantly improving short-circuit current and conversion efficiency. The grid lines can be main grid lines or fine grid lines, and the back contact cell can be a back contact cell with main grids or a back contact cell without main grids, without any limitation.

[0051] It should be noted that in other embodiments, the solar cell 100 may also be other cells with grid lines. For example, in one embodiment, the solar cell 100 may be a TOPCon cell; in another embodiment, the solar cell 100 may be an HJT / HIT cell. The specific design may vary depending on the circumstances and is not limited here.

[0052] In this embodiment, there are 80 welding medium points 101 and 4 adhesive pieces 60. Along the first direction A, two adhesive pieces 60 are respectively provided at both ends of the welding strip 50, and the two adhesive pieces 60 are spaced apart.

[0053] In another embodiment, the number of welding medium points 101 is 90, the number of adhesive pieces 60 is 2, and one adhesive piece 60 is provided at each end of the welding strip 50 along the first direction A.

[0054] In another embodiment, the number of welding medium points 101 is 90, and the number of adhesive pieces 60 is 2. Along the first direction A, the two adhesive pieces 60 are located at the same end of the welding strip 50, and the two adhesive pieces 60 are spaced apart. That is to say, there are two adhesive pieces 60 at one end of the welding strip 50, and no adhesive pieces 60 are provided at the other end of the welding strip 50.

[0055] In another embodiment, the number of welding medium points 101 is 100, the number of adhesives 60 is 6, and two adhesives 60 are respectively provided at both ends of the welding strip 50 along the first direction A, and two adhesives 60 are also provided in the middle area of ​​the welding strip 50.

[0056] Specifically, the welding medium dots 101 form a linear array along the first direction A, and the solder ribbon 50 at least partially covers the welding medium dots 101 to form an electrical connection channel. A clearance region 609 is provided in the array of welding medium dots 101, in which no welding medium dots 101 are arranged, and the adhesive 60 is precisely positioned within this region. When the solder ribbon 50 is subjected to pressure welding, the welding medium dots 101 melt to form solder joints, while the adhesive 60, located in the clearance region 609, does not come into contact with the molten solder. In the subsequent dispensing process, the adhesive is confined within the clearance region 609 to prevent diffusion into the welding area.

[0057] Wherein, the first direction A refers to the extension direction of the solder ribbon 50. When the solar cell 100 is a back contact cell, since the back contact cell can be a cell with a main grid or a cell without a main grid, when the back contact cell is a cell with a main grid, the surface of the silicon substrate 1001 is provided with a first polar fine grid line and a second polar fine grid line extending along the second direction B and alternately arranged in the first direction A. The first polar fine grid line is connected to the first polar main grid located thereon. The first polar main grid is connected to the solder ribbon 50 through the soldering medium point 101. The second polar fine grid line is connected to the second polar main grid located thereon. The second polar main grid is connected to the solder ribbon 50 through the soldering medium point 101. The extension direction of the first polar main grid and the second polar main grid is consistent with the extension direction of the solder ribbon 50. When the back contact cell is a cell without a main grid, the surface of the silicon substrate 1001 is provided with first polarity fine grid lines and second polarity fine grid lines extending along the second direction B and alternately arranged in the first direction A. The first polarity fine grid lines and the second polarity fine grid lines are connected to the solder ribbon 50 through the soldering medium point 101. The first direction A and the second direction B intersect. Specifically, the first direction A can be perpendicular to the second direction B, or they can intersect at a certain angle, which is not limited here.

[0058] Example 2

[0059] Please refer to it again. Figure 1 Furthermore, the avoidance area 609 includes a first avoidance area 6011 and a second avoidance area 6012, which are arranged alternately in the second direction B.

[0060] In this embodiment, there are two avoidance regions 609. Each avoidance region 609 includes a first avoidance region 6011 and a second avoidance region 6012. The first avoidance region 6011 and the second avoidance region 6012 are arranged alternately in the second direction B. This arrangement expands the settable range of the adhesive 60. The second direction B refers to the vertical arrangement direction perpendicular to the extension direction of the solder ribbon 50. Specifically, it can be achieved by adjusting the relative positional relationship between the solder ribbon 50 and the silicon substrate 1001, which defines the alternating arrangement pattern of the avoidance regions 609.

[0061] Specifically, the clearance area 609 on the surface of the silicon substrate 1001 is divided into two groups, located on the lateral edges of the solder ribbon 50, and the two groups are staggered in their lateral arrangement. When the solder ribbon 50 covers the soldering medium point 101, the adhesive 60 is positioned in the blank space within the clearance area 609. Because the first clearance area 6011 and the second clearance area 6012 are alternately distributed laterally, the adhesive 60 can be dispersed at different positions on both sides of the solder ribbon 50, preventing the adhesive 60 (adhesive) from covering adjacent soldering medium points 101 due to lateral expansion during dispensing. Simultaneously, the staggered arrangement of the clearance areas 609 increases the spacing between adjacent adhesive 60s, further reducing the risk of adhesive flowing laterally to the soldering medium point 101.

[0062] This configuration provides more flexible arrangement space for the adhesive 60 without reducing the number of welding medium points 101, avoiding welding defects caused by the adhesive 60 (glue) covering the welding medium points 101, while improving the balance between mechanical connection strength and welding reliability through staggered avoidance areas 609.

[0063] Example 3

[0064] Please see Figure 1 Furthermore, along the first direction A, the avoidance area 609 is located at opposite ends of the welding strip 50 in the second direction B, and the first avoidance area 6011 and the second avoidance area 6012 are spaced apart.

[0065] In this embodiment, the interval setting means that the first avoidance area 6011 and the second avoidance area 6012 are staggered in the second direction B. Specifically, it can be achieved by alternating arrangement, which is used to balance the stress distribution on both sides of the welding strip 50.

[0066] Specifically, a clearance region 601 is provided at each of the two edges of the solder strip 50 along the second direction B. Each clearance region 609 includes a first clearance region 6011 and a second clearance region 6012, which are spaced apart along the first direction A. The adhesive 60 is arranged within the first clearance region 6011 and the second clearance region 6012, forming a spatial isolation between it and the welding medium point 101. Since the clearance regions 609 are located at the two edges of the solder strip 50 and are spaced apart, the flow of adhesive generated by the adhesive 60 during the dispensing process is restricted within the clearance regions 609, preventing the adhesive from spreading to the area where the welding medium point 101 is located. At the same time, the spaced clearance regions 609 make the distribution of the adhesive 60 on both sides of the solder strip 50 more uniform, thereby reducing local stress concentration when absorbing mechanical stress.

[0067] This ensures a stable physical isolation between the adhesive 60 and the welding medium point 101, preventing the adhesive 60 (e.g., glue) from contaminating the welding area during dispensing and welding, thereby improving welding reliability and long-term operational stability of the component. Simultaneously, the spaced-apart clearance areas 609 optimize the distribution of mechanical support on both sides of the solder strip 50, reducing the risk of microcracks caused by stress concentration.

[0068] Example 4

[0069] Please see Figure 1 Furthermore, multiple welding medium points 101 are arranged into multiple dot arrays 102. The dot array 102 includes a first dot array 1021 and a second dot array 1022. The first dot array 1021 and the second dot array 1022 are respectively located at two opposite edges of the welding strip 50 along the second direction B. The first dot array 1021 and the second dot array 1022 are spaced apart.

[0070] The first avoidance area 6011 is located on the other edge opposite to the first dot matrix 1021, and the second avoidance area 6012 is located on the other edge opposite to the second dot matrix 1022.

[0071] Specifically, dot matrix 102 refers to a set formed by arranging multiple welding medium dots 101 according to a preset pattern. It can be implemented using a horizontal array or an interlaced array. The distribution density and position of the welding medium 10 can be controlled by the arrangement of the dot matrix 102. The first dot matrix 1021 and the second dot matrix 1022 refer to the sets of welding medium dots 101 located on both sides of the welding strip 50. They can be implemented using a symmetrical or asymmetrical arrangement. By setting the intervals, space can be reserved for the bonding component 60.

[0072] Furthermore, the first dot matrix 1021 and the second dot matrix 1022 extend along both sides of the solder strip 50, and are spaced apart. Since the clearance area 609 and the dot matrix 102 are located at different edges of the solder strip 50, the adhesive 60 will not cover adjacent solder media dots 101 even if it expands during the dispensing process. For example, when the first dot matrix 1021 is located at the upper edge of the solder strip 50, and the first clearance area 6011 is located at the lower edge of the solder strip 50, the adhesive 60 only dispenses adhesive within the clearance area 601 at the lower edge, while the solder media dots 101 at the upper edge are not contaminated by adhesive.

[0073] Example 5

[0074] Furthermore, at least one of the first avoidance area 6011 and the second avoidance area 6012 has a width of 0.5mm-3.5mm along the second direction B.

[0075] In this embodiment, the width of the first avoidance area 6011 and the second avoidance area 6012 in the second direction B is the same, both being 2.8mm. In other embodiments, the widths of the first avoidance area 6011 and the second avoidance area 6012 in the second direction B may be different. For example, the width of the first avoidance area 6011 in the second direction B may be 2.5mm, and the width of the second avoidance area 6012 in the second direction B may be 2.8mm. Alternatively, the width of the first avoidance area 6011 in the second direction B may be 2.3mm, and the width of the second avoidance area 6012 in the second direction B may be 3.5mm. The specific width can be considered according to the actual situation and is not limited here.

[0076] Furthermore, in other embodiments, the width of at least one of the first avoidance area 6011 and the second avoidance area 6012 along the second direction B can also be other numerical ranges. For example, in one embodiment, the width of at least one of the first avoidance area 6011 and the second avoidance area 6012 along the second direction B is 1.0mm-4.5mm; in another embodiment, the width of at least one of the first avoidance area 6011 and the second avoidance area 6012 along the second direction B is 0.2mm-3mm; and in yet another embodiment, the width of at least one of the first avoidance area 6011 and the second avoidance area 6012 along the second direction B is 1.0mm-3.2mm. The specific numerical value can be determined based on the orientation of the location. The settings should be adjusted according to actual conditions, without limitation here. By setting the width of at least one of the first clearance area 6011 and the second clearance area 6012 along the second direction B to a reasonable range, it can be ensured that even if the adhesive 60 expands during the dispensing process, it will not cover the adjacent welding medium point 101. This avoids the first clearance area 6011 and the second clearance area 6012 being set too large, which would affect the connection reliability of multiple welding medium points 101 on the edge of the opposite welding strip 50 and the welding strip 50. It also avoids the first clearance area 6011 and the second clearance area 6012 being set too small, which would cause the adhesive 60 to expand during the dispensing process, cover the adjacent welding medium point 101, contaminate the welding area, and reduce the welding reliability and long-term operational stability of the component.

[0077] In the above embodiments, the width of at least one of the first avoidance area 6011 and the second avoidance area 6012 along the second direction B refers to the vertical distance from the edge of the multiple welding medium points 101 near the avoidance area 609 to the edge of the welding strip 50 on the opposite side of the first avoidance area 6011 or the second avoidance area 6012 in the second direction B. When the opposite side contains multiple welding medium points 101, any one of the average, minimum, and maximum values ​​of the vertical distance from the edge of the multiple welding medium points 101 near the avoidance area 609 to the edge of the welding strip 50 on the opposite side can be selected as the width of the avoidance area 609 along the second direction B, which is not limited here.

[0078] Example 6

[0079] Furthermore, the width of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B is 0.3mm-4mm;

[0080] The width of the welding medium dots 101 included in the second dot matrix 1022 along the second direction B is 0.3mm-4mm.

[0081] In this embodiment, the width of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B is the same as the width of the welding medium dots 101 included in the second dot matrix 1022 along the second direction B. In other embodiments, the width of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B may not be the same as the width of the welding medium dots 101 included in the second dot matrix 1022 along the second direction B. The specific width may be determined according to the actual situation and is not limited here.

[0082] Furthermore, by adjusting the width of the welding medium point 101 in the second direction B, a welding area with a specific size can be formed at the edge of the welding strip 50, thereby reserving more space for the bonded part 60. The structure is simple and easy to implement.

[0083] Of course, in other embodiments, the width of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B can be 0.5mm-3.8mm;

[0084] The second dot matrix 1022 includes welding medium dots 101 with a width of 0.2mm-3.5mm along the second direction B; or

[0085] The width of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B can be 0.1mm-5mm;

[0086] The second dot matrix 1022 includes welding medium dots 101 with a width of 0.1mm-5mm along the second direction B; or...

[0087] The width of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B can be 4mm-7mm;

[0088] The second dot matrix 1022 contains welding medium dots 101 with a width of 4mm-7mm along the second direction B.

[0089] In other words, the width range of the welding medium dots 101 included in the first dot matrix 1021 along the second direction B and the width range of the welding medium dots 101 included in the second dot matrix 1022 along the second direction B can be other values, which are not limited here. By adjusting the width range of the welding medium dots 101 along the second direction B, the connection reliability between multiple welding medium dots 101 and the solder strip 50 can be improved, so that even if the adhesive 60 expands during the dispensing process, it will not cover the adjacent welding medium dots 101, avoid contaminating the welding area, and improve the welding reliability and long-term operational stability of the component.

[0090] In the above embodiments, the width of the welding medium point 101 included in the first dot matrix 1021 or the second dot matrix 1022 along the second direction B can be any one of the average width, maximum width, and minimum width of multiple welding medium points 101 along the second direction B, and is not limited here.

[0091] Example 7

[0092] Please see Figure 1 and Figure 2 Furthermore, the multiple welding medium points 101 are arranged into a third dot matrix 1023 along the second direction B, and the two ends of the welding medium points 101 in the third dot matrix 1023 are at the same distance from the edge of the welding strip 50.

[0093] In this embodiment, the third dot matrix 1023 refers to the set of welding medium dots 101 located in the middle region of the solder strip 50 and arranged complementaryly with the first dot matrix 1021 and the second dot matrix 1022. The symmetrical arrangement of the third dot matrix 1023 ensures uniform stress on both sides of the solder strip 50, avoiding adhesive displacement due to stress concentration on one side. The equidistant distance from both ends to the edge of the solder strip 50 means that the distance between the upper and lower endpoints of the welding medium dots 101 relative to the edges of the solder strip 50 is equal, which can be achieved by adjusting the position of the dot matrix 102 or by using a positioning mold. The symmetrical design balances the thermal expansion difference between the solder strip 50 and the silicon substrate 1001, reducing the lateral flow range of the adhesive under pressure.

[0094] Specifically, the third dot matrix 1023 is disposed in the middle region of the solder strip 50, with its welding medium dots 101 symmetrically arranged along the first direction A. When the solder strip 50 is covered on the welding medium dots 101, the symmetrical structure of the third dot matrix 1023 uniformly disperses the deformation of the solder strip 50 caused by thermal expansion or mechanical vibration, thereby reducing the risk of adhesive expansion due to excessive local stress. At the same time, the third dot matrix 1023 forms an interlaced and complementary layout with the first and second dot matrices 1022, providing a more stable clearance space for the bonded component 60 while ensuring the strength of the electrical connection.

[0095] It is understood that in other embodiments, along the second direction B, the distances from the two endpoints of the welding medium points 101 of the third dot matrix 1023 to the edge of the welding strip 50 may also be different. For example, the distances from the two endpoints of some welding medium points 101 in the third dot matrix 1023 to the edge of the welding strip 50 may be the same, while the distances from the two endpoints of the welding medium points 101 in the remaining part of the third dot matrix 1023 to the edge of the welding strip 50 may be different, that is, they may be alternately distributed, or the distances from the two endpoints of all welding medium points 101 in the third dot matrix 1023 to the edge of the welding strip 50 may be different. The specific design can be made according to the actual situation and is not limited here.

[0096] Example 8

[0097] Please see Figure 1 and Figure 2 Furthermore, the absolute value of the distance from the welding medium point 101 of the third dot matrix 1023 to the two edges of the welding strip 50 is 0mm-2mm.

[0098] Specifically, the absolute value of the distance from the welding medium point 101 of the third dot matrix 1023 to the two edges of the welding strip 50 refers to the distance from one end of the welding medium point 101 to one of its edges. In this embodiment, the welding medium point 101 is located between the welding strips 50. During the installation of the welding strips 50, the welding strips 50 can fully cover the welding medium point 101. When the absolute value of the distance from the welding medium point 101 of the third dot matrix 1023 to the two edges of the welding strip 50 is 0, one edge of the welding strip 50 coincides with one end of the welding medium point 101, and the length from the other end of the welding medium point 101 to the edge of another welding strip 50 is 2mm. In other embodiments, the welding medium point 101 can be partially located outside the welding strip 50. With this setting, during the installation of the welding strip 50, only the part of the welding medium point 101 located inside the welding strip 50 can fit with the welding strip 50, while the part located outside the welding strip 50 will not fit with the welding strip 50.

[0099] Example 9

[0100] Furthermore, the solder strip 50 covers at least a portion of the adhesive component 60.

[0101] The solder ribbon 50 covering at least a portion of the adhesive 60 means that the solder ribbon 50 and the adhesive 60 form a spatially overlapping structure. Specifically, this can be achieved by the solder ribbon 50 being wider than the adhesive 60 or by the edge of the solder ribbon 50 extending beyond the edge of the adhesive 60. This arrangement creates a physical isolation layer by partially covering the adhesive 60 with the solder ribbon 50, preventing the adhesive from diffusing outwards before curing.

[0102] Specifically, the solder ribbon 50 is located above the soldering medium point 101 and the adhesive 60. When the solder ribbon 50 forms an ohmic contact with the soldering medium point 101 through a hot-pressing process, a portion of the solder ribbon 50 simultaneously covers the surface of the adhesive 60. Since the solder ribbon 50 only covers a localized area of ​​the adhesive 60, the uncovered edge areas of the adhesive 60 can still form an effective bond with the silicon substrate 1001. In the subsequent dispensing process, the adhesive is applied to the gap between the solder ribbon 50 and the silicon substrate 1001. At this time, the structure of the solder ribbon 50 covering part of the adhesive 60 can prevent the adhesive from flowing laterally into the area where the soldering medium point 101 is located.

[0103] Example 10

[0104] Furthermore, the ratio of the area of ​​the portion of the solder strip 50 covering a single adhesive element 60 to the total area of ​​the single adhesive element 60 is less than 0.6.

[0105] The area of ​​the portion covering a single adhesive component 60 refers to the area of ​​the overlapping region formed by the solder ribbon 50 on the surface of the adhesive component 60. This can be achieved by adjusting the relative position of the solder ribbon 50 and the adhesive component 60 or by changing the shape of the adhesive component 60. This feature is used to limit the degree of coverage of the adhesive component 60 by the solder ribbon 50. The ratio of the total area of ​​a single adhesive component 60 to less than 0.6 refers to the upper limit of the proportion of the area covered by the solder ribbon 50 to the total area of ​​the adhesive component 60. It is understood that in other embodiments, the ratio of the area of ​​the portion of the solder ribbon 50 covering a single adhesive component 60 to the total area of ​​the single adhesive component 60 may also be less than 0.5, or less than 0.4, or less than 0.35, or less than 0.7. The ratio of the area of ​​the portion of the solder ribbon 50 covering a single adhesive component 60 to the total area of ​​the single adhesive component 60 can be designed according to the actual situation and is not limited here.

[0106] Example 11

[0107] Furthermore, the ratio of the area of ​​the portion of the solder strip 50 covering all the adhesive parts 60 to the total area of ​​all the adhesive parts 60 ranges from 10% to 60%.

[0108] The ratio of the area of ​​the solder ribbon 50 covering the adhesive component 60 refers to the percentage of the total overlapping area of ​​the solder ribbon 50 and the adhesive component 60 to the total area of ​​all adhesive components 60 themselves. This ratio can be achieved by adjusting the width of the solder ribbon 50, the size of the adhesive component 60, or its layout. This ratio is limited to a range of 10%-60%, for example, it can be 15%, 30%, or 50%. Its purpose is to balance the degree of coverage of the adhesive component 60 by the solder ribbon 50: if the coverage area is too small, it may result in too much exposed area of ​​the adhesive component 60, affecting the mechanical stress absorption effect; if the coverage area is too large, it may hinder the elastic deformation space of the adhesive material under compression, reducing its stress buffering capacity.

[0109] Specifically, during the connection process between the solder ribbon 50 and the adhesive 60, when the solder ribbon 50 partially covers the adhesive 60, the uncovered area allows the adhesive 60 to deform under external force, thereby absorbing mechanical stress. By controlling the coverage area ratio within the range of 10%-60%, for example by using staggered or spaced arrangement of the adhesive 60, an effective connection between the solder ribbon 50 and the adhesive 60 can be ensured, while preventing the adhesive from diffusing into the welding medium 10 due to excessive pressure. Within this range, the effective bonding area and elastic deformation space of the adhesive 60 are synergistic, maintaining the reliability of the mechanical connection while preventing adhesive contamination of the welding medium 10.

[0110] It is understood that in other embodiments, the ratio of the area of ​​the portion of the solder ribbon 50 covering all the adhesives 60 to the total area of ​​all the adhesives 60 may be 70%-80%, or the ratio may be 70%-90%, or the ratio may be 60%-80%. The range of the ratio of the portion of the solder ribbon 50 covering all the adhesives 60 to the total area of ​​all the adhesives 60 can be considered according to the actual situation and is not limited here.

[0111] Example 12

[0112] Furthermore, the grid lines include a first grid line and a second grid line, the welding medium 10 includes a first welding medium 103 and a second welding medium 104, the adhesive 60 includes a first adhesive 601 and a second adhesive 602, and the welding ribbon 50 includes a first welding ribbon 501 and a second welding ribbon 502.

[0113] The surface of the silicon substrate 1001 is alternately provided with a first gate line and a second gate line. The first gate line is connected to the first solder ribbon 501 through a first soldering medium 103. The first solder ribbon 501 is connected to the silicon substrate 1001 through a first adhesive 601. The second gate line is connected to the second solder ribbon 502 through a second soldering medium 104. The second solder ribbon 502 is connected to the silicon substrate 1001 through a second adhesive 602.

[0114] In this embodiment, the first gate lines and the second gate lines, arranged alternately on the surface of the silicon substrate 1001, are connected to the independent first solder ribbons 501 and second solder ribbons 502 via corresponding first soldering medium 103 and second soldering medium 104, respectively. The first solder ribbon 501 is fixed to the silicon substrate 1001 by a first adhesive 601, and the second solder ribbon 502 is fixed to the silicon substrate 1001 by a second adhesive 602. The soldering medium 10 and the adhesive 60 are spatially separated. With this arrangement, the connection areas of the first solder ribbon 501 and the second solder ribbon 502 are separated from each other, and the array of soldering medium dots 101 and the adhesive 60 do not interfere with each other, avoiding contamination of the soldering interface by the flow of colloid.

[0115] By independently connecting different grid lines to their corresponding solder strips 50, interference problems caused by multiple sets of welding media 10 and adhesive components 60 being stacked in the same area are avoided. After the welding interface and the mechanical bonding interface are separated, the flow range of the colloid is restricted to an independent area, ensuring the cleanliness of the welding media 10. At the same time, the separate solder strip layout enhances the mechanical stress dispersion capability, improving connection reliability and component life.

[0116] Example 13

[0117] Furthermore, the silicon substrate 1001 includes a first region and a second region, a first doped layer is disposed on the first region, and a second doped layer is disposed on the second region, wherein the polarities of the first doped layer and the second doped layer are different.

[0118] The first grid line is located in the first region, and the second grid line is located in the second region.

[0119] The first and second doped layers having different polarities refer to forming P-type and N-type doped semiconductor layers, respectively. This can be achieved using phosphorus diffusion or boron diffusion processes, forming a PN junction to promote the separation of photogenerated carriers. The first gate line being located in the first region means the positive collection gate line is arranged in the P-type doped region, and the second gate line being located in the second region means the negative collection gate line is arranged in the N-type doped region. This ensures that the carrier transport path matches the doped region. In some embodiments, the first gate line being located in the first region can also mean the negative collection gate line is arranged in the N-type doped region, and the second gate line being located in the second region can also mean the positive collection gate line is arranged in the P-type doped region.

[0120] In this embodiment, after dividing the surface of the silicon substrate 1001 into a first P-type doped region and a second N-type doped region, or vice versa, the positive electrode collecting gate lines are precisely arranged in the P-type region to collect hole carriers, while the negative electrode collecting gate lines are correspondingly arranged in the N-type region to collect electrons. This arrangement allows the gate lines and the corresponding doped regions to form directional carrier transport channels, avoiding carrier recombination losses caused by the alternating coverage of different doped regions by the positive and negative electrode gate lines in traditional designs.

[0121] Example 14

[0122] Please see Figure 1 and Figure 2 Furthermore, the first welding medium 103 includes a first dot matrix 1021 located at the first edge 505 of the first welding strip 501, and a second dot matrix 1022 located at the second edge 506 of the first welding strip 501. The first dot matrix 1021 and the second dot matrix 1022 are spaced apart. The first clearance area 6011 is located at the second edge 506 of the first welding strip 501, and the second clearance area 6012 is located at the first edge 505 of the first welding strip 501.

[0123] By setting a first dot matrix 1021 at the first edge 505 of the first solder strip 501 and a second dot matrix 1022 at the second edge 506, the two are arranged at intervals along the length of the solder strip 50, forming two parallel rows of welding medium dots 101. Simultaneously, no welding medium dots 101 are set in the first clearance area 6011 of the second edge 506 and the second clearance area 6012 of the first edge 505, allowing the adhesive 60 to be completely embedded in the clearance area 609. Since the welding medium dots 101 array and the clearance area 609 are spatially isolated, during the dispensing process, the adhesive only covers the clearance area 609 and does not intrude into the area where the welding medium dots 101 are located, thereby avoiding welding defects caused by adhesive contamination.

[0124] In this embodiment, the first dot matrix 1021 and the second dot matrix 1022 are both located at both ends of the first solder strip 501 and are respectively disposed close to the two ends of the first solder strip 501. The second dot matrix 1022 is disposed at a distance from the first dot matrix 1021. The third dot matrix 1023 is located between the second dot matrix 1022 and the end corresponding to the first dot matrix 1021, or the third dot matrix 1023 may be disposed close to the edge of the solder strip 50 of the second dot matrix 1022 or the first dot matrix 1021, for example, the third dot matrix 1023 is parallel to the second dot matrix 1022 or the first dot matrix 1021 in the first direction A.

[0125] In other embodiments, the dot matrix may further include a fourth dot matrix and a fifth dot matrix, the fourth and fifth dot matrices being located in the middle of the first solder strip 501, with the fourth dot matrix located at the first edge 505 of the first solder strip 501 and the fifth dot matrix located at the second edge 506 of the first solder strip 501. The fourth and fifth dot matrices are spaced apart, with a first clearance area 6011 located at the second edge 506 of the first solder strip 501 and a second clearance area 6012 located at the first edge 505 of the first solder strip 501; or

[0126] The fourth dot matrix is ​​located at the second edge 506 of the first solder strip 501, and the fifth dot matrix is ​​located at the first edge 505 of the first solder strip 501. The fourth and fifth dot matrices are spaced apart. The first clearance area 6011 is located at the first edge 505 of the first solder strip 501, and the second clearance area 6012 is located at the second edge 506 of the first solder strip 501.

[0127] The above is merely an example to illustrate the types of welding medium points 101. In different embodiments, welding medium points 101 can also be set in other locations. The specific design can be made according to the actual situation and is not limited here.

[0128] Example 15

[0129] Please refer to it again. Figure 1 and Figure 2 Furthermore, the second welding medium 104 includes a first dot matrix 1021 located at the second edge 506 of the second welding strip 502, and a second dot matrix 1022 located at the first edge 505 of the second welding strip 502. The first dot matrix 1021 and the second dot matrix 1022 are spaced apart. The first clearance area 6011 is located at the first edge 505 of the second welding strip 502, and the second clearance area 6012 is located at the second edge 506 of the second welding strip 502.

[0130] By distributing the first dot matrix 1021 of the second welding medium 104 along the second edge 506 of the second weld strip 502, and the second dot matrix 1022 along the first edge 505 of the second weld strip 502, the two are arranged alternately to form a discontinuous dot matrix 102 layout. A first clearance region 6011 and a second clearance region 6012 are respectively provided at the first edge 505 and the second edge 506, and the two clearance regions 609 are staggered along the length of the weld strip 50. The adhesive 60 is arranged within the clearance region 609 to avoid overlapping with the welding medium dots 101. During welding, the second weld strip 502 forms an electrical connection with the second grid line through the dot matrix 102 of the second welding medium 104, while the adhesive 60 is located in the clearance region 609 and has no contact with the welding medium dots 101, thus not interfering with the welding interface during mechanical fixing.

[0131] In this embodiment, the first dot matrix 1021 and the second dot matrix 1022 are located at both ends of the second solder strip 502 and are respectively disposed close to both ends of the second solder strip 502. The second dot matrix 1022 is disposed at a distance from the first dot matrix 1021, and the third dot matrix 1023 is located between the second dot matrix 1022 and the end corresponding to the first dot matrix 1021, or the third dot matrix 1023 may be disposed close to the edge of the solder strip 50 of the second dot matrix 1022 or the first dot matrix 1021, for example, the third dot matrix 1023 is parallel to the second dot matrix 1022 or the first dot matrix 1021 in the first direction A.

[0132] In other embodiments, the dot matrix may further include a fourth dot matrix and a fifth dot matrix, the fourth and fifth dot matrices being located in the middle of the second solder strip 502, with the fourth dot matrix located at the second edge 506 of the second solder strip 502 and the fifth dot matrix located at the first edge 505 of the second solder strip 502. The fourth and fifth dot matrices are spaced apart, with a first clearance area 6011 located at the first edge 505 of the first solder strip 501 and a second clearance area 6012 located at the second edge 506 of the first solder strip 501; or

[0133] The fourth dot matrix is ​​located at the first edge 505 of the second solder strip 502, and the fifth dot matrix is ​​located at the second edge 506 of the second solder strip 502. The fourth and fifth dot matrices are spaced apart. The first clearance area 6011 is located at the second edge 506 of the first solder strip 501, and the second clearance area 6012 is located at the first edge 505 of the first solder strip 501.

[0134] The above is merely an example to illustrate the types of welding medium points 101. In different embodiments, welding medium points 101 can also be set in other locations. The specific design can be made according to the actual situation and is not limited here.

[0135] Example 16

[0136] Please continue reading. Figure 1 and Figure 2 Furthermore, the welding medium 10 includes a third welding medium 105 and a fourth welding medium 106, the adhesive includes a third adhesive 603 and a fourth adhesive 604, and a third solder ribbon 503 and a fourth solder ribbon 504 are also provided on the silicon substrate 1001. The first gate line is connected to the third solder ribbon 503 through the third welding medium 105, the third solder ribbon 503 is connected to the silicon substrate 1001 through the third adhesive 603, the second gate line is connected to the fourth solder ribbon 504 through the fourth welding medium 106, and the fourth solder ribbon 504 is connected to the silicon substrate 1001 through the fourth adhesive 604.

[0137] The first grid line is electrically connected to the third solder strip 503 via the third welding medium 105, and the third solder strip 503 is fixed to the surface of the silicon substrate 1001 via the third adhesive 603. The second grid line is electrically connected to the fourth solder strip 504 via the fourth welding medium 106, and the fourth solder strip 504 is fixed to the surface of the silicon substrate 1001 via the fourth adhesive 604. When multiple solder strips 50 are arranged on the solar cell 100, including, for example, the third solder strip 503 and the fourth solder strip 504, the above arrangement further separates the welding area from the bonding area in space, preventing the flow of colloid from contaminating the welding medium 10. The third welding medium 105 and the fourth welding medium 106 are independently distributed under different solder strips 50, and the adhesive 60 is disposed in the avoidance area 609 at the edge of the solder strip 50, ensuring that the welding and bonding functions do not interfere with each other.

[0138] Example 17

[0139] Please refer to it again. Figure 1 and Figure 2 Furthermore, the first welding medium 103 and the first adhesive 601, the fourth welding medium 106 and the fourth adhesive 604 are arranged in the same way on the silicon substrate, and the second welding medium 104 and the second adhesive 602, the third welding medium 105 and the third adhesive 603 are arranged in the same way on the silicon substrate.

[0140] In this embodiment, the identical arrangement means that the spatial distribution pattern and relative positional relationship between the welding medium 10 and the corresponding adhesive 60 are consistent. This design ensures that the synergistic effect of the welding medium 10 and the adhesive 60 in different areas is consistent. The correspondence between the welding medium 10 and the adhesive 60 means that a specific group of welding medium 10 and a specific group of adhesive 60 form a fixed pair. Specifically, this can be achieved by pre-setting the positional offset between the welding medium point array 101 and the adhesive 60. This correspondence can avoid interference between different welding mediums 10 and adhesives 60.

[0141] Specifically, when the first welding medium 103 is disposed on the surface of the silicon substrate, the corresponding first adhesive 601 is arranged according to a fixed spacing or offset, while the fourth welding medium 106 and the fourth adhesive 604 adopt the same arrangement rule. Similarly, the second welding medium 104 and the second adhesive 602, and the third welding medium 105 and the third adhesive 603 each form another set of symmetrical arrangement patterns. This symmetrical layout enables the solder ribbons 50 to form repeatable and predictable connection structures on both sides of the edge region of the silicon substrate, which not only ensures effective isolation between the welding medium points 101 and the adhesive 60, but also achieves standardized configuration of different solder ribbon connection methods.

[0142] In this embodiment, the first solder ribbon 501 and the third solder ribbon 503 have the same polarity, and the second solder ribbon 502 and the fourth solder ribbon 504 have the same polarity. By staggering them as described above, when one of the solder ribbons is offset, the other solder ribbon with the same polarity can also contact its corresponding solder paste, thereby avoiding poor contact with solder paste due to solder ribbon misalignment and improving the working performance of the solar cell 100.

[0143] Of course, in other embodiments, the first welding medium 103 and the first adhesive 601, the second welding medium 104 and the second adhesive 602 can be arranged in the same way on the silicon substrate, and the third welding medium 105 and the third adhesive 603, the fourth welding medium 106 and the fourth adhesive 604 can be arranged in the same way on the silicon substrate; or

[0144] The first welding medium 103 and the first adhesive 601, the third welding medium 105 and the third adhesive 603 are arranged in the same way on the silicon substrate. The second welding medium 104 and the second adhesive 602, the fourth welding medium 106 and the fourth adhesive 604 are arranged in the same way on the silicon substrate. The specific arrangement can be designed according to the actual situation and is not limited here.

[0145] It should be understood that in other embodiments, a fifth solder strip 50, a sixth solder strip 50, etc. may also be provided on the silicon substrate 1001. The specific arrangement of the fifth welding medium 10, the fifth adhesive 60, and the sixth welding medium 10 and the sixth adhesive 60 can be the same as described above, and will not be elaborated here.

[0146] Example 18

[0147] Furthermore, the distance between the adhesive 60 and at least one edge of the solder strip 50 is 0.5mm-2mm.

[0148] In this embodiment, the adhesive 60 is generally racetrack-shaped along the second direction B, including an upper edge and a lower edge. The adhesive 60 is at least partially located outside the solder strip 50, which facilitates the bonding work of the adhesive 60 and makes it easy to form. The distance between the adhesive 60 and at least one edge of the solder strip 50 is the distance from the upper or lower edge of the adhesive 60 outside the solder strip 50 to the edge of the nearby solder strip 50.

[0149] It is understood that in other embodiments, the distance between the adhesive 60 and at least one edge of the solder ribbon 50 can also be other values. For example, in one example, the distance between the adhesive 60 and at least one edge of the solder ribbon 50 is 0.2mm-2.5mm; in another example, the distance is 0.1mm-1.5mm; and in yet another example, the distance is 0.1mm-2.5mm. The specific distance can be determined based on actual circumstances and is not limited here. By reasonably setting the distance between the adhesive 60 and at least one edge of the solder ribbon 50, the bonding work between the adhesive 60 and the solder ribbon 50 is facilitated, easy to form, and the bonding strength is guaranteed.

[0150] It should be noted that in other embodiments, the adhesive 60 may also be other shapes, such as circles, squares, triangles, etc. The specific design can be made according to the actual situation and is not limited here.

[0151] Example 19

[0152] Furthermore, the spacing between the multiple welding medium points 101 along the first direction A is 0.4mm-1.5mm.

[0153] Of course, in other embodiments, the spacing between the multiple welding medium points 101 along the first direction A can also be other values. For example, in one example, the spacing between the multiple welding medium points 101 along the first direction A is 0.2mm-1.6mm; in another example, the spacing between the multiple welding medium points 101 along the first direction A is 0.3mm-2mm; and in yet another example, the spacing between the multiple welding medium points 101 along the first direction A is 0.5mm-1.5mm. The specific spacing can be designed according to the actual situation and is not limited here. By reasonably setting the spacing between the multiple welding medium points 101 along the first direction A, it is possible to avoid the multiple welding medium points 101 sticking together due to the spacing being too small, thus affecting the welding performance, or the spacing being too large, which reduces the reliability of the connection between the multiple welding medium points 101 and the welding strip 50.

[0154] Example 20

[0155] Please see Figure 3 and Figure 4 A solar cell module 1000 includes any of the above-mentioned solar cells 100. The solar cell module 1000 includes a plurality of solar cells 100 connected in series along a first direction A. The plurality of solar cells 100 are connected by solder strips 50.

[0156] In this embodiment, the solar cell module 1000 further includes an isolation strip 30 and a busbar 40. The isolation strip 30 refers to a strip-shaped structure disposed on the top of the stacked area of ​​adjacent solar cells 100, and can be made of a flexible insulating material such as rubber or polyurethane. The busbar 40 is located on the side of the isolation strip 30 away from the solar cells 100. The busbar 40 refers to a conductive component used to collect and transmit the current generated by the solar cells 100, and can be made of copper-based or aluminum-based materials. The busbar 40 is arranged outside the isolation strip 30. A solder strip 50 connects two adjacent solar cells 100 and the busbar 40. The solder strip 50 includes copper-based solder strip 50, alloy-based solder strip 50, and silver-based solder strip 50.

[0157] Example 21

[0158] A photovoltaic system includes the aforementioned solar cell module 1000.

[0159] The beneficial effects achieved by this invention are as follows: a plurality of gate lines are alternately arranged on the surface of the silicon substrate 1001. The gate lines are connected to the solder ribbon 50 through at least one row of soldering medium 10. The soldering medium 10 includes a plurality of soldering medium points 101 along the first direction A. The solder ribbon 50 at least partially covers the soldering medium points 101. The solder ribbon 50 is also connected to the silicon substrate 1001 through a plurality of adhesives 60. A plurality of clearance areas 609 are provided on the at least one row of soldering medium 10. The adhesives 60 are at least partially located in the clearance areas 609. No soldering medium 10 is provided in the clearance areas 609. By providing clearance areas 609, the adhesives 60 are prevented from flowing during extrusion and from contacting the soldering medium points 101, thereby preventing the adhesives 60 from contaminating the soldering medium points 101. At the same time, the stress distribution is optimized. This invention has the advantages of preventing the adhesives 60 from contaminating the soldering medium points 101, improving welding reliability, reducing cold solder joints and void defects, optimizing stress distribution, and extending service life.

[0160] It is understood that those skilled in the art can combine various implementation methods in the above embodiments under the guidance of the above examples to obtain technical solutions with multiple implementation methods.

[0161] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A solar cell, characterized in that, include: Silicon substrate; The surface of the silicon substrate is alternately provided with a plurality of gate lines, the gate lines are connected to the solder strip through at least one row of soldering medium, the soldering medium includes a plurality of soldering medium points along a first direction, and the solder strip at least partially covers the soldering medium points; The solder strip is also connected to the silicon substrate by a number of adhesives. A number of clearance areas are provided on the at least one row of soldering medium. The adhesives are at least partially located in the clearance areas, and no soldering medium is provided in the clearance areas.

2. The solar cell as described in claim 1, characterized in that, The avoidance area includes a first avoidance area and a second avoidance area, which are staggered in a second direction.

3. The solar cell as described in claim 2, characterized in that, Along the first direction, the avoidance area is located at the opposite ends of the welding strip in the second direction, and the first avoidance area and the second avoidance area are spaced apart.

4. The solar cell as described in claim 2, characterized in that, The plurality of welding medium points are arranged into a plurality of dot arrays, the dot arrays including a first dot array and a second dot array, the first dot array and the second dot array are respectively located at two opposite edges of the welding strip along the second direction, and the first dot array and the second dot array are spaced apart. The first avoidance area is located on the other edge opposite to the first dot matrix, and the second avoidance area is located on the other edge opposite to the second dot matrix.

5. The solar cell as described in claim 3, characterized in that, The width of at least one of the first avoidance area and the second avoidance area along the second direction is 0.5mm-3.5mm.

6. The solar cell as described in claim 4, characterized in that, The width of the welding medium dots included in the first dot matrix along the second direction is 0.3mm-4mm; The width of the welding medium dots included in the second dot matrix along the second direction is 0.3mm-4mm.

7. The solar cell as claimed in claim 4, characterized in that, The plurality of welding medium points are further arranged in a third dot matrix, and along the second direction, the two endpoints of the welding medium points in the third dot matrix are at the same distance from the edge of the weld strip.

8. The solar cell as claimed in claim 7, characterized in that, The absolute value of the distance from the welding medium point of the third dot matrix to the two edges of the welding strip is 0mm-2mm.

9. The solar cell according to claim 1, characterized in that, The solder strip covers at least a portion of the adhesive component.

10. The solar cell according to claim 9, characterized in that, The ratio of the area of ​​the portion of the solder strip covering a single adhesive element to the total area of ​​the single adhesive element is less than 0.

6.

11. The solar cell as claimed in claim 9, characterized in that, The ratio of the area of ​​the portion of the solder strip covering all the adhesive components to the total area of ​​all the adhesive components ranges from 10% to 60%.

12. The solar cell according to claim 4, characterized in that, The grid lines include a first grid line and a second grid line; the welding medium includes a first welding medium and a second welding medium; the adhesive includes a first adhesive and a second adhesive; and the welding strip includes a first welding strip and a second welding strip. The surface of the silicon substrate is alternately provided with the first gate line and the second gate line. The first gate line is connected to the first solder ribbon through the first welding medium. The first solder ribbon is connected to the silicon substrate through the first adhesive. The second gate line is connected to the second solder ribbon through the second welding medium. The second solder ribbon is connected to the silicon substrate through the second adhesive.

13. The solar cell according to claim 12, characterized in that, The silicon substrate includes a first region and a second region. A first doped layer is disposed on the first region, and a second doped layer is disposed on the second region. The first doped layer and the second doped layer have different polarities. The first gate line is located in the first region, and the second gate line is located in the second region.

14. The solar cell according to claim 12, characterized in that, The first welding medium includes a first dot matrix located at the first edge of the first weld strip, and a second dot matrix included in the first welding medium located at the second edge of the first weld strip. The first dot matrix and the second dot matrix are spaced apart. The first clearance area is located at the second edge of the first weld strip, and the second clearance area is located at the first edge of the first weld strip.

15. The solar cell as claimed in claim 14, characterized in that, The first dot matrix of the second welding medium is located at the second edge of the second welding strip, and the second dot matrix of the second welding medium is located at the first edge of the second welding strip. The first dot matrix and the second dot matrix are spaced apart. The first clearance area is located at the first edge of the second welding strip, and the second clearance area is located at the second edge of the second welding strip.

16. The solar cell as claimed in claim 15, characterized in that, The welding medium includes a third welding medium and a fourth welding medium, the adhesive includes a third adhesive and a fourth adhesive, and a third solder strip and a fourth solder strip are also disposed on the silicon substrate. The first gate line is connected to the third solder strip through the third welding medium, the third solder strip is connected to the silicon substrate through the third adhesive, the second gate line is connected to the fourth solder strip through the fourth welding medium, and the fourth solder strip is connected to the silicon substrate through the fourth adhesive.

17. The solar cell as claimed in claim 16, characterized in that, The first welding medium and the first adhesive, the fourth welding medium and the fourth adhesive are arranged in the same way on the silicon substrate, and the second welding medium and the second adhesive, the third welding medium and the third adhesive are arranged in the same way on the silicon substrate.

18. The solar cell according to claim 1, characterized in that, The distance between the adhesive and at least one edge of the solder strip is 0.5mm-2mm.

19. The solar cell according to claim 1, characterized in that, The distance between the multiple welding medium points along the first direction is 0.4mm-1.5mm.

20. The solar cell according to claim 1, characterized in that, The adhesive is made of an adhesive material, which includes at least one of UV adhesive, double-sided adhesive, pressure-sensitive adhesive, and thermosetting adhesive.

21. A solar cell module, characterized in that, The solar cell module includes any one of the solar cells described in claims 1-20, wherein the solar cell module comprises a plurality of solar cells connected in series along the first direction, and the plurality of solar cells are connected by the solder strip.

22. A photovoltaic system, characterized in that, Includes the solar cell module as described in claim 21.

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