Intelligent Control Method and System for Electric Heating Wall Panels

Abstract

This application relates to an intelligent control method and system for an electric heating wall panel, comprising: after the end of the previous heating cycle, entering a diagnostic time slot, and traversing each electrode unit in the electrode array as a target electrode unit, and sequentially performing the following operations on each target electrode unit: identifying the unit-level interface health status between the target electrode unit and the electric heating film; after completing the traversal diagnosis of the electrode array, aggregating at least one electrode region with interface state degradation based on the unit-level interface health status of all electrode units; based on the electrode region with interface state degradation, executing a fault-tolerant control strategy, including: reducing the driving intensity of the electrode region with interface state degradation in the next heating cycle, and increasing the driving intensity of the healthy electrode region adjacent to the electrode region with interface state degradation; in the next heating cycle, outputting a driving signal adjusted by the fault-tolerant control strategy to the electrode array through a power driving circuit.

Description

Technical Field

[0001] This application relates to the field of electrothermal and intelligent control technology, and in particular to an intelligent control method and system for an electrothermal wall panel. Background Technology

[0002] Electric heating wall panels, as a new type of indoor heating device, are widely used in the building heating field due to their advantages such as energy saving, environmental protection, convenient installation, and high comfort. They typically employ a structure combining an electrode array and an electric heating film, directly converting electrical energy into heat energy to achieve regional temperature control of the wall surface, providing users with an efficient and comfortable heating solution.

[0003] For the operation control of electric heating wall panels, traditional technologies mostly adopt a unified or simple zone control strategy based on feedback from a global temperature sensor, striving to maintain the overall temperature of the wall surface or the uniformity of a large area. Some may use monitoring of total power or abnormal temperature points to trigger fault alarms, or shut down the entire electric heating wall panel when a fault is detected.

[0004] However, the aforementioned traditional technologies cannot effectively monitor the state of the electric heating wall panel during use, and therefore cannot accurately control the electric heating wall panel. Summary of the Invention

[0005] Therefore, it is necessary to provide an intelligent control method and system for electric heating wall panels that enables precise monitoring of the wall panel's status and thus achieves accurate temperature control, in order to address the aforementioned technical problems.

[0006] In a first aspect, this application provides an intelligent control method for an electric heating wall panel. The electric heating wall panel includes an electrode array composed of multiple independently controllable electrode units, an electric heating film electrically connected to the electrode array, and a temperature sensor deployed inside or on the back of the wall. The method is executed by a core control module, which includes a power drive circuit connected to the electrode array. The power drive circuit includes multiple power switching devices. The method includes the following steps:

[0007] After the previous heating cycle ends, the diagnostic time slot is entered, and each electrode unit in the electrode array is traversed as the target electrode unit. The following operations are performed on each target electrode unit in sequence: identify the health status of the unit-level interface between the target electrode unit and the electrothermal film.

[0008] After completing the traversal diagnosis of the electrode array, based on the unit-level interface health status of all electrode units, at least one electrode region with deteriorated interface status is aggregated, wherein each electrode region with deteriorated interface status is composed of one or more adjacent electrode units whose unit-level interface health status is characterized as deteriorated.

[0009] Based on the electrode region with deteriorated interface state, a fault-tolerant control strategy is implemented; wherein, the fault-tolerant control strategy includes: reducing the driving intensity of the electrode region with deteriorated interface state in the next heating cycle, and increasing the driving intensity of the healthy electrode region adjacent to the electrode region with deteriorated interface state in the next heating cycle.

[0010] In the next heating cycle, the power drive circuit outputs a drive signal adjusted by the fault-tolerant control strategy to the electrode array.

[0011] In one embodiment, identifying the health status of the unit-level interface between the target electrode unit and the electrothermal film includes:

[0012] Perform a residual charge discharge operation on the target electrode unit;

[0013] A test excitation signal is applied to the target electrode unit, and the electrical response signal generated by the target electrode unit in response to the test excitation signal is acquired.

[0014] Based on the electrical response signal, the impedance characteristic parameters characterizing the interface state between the target electrode unit and the electrothermal film are calculated.

[0015] Based on impedance characteristic parameters, the health status of the unit-level interface between the target electrode unit and the electrothermal film is identified.

[0016] In one embodiment, based on the electrical response signal, impedance characteristic parameters characterizing the interface state between the target electrode unit and the electrothermal film are calculated, including:

[0017] Based on a reference signal synchronized with the test excitation signal, the in-phase and quadrature components corresponding to the first frequency component of the test excitation signal, as well as the in-phase and quadrature components corresponding to the second frequency component of the test excitation signal, are extracted from the electrical response signal.

[0018] The impedance spectrum is calculated based on the in-phase and quadrature components of each frequency component, and the impedance spectrum is used as the impedance characteristic parameter.

[0019] The reference signal and the test excitation signal are generated from the same signal source.

[0020] In one embodiment, identifying the health status of the unit-level interface between the target electrode unit and the electrothermal film based on impedance characteristic parameters includes:

[0021] Determine the interface contact resistance and interface delamination capacitance values ​​corresponding to the impedance characteristic parameters;

[0022] Obtain the interface contact resistance health threshold and interface delamination capacitance health threshold corresponding to the wall material type and cumulative service time;

[0023] The interface contact resistance value is compared with the healthy threshold of interface contact resistance to obtain the resistance comparison result, and the interface delamination capacitance value is compared with the healthy threshold of interface delamination capacitance to obtain the capacitance comparison result.

[0024] Based on the resistance comparison results and capacitance comparison results, the health status of the cell-level interface is generated as healthy, slightly deteriorated, or severely deteriorated.

[0025] In one embodiment, performing a residual charge discharge operation on the target electrode unit includes:

[0026] The target electrode unit is coupled to the adjacent grounding node via an electrothermal film;

[0027] By utilizing the parasitic diodes of the corresponding power switching devices in the power drive circuit, a passive discharge path is formed to perform residual charge discharge operation.

[0028] In one embodiment, the method further includes, during the application of a test excitation signal to the target electrode unit:

[0029] The power switching device corresponding to the electrode unit adjacent to the target electrode unit is controlled to be in a high impedance state, and the potential of the adjacent electrode unit is maintained at a preset stable level through a pull-up element.

[0030] In one embodiment, increasing the driving intensity of a healthy electrode region adjacent to an electrode region with deteriorated interface conditions includes:

[0031] Based on the area of ​​the electrode region with deteriorated interface condition, the area of ​​the adjacent healthy electrode region, the thermal diffusion distance between the electrode region with deteriorated interface condition and the adjacent healthy electrode region, and the thermal properties of the wall, the driving strength improvement of the adjacent healthy electrode region is dynamically calculated.

[0032] Based on the increase in driving intensity, the driving intensity of adjacent healthy electrode regions is adjusted in the next heating cycle.

[0033] In one embodiment, during the next diagnostic time slot, the method further includes: verifying the compensation effect of the electrode region for which the fault-tolerant control strategy has been implemented; wherein the compensation effect verification includes:

[0034] If the interface state of the electrode region that has implemented the fault-tolerant control strategy remains stable and the surface temperature distribution of its adjacent regions is uniform, then the fault-tolerant control strategy is maintained.

[0035] If the interface state of an electrode region that has implemented a fault-tolerant control strategy continues to deteriorate, the heating function of that electrode region will be completely shut down, and the healthy electrode region that is next to that electrode region will be activated.

[0036] In one embodiment, determining the first frequency component and the second frequency component in the test excitation signal includes:

[0037] Based on the current service status or historical diagnostic results of the electric heating wall panel, the specific frequency points and test amplitudes of the first and second frequency components are dynamically selected through an optimization algorithm.

[0038] In one embodiment, determining the interface contact resistance value and interface delamination capacitance value corresponding to the impedance characteristic parameters includes:

[0039] The equivalent circuit topology and circuit parameters are identified from impedance characteristic parameters through a dynamic equivalent circuit model inference engine.

[0040] Based on the identified equivalent circuit topology and circuit parameters, determine the interface contact resistance and interface delamination capacitance.

[0041] Secondly, this application provides an intelligent control system for an electric heating wall panel. The electric heating wall panel includes an electrode array composed of multiple independently controllable electrode units, an electric heating film electrically connected to the electrode array, and a temperature sensor deployed inside or on the back of the wall. This system is configured in a core control module, which includes a power drive circuit connected to the electrode array. The power drive circuit includes multiple power switching devices. The system includes:

[0042] The unit identification module is used to enter the diagnostic time slot after the previous heating cycle ends, and traverse each electrode unit in the electrode array as the target electrode unit, and perform the following operations on each target electrode unit in turn: identify the health status of the unit-level interface between the target electrode unit and the electrothermal film.

[0043] The regional control module is used to aggregate and form at least one electrode region with deteriorated interface state based on the unit-level interface health status of all electrode units after completing the traversal diagnosis of the electrode array; wherein each electrode region with deteriorated interface state is composed of one or more adjacent electrode units whose unit-level interface health status is characterized as deteriorated.

[0044] The fault-tolerant execution module is used to execute a fault-tolerant control strategy based on the electrode region with deteriorated interface state. The fault-tolerant control strategy includes: reducing the driving intensity of the electrode region with deteriorated interface state in the next heating cycle and increasing the driving intensity of the healthy electrode region adjacent to the electrode region with deteriorated interface state.

[0045] The adjustment and update module is used to output a drive signal adjusted by a fault-tolerant control strategy to the electrode array through the power drive circuit in the next heating cycle.

[0046] The aforementioned intelligent control method and system for electric heating wall panels, in this application, firstly performs real-time, high-precision, unit-level diagnosis of the interface health status between each electrode unit and the electric heating film of the electric heating wall panel within a dedicated diagnostic time slot. This enables timely and accurate detection of microscopic localized degradation problems, overcoming the limitations of traditional macroscopic monitoring. Based on this, an adaptive fault-tolerant control strategy is implemented according to the diagnostic results. Specifically, the driving intensity of the electrode area with interface degradation is reduced, effectively avoiding localized overheating and potential safety hazards. Simultaneously, the driving intensity of the healthy electrode area adjacent to the degraded area is increased to compensate for heat output loss and maintain the overall temperature uniformity of the wall surface. This refined and differentiated power control ensures that the electric heating wall panel can still operate safely, efficiently, and stably even when localized degradation occurs, significantly improving reliability, service life, and user experience. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 A cross-sectional structural diagram of an electric heating wall panel body provided in an embodiment of this application;

[0049] Figure 2 A schematic diagram of the hardware architecture of the core control module of an electric heating wall panel provided in an embodiment of this application;

[0050] Figure 3 A flowchart illustrating an intelligent control method for an electric heating wall panel provided in an embodiment of this application;

[0051] Figure 4 This is a schematic diagram of the internal structure of a diagnostic unit provided in an embodiment of this application;

[0052] Figure 5 A flowchart illustrating a step for identifying the health status of a unit-level interface, provided in an embodiment of this application;

[0053] Figure 6 A schematic diagram of the internal functional modules of a main controller provided in an embodiment of this application;

[0054] Figure 7 A flowchart illustrating the steps for determining impedance characteristic parameters based on a test excitation signal, provided in an embodiment of this application;

[0055] Figure 8This is a schematic diagram of the structure of an intelligent control system for an electric heating wall panel provided in an embodiment of this application. Detailed Implementation

[0056] The specific implementation of this embodiment will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this embodiment.

[0057] This embodiment provides an electric heating wall panel, which includes a wall panel body and a core control module. The two work together to achieve integrated functions of heating, diagnostics, and fault-tolerant control. The wall panel body is integrated into the internal interlayer of the building wall or directly attached to its back, such as... Figure 1 As shown, in this embodiment, the electric heating wall panel body is integrated into the back of the building wall 100. The core structure of the electric heating wall panel body, from bottom to top (or from the building wall 100 outwards), includes the following:

[0058] Insulating substrate 101: As the mechanical support and electrical isolation layer of the entire structure, it is usually made of high temperature resistant and high insulation strength materials (such as FR-4 epoxy fiberglass board, ceramic substrate or mica board).

[0059] Electrode array 110: Formed on insulating substrate 101. This array consists of N×M independently controllable electrode units (illustrated as units A, B, C... in the figure) arranged in a regular pattern. Each electrode unit (also referred to as a "unit") is made of a highly conductive, oxidation-resistant metal material (such as copper, silver, or their alloys) through printing, etching, or sputtering processes. Its geometry can be square, circular, or hexagonal, and electrical isolation between units is achieved through micron-level gaps.

[0060] Electrothermal film 120: A functional thin film uniformly covering the entire electrode array 110. The electrothermal film 120 is made of a conductive polymer composite material, carbon-based material (such as graphene, carbon nanotubes), or metal oxide with a positive temperature coefficient (PTC) or negative temperature coefficient (NTC) characteristic. Its key characteristic is that when a voltage is applied to the electrode unit, current is injected into the electrothermal film 120 through the electrode unit, generating heat within it due to the Joule effect. The physical and electrical contact interface between the electrode unit and the electrothermal film 120 is the core object of diagnosis and control in this embodiment.

[0061] Protective layer 102: Covering the electrothermal film 120, it provides mechanical protection, moisture protection, corrosion protection, and electrical insulation. This protective layer 102 is typically made of a flexible, heat-resistant polymer material (such as polyimide PI or polyethylene terephthalate PET).

[0062] Temperature sensor array 130: Multiple high-precision temperature sensors (such as NTC thermistors, PT100 platinum resistance thermometers, or digital temperature sensors) are distributed and embedded between the insulating substrate 101 and the electrothermal film 120, or mounted on the outside of the protective layer 102. The spatial distribution of these sensors corresponds to the partitions of the electrode array 110, and is used to monitor the surface temperature of each area in real time.

[0063] Furthermore, the core control module 200 is both the "brain" and the "actuator," such as... Figure 2 As shown, the hardware architecture of the core control module 200 mainly includes:

[0064] Main controller 201: An embedded microcontroller unit or digital signal processor, which has the diagnostic and control algorithm program of this embodiment embedded inside.

[0065] Power drive circuit 210: This is the key hardware for realizing the "shared electrode" and "time-division multiplexing" concepts in this embodiment. The circuit 210 includes a switching matrix composed of N×M power switching devices (preferably N-channel MOSFETs). The drain of each power switching device is connected one-to-one to an electrode unit in the electrode array 110 through flexible circuitry or wires; its source is connected to ground (GND).

[0066] Diagnostic unit 220: This unit is highly integrated with the power drive circuit 210 and is used to generate test excitation signals and acquire electrical response signals.

[0067] Communication interface 230: Used for data interaction with the host computer.

[0068] Based on the above hardware architecture, this embodiment provides a method for intelligent control of electric heating wall panels, such as... Figure 3 As shown, the specific steps of this method are as follows:

[0069] Step S301: After the previous heating cycle ends, enter the diagnostic time slot and traverse each electrode unit in the electrode array as the target electrode unit. Perform the following operations on each target electrode unit in sequence: identify the health status of the unit-level interface between the target electrode unit and the electrothermal film.

[0070] Optionally, a complete working cycle is defined as 10 seconds, with the first 9.5 seconds being the previous heating cycle and the last 0.5 seconds being the diagnostic time slot. When the heating cycle ends, the main controller 201 enters the diagnostic time slot and starts the traversal program. For the currently selected target electrode unit (e.g., unit A), the following self-consistent diagnostic operation is performed:

[0071] First, the main controller 201 applies a brief, low-amplitude diagnostic pulse voltage (e.g., 1V, lasting 1ms) to unit A; then, the diagnostic unit 220 acquires the transient current response of unit A under this pulse excitation; next, the main controller 201 analyzes the initial peak current of this transient current response. According to physical principles, the smaller the interface contact resistance, the larger the initial peak current; conversely, poor contact will lead to a significant decrease in peak current.

[0072] Finally, the main controller 201 compares the measured initial peak current with a preset health current threshold (e.g., 10mA). If the peak current is ≥10mA, the interface state of cell A is determined to be "healthy"; if the peak current is <10mA, it is determined to be "degraded". The main controller 201 repeats this complete operation process until all 64 cells in the electrode array 110 have been traversed and diagnosed.

[0073] Step S302: After completing the traversal diagnosis of the electrode array, based on the unit-level interface health status of all electrode units, at least one electrode region with deteriorated interface status is aggregated.

[0074] Each electrode region with deteriorated interface state (also known as a deteriorated region) consists of one or more adjacent electrode units whose unit-level interface health state is characterized as deteriorated.

[0075] Optionally, after traversal, the main controller 201 performs spatial clustering analysis on the health status of all units. It uses a preset four-neighbor connectivity rule (i.e., two units are considered adjacent only if they share an edge in the horizontal or vertical direction) as the aggregation basis and performs the following operations:

[0076] Scenario 1: Consecutive Adjacent Deteriorated Units. If there are one or more groups of spatially consecutive deteriorated units, each group constitutes an independent electrode region. For example, if the health states of units A(1,1), B(1,2), and C(2,1) are all "deteriorated" and they are adjacent to each other in the array, then these three units are aggregated into an electrode region with interface state deterioration.

[0077] Scenario 2: Isolated or Separate Deteriorated Units. If a deteriorated unit has no other deteriorated units in its four neighboring regions, or if there are multiple deteriorated units that are not adjacent to each other, then each unit or group of consecutive units forms an independent region. For example, if units A(1,1), C(3,3), and F(5,5) are all in a deteriorated state and they do not satisfy the adjacent condition, then three independent electrode regions with interface state deterioration will be generated, each region containing only one unit.

[0078] Step S303: Execute a fault-tolerant control strategy based on the electrode region with deteriorated interface state.

[0079] The fault-tolerant control strategy includes: reducing the driving intensity of the electrode region with deteriorated interface state in the next heating cycle, and increasing the driving intensity of the healthy electrode region adjacent to the electrode region with deteriorated interface state.

[0080] Optionally, the main controller 201 independently formulates a fault-tolerant control strategy for each deteriorated region identified in step S302, specifically as follows:

[0081] For large, continuously deteriorated areas (such as areas containing A, B, and C), the PWM drive duty cycle in the next heating cycle is significantly reduced from 50% to 20% to minimize the risk of local overheating.

[0082] For isolated single-unit degradation areas (such as unit F), its PWM duty cycle is moderately reduced from 50% to 35% to minimize the impact on overall heat output while controlling risks.

[0083] For compensation of adjacent healthy regions: Identify all "healthy" cells that are directly adjacent (within four neighborhoods) to each degraded region and increase their PWM duty cycle. The increase is dynamically adjusted according to the severity and area of ​​the degraded region. For example, for large degraded regions, the duty cycle of adjacent healthy cells can be increased from 50% to 70%; for isolated degraded cells, it can be increased to 60%.

[0084] Step S304: In the next heating cycle, the power drive circuit outputs a drive signal adjusted by the fault-tolerant control strategy to the electrode array.

[0085] Optionally, during the heating phase of the next working cycle (i.e., from the 10th second to the 19.5th second), the core control module 200 outputs a set of high-level PWM drive signals to the power drive circuit 210. The MOSFETs in the power drive circuit 210 turn on or off according to the received PWM signals calculated independently for each unit, thereby injecting high-power current from the high-voltage DC bus (e.g., 24VDC) into the corresponding electrode unit.

[0086] For example, for any identified deteriorated area, its driving intensity is reduced in the next heating cycle; simultaneously, the driving intensity of the electrode area directly adjacent to the deteriorated area and labeled "healthy" is increased. The driving intensity can be achieved by adjusting one or more parameters of the heating driving signal, such as the duty cycle of the PWM signal, the amplitude of the driving voltage, or the magnitude of the driving current.

[0087] In this embodiment, by finely and differentially controlling the heating drive signal, the risk of local overheating caused by interface degradation is effectively suppressed. By increasing the power of adjacent healthy areas, heat output loss is intelligently compensated. Thus, the wall surface temperature can be kept highly uniform under various degradation scenarios (whether it is large-area continuous degradation or multiple isolated point degradation), which significantly improves the safety of use and user experience of electric heating wall panels.

[0088] To further improve the accuracy, robustness, and information dimension of the diagnosis, in an exemplary embodiment, the core step of "identifying the health status of the unit-level interface" is refined and quantified, such as... Figure 4 As shown, the diagnostic unit 220 is embodied as comprising the following high-precision modules:

[0089] Precision signal generator 221: A direct digital frequency synthesizer (DDS) controlled by the main controller 201, capable of generating a highly stable sinusoidal test excitation signal in terms of amplitude, frequency and phase.

[0090] Sampling conditioning circuit 222: includes a high-precision, low-temperature-drift sampling resistor Rsense (10Ω, temperature drift <5ppm / °C), a low-noise instrumentation amplifier, and a 16-bit high-speed analog-to-digital converter (ADC) for converting weak analog response signals into high-resolution digital signals.

[0091] Reference signal generator 223: It is derived from the precision signal generator 221 and is used to generate a digital reference signal that is strictly synchronized with the test excitation signal to ensure the phase accuracy of subsequent demodulation.

[0092] Accordingly, based on the aforementioned hardware, such as Figure 5 As shown, the diagnostic sub-process in step S201 is specifically implemented, and its steps are as follows:

[0093] Step S2011: Perform a residual charge discharge operation on the target electrode unit.

[0094] Optionally, to ensure the absolute cleanliness of the measurement reference during the diagnostic time slot and to simplify the hardware design to the greatest extent possible, taking target electrode unit A as an example, it is connected to the drain of the N-channel MOSFET QA in the power drive circuit 210 via a wire. The source of MOSFET QA is connected to ground (GND), and its gate is driven by the control signal CTRLA of the main controller 201. Each MOSFET naturally contains a parasitic PN junction, i.e., a parasitic body diode (Dbody), whose anode is connected to the source (GND) and its cathode is connected to the drain (unit A). Accordingly, a residual charge discharge operation is performed on the target electrode unit as follows:

[0095] First, the target electrode unit is coupled to an adjacent ground node via an electrothermal film. Second, a passive discharge path is formed using the parasitic diodes of the corresponding power switching devices in the power drive circuit.

[0096] Optionally, at the start of the diagnostic time slot, the main controller 201 first sets the control signal CTRLA to a low level (ensuring that MOSFET QA is completely off). Subsequently, the main controller 201 selects an electrode cell (e.g., cell B) that is physically adjacent to cell A as the intermediary for the discharge path. The main controller 201 also sets the control signal CTRLB corresponding to cell B to a low level, causing its MOSFET QB to also be off. Since the source of QB is connected to GND, and cell B is electrically connected to cell A through the upper electrothermal film 120, cell A is coupled to a ground node with a potential of GND through the path "cell A -> electrothermal film 120 -> cell B -> source of QB".

[0097] Optionally, once cell A is coupled to the GND reference point (0V), the residual positive charge on it (relative to GND) will attempt to flow to GND driven by the potential difference. At this time, the parasitic body diode Dbody inside MOSFET QA enters a forward bias state because its cathode (cell A) potential is higher than its anode (GND), thus turning on. In this way, a passive discharge path from cell A to GND via Dbody is automatically established. The entire discharge process requires no additional active control or dedicated discharge circuitry, relying entirely on the inherent physical characteristics of the MOSFET.

[0098] Optionally, under the action of this passive discharge path, the residual charge on unit A is discharged completely in a very short time (usually less than 5 milliseconds), and its potential is clamped to a level close to GND (only a diode voltage drop Vf, about 0.7V, which can be effectively suppressed in subsequent AC tests). After waiting for a preset safety delay (e.g., 10ms), the main controller 201 confirms that the discharge is complete and then proceeds to the next step S2012, that is, applying a test excitation signal and acquiring an electrical response signal.

[0099] Step S2012: Apply a test excitation signal to the target electrode unit and acquire the electrical response signal generated by the target electrode unit in response to the test excitation signal.

[0100] Optionally, after the residual charge has been discharged, the main controller 201 instructs the precision signal generator 221 to apply a low-power test excitation signal to unit A.

[0101] In an exemplary embodiment, the signal is a sinusoidal voltage signal with a peak-to-peak amplitude of 3V and a frequency of 1.024kHz. Simultaneously, the electrical response signal (i.e., the response current i(t)) flowing through unit A is guided through the sampling resistor Rsense. According to Ohm's law, the voltage signal Vsense(t) = i(t) × Rsense generated across Rsense is sent to the sampling conditioning circuit 222. This circuit amplifies Vsense(t), performs anti-aliasing filtering, and digitizes it at a rate of 100kSPS using an ADC to obtain a high-fidelity digital sequence {vsense[n]}.

[0102] Step S2013: Based on the electrical response signal, calculate the impedance characteristic parameters that characterize the interface state between the target electrode unit and the electrothermal film.

[0103] Optionally, the main controller 201 utilizes two digital reference signals generated by the reference signal generator 223 that are strictly synchronized with the single-frequency test excitation signal (e.g., frequency f = 1.024 kHz)—the in-phase reference signal cos(2πfn / Fs) and the quadrature reference signal sin(2πfn / Fs).

[0104] A digital lock-in amplification operation is performed on the sampled sequence {vsense[n]}. The specific calculation process is as follows:

[0105] Extracting in-phase components

[0106] Extracting orthogonal components

[0107] Where N is the number of sampling points in a complete excitation cycle, and Fs is the sampling frequency of the ADC. After obtaining the in-phase component X and the quadrature component Y, the main controller 201 calculates the magnitude of the complex impedance and uses it as the impedance characteristic parameter |Z| characterizing the interface state in this embodiment. The calculation formula is: Where Vm is the effective amplitude of the applied single-frequency test excitation voltage (this value is known from the configuration of the precision signal generator 221). The impedance amplitude |Z| is a single, scalar electrical parameter that comprehensively reflects the total electrical impedance of the interface between the target electrode unit and the electrothermal film. When the interface contact is good, the |Z| value is low; when the interface deteriorates (such as increased contact resistance), the |Z| value will increase significantly.

[0108] Step S2014: Identify the health status of the unit-level interface between the target electrode unit and the electrothermal film based on the impedance characteristic parameters.

[0109] Optionally, the main controller 201 compares the calculated impedance amplitude |Z| with a preset health threshold stored in the internal Flash memory. This threshold is set based on the material properties of the electrothermal film 120 (such as the typical interface impedance of carbon nanotube composite materials) and strict factory calibration data. In one specific embodiment, the threshold is set to 150Ω: if |Z|≤150Ω, the interface contact state of unit A is determined to be good, generating a "healthy" unit-level interface health state; if |Z|>150Ω, the interface is determined to be degraded, generating a "degraded" unit-level interface health state.

[0110] Specifically, the main controller 201 repeats the complete sub-processes of S2011-S2014 above until it completes the traversal diagnosis of all 64 units in the electrode array 110.

[0111] To further enhance the diagnostic dimensionality and intelligence, enabling it to distinguish between different types of interface failure modes (such as increased contact resistance and interface delamination), this embodiment introduces multi-frequency impedance spectroscopy analysis, dynamic frequency optimization, and deep learning-based model inference techniques. Figure 6 As shown, based on the hardware, the main controller 201 adds two key modules at the software level:

[0112] Dynamic Frequency Optimizer 601: An optimization algorithm module running on the main controller 201, used to dynamically select the optimal test frequency based on historical data.

[0113] Dynamic equivalent circuit model inference engine 602: A lightweight, pre-trained deep neural network (DNN) model, stored in the memory of the main controller 201, is used to automatically resolve physical parameters from the impedance spectrum.

[0114] Accordingly, such as Figure 7 As shown, steps S2012-S2013 have been deeply upgraded to obtain S701-S703, specifically as follows:

[0115] Step S701: Determine the first frequency component and the second frequency component in the test excitation signal.

[0116] Optionally, based on the current service status or historical diagnostic results of the electric heating wall panel, the specific frequency points and test amplitudes of the first and second frequency components can be dynamically selected through an optimization algorithm.

[0117] Before each diagnostic begins, the dynamic frequency optimizer 601 is activated. It first reads historical diagnostic results (e.g., impedance spectrum data of unit A over the past 10 cycles) and current service status (e.g., cumulative operating time, ambient temperature) from the log. Based on this information, the optimizer executes a pre-defined optimization algorithm (such as gradient-based search or lookup table method) to dynamically select a pair of optimal test frequencies.

[0118] First frequency component ( Choose a low frequency (e.g., 1.024 kHz) that is most sensitive to changes in the macroscopic contact resistance (Rcontact) of the interface.

[0119] Second frequency component ( Choose a high frequency (e.g., 10.24 kHz) that is more sensitive to changes in the interface microstructure, such as the formation of parasitic delamination capacitance (Cdelam).

[0120] Meanwhile, the optimizer dynamically adjusts the test amplitudes of the two frequency components based on the current ambient noise level to ensure optimal signal-to-noise ratio. For example, when there is strong power grid interference, the excitation amplitude is slightly increased.

[0121] Optionally, the main controller 201 instructs the precision signal generator 221 to generate and apply a composite test excitation signal vtest(t) based on the dynamic selection result of step S601: To the target electrode unit (e.g., unit A).

[0122] Accordingly, the reference signal generator 223 synchronously generates four digital reference signals:

[0123] , ,

[0124] , .

[0125] Step S702: Based on a reference signal synchronized with the test excitation signal, extract the in-phase and quadrature components corresponding to the first frequency component of the test excitation signal, and the in-phase and quadrature components corresponding to the second frequency component of the test excitation signal from the electrical response signal.

[0126] Optionally, the electrical response signal i(t) acquired by the sampling and conditioning circuit 222 includes the response to... and The overall response. The main controller 201 uses four common reference signals to perform a four-channel parallel digital phase-locked amplification operation on the digitized response signal, accurately extracting four components:

[0127] In-phase components ( ) and orthogonal components ( ),

[0128] In-phase components ( ) and orthogonal components ( ).

[0129] Step S703: Calculate the impedance spectrum based on the in-phase and quadrature components of each frequency component, and use the impedance spectrum as the impedance characteristic parameter.

[0130] Optionally, the main controller 201 uses the extracted four components to calculate the complex impedance at the two frequency points respectively:

[0131] exist Location: ,

[0132] exist Location: ;

[0133] in This is the gain normalization constant. (From...) and The resulting two-dimensional dataset, known as the impedance spectrum, is used as an upgraded version of impedance characteristic parameters and is then fed into the next step of in-depth analysis.

[0134] In one exemplary embodiment, S2014 includes the following sub-steps (014a) to (014c):

[0135] Sub-step (014a): Using the dynamic equivalent circuit model inference engine, identify the equivalent circuit topology and circuit parameters from the impedance characteristic parameters, and determine the interface contact resistance and interface delamination capacitance based on the identified equivalent circuit topology and circuit parameters.

[0136] Optionally, a dynamic equivalent circuit model inference engine can be established first.

[0137] Among them, the dynamic equivalent circuit model inference engine is trained based on a deep learning model and is used to identify and deduce the optimal equivalent circuit topology and its corresponding circuit parameters from the impedance characteristic parameters.

[0138] For example, the engine is a lightweight convolutional neural network (CNN), whose input is the impedance spectrum obtained in step S704 (i.e., and The real and imaginary parts of the equation are used to output a probability distribution that indicates which preset equivalent circuit model (such as "pure resistance model", "RC parallel model", "R-(RC) series model") best fits the current data.

[0139] For example, Scenario 1: Healthy State. If unit A is healthy, its impedance spectrum exhibits purely resistive behavior at both high and low frequencies. The engine will output a "purely resistive model" with a high probability and infer the interface contact resistance value Rcontact≈Re( ).

[0140] Scenario 2: Interface Delamination. If delamination exists in unit A, the high-frequency impedance... The imaginary part will increase significantly (manifesting as capacitive), and the engine will output an "RC parallel model" with a high probability, while simultaneously inferring the interface contact resistance value Rcontact and the interface delamination capacitance value Cdelam.

[0141] Sub-step (014b): Obtain the interface contact resistance health threshold and interface delamination capacitance health threshold corresponding to the wall material type and cumulative service time.

[0142] Optionally, the main controller 201 reads the wall material type (e.g., "concrete") from the configuration and obtains the cumulative service time (e.g., "2.3 years") from an internal timer. It then queries the dynamic health threshold database 702 to obtain a threshold matching the current operating condition.

[0143] For example, for a concrete wall with a service life of 2.3 years (below the 1-3 year range), the following health thresholds are found: interface contact resistance (Rth): 100Ω; interface delamination capacitance (Cth): 10pF. This dynamic threshold mechanism takes into account the effects of material aging and environmental factors, making it more scientific and accurate than fixed thresholds.

[0144] Sub-step (014c): Compare the interface contact resistance value with the interface contact resistance health threshold to obtain the resistance comparison result, and compare the interface delamination capacitance value with the interface delamination capacitance health threshold to obtain the capacitance comparison result. Based on the resistance comparison result and the capacitance comparison result, generate the unit-level interface health status of healthy, slightly deteriorated or severely deteriorated.

[0145] Optionally, based on the results of the dual comparisons, a three-level health label is generated using a preset decision logic, defined as follows: interface contact resistance value Rcontact, interface contact resistance health threshold Rth, interface delamination capacitance value Cdelam, and interface delamination capacitance health threshold Cth. The specific judgment rules are as follows:

[0146] Health: If Rcontact ≤ Rth and Cdelam ≤ Cth;

[0147] Mild degradation: If (Rcontact > Rth and Cdelam ≤ Cth) or (Rcontact ≤ Rth and Cdelam > Cth). This indicates that only one failure mode occurs.

[0148] Severe degradation: If Rcontact > Rth and Cdelam > Cth. This indicates that both poor contact and interface delamination problems exist simultaneously, representing the highest risk.

[0149] For example, if the measured values ​​of unit A are Rcontact=130Ω and Cdelam=12pF, then its condition is determined to be "slightly deteriorated (poor contact)".

[0150] In an exemplary embodiment, to further improve the signal-to-noise ratio of the diagnostic signal and prevent crosstalk, the method further includes active clamping control of the potential of adjacent units during the application of a test excitation signal to the target electrode unit. The active clamping control specifically involves controlling the power switching device corresponding to the electrode unit adjacent to the target electrode unit to be in a high-impedance state, and maintaining the potential of the adjacent electrode unit at a preset stable level through a pull-up element.

[0151] Optionally, high-impedance control logic and pull-up bias networks are integrated on the gate drive path of each MOSFET in the power drive circuit 210.

[0152] Specifically, for any power switching device QX (corresponding to electrode unit X), its gate is not only driven by the digital control signal CTRLX of the main controller 201, but is also connected to a preset stable level (e.g., power supply VDD = 3.3V) through a high-resistance pull-up resistor Rpull-up (e.g., 100kΩ).

[0153] Accordingly, before step S2012 "applying a test excitation signal to the target electrode unit", the following adjacent unit isolation operation is performed:

[0154] Once the target electrode unit is identified as unit A, the main controller 201 first identifies all electrode units that are physically adjacent to unit A (e.g., units B, C, D, and E according to the four-neighborhood rule). Subsequently, the main controller 201 actively sets the control signals (CTRLB, CTRLC, CTRLD, CTRLE) corresponding to these adjacent units (B, C, D, E) to a high-impedance state (Hi-Z). In a typical MCU GPIO configuration, this is achieved by configuring the corresponding pins as either "input mode" or "open-drain output without driving".

[0155] Once the control signal enters the high-impedance state, the pull-up resistor Rpull-up comes into play, stably pulling the gate potential of the corresponding MOSFET (such as QB) high to VDD (3.3V). Since QB is an N-channel MOSFET, its gate-source voltage VGS = 3.3V > Vth (threshold voltage, typically 1-2V), so QB is reliably maintained in the on-state.

[0156] The potentials of all electrode units (B, C, D, E) adjacent to the target unit A are forcibly clamped near GND (with only one MOSFET on-state voltage drop, which can be ignored), forming a stable, low-impedance shielding boundary.

[0157] This operation prevents floating potentials from arising in adjacent cells due to capacitive coupling or leakage from the heating film. These floating potentials would couple to the target cell A through the heating film 120, severely interfering with the weak test response signal. Furthermore, it provides a clear, low-noise current loop for the test excitation signal between the target cell A and GND, effectively blocking signal leakage to adjacent areas.

[0158] After completing the potential clamping of the adjacent units, the main controller 201 executes step S2012, applying a test excitation signal to unit A and acquiring its electrical response signal. Throughout the excitation and sampling process, the adjacent units remain at the preset stable level (GND), thus creating an ideal local electromagnetic environment for high-precision impedance measurement.

[0159] To further optimize the uniformity of the thermal field distribution and achieve precise energy compensation, in an exemplary embodiment, the drive intensity of the healthy electrode region adjacent to the electrode region with deteriorated interface state in the fault-tolerant control strategy includes: dynamically calculating the increase in drive intensity of the adjacent healthy electrode region based on the area of ​​the electrode region with deteriorated interface state, the area of ​​the adjacent healthy electrode region, the thermal diffusion distance between the electrode region with deteriorated interface state and the adjacent healthy electrode region, and the thermal properties parameters of the wall; and adjusting the drive intensity of the adjacent healthy electrode region in the next heating cycle based on the increase in drive intensity.

[0160] Optionally, the main controller 201 has a built-in thermodynamic compensation calculation engine that integrates a database of thermal property parameters of the wall and a thermal diffusion model.

[0161] Once a degraded electrode region (denoted as D) is identified, the main controller 201 first determines all healthy electrode regions (denoted as D) that are directly adjacent to region D (within its four neighboring regions). Subsequently, the thermodynamic compensation calculation engine was activated and dynamically calculated for each healthy region based on the following four key parameters. Required increase in drive strength :

[0162] The area of ​​the deteriorated region D (AD): The larger the area, the more severe the heat output loss, and the more compensation power is required.

[0163] Health area area ( The larger the healthy area, the stronger its power carrying capacity and the greater the amount of power that can be allocated.

[0164] Region D and thermal diffusion distance between This distance refers to the Euclidean distance between the geometric centers of the two regions. The closer the distance, the stronger the thermal coupling, the higher the compensation efficiency, and the smaller the required boost can be; conversely, the greater the distance, the more it needs to be increased.

[0165] Thermophysical properties (k) of the wall: This parameter (primarily thermal conductivity) is stored in the configuration and depends on the type of wall material (e.g., concrete). plasterboard The higher the thermal conductivity, the faster the heat dissipates, and the more aggressive the compensation strategy can be.

[0166] In one specific embodiment, the increase in driving strength Calculated using the following empirical formula: ;in, It is an adjustable empirical coefficient (e.g.) This is used to balance the compensation effect and stability.

[0167] Calculation example: Assume the area AD of the deteriorated region D is 3 units. Healthy region area Each unit, and the thermal diffusion distance from D. The unit spacing is [number]. The wall is made of concrete with a thermal conductivity of [percentage]. Substitute into the formula: (Unit: Normalized power unit).

[0168] The main controller 201 will calculate the This is converted into specific drive signal parameter adjustment amounts. For example, if the original drive strength is 50% PWM duty cycle, then the adjusted duty cycle is: ;in, It is the power-duty cycle conversion factor (e.g.) In the example above, .

[0169] In this embodiment, the compensation amount is directly linked to the fundamental laws of thermodynamics (heat conduction is related to area, distance, and material), rather than simple empirical rules. It can automatically adjust the compensation intensity based on the actual size and location of the deteriorated area and the wall material, making it suitable for various complex installation scenarios. This avoids the problems of overcompensation (localized overheating) or undercompensation (uneven temperature) that can result from a "one-size-fits-all" approach, ensuring a highly uniform surface temperature field.

[0170] After completing the above dynamic calculations, the main controller 201 will assign each adjacent healthy region... A separate, precise drive intensity command is generated and executed by the power drive circuit 210 in step S304.

[0171] To construct a closed-loop, adaptive intelligent diagnosis and control system, this embodiment introduces a compensation effect verification mechanism to ensure the effectiveness of the fault-tolerant control strategy and prevent fault exacerbation. Accordingly, in the next complete working cycle after executing step S304 "outputting the drive signal adjusted by the fault-tolerant control strategy", compensation effect verification is performed within the diagnosis time slot. The specific process is as follows:

[0172] In the next diagnostic time slot (i.e., the first diagnostic time slot after fault-tolerant control has been implemented), the main controller 201, while traversing the electrode array, will pay special attention to all electrode regions (denoted as region D) where fault-tolerant control strategies have been implemented. For each region D, double verification is performed:

[0173] Verification 1: Interface State Stability Assessment: Repeatedly execute S2011-S2014 to obtain the latest unit-level interface health status of region D in this diagnostic time slot. Simultaneously, the main controller 201 retrieves the health status of region D from the internal log before implementing fault-tolerant control.

[0174] If the latest state is the same as the previous state (e.g., both are "slightly degraded"), then the interface state is determined to be stable. If the latest state is worse than the previous state (e.g., it deteriorates from "slightly degraded" to "severely degraded"), then the interface state is determined to be continuously degraded.

[0175] Verification 2: Evaluation of surface temperature uniformity in adjacent regions: Read the data from the temperature sensor array 130 and obtain the surface temperature of all healthy electrode regions (denoted as region H) adjacent to region D in the previous heating cycle (i.e., the heating cycle in which fault-tolerant control was performed).

[0176] If the standard deviation of the readings of each temperature sensor within region H is less than a preset threshold (e.g., ΔT < 2°C), the surface temperature distribution is considered uniform. If the standard deviation exceeds the threshold, the temperature distribution is considered uneven, which may indicate insufficient or excessive compensation.

[0177] Based on the above dual verification results, the following decision logic is executed:

[0178] Scenario 1: Maintain the current strategy: If both "the interface state remains stable" and "the surface temperature distribution in adjacent areas is uniform" are met, then the fault-tolerant control strategy (such as reducing the power in area D and increasing the power in area H) is deemed effective. The main controller 201 will maintain this strategy and continue to use it in subsequent cycles.

[0179] Scenario 2: Execute emergency fault isolation and secondary compensation: If it is determined that "the interface status continues to deteriorate", the emergency plan will be activated regardless of whether the temperature is uniform.

[0180] First, completely shut down the heating function of the electrode area: force the PWM drive duty cycle of all units in area D to 0%, completely cut off its heating current, and prevent safety risks such as local overheating and arcing caused by severe interface degradation.

[0181] Secondly, activate the next nearest healthy electrode region: identify the nearest "next nearest" healthy region (denoted as region S) that is not directly adjacent to region D but is the closest to it. For example, if region D is surrounded by region H, then region S is the next layer of healthy unit outside of H.

[0182] The activation of the next nearest neighbor region is based on a careful assessment of the deterioration trend across multiple consecutive diagnostic time slots. To avoid misjudgments caused by noise from a single measurement, the main controller 201 checks the health status records of region D over N consecutive diagnostic time slots (e.g., N=3). The aforementioned emergency plan is only triggered if all N records show a continuous deterioration in the status. This "continuous trend assessment" mechanism greatly improves the robustness and reliability of decision-making.

[0183] For the activated next-neighbor region S, the increase in its driving intensity will be recalculated based on the thermodynamic model to compensate for the greater heat loss caused by the complete closure of region D.

[0184] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0185] Based on the same inventive concept, such as Figure 8 As shown in the embodiments of this application, an intelligent control system for electric heating wall panels is also provided. Each unit in this intelligent control system can be implemented entirely or partially through software, hardware, or a combination thereof. The system includes the following units:

[0186] The unit identification module 81 is used to enter the diagnostic time slot after the previous heating cycle ends, and traverse each electrode unit in the electrode array as the target electrode unit, and perform the following operations on each target electrode unit in sequence: identify the health status of the unit-level interface between the target electrode unit and the electrothermal film.

[0187] The region control module 82 is used to aggregate and form at least one electrode region with deteriorated interface state based on the unit-level interface health status of all electrode units after completing the traversal diagnosis of the electrode array; wherein each electrode region with deteriorated interface state is composed of one or more adjacent electrode units whose unit-level interface health status is characterized as deteriorated.

[0188] The fault-tolerant execution module 83 is used to execute a fault-tolerant control strategy based on the electrode region with deteriorated interface state; wherein, the fault-tolerant control strategy includes: reducing the driving intensity of the electrode region with deteriorated interface state in the next heating cycle, and increasing the driving intensity of the healthy electrode region adjacent to the electrode region with deteriorated interface state.

[0189] The adjustment and update module 84 is used to output a drive signal adjusted by the fault-tolerant control strategy to the electrode array through the power drive circuit in the next heating cycle.

[0190] The above modules can be embedded in the processor of the computer device in hardware form or independent of it, or they can be stored in the memory of the computer device in software form, so that the processor can call and execute the corresponding operations of the above modules.

[0191] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the above-described intelligent control method for electric heating wall panels.

[0192] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the above-described intelligent control method for electric heating wall panels.

[0193] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the above-described intelligent control method for electric heating wall panels.

[0194] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0195] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0196] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An intelligent control method for an electric heating wallboard, characterized in that, The electrothermal wallboard comprises an electrode array composed of a plurality of independently controllable electrode units, an electrothermal film electrically connected with the electrode array, and a temperature sensor arranged in the interior or back of the wall; the method is executed by a core control module, the core control module comprises a power drive circuit connected to the electrode array, and the power drive circuit comprises a plurality of power switching devices; the method comprises the following steps: After the end of the previous heating period, enter a diagnosis time slot and traverse each electrode unit in the electrode array as a target electrode unit, and sequentially execute the following operations on each target electrode unit: identify the unit-level interface health state between the target electrode unit and the electrothermal film; After completing the traversal diagnosis of the electrode array, based on the unit-level interface health states of all electrode units, at least one interface state deteriorated electrode region is aggregated; wherein each interface state deteriorated electrode region is composed of one or more adjacent electrode units whose unit-level interface health states are characterized as deteriorated; Based on the interface state deteriorated electrode region, a fault-tolerant control strategy is executed; wherein the fault-tolerant control strategy comprises: reducing the driving intensity of the interface state deteriorated electrode region in the next heating period, and improving the driving intensity of a healthy electrode region adjacent to the interface state deteriorated electrode region in the next heating period; In the next heating period, the power drive circuit outputs a driving signal adjusted by the fault-tolerant control strategy to the electrode array; Wherein, identifying the unit-level interface health state between the target electrode unit and the electrothermal film comprises: Performing a residual charge discharge operation on the target electrode unit; Applying a test excitation signal to the target electrode unit and collecting an electrical response signal generated by the target electrode unit in response to the test excitation signal; Based on the electrical response signal, calculating an impedance characteristic parameter representing the interface state between the target electrode unit and the electrothermal film; According to the impedance characteristic parameter, identifying the unit-level interface health state between the target electrode unit and the electrothermal film.

2. The method of claim 1, wherein, Based on the electrical response signal, calculating an impedance characteristic parameter representing the interface state between the target electrode unit and the electrothermal film comprises: Based on a reference signal synchronized with the test excitation signal, extracting, from the electrical response signal, in-phase components and quadrature components corresponding to first frequency components in the test excitation signal, and in-phase components and quadrature components corresponding to second frequency components in the test excitation signal; According to the in-phase components and quadrature components of each frequency component, an impedance spectrum is calculated, and the impedance spectrum is taken as the impedance characteristic parameter; Wherein, the reference signal and the test excitation signal are generated by the same signal source.

3. The method of claim 1, wherein, According to the impedance characteristic parameter, identifying the unit-level interface health state between the target electrode unit and the electrothermal film comprises: Determining the interface contact resistance value and the interface delamination capacitance value corresponding to the impedance characteristic parameter; Obtaining the interface contact resistance health threshold and the interface delamination capacitance health threshold corresponding to the wall material type and the cumulative service time; comparing the interface contact resistance value with the interface contact resistance health threshold value to obtain a resistance comparison result, and comparing the interface delamination capacitance value with the interface delamination capacitance health threshold value to obtain a capacitance comparison result; generating a health, mild degradation, or severe degradation cell-level interface health state according to the resistance comparison result and the capacitance comparison result.

4. The method of claim 1, wherein, performing a residual charge discharge operation on the target electrode unit, including: the target electrode unit is coupled to an adjacent ground node via the electrothermal film; a passive discharge path is formed using a parasitic diode of a corresponding power switching device in the power drive circuit to perform the residual charge discharge operation.

5. The method of claim 1, wherein, During the application of the test excitation signal to the target electrode unit, the method further includes: controlling the power switching device corresponding to the electrode unit adjacent to the target electrode unit to be in a high impedance state, and maintaining the potential of the adjacent electrode unit at a preset stable level through a pull-up element.

6. The method of claim 1, wherein, increasing the drive strength of a healthy electrode region adjacent to the electrode region with deteriorated interface state, including: dynamically calculating the drive strength increase amount of the adjacent healthy electrode region according to the area of the electrode region with deteriorated interface state, the area of the adjacent healthy electrode region, the thermal diffusion distance between the electrode region with deteriorated interface state and the adjacent healthy electrode region, and the thermal physical parameters of the wall; adjusting the drive strength of the adjacent healthy electrode region in the next heating cycle based on the drive strength increase amount.

7. The method of claim 1, wherein, In the next diagnostic time slot, the method further includes: compensating effect verification on the electrode region that has executed the fault-tolerant control strategy; wherein the compensating effect verification includes: if the interface state of the electrode region that has executed the fault-tolerant control strategy remains stable and the surface temperature distribution of its adjacent region is uniform, the fault-tolerant control strategy is maintained; if the interface state of the electrode region that has executed the fault-tolerant control strategy continues to deteriorate, the heating function of the electrode region is completely closed, and a healthy electrode region adjacent to the electrode region is activated.

8. The method of claim 3, wherein, determining the interface contact resistance value and the interface delamination capacitance value corresponding to the impedance characteristic parameter, including: identifying and equivalent circuit topology and circuit parameters from the impedance characteristic parameter through a dynamic equivalent circuit model inference engine; determining the interface contact resistance value and the interface delamination capacitance value according to the identified equivalent circuit topology and circuit parameters.

9. An intelligent control system for electric heating wall panels, characterized in that, The electrothermal wallboard includes an electrode array composed of a plurality of independently controllable electrode units, an electrothermal film electrically connected to the electrode array, and a temperature sensor deployed inside or at the back of the wall; the system is configured in a core control module, the core control module includes a power drive circuit connected to the electrode array, the power drive circuit includes a plurality of power switching devices; the system includes: The unit identification module is configured to, after a previous heating period ends, enter a diagnosis time slot, and traverse each electrode unit in the electrode array as a target electrode unit, and sequentially perform the following operations on each target electrode unit: identifying a unit-level interface health state between the target electrode unit and the electrothermal film; The region regulation module is configured to, after completing the traversal diagnosis of the electrode array, based on the unit-level interface health states of all electrode units, aggregate to form at least one interface state deteriorated electrode region; wherein each interface state deteriorated electrode region is composed of one or more adjacent electrode units whose unit-level interface health states are characterized as deteriorated; The fault-tolerant execution module is configured to, based on the interface state deteriorated electrode region, execute a fault-tolerant control strategy; wherein the fault-tolerant control strategy includes: reducing the driving intensity of the interface state deteriorated electrode region in the next heating period, and increasing the driving intensity of a healthy electrode region adjacent to the interface state deteriorated electrode region in the next heating period; The adjustment update module is configured to, in the next heating period, output a driving signal adjusted by the fault-tolerant control strategy to the electrode array through the power driving circuit; The unit identification module is configured to, when identifying the unit-level interface health state between the target electrode unit and the electrothermal film, specifically configured to: perform a residual charge discharge operation on the target electrode unit; apply a test excitation signal to the target electrode unit, and collect an electrical response signal generated by the target electrode unit in response to the test excitation signal; based on the electrical response signal, calculate an impedance characteristic parameter representing the interface state between the target electrode unit and the electrothermal film; according to the impedance characteristic parameter, identify the unit-level interface health state between the target electrode unit and the electrothermal film.

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