Method for manufacturing optical rib waveguide

Abstract

The invention relates to a method for manufacturing an optical rib waveguide. According to an aspect, a method for fabricating a ridge waveguide for a photonic integrated circuit is presented, the method comprising forming an initial ridge optical waveguide structure from a silicon layer formed on an insulator layer, then forming a mask having an opening facing the ridge of the initial structure, oxidation is then effected to reduce the thickness of the ridges of the initial structure positioned facing the opening of the mask to obtain from the initial structure an optical waveguide having ridges having a thickness less than the thickness of the ridges of the initial structure, and then the mask is removed.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to French application No. FR2406802, filed on June 25, 2024, which is hereby incorporated by reference. Technical Field

[0003] The embodiments and implementations relate to integrated circuits configured to propagate light waves. Background Technology

[0004] An optical integrated circuit (“photonic integrated circuit”) is a circuit configured to propagate light.

[0005] Photonic integrated circuits that use silicon as the base material to manufacture optical components are particularly known. These photonic integrated circuits can be indicated by the term "SiPho," which originates from the English word "Silicon Photonics."

[0006] In particular, "SiPho" type integrated circuits utilize the compatibility of silicon with semiconductor manufacturing methods to create optical components. This allows for efficient integration with electronic circuits.

[0007] In particular, "SiPho" type integrated circuits include optical waveguides. These optical waveguides enable the guiding and manipulation of light within photonic integrated circuits. These optical waveguides are essentially silicon structures that confine light and transmit it from one point to another.

[0008] Ridge waveguides, also known as rib waveguides, are optical structures particularly common in semiconductor-based technologies, such as devices based on group III-V materials (materials composed of one or more elements from groups III and V of the Mendeleev periodic table), such as gallium arsenide (GaAs) or indium phosphide (InP). Ridge waveguides are used in a variety of applications, including semiconductor lasers, optical modulators, photodiode detectors, and other integrated optical components. They are particularly well-suited for devices that require light to be confined in a specific direction.

[0009] A ridge waveguide comprises a strip layer (“slab”), a sheath layer (cladding) and ridges or ribs protruding from the slab, the width of which is less than the width of the slab. Ridge waveguides can be made of silicon layers on an insulator.

[0010] The thickness of the ridge in a ridge waveguide is limited by the initial thickness of the silicon layer on the insulator. However, for some photonic integrated circuits, the optimized ridge thickness of the ridge waveguide differs from the initial thickness of the silicon layer on the insulator. In particular, the ridge thickness directly affects the ridge's propagation index. For example, in hybrid lasers, coupling between a stack of group III-V materials (materials composed of one or more elements from groups III and V of the Mendeleev periodic table) and silicon on the insulator requires a ridge thickness of 500 nm. In the PN junction of a modulator, capacitance is optimized by using ridges with thicknesses between 150 nm and 310 nm. In fiber optic grating couplers, optimized efficiency is achieved using ridges with a thickness of approximately 300 nm. Summary of the Invention

[0011] According to one aspect of this disclosure, a method for fabricating a ridge waveguide for a photonic integrated circuit is provided, the method comprising: forming an initial structure of an optical ridge waveguide from a silicon layer formed on an insulating layer; forming a mask having an opening facing a ridge of the initial structure; performing an oxidation process using the mask to reduce the thickness of a ridge of the initial structure positioned facing the opening of the mask, wherein the process of forming the optical ridge waveguide from the initial structure having a ridge with a thickness less than the thickness of a ridge of the initial structure; and removing the mask after performing the oxidation process.

[0012] According to another aspect of this disclosure, a method for manufacturing a photonic integrated circuit having a plurality of ridge waveguides with different thicknesses is provided, the method comprising: having a silicon-on-insulator structure, the silicon-on-insulator structure including a substrate, an insulating layer on the substrate, and a silicon layer on the insulating layer; performing photolithography on the silicon layer to form a plurality of initial ridge waveguide structures, each initial ridge waveguide structure including a plate and ridges on the plate; depositing a dielectric coating on the plurality of initial ridge waveguide structures; performing chemical mechanical polishing to reduce the thickness of the dielectric coating; forming a hard mask on the dielectric coating, the hard mask having openings facing ridges of selected initial ridge waveguide structures; performing an oxidation process to reduce the thickness of the ridges facing the openings of the hard mask; and removing the hard mask.

[0013] According to another aspect of this disclosure, an integrated circuit is provided, comprising: a ridge waveguide having a ridge surface roughness of less than 2.5 nanometers. Attached Figure Description

[0014] Other advantages and features of the invention will become apparent after reading the detailed description of the embodiments and referring to the accompanying drawings, which are in no way limiting, as illustrated in the drawings:

[0015] Figure 1 A cross-sectional view of an embodiment of an integrated circuit is illustrated;

[0016] Figure 2 The illustration shows a three-dimensional view of an embodiment of a waveguide;

[0017] Figure 3 An embodiment of a method for manufacturing integrated circuits is illustrated;

[0018] Figure 4 The initial structure according to an embodiment is illustrated;

[0019] Figure 5 (a) and Figure 5 (b) The initial ridge waveguide structure and hard mask that can be obtained at the end of hard mask formation are illustrated;

[0020] Figure 6 (a) and Figure 6 (b) illustrates the ridge waveguide and hard mask, both of which can be obtained at the end of dielectric thickness deposition above the ridge of the ridge waveguide; and

[0021] Figure 7 (a) Figure 7 (b) and Figure 7 (c) illustrates the ridge waveguide that can be obtained at the end of hard mask removal. Detailed Implementation

[0022] The embodiments provide solutions that enable the provision of ridge waveguides with different thicknesses in the same semiconductor wafer to integrate devices in the same integrated circuit to optimize their performance, the devices requiring different ridge thicknesses in the same semiconductor wafer.

[0023] Specifically, a known method for fabricating a ridge waveguide includes an initial etching step to define a new thickness of a silicon layer on an insulator, and a ridge of the waveguide with a thickness greater than this new silicon layer thickness. Next, the method includes photolithography and subsequent etching steps to locally reduce the thickness of the board and define a new ridge waveguide ridge having the thickness of the silicon layer on the insulator obtained by the initial etching step. The fabrication method then includes depositing an insulating layer (particularly silicon dioxide) until the surface of the ridge has a maximum thickness.

[0024] This solution has the drawback of achieving significant surface roughness on the ridges because the ridge surface is defined by etching. This roughness reduces the propagation of light waves in the waveguide. Furthermore, the etching achieved after photolithography has low resolution. Therefore, the ridges defined by this etching have significant edge-of-lineroughness, which also reduces the propagation of light waves.

[0025] Furthermore, the thickness of the ridge, defined by the etching following photolithography, corresponds to the thickness of the silicon layer on the insulator obtained after the initial etching step. This manufacturing method does not allow for a difference between the ridge thickness and the thickness of the silicon on the insulator layer obtained after the initial etching step.

[0026] According to one aspect, a method for fabricating a ridge waveguide for a photonic integrated circuit is proposed, the method comprising: forming an initial ridge of an optical waveguide structure from a silicon layer formed on an insulating layer; then forming a mask having an opening facing the ridge of the initial structure; then performing oxidation to reduce the thickness of the ridge of the initial structure positioned facing the opening of the mask, to obtain an optical waveguide from the initial structure having a ridge having a thickness less than the thickness of the ridge of the initial structure; and then removing the mask.

[0027] In this manufacturing method, the height of the ridge of the ridge waveguide is defined after the initial ridge waveguide structure has been formed. Specifically, after the initial ridge waveguide structure has been formed, the height of the ridge of the ridge waveguide is adjusted by oxidation.

[0028] The advantage of this manufacturing method lies in maintaining a relatively low roughness on the surface of the ridge of the ridge waveguide. For example, the surface roughness of the ridge can be less than 2.5 nanometers. This is because the achieved photolithography has high definition, which allows for low roughness, and the thickness of the ridge is reduced by oxidation, which does not increase surface roughness.

[0029] Furthermore, this manufacturing method allows for a localized reduction in the thickness of the ridge of the ridge waveguide, reserving a greater thickness of silicon on insulator for other components of the photonic integrated circuit. This greater thickness enables these other components of the photonic integrated circuit to achieve better performance. Therefore, this method allows for the fabrication of ridge waveguides with a thickness different from the initial thickness of the silicon on insulator.

[0030] In an advantageous embodiment, the mask is formed such that the mask covers at least one transition portion of the ridge of the initial structure, and is formed such that the opening of the mask faces the main portion of the ridge of the initial structure, the at least one transition portion extending longitudinally from the main portion.

[0031] In this way, oxidation allows for a reduction in the thickness of only the main portion of the ridge.

[0032] In such an embodiment, the adjustment of the thickness of the main portion and the formation of the at least one transition portion of the ridge waveguide are achieved simultaneously.

[0033] In an advantageous embodiment, the width of the at least one transition portion decreases toward the main portion of the ridge of the ridge waveguide.

[0034] Advantageously, the at least one transition portion has a point shape pointing towards the main portion of the ridge of the ridge waveguide.

[0035] Preferably, the formation of the initial structure includes photolithography of a silicon layer on an insulating layer to form: a plate of the initial structure, and the ridge on the plate.

[0036] Advantageously, the photolithography is implemented to define the final thickness of the plate used for the ridge waveguide.

[0037] The advantage of this embodiment is that it allows for independent definition of the thickness of the plate and the thickness of the ridge.

[0038] In an advantageous embodiment, the method includes forming a dielectric coating on the initial structure prior to forming the mask, the dielectric coating having an opening facing a ridge of the initial structure.

[0039] Advantageously, the method includes performing chemical mechanical polishing, suitable for reducing the thickness of the dielectric coating, prior to forming the mask.

[0040] Preferably, the method further includes removing the oxide obtained by the oxidation and then depositing a dielectric coating on the ridge of the ridge waveguide before removing the mask.

[0041] Advantageously, the plate is formed to have a thickness between 50 nanometers and 150 nanometers.

[0042] Preferably, oxidation is implemented such that the ridge of the ridge waveguide has a thickness between 100 nanometers and 230 nanometers.

[0043] According to another aspect, an integrated circuit is proposed, comprising a ridge waveguide obtained by implementing the manufacturing method described above.

[0044] Therefore, an integrated circuit is proposed, which includes a ridge waveguide with a ridge surface roughness of less than 2.5 nanometers.

[0045] Advantageously, the integrated circuit also includes at least one optical waveguide having a thickness different from the thickness of the ridge of the ridge waveguide.

[0046] Figure 1 The illustration shows a cross-sectional view of an embodiment of an integrated circuit (IC). The IC includes a support substrate SUB, an insulating layer ISO on the support substrate SUB, a silicon layer SOI on the insulating layer ISO, and a dielectric cladding DIEL. The silicon layer SOI is used to form optical waveguides WG1, WG2, WG3, and other electronic components (not shown).

[0047] The insulating layer ISO is formed from a dielectric material (e.g., from silicon dioxide). The thickness of the insulating layer ISO is typically between 700 nanometers and 5 micrometers.

[0048] The silicon layer SOI on insulator (ISO) is a layer that can be referred to by the English expression "Silicon on Insulator".

[0049] Optical waveguides WG1, WG2, and WG3 are formed in a silicon-on-isodium (SOI) layer on an insulator ISO. These waveguides WG1, WG2, and WG3 can be juxtaposed with other waveguides, allowing light to propagate between them.

[0050] Figure 2 The illustration shows a three-dimensional view of an embodiment of waveguide WG1. The optical waveguide WG1 is a ridge or ribbed waveguide. Therefore, the optical waveguide WG1 includes a plate SLB. The plate SLB corresponds to the planar portion of the ridge waveguide. The thickness E_SLB of the plate SLB is between 50 nm and 150 nm. The thickness E_SLB of the plate SLB can vary between various optical waveguides WG1 and WG2. The width W_SLB of the plate SLB is large enough to prevent the optical waveguide from extending beyond its ends and is suitable for avoiding interaction with other waveguides. For example, the width W_SLB of the plate SLB is between 2 μm and 5 μm.

[0051] The ridge waveguide WG1 also includes a ridge RDG located above the plate SLB. The ridge RDG is formed from the same silicon layer SOI as the plate SLB. The ridge RDG extends longitudinally above the plate SLB.

[0052] The ridge RDG may have a main portion RDG_P and at least one transition portion RDG_T extending to the longitudinal end of the ridge. The at least one transition portion RDG_T has a form adapted to improve wave propagation between the at least one transition portion RDG_T and the main portion RDG_P.

[0053] The at least one transition portion RDG_T has a pointed shape in the longitudinal direction of the ridge RDG, and the pointed shape is oriented toward the main portion RDG_P. Therefore, the width of the transition portion RDG_T gradually decreases over its length until it reaches the main portion.

[0054] The thickness E_RDG_P of the main portion RDG_P of the ridge RDG is less than the thickness E_RDG_T of the at least one transition portion RDG_T. In particular, the thickness E_RDG_P of the main portion RDG_P is between 100 nm and 230 nm.

[0055] The width W_RDG_P of the main part RDG_P is between 300 nanometers and 2 micrometers, particularly between 300 nanometers and 800 nanometers.

[0056] The transition section RDG_T allows for improved wave propagation between the main section RDG_P and other waveguides that extend in the ridge WG1 and have a thickness corresponding to the thickness of the at least one transition section RDG_T.

[0057] The length L_RDG_T of the transition portion RDG_T is between 500 nanometers and 5 micrometers, for example, about 1 micrometer.

[0058] The ridge waveguide's ridge RDG and plate SLB have low roughness, specifically less than 2.5 nanometers.

[0059] Figure 3 The illustration shows the materials used to manufacture integrated circuits (such as...). Figure 1 An embodiment of the method for the integrated circuit shown.

[0060] The method includes step 20 of forming an initial structure STR of a ridge waveguide from a semiconductor slice WFR (which may also be referred to by the term "wafer"). The wafer WFR includes a substrate SUB, an insulating layer ISO on the substrate SUB, and a silicon layer SOI on the insulating layer ISO. The silicon layer SOI may have a thickness of, for example, 300 nanometers.

[0061] The initial structure STR is then used to obtain the ridge waveguide WG1 as described above.

[0062] The initial waveguide structure STR is formed from a silicon SOI layer using high-resolution photolithography. This allows for the achievement of low line edge roughness.

[0063] The initial STR structure comprises a plate SLB, a ridge RDG, and a sheath (specifically, an insulating layer ISO and a dielectric coating DIEL). The thickness of the ridge RDG corresponds to the initial thickness of the silicon layer SOI on the insulating ISO. Therefore, this thickness is greater than the required thickness of the ridge RDG.

[0064] However, the formation of the initial structure STR allows for the determination of the required thickness of the plate SLB of the ridge waveguide.

[0065] The method also includes step 21 of depositing a dielectric cladding layer DIEL on a wafer (particularly on the initial optical waveguide structure STR). The dielectric cladding layer DIEL is formed with an opening having a ridge RDG facing the initial optical waveguide structure STR, for which the thickness of the ridge RDG needs to be reduced. The dielectric cladding layer DIEL can be produced, in particular, from silicon dioxide.

[0066] Figure 4 An example of this initial structure STR is illustrated.

[0067] The method also includes a chemical mechanical polishing step 22 for reducing the thickness of the dielectric cladding DIEL such that its top surface extends to a height slightly above the height of the ridge RDG of the initial structure STR of the ridge waveguide. For example, the height of the top surface of the dielectric cladding DIEL is 1 to 20 nanometers higher than the height of the ridge RDG. This chemical mechanical polishing step 22 allows for adjustment of the dielectric cladding thickness.

[0068] The chemical mechanical polishing step 22 also enables the obtaining of an electrocoating layer with a smooth top surface, simplifying the application of the hard mask MSK, as described below.

[0069] Once chemical mechanical polishing has been achieved, a thin layer of silicon oxide can be retained on the ridge RDG to avoid damaging the waveguide.

[0070] The method includes step 23, which involves forming a hard mask (HMSK) on a dielectric cladding layer (DIEL). The hard mask (HMSK) corresponds to a layer fabricated from a robust and durable material having an opening (OPN) of a predefined form. The hard mask (HMSK) can be produced specifically from SiN. The hard mask (HMSK) can be obtained by depositing a SiN layer, followed by photolithography and etching to obtain the opening (OPN).

[0071] Specifically, the hard mask HMSK is formed as an opening OPN having the main portion RDG_P of the ridge RDG facing the initial ridge waveguide structure STR, for which the thickness of the ridge RDG needs to be reduced. The hard mask HMSK is also formed as a transition portion RDG_T covering at least the initial ridge waveguide structure STR's ridge.

[0072] More specifically, the opening of the HMSK mask has a width greater than the width of the ridge RDG to compensate for erroneous lithographic alignment and to enable the use of a low-cost, low-resolution mask.

[0073] Figure 5 (a) and Figure 5 (b) illustrates the initial ridge waveguide structure STR and the hard mask HMSK that can be obtained at the end of hard mask HMSK formation. Specifically, Figure 5 (b) is a plan view of the ridge waveguide, and Figure 5 (a) is along Figure 5 (b) is a cross-sectional view of plane AA shown above.

[0074] The method also includes an oxidation step 24. Oxidation allows a portion of the surface silicon of the ridge RDG of the initial STR structure to be converted into silicon oxide. Therefore, this allows for a reduction in the thickness of the ridge RDG of the waveguide in the portion not covered by the mask HMSK.

[0075] The duration of oxidation allows for the determination of the final thickness of the waveguide ridge RDG.

[0076] The oxidation step enables the formation of a ridge waveguide WG1 with a ridge RDG having a main portion RDG_P and at least one transition portion RDG_T, the thickness of the main portion RDG_P being less than the thickness of the at least one transition portion RDG_T.

[0077] The silicon dioxide generated by oxidation can then be removed or not. Additionally, a dielectric DIEL (particularly silicon dioxide) of a certain thickness is deposited to fill the openings in the cladding above the ridge of the oxidized ridge waveguide. The method may then include a chemical mechanical polishing step.

[0078] Figure 6 (a) and Figure 6 (b) illustrates the ridge waveguide WG1 and the hard mask HMSK, both of which can be obtained by depositing a dielectric thickness DIEL over the ridge of the ridge waveguide. Specifically, Figure 6 (b) is a plan view of the ridge waveguide, and Figure 6 (a) is along Figure 6 (b) is a cross-sectional view of plane AA shown above.

[0079] The method then includes step 25, which involves removing the mask HMSK.

[0080] Figure 7 (a) Figure 7 (b) and Figure 7 (c) illustrates the ridge waveguide that can be obtained at the end of the hard mask removal HMSK. Specifically, Figure 7 (b) is a plan view of the ridge waveguide. Figure 7 (a) is along Figure 7 (b) is a cross-sectional view of plane AA shown above, and Figure 7 (c) is along Figure 7 (b) Longitudinal section view of plane BB.

[0081] Steps 23 to 25 can be repeated to define waveguides with ridges of varying thicknesses.

[0082] This manufacturing method can be used to manufacture integrated circuits, such as... Figure 1 The integrated circuit shown.

[0083] In this manufacturing method, the height of the ridge of the ridge waveguide is defined after the initial ridge waveguide structure has been pre-formed. Specifically, after the initial ridge waveguide structure has been formed, the height of the ridge of the ridge waveguide is adjusted by oxidation.

[0084] Furthermore, in this manufacturing method, the adjustment of the thickness of the main portion of the ridge waveguide and the formation of the at least one transition portion are achieved simultaneously.

[0085] The advantage of this manufacturing method is that it maintains a relatively low surface roughness on the ridge of the ridge waveguide. For example, the surface roughness of the ridge can be less than 2.5 nanometers. This is because the achieved photolithography has high resolution, which allows for low roughness, and the thickness of the ridge is reduced by oxidation, which does not increase surface roughness.

[0086] This manufacturing method also has the advantage of allowing the thickness of the plate and the thickness of the ridge to be determined independently.

Claims

1. A method for manufacturing a ridge waveguide of a photonic integrated circuit, the method comprising: forming an initial structure of an optical ridge waveguide from a silicon layer formed on an insulator layer; forming a mask having an opening facing a ridge of the initial structure; performing an oxidation process using the mask to reduce a thickness of the ridge of the initial structure positioned facing the opening of the mask, the performing forming the optical ridge waveguide having a ridge with a thickness less than the thickness of the ridge of the initial structure from the initial structure; and removing the mask after performing the oxidation process.

2. The method of claim 1, wherein the mask is formed such that the mask covers at least one transition portion of the ridge of the initial structure, and such that the opening of the mask faces a main portion of the ridge of the initial structure, the at least one transition portion extending longitudinally of the main portion.

3. The method of claim 2, wherein the at least one transition portion has a width that decreases toward the main portion of the ridge of the ridge waveguide.

4. The method of claim 3, wherein the at least one transition portion has a pointed shape pointing toward the main portion of the ridge of the ridge waveguide.

5. The method of claim 1, wherein the forming of the initial structure comprises a photolithography of the silicon layer on the insulator layer for forming: a slab of the initial structure; and the ridge on the slab.

6. The method of claim 5, wherein the photolithography is implemented to define a final thickness of the slab for the ridge waveguide.

7. The method of any one of claims 1 to 6, further comprising, before forming the mask, forming a dielectric cladding on the initial structure, the dielectric cladding having an opening facing the ridge of the initial structure.

8. The method of claim 7, comprising: a chemical mechanical polishing adapted to reduce a thickness of the dielectric cladding (DIEL) before forming the mask (HMSK).

9. The method of any one of claims 1 to 6, further comprising removing an oxide obtained by the oxidation process, and then depositing a dielectric cladding on the ridge of the ridge waveguide before removing the mask.

10. The method of claim 5, wherein the slab is formed to have a thickness between 50 nanometers and 150 nanometers.

11. The method of claim 1, wherein the oxidation process is performed such that the ridge of the ridge waveguide has a thickness between 100 nanometers and 230 nanometers.

12. The method of claim 1, further comprising forming at least one optical waveguide having a different thickness than the thickness of the ridge of the ridge waveguide.

13. A method for manufacturing a photonic integrated circuit having a plurality of ridge waveguides having different thicknesses, the method comprising: having a silicon-on-insulator structure comprising a substrate, an insulator layer on the substrate, and a silicon layer on the insulator layer; performing a photolithography on the silicon layer to form a plurality of initial ridge waveguide structures, each initial ridge waveguide structure comprising a slab and a ridge on the slab; depositing a dielectric cladding on the plurality of initial ridge waveguide structures; performing a chemical mechanical polishing to reduce a thickness of the dielectric cladding; performing an oxidation process using the mask to reduce a thickness of the ridge of the initial structure positioned facing the opening of the mask, the performing forming the optical ridge waveguide having a ridge with a thickness less than the thickness of the ridge of the initial structure from the initial structure; and removing the mask after performing the oxidation process. forming a hard mask over the dielectric cladding, the hard mask having an opening facing a ridge of the selected initial ridge waveguide structure; performing an oxidation process to reduce a thickness of the ridge facing the opening of the hard mask; and removing the hard mask.

14. The method of claim 13, wherein the hard mask comprises silicon nitride.

15. The method of claim 13, wherein the dielectric cladding comprises silicon dioxide.

16. The method of claim 13, wherein the oxidation process is performed for a duration selected to achieve a predetermined final thickness of the ridge facing the opening of the hard mask.

17. An integrated circuit comprising: a ridge optical waveguide having a surface roughness of a ridge of less than 2.5 nanometers.

18. The integrated circuit of claim 17, further comprising at least one optical waveguide having a thickness different than a thickness of a ridge of the ridge optical waveguide.

19. The integrated circuit of claim 17, wherein the ridge optical waveguide comprises: a slab having a thickness between 50 nanometers and 150 nanometers; and a ridge on the slab, the ridge having a thickness between 100 nanometers and 230 nanometers.

20. The integrated circuit of claim 17, wherein the ridge optical waveguide comprises: a main portion having a first thickness; and at least one transition portion having a second thickness different than the first thickness, the at least one transition portion having a width that decreases toward the main portion. ​ ​

Images