Semiconductor device

Abstract

The present invention provides a semiconductor device (RC-IGBT) having an IGBT region and a diode region which prevent current concentration and element breakage when avalanche breakdown is applied under high voltage. A p-type high-concentration region (129) (second-conductivity-type high-concentration region) having a higher concentration than that of a p-type (second-conductivity-type) anode layer (117) is formed in a portion of a region of the p-type (second-conductivity-type) anode layer (117) in a diode region (103) that is in contact with an n-type (first-conductivity-type) drift layer (101). In a portion of an n-type (first conductivity type) drift layer (101) in contact with a p-type high-concentration region (129) (second conductivity type high-concentration region), an n-type high-concentration region (130) (first conductivity type high-concentration region) having a higher concentration than the n-type (first conductivity type) drift layer (101) is formed.

Description

Technical Field

[0001] This invention relates to semiconductor devices. Background Technology

[0002] To achieve a low-carbon society as soon as possible, the electrification of various systems is being promoted. Electric vehicles are one such example, having previously reduced environmental impact by replacing internal combustion engine-driven propulsion systems with electric motors and inverters. Inverters used for motor drives typically employ IGBT modules, and improving their performance and reducing costs are crucial.

[0003] IGBT modules typically consist of circuits containing multiple semiconductor switching elements. Traditionally, a single circuit element consisted of an IGBT (Insulated Gate Bipolar Transistor) and a diode connected in anti-parallel as a group. However, due to their different constructions, IGBTs and diodes are formed as separate semiconductor substrates, i.e., separate semiconductor devices (semiconductor chips), and are electrically connected and combined within the IGBT module.

[0004] However, in recent years, IGBTs and RC-IGBTs (Reverse Conducting Insulated Gate Bipolar Transistors), which constitute diodes, have attracted much attention in the same semiconductor substrate, i.e., the same semiconductor device (semiconductor chip). RC-IGBTs function as both IGBTs as switching elements and diodes as return current elements in a single semiconductor device (semiconductor chip), thus offering high area utilization efficiency and contributing to the cost reduction of IGBT modules.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2022-79281

[0008] Patent Document 2: Japanese Patent Application Publication No. 2021-73714 Summary of the Invention

[0009] The problem that the invention aims to solve

[0010] Patent Documents 1 and 2 disclose RC-IGBTs in which IGBT regions and diode regions are formed within the same semiconductor device (semiconductor chip). According to the inventors' research, the existing RC-IGBTs disclosed in these patent documents suffer from problems such as low avalanche withstand capability and device damage when high voltage is applied.

[0011] The purpose of this invention is to prevent current concentration and component damage during avalanche breakdown under high voltage in RC-IGBTs.

[0012] Solution for solving the problem

[0013] The semiconductor device of the present invention includes an IGBT region and a diode region, characterized in that it comprises: a drift layer of a first conductivity type disposed on a semiconductor substrate; a source layer of the first conductivity type disposed on the upper surface side of the semiconductor substrate of the IGBT region; a channel layer of a second conductivity type disposed between the source layer and the drift layer of the semiconductor substrate of the IGBT region; an emitter electrode connected to the source layer and the channel layer; a gate electrode opposite to the channel layer and disposed therebetween a first gate oxide film; and a collector layer of the second conductivity type disposed on the lower surface of the semiconductor substrate of the IGBT region. The diode has a collector electrode connected to the collector layer; an anode layer of a second conductivity type disposed on the upper surface of the semiconductor substrate in the diode region; an anode electrode connected to the anode layer; a cathode layer of a first conductivity type disposed on the lower surface of the semiconductor substrate in the diode region; and a cathode electrode connected to the cathode layer. In a portion of the region of the anode layer connected to the drift layer, a high-concentration region of the second conductivity type with a higher concentration than the anode layer is formed. In the portion of the drift layer connected to the high-concentration region of the second conductivity type, a high-concentration region of the first conductivity type with a higher concentration than the drift layer is formed. Alternatively, the semiconductor device of the present invention has an IGBT region having a plurality of IGBTs and a diode region having a plurality of diodes, characterized in that it comprises: a first conductivity drift layer disposed on a semiconductor substrate; a first field plate electrode disposed opposite to the drift layer between the plurality of IGBTs in the IGBT region and separated by a first gate oxide film; and a second field plate electrode disposed opposite to the drift layer between the plurality of diodes in the diode region and separated by a second gate oxide film, wherein the thickness of the second gate oxide film is thicker than the thickness of the first gate oxide film.

[0014] The effects of the invention

[0015] According to the present invention, in RC-IGBT, it is possible to prevent current concentration and component damage during avalanche breakdown under high voltage. Attached Figure Description

[0016] Figure 1 This is a cross-sectional view of a semiconductor device according to Embodiment 1 of the present invention.

[0017] Figure 2 This is a cross-sectional view of a semiconductor device used to illustrate the effects of the present invention as a comparative example.

[0018] Figure 3 This is a cross-sectional view of a semiconductor device according to Embodiment 2 of the present invention.

[0019] Figure 4 This is a cross-sectional view of the semiconductor device according to Embodiment 4 of the present invention. Detailed Implementation

[0020] Hereinafter, embodiments of the present invention will be described using the accompanying drawings. Furthermore, in the drawings, the same structures are labeled with the same symbols, and detailed descriptions of repeated parts are omitted.

[0021] Example 1

[0022] Figure 1 This is a cross-sectional view of a semiconductor device according to Embodiment 1 of the present invention.

[0023] exist Figure 1 The semiconductor device shown is an RC-IGBT on a single semiconductor chip, on which an IGBT region 102 and a diode region 103 are formed continuously on an n-type drift layer 101 of a semiconductor substrate. Furthermore, in Figure 1 Only one of the aforementioned regions is shown, but multiple regions are formed in an actual semiconductor device (RC-IGBT). Furthermore, multiple IGBTs are formed in IGBT region 102, and multiple diodes are formed in diode region 103.

[0024] With impurity concentration: 1.5 × 10 14 cm －3 On the upper surface of the semiconductor substrate formed by the n-type drift layer 101, a first trench 106 is formed by etching away the surface between the multiple IGBTs in the IGBT region 102. In addition, a second trench 118 is formed by etching away the surface between the multiple diodes in the diode region 103.

[0025] The surfaces (bottom and side) of the first trench 106 and the second trench 118 are covered by a first gate oxide film 107 and a second gate oxide film 119 formed by thermal oxidation of the upper surface of the semiconductor substrate.

[0026] In addition, after thermal oxidation treatment on the upper surface of the semiconductor substrate, a conductor film such as polysilicon is deposited on the entire upper surface of the semiconductor substrate. The conductor film is anisotropically etched using a mask covering the field plate forming portion, thereby forming a gate electrode 108 and a first field plate electrode 109 in the IGBT region 102 that are opposite to the semiconductor substrate through the first gate oxide film 107, and a buried anode electrode 120 and a second field plate electrode 121 in the diode region 103 that are opposite to the semiconductor substrate through the second gate oxide film 119.

[0027] Furthermore, by using a mask covering the first trench 106 and the second trench 118 to perform p-type impurity ion implantation on the upper surface side of the semiconductor substrate, an impurity concentration of 2.1 × 10⁻⁶ is formed on the upper surface side of the semiconductor substrate of both the IGBT region 102 and the diode region 103. 17 cm －3 The IGBT region 102 consists of a p-type channel layer 104 and an anode layer 117. Additionally, by using a mask covering the first trench 106 and the diode region 103, n-type impurities are implanted onto the upper surface of the semiconductor substrate, thereby pushing back the upper surface of the p-type channel layer 104 and creating an impurity concentration of 6.3 × 10⁻⁶ in the IGBT region 102. 19 cm －3 The n-type source layer 105. In addition, in this embodiment, the impurity concentration of the p-type channel layer 104 and the anode layer 117 is the same, but it is also possible to distinguish the ion implantation of p-type impurities in the IGBT region 102 and the diode region 103 so that the impurity concentration of each layer is different.

[0028] After forming the channel layer 104, the source layer 105, and the anode layer 117, an insulating film is deposited on the entire upper surface of the semiconductor substrate. A first insulating film 110 is formed in the IGBT region 102, and a second insulating film 122 is formed in the diode region 103.

[0029] Furthermore, by etching with a mask having openings above the channel layer 104, the first field plate electrode 109, the anode layer 117, and the second field plate electrode 121 in the IGBT region 102, a first emitter contact 111 penetrating the first insulating film 110 and the source layer 105 and reaching the channel layer 104, and a second emitter contact 112 penetrating the first insulating film 110 and reaching the first field plate electrode 109 are formed in the IGBT region 102. In addition, in the diode region 103, a first anode contact 123 penetrating the second insulating film 122 and reaching the anode layer 117, and a second anode contact 124 penetrating the second insulating film 122 and reaching the second field plate electrode 121 are formed.

[0030] After forming the aforementioned contacts 111, 112, 123, and 124, a conductive film, such as aluminum, is deposited across the entire upper surface of the semiconductor substrate. An emitter electrode 113, connected to the channel layer 104, source layer 105, and first field plate electrode 109, is formed in the IGBT region 102. An anode electrode 125, connected to the anode layer 117 and second field plate electrode 121, is formed in the diode region 103. Furthermore, the emitter electrode 113 and anode electrode 125 are integrally formed from the same conductive film and electrically connected. Multiple buried anode electrodes 120 are connected only to the emitter terminal E. Additionally, multiple gate electrodes 108 are connected to the gate terminal G.

[0031] On the other hand, the impurity concentration is: 1.5 × 10 14 cm －3 On the lower surface side of the semiconductor substrate formed by the n-type drift layer 101, n-type impurities are implanted from the lower surface side across the entire semiconductor substrate, thereby creating an impurity concentration of 1.9 × 10⁻⁶ on the lower surface side of the semiconductor substrate in both the IGBT region 102 and the diode region 103. 16 cm －3 The first buffer layer 114 and the second buffer layer 126 of type n.

[0032] Furthermore, by using a mask covering the diode region 103 to perform ion implantation of p-type impurities on the lower surface side of the semiconductor substrate, the lower surface side of the n-type first buffer layer 114 of the IGBT region 102 is pushed back, resulting in an impurity concentration of 1.4 × 10⁻⁶. 17 cm －3 The p-type collector layer 115.

[0033] Furthermore, by using a mask covering the IGBT region 102 to perform ion implantation of n-type impurities on the lower surface side of the semiconductor substrate, an impurity concentration of 3.0 × 10⁻⁶ is formed on the lower surface side of the n-type second buffer layer 126 in the diode region 103. 19 cm －3 The n-type cathode layer 127.

[0034] After forming the aforementioned layers on the lower surface side of the semiconductor substrate, a conductive film, such as aluminum, is deposited across the entire lower surface side of the semiconductor substrate. A collector electrode 116, connected to the collector layer 115, is formed in the IGBT region 102, and a cathode electrode 128, connected to the cathode layer 127, is formed in the diode region 103. Furthermore, the collector electrode 116 and the cathode electrode 128 are integrally formed from the same conductive film and electrically connected, and are connected to the collector terminal C.

[0035] The present invention is characterized in that, in the anode layer 117 of the diode region 103, a p-type high-concentration region 129 with a higher concentration than the anode layer 117 is formed in a portion of the region in contact with the drift layer 101, and an n-type high-concentration region 130 with a higher concentration than the drift layer 101 is formed in the portion of the diode region 103 in contact with the p-type high-concentration region 129 of the drift layer 101.

[0036] The p-type high-concentration region 129 and the n-type high-concentration region 130, which are characteristic structures of the present invention, can be formed by ion implantation through the second insulating film 122 of the through diode region 103 to the first anode contact portion 123 of the anode layer 117.

[0037] In this embodiment, after forming the aforementioned contact portions 111, 112, 123, and 124, using a mask with an opening above the first anode contact portion 123, firstly, p-type impurities are implanted, thereby forming a portion of the region below the first anode contact portion 123 where the anode layer 117 and the drift layer 101 meet, resulting in an impurity concentration of 2.1 × 10⁻⁶. 17 cm －3 The anode layer 117 has a high impurity concentration of 7.4 × 10⁻⁶. 18 cm －3 The p-type high-concentration region 129 is then formed by ion implantation of n-type impurities, thereby creating a specific impurity concentration of 1.5 × 10⁻⁶ at the portion of the drift layer 101 below the first anode contact 123 that is in contact with the p-type high-concentration region 129. 14 cm －3 The n-type drift layer 101 has a high impurity concentration of 1.6 × 10⁻⁶. 17 cm －3 The n-type high concentration region is 130.

[0038] In this embodiment, since the p-type high-concentration region 129 and the n-type high-concentration region 130 are formed by ion implantation through the first anode contact portion 123, the aforementioned high-concentration regions 129 and 130 are only formed in a portion of the lower part of the first anode contact portion 123, resulting in a state where the anode layer 117 and the drift layer 101 that are not highly concentrated remain around the p-type high-concentration region 129 and the n-type high-concentration region 130.

[0039] Figure 2 This is a cross-sectional view of a semiconductor device used to illustrate the effects of the present invention as a comparative example.

[0040] In explaining the effects of the semiconductor device (RC-IGBT) of Embodiment 1 of the present invention, a comparative example is used. Figure 2 The RC-IGBT shown illustrates a problem in the prior art.

[0041] Figure 2 The comparative example semiconductor device (RC-IGBT) shown has a structure that is generally the same as the semiconductor device (RC-IGBT) of Example 1, but differs in that it does not have... Figure 1 The diode region 103, which is a characteristic structure of the present invention, includes a p-type high-concentration region 129 and an n-type high-concentration region 130.

[0042] exist Figure 2 In the comparative example shown, with a voltage smaller than the threshold voltage applied to the gate terminal G based on the emitter terminal E, consider applying a positive voltage to the collector terminal C based on the emitter terminal E.

[0043] In IGBT region 102, the IGBT is in an off state (withstand voltage holding state) because the voltage at the gate terminal G is lower than the threshold voltage. If a voltage is applied to the collector terminal C, the pn junction formed by the p-type channel layer 104 and the n-type drift layer 101 becomes reverse biased, thus creating an electric field at the pn junction. The n-type drift layer 101 has a lower impurity concentration than the p-type channel layer 104, therefore the depletion layer mainly extends from the pn junction towards the n-type drift layer 101.

[0044] As the applied voltage to the collector terminal C increases, avalanche breakdown occurs when the electric field strength at the pn junction reaches a critical value. Figure 2 In the comparative example shown, the pn junction of the IGBT region 102 breaks down before the pn junction of the diode region 103 breaks down.

[0045] This is because the IGBT in IGBT region 102 has a PNP transistor structure consisting of a p-type channel layer 104, an n-type drift layer 101, a buffer layer 114, and a p-type collector layer 115. Through the amplification effect of the leakage current, the avalanche voltage decreases. That is, a small collector leakage current becomes the base current, which applies positive feedback that leads to a further increase in the collector leakage current, thus lowering the avalanche voltage.

[0046] On the other hand, the diodes in diode region 103 do not have a pnp structure because the cathode layer 127 on the back is n-type, resulting in a higher avalanche voltage.

[0047] exist Figure 2In the comparative example shown, when an avalanche breakdown occurs in the IGBT region 102 described above, the device is often damaged. This is because the leakage current-voltage characteristic of a PNP transistor has a negative resistance region. In this negative resistance region, the holding voltage decreases as the leakage current increases. Therefore, when any IGBT in IGBT region 102 experiences avalanche breakdown and leakage current flows, the holding voltage of the current path decreases, further applying positive feedback to the leakage current flow. Consequently, the leakage current concentrates in a localized area of ​​IGBT region 102, leading to device damage.

[0048] As mentioned above, in Figure 2 In the comparative example shown, the following problem exists: during avalanche breakdown of the component, the current concentrates in a portion of the IGBT region 102, causing damage.

[0049] return Figure 1 The semiconductor device (RC-IGBT) of Embodiment 1 of the present invention is shown to illustrate the function and effect of the present invention. Figure 1 Example 1 shown and Figure 2 The comparative example shown is different, having: a p-type high-concentration region 129, which is selectively formed on the lower part of the anode layer 117 of the diode region 103; and an n-type high-concentration region 130, which is selectively formed on the drift layer 101 in a manner opposite to the p-type high-concentration region 129.

[0050] exist Figure 1 In the illustrated embodiment 1, when a voltage smaller than the threshold voltage is applied to the gate terminal G with the emitter terminal E as a reference, it is considered that a positive voltage is applied to the collector terminal C with the emitter terminal E as a reference.

[0051] In IGBT region 102, the IGBT is in an off state (withstand voltage holding state) because the voltage at the gate terminal G is lower than the threshold voltage. If a voltage is applied to the collector terminal C, the pn junction formed by the p-type channel layer 104 and the n-type drift layer 101 becomes a reverse bias, and an electric field is applied at the pn junction. The n-type drift layer 101 has a lower impurity concentration than the p-type channel layer 104, therefore the depletion layer mainly extends from the pn junction towards the n-type drift layer 101.

[0052] At this time, in diode region 103, since a positive voltage is applied to cathode electrode 128 with reference to anode electrode 125, the pn junction formed by p-type high-concentration region 129 and n-type high-concentration region 130 also becomes reverse biased, resulting in a breakdown voltage holding state with an applied electric field. The depletion layer extends from the pn junction to the n-type drift layer, but near this pn junction, the impurity concentration in p-type high-concentration region 129 and n-type high-concentration region 130 is high, thus the slope of the electric field becomes larger. Therefore, compared with the pn junction of IGBT region 102, the pn junction of diode region 103 becomes a state with an applied high electric field. Thus, in Figure 1 In the illustrated embodiment 1, the diode region 103 can be avalanche-broken before the IGBT region 102 avalanche breakdown occurs.

[0053] Thus, even in the event of avalanche breakdown in diode region 103, it is difficult for the device to be damaged. This is because, since the cathode layer 127 on the back side of diode region 103 is n-type, it does not have a pnp structure, and its leakage current-voltage withstand characteristic does not have a negative resistance region. Because it lacks a negative resistance region, the leakage current is evenly distributed in diode region 103 and does not flow in a localized concentrated manner, thus making it difficult for the device to be damaged.

[0054] In addition, Figure 1 In the semiconductor device (RC-IGBT) of Embodiment 1 of the present invention shown, in the diode region 103, a p-type high-concentration region 129 is formed only in a portion of the region of the anode layer 117 that is in contact with the drift layer 101, and an n-type high-concentration region 130 is formed only in the portion of the drift layer 101 that is in contact with the p-type high-concentration region 129. This results in a state where the anode layer 117 and the drift layer 101, which are not highly concentrated, remain around the p-type high-concentration region 129 and the n-type high-concentration region 130. This does not affect the static operation of the diode in the diode region 103 and also has the effect of adjusting the avalanche withstand voltage of the diode region 103.

[0055] Example 2

[0056] Figure 3 This is a cross-sectional view of a semiconductor device according to Embodiment 2 of the present invention.

[0057] and Figure 1 The difference in the semiconductor device (RC-IGBT) of Embodiment 1 of the present invention is that the opening width W2 of the first anode contact portion 123, which extends through the second insulating film 122 of the diode region 103 to the anode layer 117, is formed to be larger than the opening width W1 of the first emitter contact portion 111, which extends through the first insulating film 110 of the IGBT region 102 and the source layer 105 to the channel layer 104.

[0058] As described above, the p-type high-concentration region 129 and n-type high-concentration region 130, which are characteristic structures of the present invention, can be formed by ion implantation through the second insulating film 122 penetrating the diode region 103 to reach the first anode contact portion 123 of the anode layer 117. In this case, if the opening width W2 of the first anode contact portion 123 is increased, the impurity content of the p-type high-concentration region 129 and n-type high-concentration region 130 implanted into the anode layer 117 and drift layer 101 of the diode region 103 increases. As a result, the avalanche voltage of the diode region 103 decreases, and the effects of the present invention are enhanced.

[0059] Example 3

[0060] In the semiconductor device (RC-IGBT) of Embodiment 3 of the present invention, the depth of the first anode contact portion 123 that penetrates the second insulating film 122 of the diode region 103 to reach the anode layer 117 is greater than the depth of the first emitter contact portion 111 that penetrates the first insulating film 110 of the IGBT region 102 and the source layer 105 to reach the channel layer 104.

[0061] Therefore, the amount of impurities forming the p-type high-concentration region 129 and the n-type high-concentration region 130 can be increased in the same way as in Embodiment 2 of the present invention, which can make the effect of the present invention even greater.

[0062] Example 4

[0063] Figure 4 This is a cross-sectional view of the semiconductor device according to Embodiment 4 of the present invention.

[0064] Importantly, in the effects of this invention, the avalanche withstand voltage of the diode region, which is less prone to avalanche damage, is reduced compared to the IGBT region 102, which is susceptible to avalanche failure. Therefore, measures can also be employed that are independent of the introduction of the p-type high-concentration region 129 and the n-type high-concentration region 130.

[0065] exist Figure 4 In the IGBT region 102, the thickness of the second gate oxide film 119 sandwiched between the second field plate electrode 121 and the drift layer 101 of the diode region 103 is thicker than that of the first gate oxide film 107 sandwiched between the first field plate electrode 109 and the drift layer 101 of the IGBT region 102.

[0066] Compare Figure 4The second gate oxide film 119, which is thicker than the first gate oxide film 107 shown, can be formed, for example, by the following steps: after forming the first trench 106 and the second trench 118 on the semiconductor substrate, a thermal oxidation process is performed on the upper surface side of the semiconductor substrate to form an oxide film on the surface of the semiconductor substrate; using a mask covering the bottom surface of the second trench 118, the oxide film other than the bottom surface of the second trench 118 is removed by etching; the upper surface side of the semiconductor substrate is thermally oxidized again; and the oxide film at the bottom of the second trench 118 is formed by making the oxide film at the bottom of the first trench 106 thicker than the oxide film at the bottom of the first trench 106.

[0067] The first field plate electrode 109 and the second field plate electrode 121 have the effect of mitigating the electric field in the drift layer 101 region that is separated from the first gate oxide film 107 and the second gate oxide film 119, and improving the avalanche withstand voltage.

[0068] The electric field mitigation effect is higher on the side with a thinner gate oxide film. Therefore, if configured as in Embodiment 4 of the present invention, the effect of the second field plate electrode 121 in the diode region 103 can be weakened, thereby reducing the avalanche breakdown voltage of the diode region 103.

[0069] In addition, Figure 4 Even without forming p-type high-concentration regions 129 and n-type high-concentration regions 130, the present invention can still achieve its intended effects. Figure 4 As shown, by combining the two, the effect of the present invention can be made greater.

[0070] Explanation of symbols

[0071] 101—Drift layer, 102—IGBT region, 103—Diode region, 104—Channel layer, 105—Source layer, 106—First trench, 107—First gate oxide film, 108—Gate electrode, 109—First field plate electrode, 110—First insulating film, 111—First emitter contact, 112—Second emitter contact, 113—Emitter electrode, 24—First buffer layer, 115—Collector layer, 1 16—Collector electrode, 117—Anode layer, 118—Second trench, 119—Second gate oxide film, 120—Buried anode electrode, 121—Second field plate electrode, 122—Second insulating film, 1—First anode contact, 124—Second anode contact, 125—Anode electrode, 126—Second buffer layer, 127—Cathode layer, 128—Cathode electrode, 129—P-type high concentration region, 130—N-type high concentration region.

Claims

1. A semiconductor device having an IGBT region and a diode region, characterized by comprising: Possessing: a drift layer of a first conductive type provided in a semiconductor substrate; a source layer of the first conductive type provided on the upper surface side of the semiconductor substrate in the IGBT region; a channel layer of a second conductive type provided between the source layer and the drift layer of the semiconductor substrate in the IGBT region; an emitter electrode in contact with the source layer and the channel layer; a gate electrode provided in opposition to the channel layer with a first gate oxide film interposed; a collector layer of the second conductive type provided on the lower surface side of the semiconductor substrate in the IGBT region; a collector electrode in contact with the collector layer; an anode layer of the second conductive type provided on the upper surface side of the semiconductor substrate in the diode region; an anode electrode in contact with the anode layer; a cathode layer of the first conductive type provided on the lower surface side of the semiconductor substrate in the diode region; and a cathode electrode in contact with the cathode layer, in a part of the region of the anode layer in contact with the drift layer, a second conductive type high concentration region of a higher concentration than the anode layer is formed, in the part of the drift layer in contact with the second conductive type high concentration region, a first conductive type high concentration region of a higher concentration than the drift layer is formed.

2. The semiconductor device according to claim 1, characterized in that the emitter electrode and the anode electrode are formed of the same first conductor film, and the source layer, the channel layer, and the anode layer are electrically connected, the collector electrode and the cathode electrode are formed of the same second conductor film, and the collector layer and the cathode layer are electrically connected.

3. The semiconductor device according to claim 1, characterized in that a buffer layer of the first conductive type is provided between the collector layer and the drift layer, and between the drift layer and the drift layer.

4. The semiconductor device according to any one of Claims 1 to 3, wherein Possessing: an insulating film covering the upper surface side of the semiconductor substrate; an emitter contact portion provided in the insulating film in the IGBT region; and an anode contact portion provided in the insulating film in the diode region, the opening width of the anode contact portion is made larger than the opening width of the emitter contact portion.

5. The semiconductor device according to claim 4, characterized in that the second conductive type high concentration region and the first conductive type high concentration region are formed in the lower part of the anode contact portion.

6. The semiconductor device according to any one of Claims 1 to 3, wherein Possessing: an insulating film covering the upper surface side of the semiconductor substrate; an emitter contact portion provided in the insulating film in the IGBT region; and an anode contact portion provided in the insulating film in the diode region, the depth of the anode contact portion is made deeper than the depth of the emitter contact portion.

7. The semiconductor device according to claim 6, characterized in that the second conductive type high concentration region and the first conductive type high concentration region are formed in the lower part of the anode contact portion.

8. The semiconductor device according to any one of claims 1 to 3, characterized in that a plurality of IGBTs are formed in the IGBT region, a plurality of diodes are formed in the diode region, the semiconductor device possesses: a first field plate electrode which opposes the drift layer between the plurality of IGBTs of the IGBT region, and which is provided across the first gate oxide film; and a second field plate electrode which opposes the drift layer between the plurality of diodes of the diode region, and which is provided across the second gate oxide film, the thickness of the second gate oxide film is made thicker than the thickness of the first gate oxide film.

9. A semiconductor device having an IGBT region in which a plurality of IGBTs are formed and a diode region in which a plurality of diodes are formed, characterized by comprising: provided with: a drift layer of a first conductivity type provided in a semiconductor substrate; a first field plate electrode which opposes the drift layer between the plurality of IGBTs of the IGBT region, and which is provided across the first gate oxide film; and a second field plate electrode which opposes the drift layer between the plurality of diodes of the diode region, and which is provided across the second gate oxide film, the thickness of the second gate oxide film is made thicker than the thickness of the first gate oxide film.

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