Memory checking method and device, and storage medium

Abstract

The application discloses a memory check method and device and a storage medium, relates to the technical field of testing, and discloses a memory check method, which comprises the following steps: when data is written into a memory, a target address corresponding to to-be-written data is acquired; based on the target address, a target storage area corresponding to the to-be-written data is determined in the memory, and a target priority corresponding to the target storage area is acquired; a target check strategy corresponding to the target priority is acquired, and integrity check is performed on the target storage area based on the target check strategy. By acquiring the target priority of the target storage area corresponding to the to-be-written data, performing integrity check on the target storage area according to the check strategy corresponding to the target priority, different check strategies are used for integrity check of different storage areas, thereby realizing differentiated check of RAM data, and the system resource consumption is reduced by using light check on non-key data.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of testing, in particular to a memory verification method and device and storage medium. BACKGROUND

[0002] RAM (random access memory) is a core component in a computer system for temporarily storing data, and the integrity of the written data directly affects the stability of the system.

[0003] At present, in the RAM data integrity verification scheme, a unified verification mechanism is mostly used, such as full-area CRC (Cyclic Redundancy Check) verification and parity verification, which indiscriminately processes all data in the RAM, resulting in waste of CPU / hardware resources.

[0004] Therefore, how to reduce the consumption of system resources in the RAM data integrity verification process is a problem to be solved at present.

[0005] The above content is only used to assist in understanding the technical solutions of the present application and does not represent the acknowledgement of the above content as prior art. SUMMARY

[0006] The main purpose of the present application is to provide a memory verification method, device and storage medium, which aims to solve the technical problem of how to reduce the consumption of system resources in the RAM data integrity verification process.

[0007] To achieve the above purpose, the present application provides a memory verification method, which comprises:

[0008] When data is written into the memory, the target address corresponding to the to-be-written data is obtained;

[0009] Based on the target address, the target storage area corresponding to the to-be-written data in the memory is determined, and the target priority corresponding to the target storage area is obtained;

[0010] The target verification strategy corresponding to the target priority is obtained, and the integrity of the target storage area is verified based on the target verification strategy.

[0011] In an embodiment, the step of obtaining the target verification strategy corresponding to the target priority and verifying the integrity of the target storage area based on the target verification strategy comprises:

[0012] If the target priority is a high priority, it is determined that the target verification strategy includes a size-accurate verification strategy and a lightweight content verification strategy;

[0013] based on the size-accurate verification policy and the lightweight content verification policy, respectively, performing integrity verification on the target storage area.

[0014] In an embodiment, the step of based on the size-accurate verification policy and the lightweight content verification policy, respectively, performing integrity verification on the target storage area comprises:

[0015] when writing data into the target storage area, accumulating the number of bytes of the written data in the target storage area in real time, and when the writing of the to-be-written data is completed, determining whether the number of bytes is consistent with a preset number of bytes, and performing CRC verification on the data in the target storage area;

[0016] if the number of bytes is inconsistent with the preset number of bytes or the CRC verification fails, outputting prompt information indicating a verification error.

[0017] In an embodiment, the step of outputting prompt information indicating a verification error is followed by:

[0018] sending a hardware interrupt instruction to a CPU corresponding to the memory, so that the CPU performs a corresponding interrupt operation based on the hardware interrupt instruction.

[0019] In an embodiment, the step of obtaining the target verification policy corresponding to the target priority and performing integrity verification on the target storage area based on the target verification policy comprises:

[0020] if the target priority is a medium priority, determining that the target verification policy comprises a lightweight content verification policy and a periodic verification policy;

[0021] when the writing of the to-be-written data is completed, performing CRC verification on the data in the target storage area based on a verification period corresponding to the periodic verification policy.

[0022] In an embodiment, the step of obtaining the target verification policy corresponding to the target priority and performing integrity verification on the target storage area based on the target verification policy comprises:

[0023] if the target priority is a low priority, determining that the target verification policy comprises a block-level size statistics policy and a periodic verification policy;

[0024] when the writing of the to-be-written data is completed, obtaining the size of the data at the boundary of a data block corresponding to the target storage area based on a verification period corresponding to the periodic verification policy, and determining whether the size of the data is consistent with a preset size of the data.

[0025] In an embodiment, the memory verification method further comprises:

[0026] If the CRC check fails or the check corresponding to the block level size statistics strategy fails, an error log is recorded.

[0027] In an embodiment, before the step of obtaining the target address corresponding to the data to be written, the memory checking method further comprises:

[0028] Obtaining preset configuration information corresponding to the memory;

[0029] Based on the preset configuration information, the memory is regionally divided to obtain a plurality of storage regions corresponding to the memory, wherein the priority of the storage region includes high priority, medium priority and low priority.

[0030] In addition, to achieve the above-mentioned purposes, the present application also proposes a memory checking device, which comprises a memory, a processor and a computer program stored on the memory and executable on the processor, and the computer program is configured to implement the steps of the aforementioned memory checking method.

[0031] In addition, to achieve the above-mentioned purposes, the present application also proposes a storage medium, which is a computer readable storage medium, and the storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of the aforementioned memory checking method.

[0032] The one or more technical solutions proposed in the present application have at least the following technical effects:

[0033] By obtaining the target priority of the target storage region corresponding to the data to be written, and performing integrity checking on the target storage region according to the checking strategy corresponding to the target priority, different checking strategies are used for integrity checking of different storage regions, thereby realizing differentiated checking of RAM data, and reducing system resource consumption by using lightweight checking for non-critical data.

[0034] By performing high-precision checking on critical data in the high-priority storage region, performing higher-precision checking on non-critical data in the medium-priority storage region, and using lightweight checking in the low-priority storage region, the checking error is processed according to the data priority, the critical data reliability is guaranteed, the non-critical data error is avoided to affect the system operation, the CPU and hardware resource consumption is reduced compared with full-area high-precision checking, and the system resource consumption is further reduced.

[0035] Meanwhile, the data error of the high-priority storage area triggers an interrupt in real time, avoiding system crash caused by damage of critical data; the data error of the medium-priority storage area and the data error of the low-priority storage area are processed in the background, without affecting the real-time performance of the system, reducing the consumption of system resources while ensuring the safety of critical data. BRIEF DESCRIPTION OF DRAWINGS

[0036] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application.

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings required by the embodiments or the prior art description will be briefly introduced. Obviously, for those skilled in the art, other drawings can also be obtained based on these drawings without creative labor.

[0038] Figure 1 A flowchart provided by an embodiment of the memory verification method of the present application;

[0039] Figure 2 A system framework diagram of the memory verification method provided by the first embodiment of the present application;

[0040] Figure 3 A module structure diagram of the memory verification device of the embodiment of the present application;

[0041] Figure 4 A device structure diagram of the hardware running environment involved in the memory verification method in the embodiment of the present application.

[0042] The object implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0043] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application, and are not used to limit the present application.

[0044] In order to better understand the technical solutions of the present application, the following will be described in detail in combination with the drawings in the specification and specific embodiments.

[0045] The main solution of the embodiment of the present application is: when data is written into the memory, the target address corresponding to the to-be-written data is obtained; based on the target address, the target storage area corresponding to the to-be-written data in the memory is determined; the target priority corresponding to the target storage area is obtained; the target verification strategy corresponding to the target priority is obtained, and the integrity of the target storage area is verified based on the target verification strategy.

[0046] In this embodiment, for convenience of description, the following is described taking the memory checking device as the execution subject.

[0047] RAM (random access memory, random access memory) is a core component for temporarily storing data in a computer system, and the integrity of the written data directly affects the system stability.

[0048] At present, in the RAM data integrity checking scheme, a unified checking mechanism is mostly used, such as full-area CRC (Cyclic Redundancy Check, cyclic redundancy check) checking and parity checking, which indiscriminately processes all data in the RAM, causing waste of CPU / hardware resources. For example, when high-complexity checking is used for non-critical data in the RAM, CPU / hardware resources are wasted, and when lightweight checking is used for critical data in the RAM, data security is reduced. Some RAM data integrity checking schemes divide the RAM into partitions, but the partition rules (such as address range and checking strategy) are fixed in hardware or firmware, and cannot be dynamically adjusted according to data types, so the adaptability is poor.

[0049] In addition, when the checking fails, the same processing logic (such as interrupting the CPU or recording the log) is used regardless of the importance of the data, and only recording the log will cause critical data errors to be not handled in time, which will lead to system crash, and using the interrupt CPU will cause frequent interruption of non-critical data errors, which will affect the real-time performance of the system.

[0050] Therefore, how to reduce the consumption of system resources in the RAM data integrity checking process is a problem that needs to be solved at present.

[0051] The present application provides a solution, which obtains a target priority of a target storage area corresponding to to-be-written data, and checks the integrity of the target storage area according to a checking strategy corresponding to the target priority, so as to realize different checking strategies for different storage areas to check the integrity, thereby realizing differentiated checking of the RAM data, and reducing the consumption of system resources by using lightweight checking for non-critical data.

[0052] It should be noted that the execution subject of the present embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, a memory checking device, etc. The present embodiment and each of the following embodiments are described below taking the memory checking device as an example.

[0053] Based on this, the present embodiment provides a memory checking method, which is described below with reference to Figure 1 , Figure 1A flowchart of an embodiment of the memory checking method in the present application.

[0054] In the embodiment, the memory checking method comprises steps S110-S130.

[0055] In step S110, when data is written into the memory, the target address corresponding to the data to be written is obtained.

[0056] As shown in Figure 2 Figure 2 A system framework diagram of the memory checking method provided in Embodiment One of the present application is shown. The system corresponding to the memory checking method comprises an external association component and a core checking module.

[0057] The external association component comprises a configuration file / EEPROM, a RAM, a CPU, an interrupt controller and a system log module. The core checking module comprises a region management module, a policy control module, a checksum calculation module, a size statistics module and an error reporting module.

[0058] In the embodiment, the memory can be a RAM. When the system corresponding to the memory is started, the CPU of the system performs region division on the memory according to configuration information. Specifically, before step S110, the memory checking method can comprise steps A11-A12 in a feasible implementation manner.

[0059] In step A11, preset configuration information corresponding to the memory is obtained.

[0060] In step A12, the memory is divided into regions based on the preset configuration information to obtain a plurality of memory regions corresponding to the memory. The priority of the memory region comprises a high priority, a medium priority and a low priority.

[0061] In the embodiment, when the system is started, the region management module obtains preset configuration information corresponding to the memory, for example, by reading the preset configuration information through a configuration file or by reading the preset configuration information through a corresponding hardware register parameter.

[0062] After obtaining the preset configuration information, the region management module divides the memory into regions based on the preset configuration information to obtain a plurality of memory regions corresponding to the memory. The priority of the memory region comprises a high priority, a medium priority and a low priority. That is, the RAM is divided into at least three memory regions, such as a high priority region, a medium priority region and a low priority region, by the preset configuration information. When data is stored, system critical data, critical configuration parameters, etc. can be stored in the high priority region, system non-critical data, non-critical configuration parameters, etc. can be stored in the medium priority region, and temporary cache, logs, etc. can be stored in the low priority region.

[0063] ​It should be noted that the memory is divided into regions by the preset configuration information, so that the application supports dynamic adjustment of the RAM partition range and the verification strategy through the configuration file or the register without modifying the hardware or the firmware, and is suitable for multiple scenes such as embedded, industrial control, and server.

[0064] In this embodiment, after the storage area is divided into regions, data can be written into the memory, that is, the CPU initiates a RAM write operation, and transmits a target address (an address to be written into the RAM), data content, and an expected number of bytes to be written into the strategy control module. At this time, the target address corresponding to the data to be written can be obtained.

[0065] In step S120, the target storage area corresponding to the data to be written is determined in the memory based on the target address, and the target priority corresponding to the target storage area is obtained.

[0066] In this embodiment, after the target address is obtained, the strategy control module determines the target storage area corresponding to the data to be written in the memory according to the target address, that is, determines the target storage area to which the target address belongs in the plurality of storage areas, and obtains the target priority corresponding to the target storage area after determining the target storage area.

[0067] In step S130, the target verification strategy corresponding to the target priority is obtained, and the integrity of the target storage area is verified based on the target verification strategy.

[0068] In the embodiment of the application, when the memory is divided into regions, a plurality of storage areas are obtained, and each storage area is allocated a corresponding priority, the verification strategy corresponding to each priority is set, and then after the target priority is obtained, the target verification strategy corresponding to the target priority is obtained. Specifically, the verification strategy corresponding to the current target priority is queried in each verification strategy as the target verification strategy.

[0069] After the target verification strategy is obtained, the integrity of the target storage area is verified based on the target verification strategy. Further, in a feasible implementation manner, step S130 can include steps B110-B120.

[0070] In step B110, if the target priority is a high priority, it is determined that the target verification strategy includes a size-accurate verification strategy and a lightweight content verification strategy.

[0071] In step B120, the integrity of the target storage area is verified based on the size-accurate verification strategy and the lightweight content verification strategy.

[0072] In the embodiment of the present application, if the target priority is a high priority, the target verification strategy includes the size-accurate verification strategy and the lightweight content verification strategy, so that the size-accurate verification strategy and the lightweight content verification strategy are used to perform integrity verification on the target storage area with high priority.

[0073] Specifically, based on the size-accurate verification strategy and the lightweight content verification strategy, integrity verification is respectively performed on the target storage area. Further, in a feasible implementation, step B120 can include steps B121-B122.

[0074] In step B121, when data is written in the target storage area, the size statistics module accumulates the number of bytes of the written data in the target storage area in real time. When the writing of the to-be-written data is completed, it is determined whether the number of bytes is consistent with a preset number of bytes, and CRC verification is performed on the data in the target storage area.

[0075] In step B122, if the number of bytes is inconsistent with the preset number of bytes, or the CRC verification fails, a prompt information of verification error is output.

[0076] In the embodiment, for the size-accurate verification strategy, when data is written in the target storage area, the size statistics module accumulates the number of bytes of the written data in the target storage area in real time, so as to count the actual number of bytes written in the target storage area through the size statistics module.

[0077] When the writing of the to-be-written data is completed, the size statistics module determines whether the number of bytes is consistent with a preset number of bytes. The preset number of bytes can be the expected number of bytes of the to-be-written data. If the target storage area currently writes other data, the preset number of bytes of the target storage area is the sum of the expected number of bytes of all to-be-written data currently written. Meanwhile, the checksum calculation module performs CRC verification on the data in the target storage area through the checksum calculation module, calculates the lightweight checksum of the data, such as 8-bit or 16-bit CRC verification, obtains the lightweight checksum, and compares the lightweight checksum with the expected checksum to determine whether the lightweight checksum is consistent with the expected checksum.

[0078] If the number of bytes is inconsistent with the preset number of bytes, or the CRC verification fails, i.e., the lightweight checksum is inconsistent with the expected checksum, it is determined that the current integrity verification of the target storage area fails, and a prompt information of verification error is output.

[0079] It should be noted that the size statistics module can use a 32-bit counter which is updated in real time during data writing. The checksum calculation module implements 8-bit / 16-bit CRC algorithm, which can be implemented by hardware logic or software algorithm.

[0080] Further, in a possible implementation, step B120 can further include step B123:

[0081] Step B123, sending a hardware interrupt instruction to the CPU corresponding to the storage to make the CPU perform corresponding interrupt operation based on the hardware interrupt instruction.

[0082] In this embodiment, when the integrity check of the target storage area with high priority fails, the error reporting module sends a hardware interrupt instruction to the CPU corresponding to the storage to make the CPU perform corresponding interrupt operation based on the hardware interrupt instruction to notify the CPU to perform emergency processing.

[0083] Further, in a possible implementation, step S130 can include steps C110-C120:

[0084] Step C110, if the target priority is medium priority, determining that the target check strategy includes a lightweight content check strategy and a periodic check strategy.

[0085] Step C120, when the writing of the to-be-written data is completed, performing CRC check on the data in the target storage area based on the check period corresponding to the periodic check strategy.

[0086] In this embodiment, if the target priority is medium priority, it is determined that the target check strategy includes a lightweight content check strategy and a periodic check strategy, so as to perform integrity check on the target storage area with medium priority by using the lightweight content check strategy and the periodic check strategy.

[0087] Specifically, after obtaining the lightweight content check strategy and the periodic check strategy, the check period corresponding to the periodic check strategy is obtained, and the check and calculation module performs CRC check on the data in the target storage area based on the check period to calculate the check sum of the data, such as 8-bit or 16-bit CRC check, obtains the check sum, compares the check sum with the expected check sum, determines whether the check sum is consistent with the expected check sum, and if the check sum is consistent with the expected check sum, it is determined that the integrity check is passed, and if the check sum is inconsistent with the expected check sum, it is determined that the integrity check of the target storage area fails.

[0088] It should be noted that the check period corresponding to the periodic check strategy can be reasonably set.

[0089] Further, in a possible implementation, step S130 can include steps C130-C140:

[0090] Step C130, if the target priority is a low priority, it is determined that the target verification strategy includes the block-level size statistics strategy and the periodic verification strategy.

[0091] Step C140, when the to-be-written data is written, the size of the data at the data block boundary of the target storage area is obtained based on the verification period corresponding to the periodic verification strategy, and it is determined whether the data size is consistent with the preset data size.

[0092] In the embodiment, if the target priority is a low priority, it is determined that the target verification strategy includes the block-level size statistics strategy and the periodic verification strategy, so that the block-level size statistics strategy and the periodic verification strategy are used to perform integrity verification on the target storage area with a low priority.

[0093] Specifically, when the to-be-written data is written, the size of the data at the data block boundary of the target storage area is obtained based on the verification period corresponding to the periodic verification strategy, and it is determined whether the data size is consistent with the preset data size. If the data size is consistent with the preset data size, the integrity verification corresponding to the block-level size statistics strategy passes; if the data size is not consistent with the preset data size, the integrity verification corresponding to the block-level size statistics strategy fails.

[0094] It should be noted that the verification period corresponding to the periodic verification strategy can be reasonably set.

[0095] Further, in a feasible implementation, the memory verification method can further include step C150:

[0096] Step C150, if the CRC verification fails or the verification corresponding to the block-level size statistics strategy fails, an error log is recorded.

[0097] In the embodiment, if the CRC verification of the target storage area with a medium priority fails or the verification corresponding to the block-level size statistics strategy of the target storage area with a low priority fails, the error reporting module records an error log, that is, writes error information through the system log module, so that periodic integrity spot checks are performed based on the error log when the memory corresponding system is idle.

[0098] The memory checking method in the embodiment, by acquiring the target address corresponding to the data to be written when the memory writes data, then determining the target storage area corresponding to the data to be written in the memory based on the target address, and acquiring the target priority corresponding to the target storage area, then acquiring the target checking strategy corresponding to the target priority, and performing integrity checking on the target storage area based on the target checking strategy, by acquiring the target priority of the target storage area corresponding to the data to be written, performing integrity checking on the target storage area according to the checking strategy corresponding to the target priority, different storage areas are checked for integrity using different checking strategies, thereby realizing differentiated checking of RAM data, and the system resource consumption is reduced by using lightweight checking for non-critical data.

[0099] In the present application, high-precision checking is only performed on critical data for the high-priority storage area, higher-precision checking is only performed on important non-critical data for the medium-priority storage area, and lightweight checking is used for the low-priority storage area, the checking error is processed according to the data priority, the critical data reliability is ensured, the system operation is not affected by the non-critical data error, the CPU and hardware resource consumption is reduced compared with the high-precision checking of the whole area, and the system resource consumption is further reduced.

[0100] Meanwhile, the data error of the high-priority storage area triggers an interrupt in real time, the system crash caused by critical data damage is avoided, the data error of the medium-priority storage area and the data error of the low-priority storage area are processed in the background, and the system real-time performance is not affected, the system resource consumption is reduced while the critical data safety is ensured.

[0101] It should be noted that the above examples are only used for understanding the present application and do not constitute a limitation on the memory checking method of the present application, and more forms of simple transformation based on the technical concept are within the protection scope of the present application.

[0102] The present application also provides a memory checking device, please refer to Figure 3 , the memory checking device comprises:

[0103] The first acquisition module 10 is used for acquiring the target address corresponding to the data to be written when the memory writes data;

[0104] The determination module 20 is used for determining the target storage area corresponding to the data to be written in the memory based on the target address, and acquiring the target priority corresponding to the target storage area;

[0105] The second acquisition module 30 is used for acquiring the target checking strategy corresponding to the target priority, and performing integrity checking on the target storage area based on the target checking strategy.

[0106] The memory checking device provided in the present application adopts the memory checking method in the above embodiments, and can solve the technical problem of how to reduce the consumption of system resources in the RAM data integrity checking process. Compared with the prior art, the memory checking device provided in the present application has the same beneficial effects as the memory checking method provided in the above embodiments, and other technical features in the memory checking device are the same as the features disclosed in the above embodiments, which will not be repeated here.

[0107] The present application provides a memory checking device, comprising: at least one processor; and a memory in communication connection with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the memory checking method in Embodiment I.

[0108] Reference will now be made to the drawings, and specific examples thereof will be illustrated in detail. Figure 4 which shows a structural schematic diagram of a memory checking device suitable for implementing the embodiments of the present application. The memory checking device in the embodiments of the present application can include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (Personal Digital Assistant), PADs (Portable Application Description), PMPs (Portable Media Player), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), and the like, and fixed terminals such as digital TVs, desktop computers, and the like. Figure 4 The memory checking device shown is only an example, and should not bring any limitation to the functions and use range of the embodiments of the present application.

[0109] As Figure 4As shown, the memory checking device can include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.) that can perform various appropriate actions and processes according to programs stored in a read only memory (ROM) 1002 or programs loaded from a storage device 1003 into a random access memory (RAM) 1004. Various programs and data required for operation of the memory checking device are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; the storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the memory checking device to communicate with other devices wirelessly or by wire to exchange data. Although the memory checking device with various systems is shown in the figure, it should be understood that all the shown systems are not required to be implemented or possessed. More or less systems can be alternatively implemented or possessed.

[0110] In particular, according to embodiments of the present disclosure, the processes described above with reference to the flowcharts can be implemented as a computer software program. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a computer readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network by a communication device, or installed from the storage device 1003, or installed from the ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the methods of embodiments of the present disclosure are performed.

[0111] The memory checking device provided by the present disclosure adopts the memory checking method in the above embodiments, and can solve the technical problem of how to reduce the consumption of system resources in the RAM data integrity checking process. Compared with the prior art, the memory checking device provided by the present disclosure has the same beneficial effects as the memory checking method provided by the above embodiments, and other technical features in the memory checking device are the same as the features disclosed in the previous embodiment method, which will not be repeated here.

[0112] It should be understood that various parts of the present application can be realized by hardware, software, firmware or a combination thereof. In the above description of embodiments, specific features, structures, materials or characteristics can be combined in any appropriate manner in any one or more embodiments or examples.

[0113] The above description is merely illustrative of the application and the scope of the application should be determined with reference to the claims.

[0114] The present application provides a computer readable storage medium having stored thereon computer readable program instructions (i.e., a computer program) for performing the memory checking method in the above-described embodiments.

[0115] The computer readable storage medium provided by the present application may, for example, be a U disk, but is not limited to an electric, magnetic, optical, electromagnetic, infrared, or semiconductor system, system or device, or any combination thereof. More specific examples of the computer readable storage medium can include, but are not limited to, an electric connection with one or more conductive wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any appropriate combination thereof. In the present embodiment, the computer readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system or device. The program code contained on the computer readable storage medium can be transmitted by any appropriate medium, including but not limited to an electric wire, an optical cable, an RF (Radio Frequency), etc., or any appropriate combination thereof.

[0116] The above computer readable storage medium can be included in the memory checking device; or can exist separately and not be assembled into the memory checking device.

[0117] The computer readable storage medium described above carries one or more programs, when the one or more programs are executed by the memory checking device, the memory checking device is caused to: when data is written in the memory, obtain a target address corresponding to the to-be-written data; based on the target address, determine a target storage area corresponding to the to-be-written data in the memory, and obtain a target priority corresponding to the target storage area; obtain a target checking strategy corresponding to the target priority, and perform integrity checking on the target storage area based on the target checking strategy.

[0118] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0119] The flow diagrams and the block diagrams in the drawings are illustrations of architectures, functionalities, and operations of possible implementations of systems, methods, and computer program products according to various embodiments of present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.

[0120] The modules involved in the embodiments of the present application can be implemented in a software manner or in a hardware manner. In some cases, the name of the module does not constitute a limitation on the module itself.

[0121] The readable storage medium provided by the present application is a computer readable storage medium, which stores computer readable program instructions (i.e. computer program) for executing the memory checking method described above, and can solve the technical problem of how to reduce the consumption of system resources in the RAM data integrity checking process. Compared with the prior art, the computer readable storage medium provided by the present application has the same beneficial effects as the memory checking method provided by the above-mentioned embodiments, and will not be described here.

[0122] The present application also provides a computer program product comprising a computer program, which, when executed by a processor, implements the steps of the memory checking method as described above.

[0123] The computer program product provided by the present application can solve the technical problem of how to reduce the consumption of system resources in the RAM data integrity checking process. Compared with the prior art, the computer program product provided by the present application has the same beneficial effects as the memory checking method provided by the above-mentioned embodiments, and will not be described here.

[0124] The above only describes some embodiments of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation made by using the content of the present application specification and drawings, or direct / indirect application in other related technical fields is included in the patent protection scope of the present application.

Claims

1. A memory checking method, characterized by, The memory checking method comprises: When data is written into the memory, a target address corresponding to the data to be written is obtained; Based on the target address, a target storage area corresponding to the data to be written is determined in the memory, and a target priority corresponding to the target storage area is obtained; A target checking strategy corresponding to the target priority is obtained, and integrity checking is performed on the target storage area based on the target checking strategy; The step of obtaining the target checking strategy corresponding to the target priority and performing integrity checking on the target storage area based on the target checking strategy comprises: If the target priority is a high priority, it is determined that the target checking strategy comprises a size accurate checking strategy and a lightweight content checking strategy; When data is written into the target storage area, the number of bytes of the written data in the target storage area is accumulated in real time, and when the data to be written is written, it is determined whether the number of bytes is consistent with a preset number of bytes, and CRC checking is performed on the data in the target storage area, specifically 8-bit or 16-bit CRC checking is performed on the data in the target storage area; If the number of bytes is not consistent with the preset number of bytes, or the CRC checking fails, a prompt information of verification error is output.

2. The memory checking method of claim 1, wherein, After the step of outputting the prompt information of verification error, the memory checking method further comprises: A hardware interrupt instruction is sent to a CPU corresponding to the memory, so that the CPU performs a corresponding interrupt operation based on the hardware interrupt instruction.

3. The memory checking method of claim 1, wherein, The step of obtaining the target checking strategy corresponding to the target priority and performing integrity checking on the target storage area based on the target checking strategy comprises: If the target priority is a medium priority, it is determined that the target checking strategy comprises a lightweight content checking strategy and a periodic checking strategy; When the data to be written is written, CRC checking is performed on the data in the target storage area based on a checking period corresponding to the periodic checking strategy, specifically 8-bit or 16-bit CRC checking is performed on the data in the target storage area.

4. The memory checking method of claim 3, wherein, The step of obtaining the target checking strategy corresponding to the target priority and performing integrity checking on the target storage area based on the target checking strategy comprises: If the target priority is a low priority, it is determined that the target checking strategy comprises a block-level size statistics strategy and a periodic checking strategy; When the data to be written is written, the size of the data at the block boundary corresponding to the target storage area is obtained based on a checking period corresponding to the periodic checking strategy, and it is determined whether the size of the data is consistent with a preset data size.

5. The memory checking method of claim 4, wherein, The memory checking method further comprises: If the CRC checking fails or the checking corresponding to the block-level size statistics strategy fails, an error log is recorded.

6. The memory checking method according to any one of claims 1 to 5, wherein Before the step of obtaining the target address corresponding to the data to be written when data is written into the memory, the memory checking method further comprises: The preset configuration information corresponding to the memory is obtained; The memory is divided into regions based on the preset configuration information, to obtain a plurality of storage regions corresponding to the memory, wherein the priority of the storage region includes high priority, medium priority and low priority.

7. A memory checking device, characterized by comprising: The memory checking device comprises a memory, a processor and a computer program stored on the memory and executable on the processor, and the computer program is configured to implement the steps of the memory checking method according to any one of claims 1 to 6.

8. A storage medium, characterized by The storage medium is a computer readable storage medium, and the storage medium stores a computer program, and the computer program is executed by the processor to implement the steps of the memory checking method according to any one of claims 1 to 6.

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