Solar cell and photovoltaic module

Abstract

The present application relates to a solar cell comprising: a silicon substrate containing an Sb element; an aluminum oxide layer formed on the silicon substrate; wherein the aluminum oxide layer contains antimony. The present application also relates to a photovoltaic module comprising the solar cell.

Description

Technical Field

[0001] This application relates to the field of solar photovoltaics, specifically to a solar cell and a photovoltaic module comprising the same. Background Technology

[0002] Currently, solar cells typically use silicon wafers with n-type or p-type doped substrates. P-type and n-type semiconductors are formed at different locations on the silicon wafer, and electrodes are then formed on the respective p-type and n-type semiconductor regions to form the solar cell. When light enters the silicon substrate, electron-hole pairs are generated. These ionized electron-hole pairs undergo carrier separation, causing electrons to accumulate near the n-type electrode and holes to accumulate near the p-type electrode. Connecting an external circuit to the electrodes allows for the output of current.

[0003] In existing technologies, aluminum oxide is commonly used as a surface passivation agent. Aluminum oxide also serves to reduce reflection. For example, the front side of a TBC battery is passivated with aluminum oxide. Another example is the passivation of the back poly layer of a TBC battery by covering it with aluminum oxide.

[0004] However, when the alumina layer is scratched, the passivation at the scratched area is disrupted, forming recombination centers and leading to a decrease in battery efficiency. This is especially true for high-efficiency batteries, where scratches on the alumina layer cause more significant damage to battery efficiency. Summary of the Invention

[0005] The inventors of this application have discovered that when using antimony-doped silicon wafers as silicon substrates, and by controlling the migration of antimony into the alumina layer, the mechanical strength of the alumina layer can be improved, thereby improving the structural strength of the surface layer of the solar cell and reducing the damage to the cell caused by scratches on the alumina layer.

[0006] This application involves the following:

[0007] 1. A solar cell comprising:

[0008] A silicon substrate containing antimony;

[0009] An aluminum oxide layer is formed on a silicon substrate;

[0010] The alumina layer contains antimony.

[0011] 2. The solar cell according to claim 1, wherein the peak concentration of antimony in the alumina layer is n1, and n1 is greater than or equal to 1E15 atoms / cm². 3 Preferably, n1 is greater than or equal to 1E16 atoms / cm 3 .

[0012] 3. The solar cell according to claim 1, further comprising a hydrogen passivation layer covering the alumina layer; the hydrogen passivation layer containing antimony.

[0013] 4. The solar cell according to claim 3, wherein,

[0014] The hydrogen passivation layer is a silicon nitride layer; the hydrogen passivation layer includes an antimony-rich layer located near the aluminum oxide layer;

[0015] In the antimony-rich layer, the concentration of antimony decreases from the direction closest to the silicon substrate to the direction furthest from the silicon substrate.

[0016] 5. The solar cell according to claim 3, wherein,

[0017] The antimony concentration in the hydrogen passivation layer is greater than or equal to 1E16 atoms / cm³. 3 The thickness of the region is d 10 And the thickness of the hydrogen passivation layer is d 20 d 10 / d 20 ≤0.6.

[0018] 6. The solar cell according to claim 1, wherein,

[0019] A doped semiconductor layer is disposed on the side of the alumina layer near the silicon substrate, and the doped semiconductor layer is doped with a doping element; the doping element is phosphorus or boron.

[0020] The doping concentration of the doped element is n3, and lg(n3 / n1)≥1.5.

[0021] 7. The solar cell according to claim 6, wherein,

[0022] When the dopant element is phosphorus, the phosphorus doping concentration in the doped semiconductor layer is n. 3n , and lg(n 3n / n1)≥3,n 3n Greater than or equal to 1E18 atoms / cm 3 ;

[0023] or,

[0024] When the doping element is boron, the boron doping concentration in the doped semiconductor layer is n. 3p And lg(n) 3p / n1)≥1.5, n 3p Greater than or equal to 1E17 atoms / cm 3 .

[0025] 8. The solar cell according to item 6, wherein,

[0026] The doped semiconductor layer includes an outer region near the alumina layer, an inner region near the silicon substrate, and a middle region located between the outer region and the inner region.

[0027] The peak concentration of antimony in the outer region is greater than the peak concentration of antimony in the inner region; or

[0028] The peak concentration of antimony in the outer region is the same as the peak concentration of antimony in the alumina layer.

[0029] 9. The solar cell according to claim 8, wherein, in the doped semiconductor layer, the peak concentration of antimony in the inner region is n2, wherein,

[0030] n2 is less than or equal to n1, preferably n1 > 2n2, more preferably n1 > 10n2; or,

[0031] n2 is greater than or equal to 1E15 atoms / cm 3 More preferably, n2 is greater than or equal to 1E16 atoms / cm 3 .

[0032] 10. The solar cell according to claim 6, wherein,

[0033] The doped semiconductor layer is a polycrystalline silicon layer or a microcrystalline silicon layer;

[0034] The solar cell further includes an interface passivation layer located between the silicon substrate and the doped semiconductor layer; or

[0035] The thickness of the alumina layer is 4-20 nm.

[0036] 11. The solar cell according to claim 10, wherein the thickness of the interface passivation layer is 0.5-7 nm, and the interface passivation layer is an oxide layer.

[0037] 12. The solar cell according to claim 1, wherein, when the alumina layer further contains boron, the concentration of antimony in the alumina layer is higher than the concentration of boron; or,

[0038] When the alumina layer also contains phosphorus, the concentration of antimony in the alumina layer is higher than the concentration of phosphorus; or,

[0039] When the hydrogen passivation layer also contains boron, the concentration of antimony in the hydrogen passivation layer is higher than the concentration of boron; or,

[0040] When the hydrogen passivation layer also contains phosphorus, the concentration of antimony in the hydrogen passivation layer is higher than the concentration of phosphorus.

[0041] 13. The solar cell according to claim 1, wherein a doped semiconductor layer is disposed on the side of the alumina layer near the silicon substrate, the doped semiconductor layer being doped with a doping element; the surface of the silicon substrate side is divided into an N-region and a P-region; the doped semiconductor layer located in the N-region is a phosphorus-doped semiconductor layer; and the doped semiconductor layer located in the P-region is a boron-doped semiconductor layer.

[0042] The phosphorus concentration in the phosphorus-doped semiconductor layer is n 3n The boron concentration in the boron-doped semiconductor layer is n. 3p ,

[0043] In the N region, the peak concentration of antimony in the alumina layer is n. 1n ;

[0044] In the P region, the peak concentration of antimony in the alumina layer is n. 1p ;

[0045] And lg(n) 3p / n 1p ) <lg(n 3n / n 1n ).

[0046] 14. The solar cell according to item 13, wherein n 1n >n 1p ;or

[0047] In the N region, the peak concentration of antimony in the inner region is n. 2n ;

[0048] In the P region, the peak concentration of antimony in the inner region is n. 2p ;

[0049] n 2n >n 2p .

[0050] 15. The solar cell according to claim 1, further comprising:

[0051] In the doped semiconductor layer, in the inner region, the antimony concentration gradually decreases from the side closer to the silicon substrate to the side farther from the silicon substrate.

[0052] The peak concentration of antimony in the inner region is n2, and n2 is greater than or equal to 1E15 atoms / cm². 3 .

[0053] 16. The solar cell according to claim 15, wherein,

[0054] The concentration of antimony in the silicon substrate is denoted as 'a', and the range of 'a' is 1E13 to 1E18 atoms / cm³. 3 ;or

[0055] The concentration of antimony in the inner region is greater than or equal to 1E15 atoms / cm³. 3 The thickness d1 of the region is greater than 2nm.

[0056] 17. The solar cell according to item 16, wherein a / n2 is defined as u, and u ranges from 0.8 to 1E10.

[0057] 18. A photovoltaic module comprising a solar cell as described in any one of items 1 to 17. Attached Figure Description

[0058] Figure 1 This is a diagram of a standard TOPCon battery structure;

[0059] Figure 2 This is a detailed diagram of the passivated contact structure containing antimony;

[0060] Figure 3 This is a partial structural diagram of a TOPCon battery containing antimony;

[0061] Figure 4 This is a structural diagram of a back-contact battery containing antimony;

[0062] Figure 5 This is a SIMS detection diagram of the P region of a TBC battery according to an embodiment of this application;

[0063] Figure 6 This is a structural diagram of a back-contact battery containing antimony;

[0064] Figure 7 This is a structural diagram of a back-contact battery containing antimony;

[0065] Figure 8 This is a structural diagram of a back contact battery (HPBC structure) containing antimony.

[0066] Figure 9 This application relates to a battery structure diagram with an antimony-containing aluminum oxide layer.

[0067] Figure 10 This application relates to a battery structure diagram with a doped semiconductor layer.

[0068] Figure 11 This application relates to a battery structure diagram with a doped semiconductor layer having electrodes.

[0069] Figure 12 This application relates to a battery structure diagram with an interface passivation layer and an antimony-containing aluminum oxide layer.

[0070] Figure 13 This application relates to a result diagram of a dual-polarized back contact battery with an antimony-containing aluminum oxide layer.

[0071] Figure label:

[0072] 1. Silicon substrate, 2. Interface passivation layer, 3. Doped semiconductor layer, 4. Inner region, 5. B-containing layer x Layer, 21 First interface passivation layer, 31 First doped semiconductor layer, 41 First inner region, 51 B-containing layer xp 22 Second interface passivation layer, 32 Second doped semiconductor layer, 42 Second inner region, 52 B-containing layer xn Layer 7 Intrinsic region interface passivation layer, 8 Antimony-containing intrinsic semiconductor layer, 9 Antimony-free intrinsic semiconductor layer, 10 Intrinsic region side interface passivation layer, 11 P-region electrode, 106 Alumina layer, 1061 First alumina layer, 1062 Second alumina layer, 107 Hydrogen passivation layer, 1071 First hydrogen passivation layer, 1072 Second hydrogen passivation layer. Detailed Implementation

[0073] The following embodiments of this application are only used to illustrate specific implementation methods of this application, and these embodiments should not be construed as limitations on this application. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of this application shall be considered equivalent substitutions and fall within the protection scope of this application.

[0074] Specific embodiments of this application will now be described in more detail. However, it should be understood that this application can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.

[0075] It should be noted that certain terms are used in the specification and claims to refer to specific components. Those skilled in the art will understand that different terms may be used to refer to the same component. This specification and claims do not distinguish components based on differences in terminology, but rather on differences in function. The terms "comprising" or "including" used throughout the specification and claims are open-ended and should be interpreted as "comprising but not limited to." The following descriptions in the specification are preferred embodiments for carrying out this application; however, these descriptions are for the purpose of understanding the general principles of the specification and are not intended to limit the scope of this application. The scope of protection of this application shall be determined by the appended claims.

[0076] The term “or” is used in the claims to mean “and / or” unless it is explicitly stated that it refers only to an alternative or that the alternatives are mutually exclusive, although this disclosure supports the definitions of referring only to an alternative and “and / or”. As used herein, “another” can mean at least a second or more.

[0077] In this application, solar cells are also referred to as batteries.

[0078] In this application, the front side of the silicon substrate refers to the surface facing sunlight under normal battery operating conditions, while the back side refers to the surface of the silicon substrate on the other side opposite to the front side.

[0079] Those skilled in the art will understand that the silicon substrate generally refers to the portion of a battery formed from a silicon wafer. A light absorber generally refers to a functional component in a battery used to absorb photons, generate photogenerated carriers, and separate these photogenerated carriers. This includes the silicon substrate and regions that separate the carriers generated from the silicon substrate (e.g., the tunneling layer and doped polycrystalline layer in a TOPCON structure), wherein the silicon substrate is used to absorb light and generate photogenerated carriers. It is understood that simple anti-emission layers, other functional layers, and electrodes are not considered light absorbers.

[0080] In this application, the doped regions in the silicon substrate can also be used to separate photogenerated carriers, such as the regions diffused with a Group 3 element (boron) in the TOPCon cell described below. That is, the silicon substrate is obtained by diffusion doping of a bare silicon wafer. The silicon substrate includes a silicon matrix portion and a doped region portion, where the silicon matrix portion is the undoped bulk region in the cell manufacturing process, and its performance is the same as that of the raw bare silicon wafer. The doped region can be essentially the same as the bulk region in terms of properties and parameters, except for the different doping element. For example, it can be a doped region formed by direct doping or inward diffusion doping within the bare silicon wafer. Furthermore, in some cases, the doped region is antimony or a doping element, such as a Group 3 or Group 5 element, specifically, areas where B or P accumulates. In some cases, the doped region may be essentially the same as the bulk region, i.e., mainly consisting of antimony-doped regions.

[0081] In solar cells with at least partial TOPCon structures (e.g., TOPCon cells, partial TOPCon cells, back-contact hybrid cells, and TBC cells), the silicon substrate typically includes a doped region formed within at least one surface of the silicon substrate. The performance of this doped region is identical to that of the raw silicon wafer. The doped region may have properties and parameters substantially the same as the bulk region, except for the doping element; that is, properties such as antimony concentration, resistivity change rate, and resistivity shift rate are substantially the same. Such a doped region can be formed by direct doping of the raw silicon wafer as described in detail below, or by doping the doping element into the raw silicon wafer through layers such as a doped passivation layer and an interface passivation layer. In this application, for solar cells with at least partial TOPCon structures, the doped region generally refers to a region formed by direct doping or inward doping within the raw silicon wafer, wherein inward doping is formed by doping polysilicon, referred to as the doped layer, into the interior of the raw silicon wafer through a tunneling layer, referred to as the interface passivation layer.

[0082] In this application, there are no further limitations on the silicon wafer itself mentioned above. It can be a silicon wafer obtained after machining and slicing following the pulling of silicon ingots (also referred to as a bare silicon wafer). The silicon substrate in this application can be a portion of the silicon substrate peeled and recovered from the battery module, as long as it has a certain shape and can be sheet-like, that is, the size of one side is larger than the size of the side perpendicular to it, and it is flat or plate-like. There are no limitations on the size of the silicon wafer or silicon substrate in this application. The silicon wafer or silicon substrate can be of any size, and it is a portion of the silicon substrate after the light absorber is recovered from the battery module and other layers are peeled off. In addition, those skilled in the art will understand that if some doped regions are damaged during peeling, as long as some doped regions still exist, it should also be understood as the silicon substrate described in this application, and a battery with such a silicon substrate also meets the definition of a battery in this application. For example, in one specific embodiment, the length of at least one side of the silicon wafer or silicon substrate (including the stripped portion of the silicon substrate after recycling and stripping other layer structures) of this application is greater than 156 mm, such as 158±2 mm, (160±2) mm, (165±2) mm, (170±2) mm, (175±2) mm, (180±2) mm, (185±2) mm, 190±2 mm, (195±2) mm, (200±2) mm, etc. (205±2)mm, (210±2)mm, (215±2)mm, (220±2)mm, (225±2)mm, (230±2)mm, (235±2)mm, (240±2)mm, (245±2)mm, (250±2)mm, (255±2)mm, (260±2)mm, (265±2)mm, (270±2)mm, (275±2)mm, and any range between these values. For example, in one specific embodiment, the thickness of the silicon wafer or photosilicon substrate (including the stripped portion of the silicon substrate after recovering and removing other layers) of this application is at least 40–170 μm, such as 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, or 160 μm. In one specific embodiment, the size of the stripped portion of the silicon substrate after recovering and removing other layers can be smaller than the above-mentioned size, as long as it is possible to detect the concentration of antimony and other limitations involved in this application.

[0083] In this application, the concentration of antimony in the silicon wafer, silicon substrate, alumina layer, hydrogen passivation layer, or doped semiconductor layer can be detected by any method known to those skilled in the art. Those skilled in the art can choose the appropriate method based on their needs, such as SIMS, ICP-MS, GDMS, etc., with SIMS being preferred. Those skilled in the art will understand that the concentration of antimony in the silicon substrate, silicon substrate, alumina layer, hydrogen passivation layer, or doped semiconductor layer can be detected by any method known to those skilled in the art.

[0084] The concentration of antimony in the alumina layer, hydrogen passivation layer, or doped semiconductor layer can refer to the concentration of antimony at a randomly selected single site within the silicon wafer, silicon substrate, alumina layer, hydrogen passivation layer, or doped semiconductor layer, or it can be the average concentration of antimony at multiple sites. Those skilled in the art can select the aforementioned random sites for detection based on the detection conditions and instruments used, or they can detect multiple sites and calculate the average of the multiple sites as the antimony concentration. Other elements are understood in the same way as antimony and will not be elaborated upon here.

[0085] Those skilled in the art will fully understand that the aforementioned testing of silicon wafers or silicon substrates can be performed on silicon wafers or silicon substrates of any size, on bare silicon wafers obtained after cutting following the pulling of silicon rods, or on silicon substrates stripped from cells or modules after other layers have been removed. As long as the test results obtained after testing according to the methods described in this application fall within the scope of this application, they should be considered to be covered by the silicon wafers, solar cells, cell strings, or photovoltaic modules claimed in this application.

[0086] In the silicon substrate of this application, antimony is used as a Group 5 dopant element to completely or partially replace phosphorus doping.

[0087] This application provides a solar cell, such as Figure 9-12 As shown, it includes: a silicon substrate 1 containing antimony; an aluminum oxide layer 106 formed on the silicon substrate 1; wherein the aluminum oxide layer 106 contains antimony.

[0088] The inventors of this application have discovered that when using antimony-doped silicon wafers as the silicon substrate, controlling the migration of antimony into the alumina layer can improve the mechanical strength of the alumina layer, thereby improving the structural strength of the solar cell's surface and reducing damage to the cell from scratches on the alumina layer. Furthermore, since the migration of antimony into the alumina layer has virtually no impact on the passivation effect of the alumina layer, the invention demonstrates this principle.

[0089] In one specific embodiment, the thickness of the alumina layer is 4nm-20nm, for example, it can be 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm, 20nm, and any value between these values.

[0090] The thickness of alumina should be between 4nm and 20nm. A suitable thickness avoids the problem of alumina being too thin, which would result in lower scratch resistance and a lower Sb concentration, further reducing scratch resistance. Conversely, if the alumina thickness exceeds 20nm, hydrogen from the silicon nitride layer on top will have difficulty reaching the substrate, reducing the passivation effect. Furthermore, excessively thick alumina will also lead to a deterioration in anti-reflective properties.

[0091] In one specific embodiment, the peak concentration of antimony in the alumina layer 106 is n1, and n1 is greater than or equal to 1E15 atoms / cm 3 When the peak concentration of antimony is greater than 1E15 atoms / cm 3 The mechanical strength of the alumina layer is greatly improved, which can effectively resist scratches in subsequent processes during battery manufacturing.

[0092] For example, n1 can be 1E15 atoms / cm 3 5E15 atoms / cm 3 1E16 atoms / cm 3 5E16 atoms / cm 3 1E17 atoms / cm 3 5E17 atoms / cm 3 1E18 atoms / cm 3 5E18atoms / cm 3 1E19 atoms / cm 3 , and any value between these values.

[0093] In some specific implementations, n1 is greater than or equal to 1E16 atoms / cm 3 When the peak concentration of antimony is greater than 1E16 atoms / cm 3 This can further and effectively resist scratches in subsequent processes during battery manufacturing, reducing the proportion of scratches.

[0094] In one specific embodiment, the solar cell further includes a hydrogen passivation layer 107 covering the aluminum oxide layer 106.

[0095] It should be noted that the hydrogen passivation layer 107 utilizes hydrogen atoms to passivate the dangling bonds on the surface of the silicon substrate 1. The material of the hydrogen passivation layer 107 can be known in the art, such as silicon nitride.

[0096] Preferably, the hydrogen passivation layer 107 also contains antimony. That is, antimony not only migrates into the alumina layer but also further into the hydrogen passivation layer. Similarly, the migration of antimony into the hydrogen passivation layer helps improve its mechanical strength, further protecting the alumina layer and reducing the probability of scratches. Since the alumina layer is relatively thin, if antimony does not migrate into the hydrogen passivation layer, the migration range needs to be strictly controlled. This requires strict control of process parameters affecting migration, such as temperature, increasing manufacturing costs. If antimony migrates into the hydrogen passivation layer, the process difficulty is reduced, and manufacturing costs are lowered.

[0097] More specifically, the hydrogen passivation layer 107 is rich in antimony in the portion near the alumina layer 106, which is called the antimony-rich layer, and in the antimony-rich layer, the concentration of antimony decreases from the direction near the silicon substrate 1 to the direction away from the silicon substrate 1.

[0098] Antimony, like nitrogen, belongs to Group 5. Antimony partially replaces nitrogen in the hydrogen passivation layer, thus affecting its electrical structure and reducing its passivation effect. Therefore, the Sb concentration needs to be gradually reduced. This results in a higher Sb concentration near the alumina layer, ensuring good mechanical properties and guaranteeing the protective effect of the alumina layer; while a lower Sb concentration further away from the alumina layer minimizes its impact on the passivation effect of the hydrogen passivation layer.

[0099] In some specific embodiments, the antimony concentration in the hydrogen passivation layer 107 is greater than or equal to 1E16 atoms / cm³. 3 The thickness of the region is d 10 And the thickness of the hydrogen passivation layer 107 is d. 20 d 10 / d 20 The value must be less than or equal to 0.6, and can be, for example, 0.6, 0.55, 0.5, 0.45, 0.4, 0.35, 0.3, 0.25, 0.2, 0.15, 0.1, or any value between these. This further ensures the passivation effect of the hydrogen passivation layer and improves the mechanical strength of the underlying layer.

[0100] In one specific implementation, such as Figure 10-12 As shown, a doped semiconductor layer 3 is present on the side of the alumina layer 106 near the silicon substrate 1. That is, the doped semiconductor layer 3 is located between the alumina layer 106 and the silicon substrate 1. The doped semiconductor layer 3 also serves to passivate the silicon substrate. Simultaneously, the doped semiconductor layer 3 primarily functions to separate charge carriers.

[0101] The doped semiconductor layer 3 is doped with a doping element, such as phosphorus or boron; the doping concentration of the doping element is n3, and lg(n3 / n1) is greater than or equal to 1.5.

[0102] This concentration setting in the doped semiconductor layer ensures that the electrical transport or carrier generation of the doped semiconductor layer is not affected by the Sb element.

[0103] In some specific embodiments, the doped semiconductor layer 3 is doped with phosphorus, and the phosphorus doping concentration in the doped semiconductor layer 3 is n. 3n And lg(n) 3n / n1) is greater than or equal to 3, n 3n Greater than or equal to 1E18 atoms / cm 3 This further ensures that the doped semiconductor layer is not affected by the Sb element in its electrical transport or carrier generation.

[0104] In some specific embodiments, the doped semiconductor layer 3 is doped with boron, and the doping concentration of boron in the doped semiconductor layer 3 is n. 3p And lg(n) 3p / n1) is greater than or equal to 1.5, n 3p Greater than or equal to 1E17 atoms / cm 3 When doping with boron, this concentration setting ensures that the doped semiconductor layer is not inverted by Sb, or that excessive Sb will affect its carrier separation performance.

[0105] In some specific embodiments, the thickness of the doped semiconductor layer 3 can be 50–300 nm, and the material of the doped semiconductor layer 3 can be selected from one or more of polycrystalline silicon or microcrystalline silicon. Of course, it is understood that the material and thickness of the doped semiconductor layer are not limited to these, and materials and thicknesses known in the prior art can also be used.

[0106] The doped semiconductor layer 3 includes an outer region near the aluminum oxide layer 106, an inner region near the silicon substrate 1, and a middle region located between the outer region and the inner region.

[0107] In some specific embodiments, the peak antimony concentration in the outer region is greater than that in the inner region. The outer region is close to the alumina layer 106, and the electrode is generally disposed on the outer region of the doped semiconductor layer 3. That is, the outer region is generally directly connected to the electrode. The high concentration in the outer region helps the ohmic contact between the doped semiconductor layer and the electrode, which is beneficial to the performance of the battery.

[0108] In some specific embodiments, the peak concentration of antimony in the outer region is the same as the peak concentration of antimony in the alumina layer 106, i.e., n1. This reduces the difficulty of process control.

[0109] In some specific embodiments, the peak antimony concentration in the inner region is n2, where n2 is less than or equal to n1. Preferably, n1 > 2n2. More preferably, n1 > 10n2.

[0110] This ensures that the alumina layer has good mechanical properties, while the Sb element concentration in the inner region is low, reducing the impact of Sb element on the electrical transport or carrier generation of the doped semiconductor layer.

[0111] In some specific implementations, n2 is greater than or equal to 1E15 atoms / cm 3 For example, n² can be 1E¹⁵ atoms / cm². 3 5E15 atoms / cm 3 1E16 atoms / cm 3 5E16 atoms / cm 3 1E17 atoms / cm 3 5E17atoms / cm 3 1E18 atoms / cm 3 5E18 atoms / cm 3 1E19atoms / cm 3 And any value between these values. In some specific implementations, n2 is greater than or equal to 1E16 atoms / cm². 3 .

[0112] In some specific implementation methods, such as Figure 11 and 12 As shown, the solar cell also includes an interface passivation layer 2 located between the silicon substrate 1 and the doped semiconductor layer 3. The interface passivation layer 2 is disposed between the silicon substrate 1 and the doped semiconductor layer 3. The interface passivation layer 2 can further improve the interface passivation effect between the silicon substrate and the doped semiconductor layer.

[0113] Preferably, the thickness of the interface passivation layer 2 can be 0.5–7 nm, and the material of the interface passivation layer 2 can be an oxide, such as silicon oxide, aluminum oxide, or molybdenum oxide. When the interface passivation layer is an oxide and the thickness is 0.5–7 nm, the difficulty of Sb migration can be reduced. When the thickness is less than 0.5 nm, Sb can easily pass through the interface passivation layer, resulting in excessive Sb migration out of the silicon substrate; at the same time, due to the thinner thickness, the passivation capability of the interface passivation layer is also reduced; while when the thickness is greater than 7 nm, it is more difficult for Sb to pass through the interface passivation layer, and the process control is more difficult.

[0114] In some specific embodiments, when the alumina layer also contains boron, the concentration of antimony in the alumina layer is higher than the concentration of boron.

[0115] or,

[0116] When the alumina layer also contains phosphorus, the concentration of antimony in the alumina layer is higher than the concentration of phosphorus, or...

[0117] When the hydrogen passivation layer also contains boron, the concentration of antimony in the hydrogen passivation layer is higher than the concentration of boron.

[0118] or,

[0119] When the hydrogen passivation layer also contains phosphorus, the concentration of antimony in the hydrogen passivation layer is higher than the concentration of phosphorus.

[0120] This prevents excessive migration of boron or phosphorus from the doped semiconductor layer, thus ensuring the quality of the doped semiconductor layer.

[0121] In some specific embodiments, the surface of the silicon substrate 1 of the solar cell is divided into an N-region and a P-region; the doped semiconductor layer in the N-region is a phosphorus-doped semiconductor layer; the doped semiconductor layer in the P-region is a boron-doped semiconductor layer; and the phosphorus concentration in the phosphorus-doped semiconductor layer is n. 3n The boron concentration in the boron-doped semiconductor layer is n. 3p In the N region, the peak concentration of antimony in the alumina layer is n. 1n In the P region, the peak concentration of antimony in the alumina layer is n. 1p And lg(n) 3p / n 1p ) <lg(n 3n / n 1n ).

[0122] When boron is doped, this concentration setting ensures that the doped layer will not be inverted by Sb.

[0123] In some specific implementations, n 1n >n 1p .

[0124] In some specific embodiments, in the N region, the peak concentration of antimony in the inner region is n. 2n In the P region, the peak concentration of antimony in the inner region is n. 2p ;n 2n> n 2p .

[0125] In the P-region, since Sb is a Group 5 element (n-type dopant), excessive Sb introduction into the P-region will not improve carrier transport efficiency; instead, it will act as a recombination center. Reducing the Sb concentration in this region helps to reduce recombination in the critical emitter region. In the N-region, since Sb itself is n-type, a high concentration of Sb improves the field region carrier transport efficiency and enhances battery performance.

[0126] In some specific implementations, the Sb concentration in the edge region and the middle region of the battery differs in each layer (e.g., aluminum oxide layer, silicon nitride layer, P-type doped semiconductor layer, N-type doped semiconductor layer), with a lower Sb concentration in the middle region and a relatively higher Sb concentration at the edge near the side of the battery.

[0127] Those skilled in the art will understand that the solar cells of this application may cover those having Figure 9-12 Various types of solar cells with the structures shown can be used as long as the cell structure and the antimony concentration in the alumina layer meet the above requirements. For example, the solar cells mentioned in this application can be TopCon cells, partial TopCon cells, back-contact cells, HPBC cells, etc.

[0128] Depending on the type of solar cell, the aforementioned alumina layer and hydrogen passivation layer can be included in different solar cells, and the structures of these solar cells are as follows: Figure 2-4 As shown in 6-8 and 13.

[0129] It is understandable that the Sb concentration in the alumina layer can be controlled by adjusting the Sb concentration in other layers of the battery manufacturing process, the process temperature, and the process duration.

[0130] like Figure 2 As shown, the solar cell includes: a silicon substrate 1 containing antimony, and a doped semiconductor layer 3 formed on the silicon substrate 1. An alumina layer (not shown) is disposed on the doped semiconductor layer 3. A hydrogen passivation layer (not shown) may be further disposed on the alumina layer. The concentrations of antimony in the alumina layer and the hydrogen passivation layer are as described above. The doped semiconductor layer 3 includes an outer region near the alumina layer, an inner region 4 near the silicon substrate 1, and a middle region located between the outer region and the inner region. The peak concentration of antimony in the outer region is greater than the peak concentration of antimony in the inner region 4; or the peak concentration of antimony in the outer region is the same as the peak concentration of antimony in the alumina layer. The peak concentration of antimony in the inner region 4 is n2, and n2 is less than or equal to n1, for example, it can be greater than or equal to 1E15 atoms / cm². 3 .

[0131] The peak concentration of antimony in inner region 4 is greater than or equal to 1E15 atoms / cm 3This can reduce the proportion of bubbles in the doped semiconductor layer in existing technologies, and can also address the passivation problem and electrical transport of the doped semiconductor layer, while improving the mechanical properties of the cell, thereby increasing the efficiency of the solar cell.

[0132] In some specific embodiments, the concentration of antimony in the silicon substrate 1 is α, and the range of α is 1E13 to 1E18 atoms / cm³. 3 For example, it could be 1E13 atoms / cm 3 5E13 atoms / cm 3 1E14 atoms / cm 3 5E14 atoms / cm 3 1E15 atoms / cm 3 5E15 atoms / cm 3 1E16atoms / cm 3 5E16 atoms / cm 3 1E17 atoms / cm 3 5E17 atoms / cm 3 1E18atoms / cm 3 , and any value between these values.

[0133] Since the Sb element doping in the silicon substrate 1 of this application has low concentration and few defects, it can improve the charge mobility of the silicon substrate and reduce the resistivity of the silicon substrate; secondly, Sb element can reduce the differentiation of silicon band edge energy levels caused by doping, and Sb element has a high doping ionization rate.

[0134] In some specific embodiments, the concentration of antimony in inner region 4 is greater than or equal to 1E15 atoms / cm³. 3 The thickness d1 of the region is 2nm or more, for example, it can be 2nm, 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, or any value between these values.

[0135] In some specific implementations, a / n2 is defined as u, where u ranges from 0.8 to 1E10. For example, it can be 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, and any value between these values.

[0136] In some specific embodiments, u is 2 to 1E9. In some specific embodiments, u is 10 to 1E8. In some specific embodiments, u is 100 to 1E7.

[0137] In one specific embodiment, the solar cell is a TopCon cell, which has the following characteristics: Figure 2 The structure shown typically includes a TopCon cell comprising: a silicon substrate 1 containing antimony; an interface passivation layer 2 formed on the silicon substrate 1; a doped semiconductor layer 3 formed on the interface passivation layer 2; and an aluminum oxide layer disposed on the doped semiconductor layer 3 (not shown), where n1 is greater than or equal to 1E15 atoms / cm². 3 The doped semiconductor layer 3 has an antimony-forming inner region 4 in at least a portion of its area near the silicon substrate 1, wherein the peak concentration of antimony in the inner region 4 is n2, and n2 is greater than or equal to 1E15 atoms / cm. 3 The doped semiconductor layer 3 can be a P-type doped semiconductor layer or an N-type doped semiconductor layer.

[0138] In a specific way, such as Figure 2 The structure shown is formed on the front or back side of a silicon substrate. When Figure 2 When the structure shown is formed on the back side of a silicon substrate, an interface passivation layer is disposed on the back side of the silicon substrate, and a P-type doped semiconductor layer or an N-type doped semiconductor layer is disposed on the side of the interface passivation layer facing away from the silicon substrate. That is, the doped semiconductor layer and the interface passivation layer are formed on the back side of the silicon substrate, forming a PN junction with the silicon substrate. In this case, because the antimony-doped silicon substrate has fewer interstitial doping sites, less recombination occurs. Figure 2 The TopCon structure shown has an advantage in battery performance when the emitter is located on the back.

[0139] In one specific implementation, the solar cell is a localized TopCon cell. For example... Figure 3 As shown, a partial TopCon cell includes: a silicon substrate 1 containing antimony; a first interface passivation layer 21 and a second interface passivation layer 22, respectively formed on opposite sides of the silicon substrate 1; a first doped semiconductor layer 31 and a second doped semiconductor layer 32, both doped semiconductor layers formed on the side of the first interface passivation layer 21 away from the silicon substrate 1 and the side of the second interface passivation layer 22 away from the silicon substrate 1, respectively; the area of ​​the first doped semiconductor layer 31 is smaller than or larger than the area of ​​the second doped semiconductor layer 32; an aluminum oxide layer (not shown) is disposed on the first doped semiconductor layer 31 and the second doped semiconductor layer 32; and n1 is greater than or equal to 1E15 atoms / cm. 3 .exist Figure 3The diagram illustrates a configuration where a first doped semiconductor layer 31 is formed on a portion of the silicon substrate 1, and a second doped semiconductor layer 32 is formed on the entire silicon substrate 1. However, those skilled in the art will fully understand that such a structure is merely exemplary. Those skilled in the art can design their own structures based on their understanding of localized TopCon cells.

[0140] The first doped semiconductor layer 31 is doped with a Group 3 element, and the second doped semiconductor layer 32 is doped with a Group 5 or Group 6 element. Specifically, the first doped semiconductor layer 31 has at least a portion of an antimony-containing first inner region 41 on the side closest to the first interface passivation layer 21, and the second doped semiconductor layer 32 has at least a portion of an antimony-containing second inner region 42 on the side closest to the second interface passivation layer 22. The peak concentration of antimony in the first inner region 41 is n. 2p And n 2p Greater than or equal to 1E15 atoms / cm 3 The peak concentration of antimony in the second inner region 42 is n. 2n And n 2n Greater than or equal to 1E15 atoms / cm 3 .

[0141] Those skilled in the art will understand that the concentration and distribution of antimony and doping elements in the first interface passivation layer 21 and the second interface passivation layer 22, as well as the first doped semiconductor layer 31 and the second doped semiconductor layer 32, all satisfy the above description of the interface passivation layer and the doped semiconductor layer.

[0142] The antimony concentration in the inner region of the first doped semiconductor layer 31 gradually decreases from the side closer to the silicon substrate 1 to the side opposite to the silicon substrate 1, and the antimony concentration in the inner region of the second doped semiconductor layer 32 gradually decreases from the side closer to the silicon substrate 1 to the side opposite to the silicon substrate 1.

[0143] In one specific implementation, the solar cell is a back-contact cell. Figure 4 , 6-7.13 illustrates the structures of several typical back-contact batteries. A back-contact battery includes: a silicon substrate 1 containing antimony; a first interface passivation layer 21 and a second interface passivation layer 22, respectively formed on one side of the silicon substrate 1; a first doped semiconductor layer 31 and a second doped semiconductor layer 32, both doped semiconductor layers formed on the side of the first interface passivation layer 21 away from the silicon substrate 1 and the side of the second interface passivation layer 22 away from the silicon substrate 1, respectively; the first doped semiconductor layer 31 is doped with a Group 3 element, and the second doped semiconductor layer 32 is doped with a Group 5 or Group 6 element. Specifically, the first doped semiconductor layer 31 has at least a portion of an antimony-containing first inner region 41 on the side closest to the first interface passivation layer 21, and the second doped semiconductor layer 32 has at least a portion of an antimony-containing second inner region 42 on the side closest to the second interface passivation layer 22. The peak concentration of antimony in the first inner region 41 is n. 2p And n 2p Greater than or equal to 1E15 atoms / cm 3 The peak concentration of antimony in the second inner region 42 is n. 2n And n 2n Greater than or equal to 1E15 atoms / cm 3 The first interface passivation layer 21 and the first doped semiconductor layer 31 form a P-type region, and the second interface passivation layer 22 and the second doped semiconductor layer 32 form an N-type region.

[0144] The concentrations and distributions of antimony and doping elements in the silicon substrate 1, the first interface passivation layer 21 and the second interface passivation layer 22, as well as the first doped semiconductor layer 31 and the second doped semiconductor layer 32, can be found in the above description of the local TOPCon cell.

[0145] In a specific way, targeting Figure 4 , 6 In the batteries shown in -7 and -13, the concentration of antimony in the first inner region is greater than or equal to 1E15 atoms / cm³. 3 The thickness d of the region 1p The concentration of antimony in the second inner region is greater than or equal to 1E15 atoms / cm³. 3 The thickness d of the region 1n , that is, d 1p ≥d 1n .

[0146] like Figure 4 , 6 As shown in -7 and 13, there is an interval between the p-type region and the n-type region.

[0147] Figure 13 A back-contact battery structure with an aluminum oxide layer and a hydrogen passivation layer is shown. Figure 13In the battery shown, a first aluminum oxide layer 1061 is disposed on the first doped semiconductor layer 31, and a first hydrogen passivation layer 1071 is disposed on the first aluminum oxide layer 1061. A second aluminum oxide layer 1062 is disposed on the second doped semiconductor layer 32, and a second hydrogen passivation layer 1072 is disposed on the second aluminum oxide layer 1062. The peak concentration of antimony in the first aluminum oxide layer 1061 and the second aluminum oxide layer 1062 is greater than or equal to 1E15 atoms / cm³. 3 .

[0148] in, Figure 5 This is a SIMS detection image of the P region of a TBC battery according to an embodiment of this application. The horizontal axis represents depth in micrometers; the vertical axis represents elemental concentration in atoms / cm². 3 . Figure 5 The upper curve represents the concentration curve of element B, and the lower curve represents the concentration curve of element Sb.

[0149] In one specific implementation, the solar cell is a back-contact cell with an HPBC structure. For example... Figure 8 As shown, the HPBC structure back contact cell includes: a silicon substrate 1 containing antimony, an interface passivation layer 2 formed on the silicon substrate 1, a doped semiconductor layer 3 formed on the interface passivation layer 2 and being an N-type doped semiconductor layer to form an N-type region, and an aluminum oxide layer disposed on the doped semiconductor layer 3 (not shown), where n1 is greater than or equal to 1E15 atoms / cm². 3 A P-region electrode 11 is formed on one side of the silicon substrate having an N-type doped semiconductor layer and is spaced apart from the N-type doped semiconductor layer, and a BSF layer is formed in the silicon substrate 1 corresponding to the P-region electrode 11, wherein the BSF layer and the P-region electrode have the same metal element.

[0150] The P-region electrode can be a metal electrode known in the art that can form a P-region, such as an aluminum electrode.

[0151] This application also provides a photovoltaic module, which includes any of the above-mentioned solar cells.

[0152] Example

[0153] This application provides a general and / or specific description of the materials and test methods used in the experiments. In the following examples, unless otherwise specified, % represents wt%, i.e., weight percentage. Reagents or instruments used, unless otherwise specified, are all commercially available conventional reagent products.

[0154] experimental group

[0155] The Sb-doped silicon wafer is polished with KOH, and a tunneling layer and a doped poly layer are prepared on the back of the cell. Then, various residues on the surface are removed by cleaning, followed by the preparation of alumina, silicon nitride and electrodes.

[0156] Alumina was prepared using the ALD process, with trimethylammonium hydroxide and water as the source materials, and the deposition temperature was 200℃.

[0157] A silicon nitride layer was deposited on the outer surface of the alumina layer using the PECVD process at a deposition temperature of 500°C. The source materials used were silane and ammonia.

[0158] Metal grid lines are printed using Ag paste screen printing technology, followed by high-temperature sintering with a peak sintering temperature of 600-900℃.

[0159] One of the obtained batteries was sampled for testing, and Sb was detected in the alumina layer. PL testing was then performed to observe the scratches on the alumina.

[0160] Comparison Group 1

[0161] Unlike the experimental group, the silicon nitride deposition temperature was 300℃; local patterning was performed using etching paste, and then low-temperature silver paste was printed on it, which was then dried and cured at 200-300℃ to complete the electrode preparation.

[0162] One of the obtained batteries was sampled for testing, and no Sb was detected in the alumina layer. PL testing was performed to analyze the scratches on the alumina.

[0163] Comparison Group 2

[0164] Unlike the experimental group, a phosphorus-doped silicon wafer was used.

[0165] The obtained batteries were subjected to PL testing and analysis to observe the scratches on the aluminum oxide.

[0166] Table 1

[0167]

[0168]

[0169] Comparison group 2 used P-doped silicon wafers, while comparison group 1 used Sb-doped silicon wafers; however, due to the manufacturing process, their alumina layers also did not contain Sb. Table 1 shows that the batteries in the experimental group containing Sb alumina had a significantly lower scratch rate compared to comparison groups 1-2.

[0170] Although the embodiments of this application have been described above in conjunction with the specific embodiments described, this application is not limited to the specific embodiments and application fields described above. The specific embodiments described above are merely illustrative and instructive, and not restrictive. Those skilled in the art can make many other forms based on the teachings of this specification and without departing from the scope of protection of the claims of this application, and these are all within the scope of protection of this application.

Claims

1. A solar cell comprising: A silicon substrate containing antimony; An aluminum oxide layer is formed on a silicon substrate; A hydrogen passivation layer covering the alumina layer, the hydrogen passivation layer containing antimony; The alumina layer contains antimony, and the thickness of the alumina layer is 4nm-20nm.

2. The solar cell according to claim 1, wherein, The peak concentration of antimony in the alumina layer is n1, and n1 is greater than or equal to 1E15 atoms / cm. 3 .

3. The solar cell according to claim 2, wherein, n1 is greater than or equal to 1E16 atoms / cm 3 .

4. The solar cell according to claim 1, wherein, The hydrogen passivation layer is a silicon nitride layer; the hydrogen passivation layer includes an antimony-rich layer located near the aluminum oxide layer; In the antimony-rich layer, the concentration of antimony decreases from the direction closest to the silicon substrate to the direction furthest from the silicon substrate.

5. The solar cell according to claim 1, wherein, The antimony concentration in the hydrogen passivation layer is greater than or equal to 1E16 atoms / cm³. 3 The thickness of the region is d 10 And the thickness of the hydrogen passivation layer is d 20 d 10 / d 20 ≤0.

6.

6. The solar cell according to claim 1, wherein, A doped semiconductor layer is disposed on the side of the alumina layer near the silicon substrate, and the doped semiconductor layer is doped with a doping element; the doping element is phosphorus or boron. The doping concentration of the doped element is n3, and lg(n3 / n1)≥1.

5.

7. The solar cell according to claim 6, wherein, When the dopant element is phosphorus, the phosphorus doping concentration in the doped semiconductor layer is n. 3n And lg(n) 3n / n1) ≥3, n 3n Greater than or equal to 1E18 atoms / cm 3 ; or, When the doping element is boron, the boron doping concentration in the doped semiconductor layer is n. 3p And lg(n) 3p / n1) ≥1.5, n 3p Greater than or equal to 1E17 atoms / cm 3 .

8. The solar cell according to claim 6, wherein, The doped semiconductor layer includes an outer region near the alumina layer, an inner region near the silicon substrate, and a middle region located between the outer region and the inner region. The peak concentration of antimony in the outer region is greater than the peak concentration of antimony in the inner region; or The peak concentration of antimony in the outer region is the same as the peak concentration of antimony in the alumina layer.

9. The solar cell according to claim 8, wherein, In the doped semiconductor layer, the peak antimony concentration in the inner region is n2, where, n2 is less than or equal to n1.

10. The solar cell according to claim 9, wherein, n1>2n2.

11. The solar cell according to claim 9, wherein, n1>10n2.

12. The solar cell according to claim 9, wherein, n2 is greater than or equal to 1E15 atoms / cm 3 .

13. The solar cell according to claim 12, wherein, n² is greater than or equal to 1E16 atoms / cm 3 .

14. The solar cell according to claim 6, wherein, The doped semiconductor layer is a polycrystalline silicon layer or a microcrystalline silicon layer; The solar cell also includes an interface passivation layer located between the silicon substrate and the doped semiconductor layer.

15. The solar cell according to claim 14, wherein, The thickness of the interface passivation layer is 0.5-7 nm, and the interface passivation layer is an oxide layer.

16. The solar cell according to claim 1, wherein, When the alumina layer also contains boron, the concentration of antimony in the alumina layer is higher than the concentration of boron; or, When the alumina layer also contains phosphorus, the concentration of antimony in the alumina layer is higher than the concentration of phosphorus; or, When the hydrogen passivation layer also contains boron, the concentration of antimony in the hydrogen passivation layer is higher than the concentration of boron; or, When the hydrogen passivation layer also contains phosphorus, the concentration of antimony in the hydrogen passivation layer is higher than the concentration of phosphorus.

17. The solar cell according to claim 1, wherein, A doped semiconductor layer is disposed on the side of the alumina layer near the silicon substrate, and the doped semiconductor layer is doped with a doping element; the surface of the silicon substrate is divided into an N-region and a P-region; the doped semiconductor layer located in the N-region is a phosphorus-doped semiconductor layer. The doped semiconductor layer located in the P region is a boron-doped semiconductor layer; The phosphorus concentration in the phosphorus-doped semiconductor layer is n 3n The boron concentration in the boron-doped semiconductor layer is n. 3p , In the N region, the peak concentration of antimony in the alumina layer is n. 1n ; In the P region, the peak concentration of antimony in the alumina layer is n. 1p ; And lg(n) 3p / n 1p ) <lg(n 3n / n 1n ).

18. The solar cell according to claim 17, wherein, n 1n >n 1p ;or In the N region, the peak concentration of antimony in the inner region is n. 2n ; In the P region, the peak concentration of antimony in the inner region is n. 2p ; n 2n > n 2p 。 19. The solar cell of claim 6, further comprising: In the doped semiconductor layer, the antimony concentration in the inner region gradually decreases from the side closer to the silicon substrate to the side farther from the silicon substrate. The peak concentration of antimony in the inner region is n2, and n2 is greater than or equal to 1E15 atoms / cm². 3 .

20. The solar cell according to claim 19, wherein, The concentration of antimony in the silicon substrate is denoted as 'a', where 'a' ranges from 1E13 to 1E18 atoms / cm³. 3 ;or The concentration of antimony in the inner region is greater than or equal to 1E15 atoms / cm³. 3 The thickness d1 of the region is greater than 2nm.

21. The solar cell according to claim 20, wherein, Define a / n2 as u, where u ranges from 0.8 to 1E10.

22. A photovoltaic module comprising the solar cell according to any one of claims 1 to 21.

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