A macro-intra identifier location information acquisition method, electronic equipment and medium
By setting up macro virtual files for chip design code and calculating column and row position offsets, the problem of difficulty in identifying identifier position information within macros is solved, enabling fast and accurate acquisition of position information.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-06
- Publication Date
- 2026-04-10
AI Technical Summary
In chip design code, it is difficult to identify the location information of macro identifiers. Existing technologies cannot accurately and quickly obtain the location information of macro identifiers in macro expanded text.
For each macro reference in the original chip design code file, a macro virtual file is set up. When loading, the initial position information is obtained. When expanding the text, the position information of the identifier within the macro in the expanded macro text is obtained based on the initial position information. Accurate position information is generated by calculating the column position offset and the row position offset.
This technology enables accurate and rapid acquisition of macro identifier location information, improves the processing efficiency of macro identifier location information, and provides a foundation for subsequent macro identifier location.
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Figure CN121300757B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of macro text processing, and in particular to a macro-in-identifier position information acquisition method, an electronic device and a medium. BACKGROUND
[0002] In chip design code, in order to facilitate text replacement of the code, a large number of macro texts are usually used to participate in design programming. The macro text content is various, and specifically includes signal, parameter, model, function, task, instance and other target macro-in-identifier. The complexity of the macro can be from basic text replacement to whole replacement of very complex model or function, and the reference position is also various. Moreover, since the macro text in the chip design code original file only exists in the form of macro reference, the replacement content needs to be dynamically loaded after macro expansion. Therefore, the position information of the macro-in-identifier in the macro expansion text is inconsistent with the chip design code original file, and is relative position information, which also causes difficulty in identifying the macro-in-identifier. Therefore, how to accurately and quickly acquire the macro-in-identifier position information in the macro expansion text becomes a technical problem to be solved. SUMMARY
[0003] The present application aims to provide a macro-in-identifier position information acquisition method, an electronic device and a medium, which can accurately and quickly acquire the macro-in-identifier position information.
[0004] According to a first aspect of the present application, a macro-in-identifier position information acquisition method is provided, comprising:
[0005] A corresponding macro virtual file is set for each macro reference in the chip design code original file, the macro virtual file includes a macro virtual file identifier, a macro initial expansion text, a macro-in-identifier initial line number and a macro-in-identifier initial column number range, the macro-in-identifier initial line number is the line number of the macro-in-identifier in the macro initial expansion text, and the macro-in-identifier initial column number range is the column number range of the macro-in-identifier in the macro initial expansion text;
[0006] The chip design code original file is loaded, and the initial position information of each macro-in-identifier is acquired based on the corresponding macro virtual file of each macro reference, the initial position information includes a macro virtual file identifier, a macro-in-identifier initial line number and a macro-in-identifier initial column number range;
[0007] Each target macro reference in the target code line in the chip design code original file is expanded, and a target macro expansion text is acquired;
[0008] obtaining column position offset and row position offset corresponding to each target macro reference based on the target macro expansion text and macro initial expansion text of each target macro reference, wherein the column position offset equals to column offset of the first macro inner identifier in the target macro expansion text and in the macro initial expansion text of the target macro reference;
[0009] generating position information of the macro inner identifier in the target macro expansion text based on the column position offset, the row position offset and initial position information of the macro inner identifier in each target macro reference.
[0010] Further, if the target code line includes only one target macro reference, obtaining column position offset and row position offset corresponding to each target macro reference based on the target macro expansion text and macro initial expansion text of each target macro reference, comprising:
[0011] obtaining starting column number M of the target macro reference in the target code line;
[0012] setting column position offset corresponding to the target macro reference as M-1;
[0013] setting row position offset corresponding to the target macro reference as 0.
[0014] Further, if the target code line includes N target macro references and there is no line break in the target macro references, and N is an integer greater than or equal to 2, obtaining column position offset and row position offset corresponding to each target macro reference based on the target macro expansion text and macro initial expansion text of each target macro reference, comprising:
[0015] obtaining starting column number M1 of the first target macro reference in the target code line;
[0016] setting column position offset F1 corresponding to the first target macro reference as M1-1;
[0017] obtaining starting column number M n of the nth target macro reference in the target code line, wherein n is an integer within the range of 2 to N;
[0018] obtaining difference P i between macro initial expansion text of the ith target macro reference and length of macro reference text in the target code line, and obtaining sum Q i of all P n , wherein i is an integer within the range of 1 to n-1;
[0019] setting column position offset F n corresponding to the nth target macro reference as Q n +M n -1;
[0020] Set the line position offset corresponding to each target macro reference to 0.
[0021] Furthermore, if the target code line includes N target macro references, and the target macro references contain newline characters, where N is an integer greater than or equal to 2, then based on the expanded text of the target macro and the initial expanded text of each target macro reference, the column position offset and row position offset corresponding to each target macro reference are obtained, including:
[0022] Retrieve the starting column number M of the nth target macro reference in the target code line. n And the initial expanded text length R of the macro referenced by the nth target macro. n n is an integer in the range of 1 to N;
[0023] If n=1, then the column position offset F corresponding to the nth target macro reference will be set. n Set to M n -1, which sets the line offset U corresponding to the nth target macro reference. n Set to 0;
[0024] If n>1, then obtain the length difference P between the initial expanded text of the i-th target macro reference and the length of the macro reference text in the target code line. i and obtain all P i and Q n i is an integer from 1 to n-1;
[0025] If n>1, then obtain the length t of the text in the expanded target macro text from the starting point of the expanded target macro text to the newline character closest to the nth target macro reference. n The column offset F corresponding to the nth target macro reference. n Set to Q n +M n -1-t n-1 .
[0026] Furthermore, the step of generating the position information of the macro identifier within each target macro reference in the expanded text of the target macro reference based on the column position offset, row position offset, and initial position information of the macro identifier within each target macro reference includes:
[0027] The column number range of the identifier in the first row of each macro within each target macro reference is generated by adding the boundary value of the initial column number range of the identifier in the first row of each target macro reference to the column position offset corresponding to the target macro reference.
[0028] The initial column number range of the identifiers within the non-first line of the macro referenced by each target macro is directly determined as the column number range of the identifiers within the non-first line of the macro referenced by the target macro in the expanded text of the target macro.
[0029] If the line position offset corresponding to the target macro reference is 0, the initial line number of the macro-internal identifier of the target macro reference is directly determined as the line number of the macro-internal identifier of the target macro reference in the target macro expansion text;
[0030] If the line position offset corresponding to the target macro reference is not 0, the initial line number of the macro-internal identifier of the target macro reference is added to the value of the corresponding line position offset to determine the line number of the macro-internal identifier of the target macro reference in the target macro expansion text.
[0031] Further, if there is no line break in the target macro reference in the target code line, the corresponding target macro expansion text is located in the same line.
[0032] Further, in the process of loading the chip design code original file, the method further includes:
[0033] The code region identifier corresponding macro-internal identifier storage information is generated based on the macro virtual file corresponding to each macro reference, the code region corresponding macro-internal identifier storage information includes a code region identifier and corresponding first-level mapping information, the first-level mapping information includes at least one second-level mapping information, the second-level mapping information includes a macro virtual file identifier and third-level mapping information, the third-level mapping information includes a corresponding line number in the macro expansion text and a corresponding macro-internal identifier list, the macro-internal identifier list includes at least one macro-internal identifier information, the macro-internal identifier information includes a binding object, first position information and second position information, the first position information includes a code region identifier where the macro corresponding to the macro-internal identifier is located, a line number of the macro corresponding to the macro-internal identifier in the chip design code original file, a column number range of the macro corresponding to the macro-internal identifier in the chip design code original file, and the second position information includes a macro virtual file identifier and initial position information corresponding to the macro-internal identifier.
[0034] Further, after the position information of the macro-internal identifier in the target macro expansion text in the target macro reference is generated, the method further includes:
[0035] The initial position information corresponding to the macro-internal identifier in the second position information of the macro-internal identifier in the corresponding macro-internal identifier storage information in the target macro reference is updated to the position information in the target macro expansion text.
[0036] According to the second aspect of the present application, an electronic device is provided, including at least one processor, and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method according to the first aspect of the present application.
[0037] According to a third aspect of the present application, a computer readable storage medium is provided, which stores computer executable instructions for performing the method according to the first aspect of the present application.
[0038] The present application has obvious advantages and beneficial effects compared with the prior art. The macro-in-identifier position information acquisition method, the electronic device and the medium provided by the present application can achieve considerable technical progress and practicability, and have wide industrial utilization value, and at least have the following beneficial effects:
[0039] The present application sets a corresponding macro virtual file for each macro reference in the chip design code original file, acquires initial position information of each macro-in-identifier based on the macro virtual file when loading the chip design code original file, and acquires position information of the macro-in-identifier in the macro expansion text based on the expansion text and the initial position information of the macro-in-identifier when expanding the macro text, so that the macro-in-identifier position information can be accurately and quickly acquired. BRIEF DESCRIPTION OF DRAWINGS
[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0041] Figure 1 The macro-in-identifier position information acquisition method flowchart provided by the embodiments of the present application is shown in the following. DETAILED DESCRIPTION
[0042] The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings of the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, but not all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.
[0043] The embodiments of the present application provide a macro-in-identifier position information acquisition method, as shown in the following, which comprises the following steps. Figure 1
[0044] Step S1, set a corresponding macro virtual file for each macro reference in the chip design code original file, the macro virtual file comprises a macro virtual file identifier, a macro initial expansion text, a macro-in-identifier initial line number and a macro-in-identifier initial column number range, the macro-in-identifier initial line number is the line number of the macro-in-identifier in the macro initial expansion text, and the macro-in-identifier initial column number range is the column number range of the macro-in-identifier in the macro initial expansion text.
[0045] The chip design code original file refers to a code file generated based on a hardware description language. The hardware description language can be Verilog, SystemVerilog, VHDL, or the like. The macro-internal identifier refers to an identifier contained in the macro expansion text. The macro-internal identifier can be a signal, a parameter, a model, a function, a task, an instance, or the like. It can be understood that a macro with the same name can be used in different positions, that is, corresponding to different macro references, and each macro reference needs to be set with a corresponding macro virtual file. The column number range refers to a range composed of a starting column number and an ending column number in the text.
[0046] In step S2, the chip design code original file is loaded, and initial position information of each macro-internal identifier is obtained based on the macro virtual file corresponding to each macro reference. The initial position information includes a macro virtual file identifier, a macro-internal identifier initial line number, and a macro-internal identifier initial column number range.
[0047] It should be noted that the chip design code original file can be divided into multiple code regions. Loading the chip design code original file can be loading the chip design code original file in the display interface, and one or more code regions in the chip design code original file can be loaded. Processing the macro-internal identifier position information according to the code region can improve the processing efficiency of the macro-internal identifier position information.
[0048] In step S3, each target macro reference in the target code line in the chip design code original file is expanded, and a target macro expansion text is obtained.
[0049] The target code line refers to any code line containing a macro reference in the chip design code original file. The target code line can include one or more macro references. The macro reference in the target code line is a target macro reference.
[0050] In step S4, the column position offset and the line position offset corresponding to each target macro reference are obtained based on the target macro expansion text and the macro initial expansion text of each target macro reference. The column position offset is equal to the column offset of the first macro-internal identifier in the target macro expansion text and in the macro initial expansion text.
[0051] It should be noted that after the macro reference in the target code line is expanded, there can be non-macro-internal text in the target code line, and there can be multiple macro references. Therefore, the position information of the macro-internal identifier in the expanded target code line will be offset relative to the macro initial expansion text. Therefore, the column position offset and the line position offset corresponding to each target macro reference need to be obtained to obtain the position information of the macro-internal identifier in the target macro expansion text.
[0052] The macro reference in the target code line is expanded, only the column position information of the macro inner identifier in the first line (i.e. the first line) of the macro initial expansion text is affected, if there are multiple lines in the macro initial expansion text, the macro reference in the target code line will not affect the column position information of the macro inner identifier in the non-first line of the macro initial expansion text. And the column offset of the macro inner identifier in the first line of the macro initial expansion text in the target macro expansion text is equal to the column offset of the first macro inner identifier of the target macro reference in the target macro expansion text and in the macro initial expansion text. Therefore, the column position offset can be directly set to equal to the column offset of the first macro inner identifier of the target macro reference in the target macro expansion text and in the macro initial expansion text.
[0053] The row position offset of each target macro reference is equal to the row offset of the first line of the macro inner identifier in the target macro expansion text and in the macro initial expansion text, so the row position offset can be directly set to equal to the row offset of the first line of the macro inner identifier of the target macro reference in the target macro expansion text and in the macro initial expansion text.
[0054] Step S5, based on the column position offset corresponding to each target macro reference, the row position offset and the initial position information of the macro inner identifier in each target macro reference, the position information of the macro inner identifier in each target macro reference in the target macro expansion text is generated.
[0055] It should be noted that based on the column position offset corresponding to each target macro reference, the row position offset and the initial position information of the macro inner identifier in each target macro reference, the accurate position information of the macro inner identifier in each target macro reference in the target macro expansion text can be obtained, which provides a basis for subsequent positioning of the macro inner identifier in the target macro reference.
[0056] It should be noted that if there is no line break in the target macro reference in the target code line, the corresponding target macro expansion text is located in the same line.
[0057] The following three embodiments are used to further illustrate the acquisition of the column position offset and the row position offset corresponding to each target macro reference.
[0058] Embodiment one,
[0059] If the target code line only includes one target macro reference, the step S4 includes:
[0060] Step S41, the starting column number M of the target macro reference in the target code line is obtained.
[0061] Step S42, the column position offset corresponding to the target macro reference is set to M-1.
[0062] It should be noted that, for the case that the target code line includes only one target macro reference, the first macro-in-identifier in the target macro reference in the target macro expansion text is the same as that in the macro initial expansion text, and the column position offset of the target macro reference is set as the length of the non-macro text before the target macro reference in the target code line, i.e., M-1.
[0063] Step S43, set the line position offset of the target macro reference as 0.
[0064] It should be noted that, for the case that the target code line includes only one target macro reference, the first macro-in-identifier in the target macro reference in the target macro expansion text is the same as that in the macro initial expansion text, and the line position offset of the target macro reference is set as 0.
[0065] Embodiment Two,
[0066] If the target code line includes N target macro references, and there is no line break in the target macro references, N is an integer greater than or equal to 2, the step S4 includes:
[0067] Step C41, obtain the starting column number M1 of the first target macro reference in the target code line.
[0068] Step C42, set the column position offset F1 of the first target macro reference as M1-1.
[0069] Step C43, obtain the starting column number M n of the nth target macro reference in the target code line, n is an integer in the range of 2 to N.
[0070] Step C44, obtain the length difference P i between the macro initial expansion text of the ith target macro reference and the macro reference text in the target code line, and obtain the sum Q i of all P n , i is an integer in the range of 1 to n-1.
[0071] Step C45, set the column position offset F n of the nth target macro reference as Q n +M n -1.
[0072] It should be noted that, for the case that the target code line includes N target macro references, for the ith target macro reference, the column position offset needs to consider not only the influence of the non-macro text before the ith target macro reference, but also the offset caused by the target macro expansion before the ith target macro reference.
[0073] Step C46: Set the line position offset corresponding to each target macro reference to 0.
[0074] Since there are no newlines in any of the N target macro references, the line position offset for each target macro reference is 0.
[0075] Example 3
[0076] If the target code line includes N target macro references, and the target macro references contain newline characters, where N is an integer greater than or equal to 2, then step S4 includes:
[0077] Step D41: Obtain the starting column number M of the nth target macro reference in the target code line. n And the initial expanded text length R of the macro referenced by the nth target macro. n n is an integer in the range of 1 to N.
[0078] Step D42: If n=1, then set the column offset F corresponding to the nth target macro reference. n Set to M n -1, which sets the line offset U corresponding to the nth target macro reference. n Set to 0.
[0079] Step D43: If n>1, then obtain the length difference P between the initial expanded text of the i-th target macro reference and the macro reference text in the target code line. i and obtain all P i and Q n , where i is an integer from 1 to n-1.
[0080] Step D44: If n>1, then obtain the length t of the text in the expanded target macro text from the starting point of the expanded target macro text to the newline character closest to the nth target macro reference. n The column offset F corresponding to the nth target macro reference. n Set to Q n +M n -1-t n-1 The offset U of the row position corresponding to the nth target macro reference. n Set W n W n Expand the target macro by the number of newline characters preceding the nth target macro reference in the text.
[0081] It should be noted that if there is no newline character before the nth target macro reference, then the corresponding t n= 0. The column position offset of the n-th target macro reference corresponds to the offset of the non-macro text before the n-th target macro reference, the offset of the target macro expansion before the n-th target macro reference, and the text length t of the line break closest to the n-th target macro reference n are jointly determined.
[0082] As an embodiment, the step S5 comprises:
[0083] Step S51, adding the boundary value of the initial column number range of each macro-in-identifier of the first line of each target macro reference to the column position offset corresponding to the target macro reference to generate the column number range of each macro-in-identifier of the first line of each target macro reference in the target macro expansion text.
[0084] Step S52, directly determining the initial column number range of the macro-in-identifier of the non-first line of each target macro reference as the column number range of the macro-in-identifier of the non-first line of the target macro reference in the target macro expansion text.
[0085] Step S53, if the line position offset corresponding to the target macro reference is 0, directly determining the initial line number of the macro-in-identifier of the target macro reference as the line number of the macro-in-identifier of the target macro reference in the target macro expansion text.
[0086] Step S54, if the line position offset corresponding to the target macro reference is not 0, adding the value of the corresponding line position offset to the initial line number of the macro-in-identifier of the target macro reference to determine the line number of the macro-in-identifier of the target macro reference in the target macro expansion text.
[0087] It should be noted that through the steps S51-S54, the accurate position information of the macro-in-identifier in each target macro reference in the target macro expansion text can be obtained, which provides a basis for subsequent positioning of the macro-in-identifier in the target macro reference.
[0088] As an embodiment, the step S2 further comprises, during loading of the chip design code original file:
[0089] Step S20, generating the macro-in-identifier storage information corresponding to the code region identifier based on the macro virtual file corresponding to each macro reference.
[0090] The macro-in-identifier storage information corresponding to the code region includes a code region identifier and corresponding first-level mapping information, the first-level mapping information includes at least one second-level mapping information, the second-level mapping information includes a macro virtual file identifier and third-level mapping information, the third-level mapping information includes a corresponding line number in the macro expansion text and a corresponding macro-in-identifier list, the macro-in-identifier list includes at least one macro-in-identifier information, the macro-in-identifier information includes a binding object, first position information and second position information, the first position information includes a code region identifier where the macro corresponding to the macro-in-identifier is located, a line number in the chip design code original file where the macro corresponding to the macro-in-identifier is located, and a column number range in the chip design code original file where the macro corresponding to the macro-in-identifier is located, and the second position information includes a macro virtual file identifier and initial position information corresponding to the macro-in-identifier.
[0091] As a preferred embodiment, the first-level mapping information, the second-level mapping information and the third-level mapping information can all be implemented in the form of a hash table. The hash table can support fast lookup, greatly improve the lookup efficiency, and provide strong support for the implementation of other functions of the subsequent debug tool.
[0092] The binding object refers to an object that can be identified and support execution of a debug operation. The debug operation specifically includes operations such as lookup, annotation, tracing of link relationships, definition of jumps, etc. The annotation operation can specifically be in the form of operations such as highlighting, frame selection, etc. The position information specifically refers to position information that can accurately locate the macro-in-identifier.
[0093] As an embodiment, the step S5 further includes:
[0094] Step S6: updating the initial position information corresponding to the macro-in-identifier in the second position information in the macro-in-identifier storage information corresponding to the macro-in-identifier in the target macro reference to position information in the target macro expansion text.
[0095] As an embodiment, the step S7 further includes:
[0096] Step S8: obtaining macro-in-identifier position information to be processed, querying the corresponding macro-in-identifier storage information based on the macro-in-identifier position information to be processed, and determining a binding object corresponding to the macro-in-identifier to be processed;
[0097] Step S9: binding the macro-in-identifier to be processed with the corresponding binding object, and executing debug operations such as lookup, annotation, tracing of link relationships, and definition of jumps based on the binding object corresponding to the macro-in-identifier to be processed.
[0098] It should be noted that after the to-be-processed macro-internal identifier is bound to the corresponding binding object, the to-be-processed macro-internal identifier is endowed with the attribute of the corresponding binding object, and the debugging operations such as finding, marking, tracing a link relationship, and defining a jump that can be implemented by the corresponding binding object of the to-be-processed macro-internal identifier can be performed. All the existing ways of implementing the debugging operations such as finding, marking, tracing a link relationship, and defining a jump based on the corresponding binding object of the to-be-processed macro-internal identifier fall within the protection scope of the present application.
[0099] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0100] It should be noted that some of the example embodiments are described as processes or methods that are depicted as flowcharts. Although the processes are described in a particular, sequential order, many of the processes described can be performed concurrently, in parallel, or simultaneously. In addition, the order of the processes can be re-arranged. The processes can terminate when their operations are completed, but can also terminate in response to one or more other process. The processes can correspond to methods, functions, procedures, subroutines, subprograms, etc.
[0101] The electronic device provided by the embodiment of the present application comprises at least one processor and a memory connected with the at least one processor in communication, wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method provided by the embodiment of the present application.
[0102] The computer readable storage medium provided by the embodiment of the present application stores computer executable instructions, and the computer executable instructions are used to execute the method provided by the embodiment of the present application.
[0103] The above is only the preferred embodiment of the present application, and does not limit the present application in any form. Although the present application has been disclosed as the above preferred embodiment, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to the above disclosed technical content to make equivalent embodiments with equivalent changes, but as long as the changes do not deviate from the technical solution of the present application, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application are still within the scope of the technical solution of the present application.
Claims
1. A macro-in-cell identifier location information acquisition method characterized by comprising: The method comprises: setting a corresponding macro virtual file for each macro reference in the chip design code original file, the macro virtual file comprising a macro virtual file identifier, a macro initial expansion text, a macro internal identifier initial line number, and a macro internal identifier initial column number range, the macro internal identifier initial line number being the line number of the macro internal identifier in the macro initial expansion text, and the macro internal identifier initial column number range being the column number range of the macro internal identifier in the macro initial expansion text; loading the chip design code original file, and obtaining initial position information of each macro internal identifier based on the corresponding macro virtual file of each macro reference, the initial position information comprising a macro virtual file identifier, a macro internal identifier initial line number, and a macro internal identifier initial column number range; expanding each target macro reference in a target code line in the chip design code original file to obtain a target macro expansion text; obtaining a column position offset and a line position offset corresponding to each target macro reference based on the target macro expansion text and the macro initial expansion text of each target macro reference, the column position offset being equal to the column offset of the first macro internal identifier in the target macro expansion text relative to the macro initial expansion text; generating position information of the macro internal identifier in the target macro expansion text in each target macro reference based on the column position offset, the line position offset corresponding to each target macro reference, and the initial position information of the macro internal identifier in each target macro reference.
2. The method of claim 1, wherein if the target code line comprises only one target macro reference, the obtaining of the column position offset and the line position offset corresponding to each target macro reference based on the target macro expansion text and the macro initial expansion text of each target macro reference comprises: obtaining a starting column number M of the target macro reference in the target code line; setting the column position offset corresponding to the target macro reference as M-1; setting the line position offset corresponding to the target macro reference as 0.
3. The method of claim 1, wherein if the target code line comprises N target macro references, and there is no line break in the target macro references, N being an integer greater than or equal to 2, the obtaining of the column position offset and the line position offset corresponding to each target macro reference based on the target macro expansion text and the macro initial expansion text of each target macro reference comprises: obtaining a starting column number M1 of the first target macro reference in the target code line; setting the column position offset F1 corresponding to the first target macro reference as M1-1; setting the line position offset corresponding to each target macro reference as 0.
4. The method of claim 1, wherein if the target code line comprises N target macro references, and there is a line break in the target macro references, N being an integer greater than or equal to 2, the obtaining of the column position offset and the line position offset corresponding to each target macro reference based on the target macro expansion text and the macro initial expansion text of each target macro reference comprises: obtaining a start column number M of the nth target macro reference in the target code line n , n is an integer in the range of 2 to N; Obtain the length difference P between the initial expanded text of the i-th target macro reference and the macro reference text in the target code line. i and obtain all P i and Q n i is an integer from 1 to n-1; F n Q n +M n -1; 5. The method of claim 1, wherein obtaining a start column number M of the nth target macro reference in the target code line n and a macro initial expansion text length R of the nth target macro reference n n is an integer in the range of 1 to N. If n = 1, the column position offset F corresponding to the nth target macro reference is set to 0 n Set to M n -1, the row position offset U corresponding to the nth target macro reference is set to 0 n Set to 0; If n>1, then obtain the length difference P between the initial expanded text of the i-th target macro reference and the length of the macro reference text in the target code line. i and obtain all P i and Q n i is an integer from 1 to n-1; If n > 1, obtain the text length t from the start of the target macro expansion text to the nearest line break to the nth target macro reference in the target macro expansion text n , the column position offset F corresponding to the nth target macro reference n is set to Q n + M n - 1 - t n , the row position offset U corresponding to the nth target macro reference n is set to W n , W n is the number of line breaks contained in the target macro expansion text before the nth target macro reference. The generating of the position information of the macro-internal identifier in the target macro expansion text based on the column position offset, the row position offset corresponding to each target macro reference and the initial position information of the macro-internal identifier in each target macro reference comprises: adding the boundary value of the initial column number range of each macro-internal identifier in the first line of each target macro reference to the column position offset corresponding to the target macro reference to generate the column number range of each macro-internal identifier in the first line of each target macro reference in the target macro expansion text; directly determining the initial column number range of the macro-internal identifier in the non-first line of each target macro reference as the column number range of the macro-internal identifier in the non-first line of the target macro reference in the target macro expansion text; if the row position offset corresponding to the target macro reference is 0, directly determining the initial line number of the macro-internal identifier of the target macro reference as the line number of the macro-internal identifier of the target macro reference in the target macro expansion text; if the row position offset corresponding to the target macro reference is not 0, adding the value of the corresponding row position offset to the initial line number of the macro-internal identifier of the target macro reference to determine the line number of the macro-internal identifier of the target macro reference in the target macro expansion text.
6. The method of claim 1, wherein, if there is no line break in the target macro reference in the target code line, the corresponding target macro expansion text is located in the same line.
7. The method of claim 1, wherein, during the loading of the chip design code original file, the method further comprises: generating code region identifier corresponding macro-internal identifier storage information based on the macro virtual file corresponding to each macro reference, the code region identifier corresponding macro-internal identifier storage information comprising a code region identifier and corresponding first-level mapping information, the first-level mapping information comprising at least one second-level mapping information, the second-level mapping information comprising a macro virtual file identifier and third-level mapping information, the third-level mapping information comprising a corresponding line number in the macro expansion text and a corresponding macro-internal identifier list, the macro-internal identifier list comprising at least one macro-internal identifier information, the macro-internal identifier information comprising a binding object, first position information and second position information, the binding object referring to an object that can be identified and supports execution of a debugging operation, the first position information comprising a code region identifier where the macro corresponding to the macro-internal identifier is located, a line number of the macro corresponding to the macro-internal identifier in the chip design code original file, a column number range of the macro corresponding to the macro-internal identifier in the chip design code original file, and the second position information comprising a macro virtual file identifier and initial position information corresponding to the macro-internal identifier.
8. The method of claim 7, wherein, after the generating of the position information of the macro-internal identifier in the target macro expansion text, the method further comprises: updating the initial position information corresponding to the macro-internal identifier in the second position information of the macro-internal identifier in the corresponding macro-internal identifier storage information to the position information in the target macro expansion text.
9. An electronic device, comprising: comprising: at least one processor; and a memory in communication connection with the at least one processor; The memory stores instructions to be executed by the at least one processor, the instructions being arranged to perform the method of any one of the preceding claims 1-8.
10. A computer-readable storage medium, characterized in that, computer executable instructions for performing the method of any one of the preceding claims 1-8.
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