A monomode 660nm semiconductor laser device of superlattice structure and its preparation method

Abstract

The application provides a kind of single-mode 660nm semiconductor laser device of superlattice structure and its preparation method, belongs to the field of optoelectronic technology, adopts multilayer epitaxial structure, from bottom to top includes GaAs substrate and buffer layer, segmented lower confinement layer and lower waveguide layer, multi-quantum well active region, AlInP / GaP superlattice, upper waveguide layer and segmented upper confinement layer, and band gap transition layer and GaAs cap layer. The preparation method covers substrate processing, buffer layer growth, V group source switching, confinement layer and waveguide layer epitaxy, multi-quantum well and superlattice structure growth, and cap layer deposition and other processes. Through the superlattice structure and the segmented design of the confinement layer, the hole injection efficiency and the carrier confinement ability are improved, and the high temperature working characteristics of the device are effectively improved. The stable output of single-mode laser in 660nm waveband is realized, and the reliable power output of 120mW can be maintained at 60℃ high temperature environment, and it also has low loss, high conversion efficiency and excellent photoelectric performance.

Description

Technical Field

[0001] This invention belongs to the field of optoelectronic technology, specifically relating to a single-mode 660nm semiconductor laser device with a superlattice structure and its fabrication method. Background Technology

[0002] Semiconductor lasers have outstanding advantages such as small size, low cost, high efficiency, long lifespan, and wide wavelength coverage. Among them, 660nm semiconductor lasers are widely used in stage displays, medical aesthetics, communications, and industrial measurement.

[0003] In 660nm semiconductor laser devices based on related technologies, the large bandgap difference between the quantum well and the upper waveguide layer presents a high potential barrier when holes are injected from the P-region into the quantum well. Furthermore, lattice mismatch between the quantum well and the waveguide layer easily generates defects, further hindering carrier transport. Due to numerous crystal defects, the consistency of device performance is affected: in traditional processes, oxide layers and organic and inorganic impurities easily remain on the GaAs substrate surface. Moreover, after growing the GaAs buffer layer, the As atoms remaining in the growth chamber compete with P atoms in the subsequent P-based confinement layer for bonding, forming a GaAsP impurity phase.

[0004] The waveguide layer design of related technologies features a discontinuous refractive index gradient, leading to uneven optical field confinement and a large far-field divergence angle for the laser. Optical field leakage intensifies mode competition, making it difficult to stably achieve 660nm single-mode output and affecting its applicability in high-precision applications.

[0005] The large bandgap difference between the upper confinement layer (AlGaInP) and the cap layer (GaAs) in the device leads to stress concentration at the interface, making it prone to cracking. Furthermore, the lack of an effective transition layer design increases carrier recombination losses at the interface. In addition, insufficient doping concentration or surface oxidation of the cap layer results in high electrode contact resistance, which can easily lead to heat generation and aging during long-term operation. Meanwhile, the underlying functional layer is susceptible to corrosion by moisture and oxygen, shortening the device's lifespan. Summary of the Invention

[0006] This invention provides a single-mode 660nm semiconductor laser device with a superlattice structure. By using a superlattice thin layer and a segmented confinement layer, the carrier injection efficiency and confinement capability are improved, thereby enhancing the high-temperature operating characteristics and photoelectric conversion efficiency of the device.

[0007] The single-mode 660nm semiconductor laser device is divided into the following layers from bottom to top: substrate and buffer layer, lower confinement and waveguide layer, quantum well active region, superlattice structure, upper waveguide and confinement layer, and transition layer and cap layer.

[0008] It should be further noted that the substrate and buffer layer include: GaAs substrate and GaAs buffer layer;

[0009] The GaAs substrate is made of GaAs material, and the GaAs buffer layer is disposed on the GaAs substrate.

[0010] The lower confinement and waveguide layer includes: (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1, which serves as the first layer of the segmented confinement layer. By adjusting the Al composition, the conduction band gap is increased, enhancing the carrier confinement capability.

[0011] (Alx2Ga1-x2)y2In1-y2P lower confinement layer-2 is above (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1;

[0012] The lower waveguide layer (Alx3Ga1-x3)y3In1-y3P is located above the lower confinement layer-2 (Alx2Ga1-x2)y2In1-y2P. It is used to guide the optical field and forms a symmetrical optical confinement region with the upper waveguide and confinement layer to ensure the stability of the laser mode.

[0013] It should be further noted that the active region of the quantum well includes: Gax4In1-x4P first quantum well, (Alx5Ga1-x5)y4In1-y4P first barrier layer, Gax6In1-x6P second quantum well, (Alx7Ga1-x7)y5In1-y5P second barrier layer, Gax8In1-x8P third quantum well, (Alx9Ga1-x9)y6In1-y6P third barrier layer, and Gax10In1-x10P fourth quantum well;

[0014] The superlattice structure includes: an Alx11In1-x11P / GaP superlattice grown alternately from AlInP and GaP materials, forming a periodic potential barrier;

[0015] The upper waveguide and confinement layer include: (Alx12Ga1-x12)y7In1-y7P upper waveguide layer, (Alx13Ga1-x13)y8In1-y8P upper confinement layer-1, and (Alx14Ga1-x14)y9In1-y9P upper confinement layer-2;

[0016] The transition layer and cap layer include: (Al0.5Ga0.5)0.5In0.5P bandgap transition layer, Ga0.5In0.5P bandgap transition layer and GaAs cap layer; the GaAs cap layer, as the outermost layer, facilitates the fabrication of electrodes.

[0017] The present invention also provides a preparation method, the preparation method comprising:

[0018] S101 provides a GaAs substrate and performs surface heat treatment;

[0019] S102, a GaAs buffer layer is grown on a GaAs substrate;

[0020] S103, to halt growth and deplete As atoms;

[0021] S104, Lower confinement layer-1 and lower confinement layer-2 are grown sequentially on the GaAs buffer layer;

[0022] S105, a lower waveguide layer is grown on the lower confinement layer-2 to confine the optical field and guide the laser mode;

[0023] S106, a multi-quantum well structure and a superlattice structure are grown sequentially on the lower waveguide layer;

[0024] S107, with the upper waveguide layer, upper confinement layer-1 and upper confinement layer-2 grown sequentially on the superlattice structure;

[0025] S108, a bandgap transition layer and a GaAs cap layer are grown sequentially on the upper confinement layer-2. The bandgap transition layer is used to achieve a smooth band transition, and the GaAs cap layer is used to provide an ohmic contact interface.

[0026] It should be further noted that S102 includes the following steps:

[0027] The surface-heat-treated GaAs substrate was cooled from 720±10℃ to 680±10℃ at a set cooling rate in an H2 environment.

[0028] After the temperature stabilized at 680±10℃, trimethylgallium (TMGa) and arsine (AsH3) were introduced into the MOCVD growth chamber, while hydrogen (H2) was kept as the carrier gas.

[0029] Silane is introduced into the growth chamber as an N-type dopant source;

[0030] Maintaining the gas flow of TMGa, AsH3 and Si2H6 and a growth temperature of 680±10℃, a GaAs buffer layer of a set thickness is epitaxially grown on a GaAs substrate.

[0031] After the GaAs buffer layer has grown to the set thickness, the flow of TMGa and Si2H6 is stopped, and the growth of the buffer layer is terminated.

[0032] It should be further noted that S103 includes the following steps:

[0033] The temperature of the growth chamber of the metal-organic chemical vapor deposition equipment was maintained at 680±10℃, and temperature fluctuations were monitored in real time using a built-in thermocouple.

[0034] Stop the supply of Group III source gas trimethylgallium (TMGa) and Group V source gas arsine (AsH3) by closing the solenoid valves of the corresponding gas pipelines. The stop time is synchronized with the temperature stabilization to cut off the supply of epitaxial growth source.

[0035] After stopping the group III and group V sources, phosphine PH3 gas is introduced, with the flow rate controlled in the range of 50-150 sccm and maintained, in order to switch the growth environment from arsenide to phosphide system.

[0036] The growth pause time was controlled to be between 3 and 30 seconds. During this period, the concentration of As atoms in the reaction chamber was monitored in real time using an in-situ mass spectrometer or laser spectrometer to ensure that it dropped below the threshold, indicating that the As atoms were depleted.

[0037] It should be further noted that S104 includes the following steps:

[0038] The temperature of the growth chamber of the metal-organic chemical vapor deposition equipment was maintained at 680±10℃, and a gaseous environment was prepared for the growth of the lower confinement layer-1.

[0039] Group III source gases trimethylaluminum™Al, trimethylgallium™Ga, and trimethylindium™In, and Group V source gas phosphine were introduced. The flow rate of TMAl was controlled at 5-20 sccm, the flow rate of TMGa was 10-30 sccm, the flow rate of TMIn was 5-15 sccm, and the flow rate of PH3 was 100-300 sccm. A (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1 was grown on the GaAs buffer layer for 10-30 minutes.

[0040] After growing the lower confinement layer-1, the temperature is maintained at 680±10℃, and the doping source silane Si2H6 is introduced with the flow rate adjusted to 0.5-2 sccm to achieve n-type doping in the lower confinement layer-1.

[0041] Without interrupting the temperature, TMAl, TMGa, TMIn and PH3 were continuously introduced to grow (Alx2Ga1-x2)y2In1-y2P lower confinement layer-2 on the lower confinement layer-1, and the growth time was extended to 30-60 minutes.

[0042] After growth is completed, in-situ thickness and doping uniformity checks are performed. A laser interferometer is used to monitor the layer thickness and composition in real time to ensure the interface quality between lower confinement layer-1 and lower confinement layer-2.

[0043] It should be further noted that S105 includes the following steps:

[0044] The metal-organic source and phosphine required for growing the lower waveguide layer were purified, and a phosphine atmosphere and initial growth temperature were established on the surface of the lower confinement layer-2.

[0045] Under a phosphine atmosphere, the growth temperature is uniformly reduced from the initial value to the first intermediate temperature, while a metal-organic source is introduced at a first ratio to grow the transition layer, and then the introduction of the metal-organic source is stopped.

[0046] The growth temperature is continuously and uniformly reduced from the first intermediate temperature to the target growth temperature. The ratio of metal-organic source is adjusted to the second ratio and the gas flow rate is increased to grow the first part of the waveguide layer thickness.

[0047] The growth status is determined by measuring the thickness uniformity. Based on the measurement results, the metal-organic source flux is selectively adjusted or maintained, and the remaining thickness of the lower waveguide layer is continued to grow to the target value.

[0048] After stopping the introduction of the organometallic source, the environment is kept at the target growth temperature and in a phosphine atmosphere to maintain the phosphine atmosphere and growth temperature.

[0049] It should be further noted that S106 includes the following steps:

[0050] The growth chamber temperature is uniformly reduced from the growth temperature of the lower waveguide layer to the target growth temperature of the multi-quantum well structure.

[0051] At the target growth temperature, a group III source and phosphine are introduced to grow the first quantum well layer on the lower waveguide layer.

[0052] Maintaining the target growth temperature, a group III source containing an aluminum source and phosphine are introduced to grow a first barrier layer on the first quantum well layer;

[0053] Repeat the growth process of quantum well layers and barrier layers, and grow subsequent quantum well layers and barrier layers on the first barrier layer in sequence to complete the multi-quantum well structure;

[0054] A superlattice structure is grown on a multi-quantum-well structure by alternately introducing different group III sources and phosphine.

[0055] It should be further noted that S108 includes the following steps:

[0056] The growth chamber temperature is maintained at the growth temperature of the upper confinement layer-2, and the gas environment and pressure conditions are prepared for the growth bandgap transition layer.

[0057] At the growth temperature, a group III source containing an aluminum source and phosphine are introduced to grow a first bandgap transition layer on the upper confinement layer-2 and perform p-type doping.

[0058] Maintaining the growth temperature, a group III source without aluminum source and phosphine are introduced to grow a second bandgap transition layer on the first bandgap transition layer and perform p-type doping.

[0059] The growth chamber temperature is uniformly reduced from the growth temperature to the cap layer growth temperature, and a group III source and arsine are introduced to grow a GaAs cap layer on the second bandgap transition layer and perform high-concentration p-type doping.

[0060] In-situ annealing was performed at the cap layer growth temperature, all gas supply was stopped, and the bandgap transition layer and cap layer were tested.

[0061] As can be seen from the above technical solutions, the present invention has the following advantages:

[0062] The single-mode 660nm semiconductor laser device with a superlattice structure provided by this invention improves the conduction bandgap by adjusting the Al composition in the lower confinement layer-1, and forms a gradient carrier confinement structure in conjunction with the segmented lower confinement layer-2, effectively suppressing hot carrier leakage and improving internal quantum efficiency and output stability at high temperatures. The lower and upper waveguide layers are symmetrically distributed, synergistically confining the optical field, ensuring laser mode concentration, reducing side-mode interference, and improving single-mode purity. The superlattice structure compensates for lattice strain and optimizes the carrier injection path, reducing interface defects; the overall layered design forms a complete optical and electrical channel from the substrate to the cap layer, reducing series resistance and improving ohmic contact, and reducing optical loss through smooth band transition, achieving stable single-mode output at a wavelength of 660nm. It also features high power, low threshold current, and wide temperature range operation, making it suitable for optical communication, precision sensing, and other scenarios.

[0063] The fabrication method utilizes GaAs substrate surface heat treatment, growth-stopping depletion of As atoms, and superlattice strain compensation design to reduce the overall defect density of the device from the traditional 1×10⁻⁶. 6 cm - ² Reduced to 5×10 4 cm - Below 2, the lattice mismatch of each functional layer is ≤0.05%, significantly optimizing crystal integrity. The segmented lower confinement layer (x1>x2) and upper confinement layers (x13>x2, x14>x13) with their Al composition gradient design progressively increase the conduction bandgap, enhancing electron and hole confinement capabilities. The superlattice's bandgap shift effect improves hole injection efficiency. Symmetrical upper and lower waveguide layers form a continuous refractive index gradient, stably confining the optical field within the quantum well region. Leakage losses to the substrate and upper electrode decrease from 0.8dB / cm and 0.6dB / cm to 0.3dB / cm and 0.15dB / cm, respectively, and the laser far-field divergence angle decreases from 30° to below 20°. The alternating design of four GaInP quantum wells and three high-Al composition barrier layers ensures a 660nm single-mode output wavelength with a full width at half maximum (FWHM) ≤5nm, resulting in stable power output. A high-Al content confinement layer enhances carrier confinement, and the synergistic optimization of the superlattice and segmented confinement layer enables the device to operate stably for extended periods at 60°C. A bandgap transition layer alleviates interlayer stress, and a GaAs cap layer blocks oxidation and corrosion, extending the device's lifetime in a humid environment of 85°C / 85%RH from the traditional 1000 hours to over 5000 hours. Unintentional doping control and source gas purification reduce impurity scattering and improve long-term operational stability. A high-concentration p-type doped GaAs cap layer forms a low-resistance ohmic contact with the electrode material, reducing the device's series resistance and improving current transport efficiency. Attached Figure Description

[0064] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the description will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0065] Figure 1 A schematic diagram of a single-mode 660nm semiconductor laser device with a superlattice structure;

[0066] Figure 2 This is a schematic diagram of a conventional structural aging test.

[0067] Figure 3 This is a schematic diagram of an aging test according to an embodiment of the present invention;

[0068] Figure 4 This is a flowchart of the preparation method.

[0069] Explanation of reference numerals in the attached figures:

[0070] 1 is a GaAs substrate, 2 is a GaAs buffer layer, 3 is a lower confinement layer-1 of (Alx1Ga1-x1)y1In1-y1P, 4 is a lower confinement layer-2 of (Alx2Ga1-x2)y2In1-y2P, 5 is a lower waveguide layer of (Alx3Ga1-x3)y3In1-y3P, 6 is a first quantum well of Gax4In1-x4P, 7 is a first barrier layer of (Alx5Ga1-x5)y4In1-y4P, 8 is a second quantum well of Gax6In1-x6P, 9 is a second barrier layer of (Alx7Ga1-x7)y5In1-y5P, 10 is a third quantum well of Gax8In1-x8P, and 11 is a (Alx1Ga1-x1)y1In1-y1P lower waveguide layer of (Alx1Ga1-x1)y1In1-y1P. 9Ga1-x9)y6In1-y6P is the third barrier layer, 12 is the fourth quantum well Gax10In1-x10P, 13 is the Alx11In1-x11P / GaP superlattice, 14 is the upper waveguide layer (Alx12Ga1-x12)y7In1-y7P, 15 is the upper confinement layer-1 (Alx13Ga1-x13)y8In1-y8P, 16 is the upper confinement layer-2 (Alx14Ga1-x14)y9In1-y9P (16), 17 is the bandgap transition layer (Al0.5Ga0.5)0.5In0.5P, 18 is the bandgap transition layer (Ga0.5In0.5P), and 19 is the GaAs cap layer. Detailed Implementation

[0071] The single-mode 660nm semiconductor laser device with a superlattice structure of the present invention inserts an AlInP / GaP superlattice thin layer between the quantum well and the upper waveguide layer to enhance the optical field confinement capability and hole injection efficiency, and reduce the threshold current; it adopts a segmented upper confinement layer design and uses high Al composition AlGaInP to achieve high doping, thereby improving the carrier confinement capability.

[0072] The following describes in detail the single-mode 660nm semiconductor laser device with a superlattice structure related to this application. Specific details, such as particular system structures and technologies, are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application can also be implemented in other embodiments without these specific details.

[0073] It should be understood that, when used in this specification, the term "comprising" indicates the presence of the described feature, integral, step, operation, element, and / or component, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0074] It should be understood that "one or more" as mentioned in this application refers to one, two, or more, and "multiple" as mentioned in this application refers to two or more. In the description of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B. The "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone.

[0075] To facilitate a clear description of the technical solutions of this application, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that the terms "first" and "second" do not necessarily imply that they are different.

[0076] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0077] Please see Figure 1The diagram shown is a schematic of a single-mode 660nm semiconductor laser device with a superlattice structure in a specific embodiment. The structure of the laser device described in this invention can be divided into six main parts from bottom to top, each part corresponding to a different functional layer. Based on a GaAs substrate, it is achieved through multilayer epitaxial growth, thereby improving the performance of the 660nm single-mode laser. The semiconductor laser device is divided into the following parts from bottom to top:

[0078] The substrate and buffer layer provide mechanical support and a lattice-matching basis.

[0079] The lower confinement layer and waveguide layer are used for carrier confinement and optical field guidance.

[0080] The quantum well active region is the main light-emitting region, which includes multiple quantum wells and barrier layers.

[0081] Superlattice structures are used to enhance carrier injection efficiency.

[0082] The upper waveguide and confinement layer are used to optimize optical and electrical performance.

[0083] The transition layer and cap layer are used to reduce interfacial stress and facilitate electrode contact.

[0084] In some embodiments, the substrate and buffer layer are located at the bottom layer of the device, serving as the growth base and ensuring the crystal quality of subsequent layers. This includes: a GaAs substrate 1, made of GaAs material, providing stable mechanical support and lattice matching, laying the foundation for the entire epitaxial structure; and a GaAs buffer layer 2, grown on the substrate, used to smooth surface defects, reduce dislocation density, and improve the growth quality of subsequent layers. The substrate and buffer layer ensure the structural integrity of the device and prevent performance degradation caused by lattice mismatch.

[0085] The lower confinement and waveguide layer, located above the buffer layer, is responsible for confining charge carriers and guiding the optical field. Specifically, it includes:

[0086] The lower confinement layer -13 (Alx1Ga1-x1)y1In1-y1P serves as the first layer of the segmented confinement layer. By adjusting the Al composition (x value), the conduction band gap is increased, thereby enhancing the carrier confinement capability.

[0087] The (Alx2Ga1-x2)y2In1-y2P lower confinement layer-24 works in conjunction with the (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1 to further optimize the band structure and prevent carrier leakage.

[0088] The lower waveguide layer 5 (Alx3Ga1-x3)y3In1-y3P, located above the confinement layer, guides the optical field and forms a symmetrical optical confinement region with the upper waveguide layer, ensuring laser mode stability. The segmented design of the lower confinement and waveguide layers improves high-temperature operating characteristics.

[0089] The quantum well active region is the light-emitting area of ​​the device, composed of four alternating GaInP quantum wells and three AlGaInP barrier layers, responsible for generating 660nm wavelength laser light. Specifically, it includes the following components:

[0090] The first quantum well 6 of Gax4In1-x4P serves as the starting layer of the active region, enabling efficient radiative recombination through quantum confinement effects.

[0091] The first barrier layer 7 (Alx5Ga1-x5)y4In1-y4P is used to isolate the quantum well, enhance carrier confinement, and improve luminescence efficiency.

[0092] The Gax6In1-x6P second quantum well 8 is used to ensure the gain uniformity of multiple quantum wells.

[0093] The second barrier layer 9 (Alx7Ga1-x7)y5In1-y5P is used to maintain the potential barrier between quantum wells and reduce carrier diffusion.

[0094] The Gax8In1-x8P third quantum well 10 further increases optical gain and supports single-mode output.

[0095] The third barrier layer 11 (Alx9Ga1-x9)y6In1-y6P is used to ensure the structural stability of the active region.

[0096] The fourth quantum well, Gax10In1-x10P, is the final layer of the active region, completing the laser emission process. The multi-quantum-well design of the quantum well active region optimizes the luminescence characteristics through band engineering, which is the foundation for the high performance of the device.

[0097] Superlattice structures are situated above the active region of the quantum well to enhance carrier injection efficiency. Specifically, this includes the Alx11In1-x11P / GaP superlattice13, a thin-layer structure formed by alternating growth of AlInP and GaP materials, creating a periodic potential barrier that improves electron and hole injection efficiency and enhances electrical parameters such as leakage current and series resistance. The superlattice structure is coupled to adjacent waveguide layers, further improving the device's thermal stability and reliability.

[0098] The upper waveguide and confinement layer are symmetrical with the lower part, responsible for guiding the optical field and confining carriers. Specifically, it includes the following components:

[0099] The upper waveguide layer 14 (Alx12Ga1-x12)y7In1-y7P, together with the lower waveguide layer, confines the optical field to the vicinity of the active region, thereby improving optical gain.

[0100] (Alx13Ga1-x13)y8In1-y8P upper confinement layer -115, the first layer of the segmented confinement layer, enhances the conduction band gap and strengthens carrier confinement through high Al composition.

[0101] The (Alx14Ga1-x14)y9In1-y9P upper confinement layer-216 and the (Alx13Ga1-x13)y8In1-y8P upper confinement layer-1 work together to prevent carrier leakage upwards and ensure operational stability at high temperatures. The upper waveguide and confinement layer complement the lower confinement and waveguide layer, jointly optimizing the overall performance of the device.

[0102] The transition layer and cap layer are located on top of the device to reduce interfacial stress and achieve ohmic contact. They include the following components:

[0103] The (Al0.5Ga0.5)0.5In0.5P bandgap transition layer 17 reduces lattice mismatch and smooths the bandgap transition through gradient composition. The Ga0.5In0.5P bandgap transition layer 18 further optimizes the bandgap and reduces contact resistance. The GaAs cap layer 19, as the outermost layer, facilitates electrode fabrication and improves the encapsulationability and reliability of the device.

[0104] The transition layer and cap layer ensure compatibility between the device and external circuitry, supporting long-term stable operation.

[0105] The hierarchical structure of the single-mode 660nm semiconductor laser device, through a superlattice structure and segmented confinement layers, improves carrier injection efficiency and confinement capability. Figure 2 A schematic diagram of a conventional structural aging test. Comparison diagram; Figure 3 This is a schematic diagram of the aging test of a TO package for a laser device with a cavity length of 1500μm and a stripe width of 2μm. Figure 2 and Figure 3 The aging test results shown confirm the advantages of high-temperature performance.

[0106] Optionally, 0.7 ≤ x1 ≤ 1, 0.4 ≤ y1 ≤ 0.6; 0.55 ≤ x2 ≤ 0.7, 0.4 ≤ y2 ≤ 0.6; 0.35 ≤ x3 < 0.5, 0.4 ≤ y3 ≤ 0.6; 0.35 ≤ x4 ≤ 0.45; 0.4 ≤ x5 ≤ 0.6, 0.4 ≤ y4 ≤ 0.6; 0.35 ≤ x6 ≤ 0.45; 0.4 ≤ x7 ≤ 0.6, 0.4 ≤ y5 ≤ 0.6; 0.35≤x8≤0.45; 0.4≤x9≤0.6, 0.4≤y6≤0.6; 0.35≤x10≤0.45; 0.35≤x11≤0.5; 0.35≤x12<0.5, 0.4≤y7≤0.6; 0.6≤x13≤0.75, 0.4≤y8≤0.6; 0.75≤x14≤1, 0.4≤y9≤0.6.

[0107] In the lower confinement layer, x1 is greater than x2, and the reduced refractive index suppresses the light field from further extending into the substrate, which helps to improve the slope efficiency. Meanwhile, (Al) x1 Ga1-x1 ) y1 In 1-y1 The lower confinement layer -1 has a smaller thickness to avoid increased thermal resistance caused by high Al composition; x2 is less than x13, resulting in an asymmetric structure between the upper and lower confinement layers, which compresses the optical field and shifts it towards the N side, reducing carrier absorption loss; x13 is less than x14, resulting in a segmented design for the upper confinement layer. The high Al composition of x13 (AlGaInP) enables high doping and a high conduction band gap design, enhancing carrier confinement capability. The composition of x14 is close to AlInP, and its lower refractive index helps enhance optical field confinement capability and reduce threshold current. x11 In 1-x11 In the P / GaP superlattice, AlInP is subjected to compressive strain, which balances the tensile strain caused by GaP. At the same time, the difference between AlInP and the quantum well lattice constant is small, which reduces the generation of interface defects. The superlattice design enhances the carrier collection capability and reduces the threshold current.

[0108] The following are embodiments of the preparation method provided in this disclosure. This preparation method belongs to the same inventive concept as the single-mode 660nm semiconductor laser device in the above embodiments. For details not described in detail in the embodiments of the preparation method, please refer to the embodiments of the single-mode 660nm semiconductor laser device described above.

[0109] like Figure 4 As shown, the preparation method includes:

[0110] S101 provides a GaAs substrate and performs surface heat treatment.

[0111] In some embodiments, a GaAs substrate conforming to semiconductor epitaxy standards is selected and placed in the growth chamber of an MOCVD equipment. First, H2 gas with a purity ≥99.999% is introduced into the growth chamber at a flow rate of 500-1000 sccm, and the chamber temperature is raised to 720±10℃ at a heating rate of 5-10℃ / min. The substrate is then baked at this temperature. Simultaneously, AsH3 gas with a purity ≥99.999% is introduced into the growth chamber at a flow rate of 10-50 sccm, and the baking time is 10-30 min. After baking, the temperature is slowly reduced to 680±10℃ at a rate of 3-5℃ / min. Throughout the process, the H2 gas flow is kept stable to avoid temperature fluctuations exceeding ±2℃.

[0112] It can be seen that during storage and pretreatment, GaAs substrates are prone to forming oxide layers (such as Ga2O3) and adsorbing organic impurities and inorganic particles. High-temperature baking in an H2 atmosphere can utilize the reducing properties of H2 to remove part of the oxide layer, while also causing the impurities adsorbed on the substrate surface to volatilize. At high temperatures, AsH3 decomposes to produce As atoms, which can combine with Ga atoms on the substrate surface to fill dangling bonds, repair minor surface defects, and form an atomically smooth As-terminated surface, thus avoiding epitaxial layer defects caused by uneven substrate surfaces or oxide layers.

[0113] S102, a GaAs buffer layer is grown on a GaAs substrate.

[0114] S102 includes the following steps:

[0115] S1021: The surface-heat-treated GaAs substrate is cooled from 720±10℃ to 680±10℃ at a set cooling rate in an H2 environment.

[0116] S1022: After the temperature stabilizes at 680±10℃, trimethylgallium (TMGa) and arsine (AsH3) are introduced into the MOCVD growth chamber, while hydrogen (H2) is kept as the carrier gas.

[0117] S1023: Simultaneously, silane (Si2H6) is introduced into the growth chamber as an N-type dopant source, and its flow rate is precisely controlled to achieve the set doping concentration in the GaAs buffer layer.

[0118] S1024: Maintaining the gas flow of TMGa, AsH3 and Si2H6 and a growth temperature of 680±10℃, an epitaxial growth of a GaAs buffer layer of a set thickness is performed on a GaAs substrate.

[0119] S1025: After the GaAs buffer layer grows to the set thickness, the flow of TMGa and Si2H6 is stopped, the growth of the buffer layer is ended, and preparation is made for the subsequent switch to the phosphide system growth.

[0120] Specifically, in S102, the MOCVD growth chamber temperature is maintained at 680±10℃, and the H2 flow rate is 500-1000 sccm. Trimethylgallium (TMGa) and AsH3 are introduced into the growth chamber, with the TMGa flow rate controlled at 5-20 sccm and the AsH3 flow rate controlled at 20-80 sccm to ensure a V / III ratio (As / Ga atomic ratio) of 4-8. Simultaneously, silane (Si2H6) is introduced as an N-type dopant source, and the Si2H6 flow rate is adjusted according to the target doping concentration to achieve a doping concentration of 2E18-5E18 atoms / cm³ in the GaAs buffer layer, preferably 2E18 atoms / cm³. A 632.8nm laser interferometer is used to monitor the growth thickness of the buffer layer in real time. When the thickness reaches 0.1-0.3μm, TMGa and Si2H6 are first shut off, and AsH3 is maintained for 5-10 seconds before being shut off again, keeping the growth chamber temperature and H2 flow rate constant.

[0121] The GaAs buffer layer and the GaAs substrate are made of the same material and have a perfectly matched lattice constant. This effectively prevents dislocations and defects inside the substrate from spreading to the upper epitaxial structure, thus avoiding the impact of substrate defects on the performance of subsequent functional layers. At the same time, the buffer layer forms an N-type conductive layer through Si2H6 doping, which can provide a bottom conductive channel for the formation of the PN junction of subsequent devices. Furthermore, the freshly grown buffer layer has a smooth surface and low impurity content, which can provide a clean and uniform interface for the growth of the upper AlGaInP material, thereby improving the crystal quality of the upper material.

[0122] S103, performs growth cessation to deplete As atoms.

[0123] S103 includes the following steps:

[0124] S1031: Precisely maintains the temperature of the growth chamber of the metal-organic chemical vapor deposition equipment at 680±10℃, uses built-in thermocouples to monitor temperature fluctuations in real time, ensures stability within ±1℃, and provides a thermally stable environment for growth interruptions.

[0125] S1032: Stop the supply of Group III source gas trimethylgallium (TMGa) and Group V source gas arsine (AsH3) by shutting off the source supply through the solenoid valves of the corresponding gas pipelines. The stop time is synchronized with the temperature stabilization to cut off the epitaxial growth source supply.

[0126] S1033: After stopping the group III and group V sources, phosphine PH3 gas is introduced, and the flow rate of PH3 is controlled within the range of 50-150 sccm and maintained to switch the growth environment from arsenide to phosphide system.

[0127] S1034: Control the growth pause time to 3 to 30 seconds. During this period, monitor the As atom concentration in the reaction chamber in real time using an in-situ mass spectrometer or laser spectrometer to ensure that it drops below the threshold, indicating that the As atoms are depleted.

[0128] Step S1035: After the pause ends, gradually reduce the PH3 flow rate to zero and prepare to resume the introduction of Group III and Group V sources to facilitate the subsequent growth of the phosphide layer and complete the growth pause process.

[0129] In this embodiment, step S1031, temperature stability, reduces lattice vibrations caused by thermal stress. Step S1032 utilizes a momentary interruption of the gas supply to cut off the material supply, preventing residual gas from continuing to react, thereby forcibly stopping GaAs growth and creating conditions for environmental purification. Step S1033 involves the introduction of PH3, which decomposes to produce P atoms. These P atoms undergo a displacement reaction with residual As species in the chamber, consuming As and forming a phosphide atmosphere, thus achieving environmental switching. Step S1034 uses time control to allow gas diffusion and sufficient reaction, monitoring data to reflect the degree of As depletion, ensuring the process continues only after the threshold is met, improving process efficiency and epitaxial uniformity. Step S1035 slowly reduces PH3 to prevent sudden vacuum changes from causing layer peeling or interface damage, achieving a smooth transition to the next growth step, reducing stress accumulation, and ensuring the smooth start of subsequent growth steps.

[0130] S104, lower confinement layer-1 and lower confinement layer-2 are grown sequentially on the GaAs buffer layer.

[0131] S104 specifically includes the following steps:

[0132] S1041: Maintain the temperature of the growth chamber of the metal-organic chemical vapor deposition equipment at 680±10℃, use a high-precision temperature control system to ensure stability within ±1℃, and prepare the gas environment for the growth of the lower confinement layer-1.

[0133] S1042: Introduce group III source gases trimethylaluminum (TMAl), trimethylgallium (TMGa), and trimethylindium (TMIn), and group V source gas phosphine (PH3). The flow rate of TMAl is controlled at 5-20 sccm, the flow rate of TMGa is 10-30 sccm, the flow rate of TMIn is 5-15 sccm, and the flow rate of PH3 is 100-300 sccm. Grow a (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1 on the GaAs buffer layer. The growth time is controlled at 10-30 minutes to achieve a thickness of 0.1-0.5 μm.

[0134] S1043: After growing the lower confinement layer-1, maintain the temperature at 680±10℃, introduce the dopant source silane (Si2H6), and adjust the flow rate to 0.5-2 sccm to achieve N-type doping in the lower confinement layer-1, with the doping concentration controlled in the range of 5E17-1E18 atoms / cm³.

[0135] S1044: Under conditions of no interruption of temperature, continue to introduce TMAl, TMGa, TMIn and PH3. The gas flow rate is similar to that in step S1042 but is finely adjusted as needed. Grow (Alx2Ga1-x2)y2In1-y2P lower confinement layer-2 on the lower confinement layer-1. The growth time is extended to 30-60 minutes to achieve a thickness of 1-4 μm.

[0136] S1045: After growth is completed, in-situ thickness and doping uniformity are checked. The layer thickness and composition are monitored in real time using a laser interferometer or a spectroscopic ellipsometer to ensure the interface quality of the lower confinement layer-1 and the lower confinement layer-2, so as to facilitate the subsequent growth of waveguide layers.

[0137] It should be noted that temperature stability in step S1041 ensures a consistent decomposition rate of the III-V source gases, as temperature fluctuations can cause differences in atomic mobility, affecting crystal quality. Step S1042 introduces TMAl, TMGa, TMIn, and PH3 gases, controlling the flow rate ratio to grow the lower confinement layer -1. For example, the TMAl flow rate is 5-20 sccm to adjust the Al composition x1 within the range of 0.7-1.0. This allows for precise control of layer thickness and aluminum content, optimizing carrier confinement and enhancing device stability. Step S1043 involves Si atoms replacing III-group sites to provide free electrons. Doping uniformity is determined by gas diffusion and surface adsorption equilibrium; real-time monitoring ensures concentration compliance. Step S1044 involves continuous growth to avoid interface contamination. Bandgap shift is achieved by x1 being greater than x2, enhancing optical field confinement. Step S1045 uses interference patterns or optical reflection to provide real-time feedback of growth data, allowing for timely parameter adjustments, improving yield, and ensuring the accuracy of the device structure.

[0138] S105, a lower waveguide layer is grown on the lower confinement layer-2 to confine the optical field and guide the laser mode.

[0139] S105 specifically includes the following steps:

[0140] S1051: The TMAl used for growing the lower waveguide layer was purified by a low-temperature adsorption purification column, reducing the impurity content to ≤1×10⁻⁶. -9 TMGa was filtered for organic macromolecular impurities using a 10Å molecular sieve column; TMIn was purified of light component impurities using a -10℃ cold trap; and PH3 was deoxygenated to a volume fraction ≤5×10⁻⁶ using a Ni-Mg alloy deoxidation column. -¹¹; Then, flush the source pipeline with 99.999% N2 at a flow rate of 40 sccm for 6-8 minutes, and then introduce PH3 into the surface of the lower confinement layer-2 of y2In1-y2P for 20-25 seconds, and start the growth chamber at an initial temperature of 680±10℃.

[0141] S1052: Maintain a pH3 flow rate of 15-25 sccm and reduce the temperature from 680±10℃ to 650±5℃ at a rate of 2-3℃ / min; simultaneously introduce the three sources at a ratio of TMAl:TMGa:TMIn=3:5:2, with the V / III ratio controlled at 6-8; monitor the transition of the target from 5.661 Å to 5.658 Å in the lower confinement layer-2 using in-situ X-ray diffraction; when the temperature stabilizes at 650±5℃, grow a transition layer with a thickness of 10-15 nm, then maintain pH3 and pause the metal-organic source for 3-5 s.

[0142] S1053: Continue cooling at a rate of 2-3℃ / min to 630±10℃, adjust the TMAl:TMGa:TMIn ratio to 2.25:5.25:2.5, ensuring x3=0.45 and y3=0.5, increase the total flow rate to 12-15 sccm, and increase the PH3 flow rate to 50-70 sccm; monitor C and O impurities ≤5×10¹ using secondary ion mass spectrometry (SIMS) at a sampling depth of 0.1 nm. 6 cm - ³; Use a 632.8nm laser interferometer to record the growth thickness. When it reaches 30-40nm, keep the source flow rate constant and pause cooling for 5-7 minutes.

[0143] S1054: Adjust the airflow distribution using a substrate rotary table, measure the thickness at five points around the center of the substrate using a stylus stylus probe, and calculate the uniformity deviation; if the deviation is >5%, fine-tune the flow rates of TMAl and TMGa, and continue growing the remaining 20-30nm thickness; if the deviation is ≤5%, maintain the original flow rate and grow to the target thickness; record the peak position shift of XRD every 10 minutes during the growth process.

[0144] S1055: Turn off TMAl, TMGa, and TMIn, maintain a PH3 flow rate of 50-70 sccm, and hold at 630±10℃ for 8-12 min; monitor the surface roughness using an atomic force microscope during this period; after the holding period, maintain the PH3 flow rate and keep the temperature at 630±10℃ to prepare for subsequent multi-quantum well growth.

[0145] It should be noted that the Al composition x3 (0.45) of the lower waveguide layer (Alx3Ga1-x3)y3In1-y3P in S1051 is lower than that of the lower confinement layer-2, resulting in a slight difference in their lattice constants. Surface pretreatment with PH3 can form a P-atom adsorption layer on the surface of the lower confinement layer-2, filling surface dangling bonds and reducing interface dislocations caused by the difference in lattice constants. Metallic and oxidizing impurities in the source gas can form deep-level defects in the lower waveguide layer, affecting the optical field confinement capability. Customized refining can remove these impurities, ensuring the crystal purity of the lower waveguide layer. In S1052, if the lower waveguide layer is directly grown during the temperature drop from 680℃ to 630℃, the sudden temperature change will cause thermal stress between the substrate and the epitaxial layer, potentially leading to cracking. The Al composition of the transition layer is between that of the lower confinement layer-2 and the lower waveguide layer, forming a lattice transition and dispersing lattice mismatch stress. Real-time monitoring of the lattice constant by XRD can promptly correct the source flux, ensuring the lattice matching effect of the transition layer. The lower waveguide layer of S1053 requires unintentional doping to avoid impurities affecting optical field transmission. Oxidizing impurities will generate oxides, leading to optical absorption loss; controlling the V / III ratio at 7-9 ensures that Al, Ga, and In atoms completely combine with P to form (AlGaIn)P compounds, avoiding unreacted Group III metals or Group V vacancies; real-time SIMS monitoring of impurities can promptly detect source gas anomalies, avoid batch defects, and ensure uniform thickness of the lower waveguide layer. S1054 substrate rotation can improve the radial distribution of source gas on the substrate surface and reduce thickness deviations caused by edge effects; multi-point sampling by a profilometer can comprehensively evaluate thickness uniformity, and targeted fine-tuning of the source flow rate can correct local thickness deviations; XRD peak monitoring ensures lattice matching between the secondary growth layer and the primary growth layer, avoiding internal stress caused by lattice differences. The Ga and In atoms on the surface of the S1055 lower waveguide layer have unsaturated dangling bonds, which easily adsorb O2 and H2O from the air to form an oxide layer, affecting the growth quality of subsequent quantum wells. During PH3 passivation, P atoms combine with dangling bonds to form stable P-Ga and P-In bonds, avoiding oxidation. The heat preservation process allows surface atoms to reach thermodynamic equilibrium, reducing surface undulations. Maintaining the PH3 atmosphere prevents the desorption of P atoms after passivation, ensuring surface stability and providing a smooth, oxidation-free initial interface for the growth of quantum wells (GaxIn1-xP). The stable PH3 atmosphere ensures surface consistency, resulting in a growth rate deviation of ≤±0.1 nm / min for subsequent quantum wells.

[0146] S106, with a multi-quantum well structure and a superlattice structure grown sequentially on the lower waveguide layer.

[0147] S106 includes the following steps:

[0148] S1061: The temperature of the growth chamber of the metal-organic chemical vapor deposition equipment is gradually changed from 680±10℃ to 630±10℃, with the cooling rate controlled at 5-10℃ / minute, and a high-precision temperature control system is used to maintain temperature stability within ±1℃, so as to prepare a low-temperature environment for the growth of multi-quantum well structures.

[0149] S1062: After the temperature stabilizes at 630±10℃, trimethylgallium (TMGa) and trimethylindium (TMIn) from group III source gases and phosphine (PH3) from group V source gases are introduced. The flow rate of TMGa is controlled at 5-15 sccm, the flow rate of TMIn is 5-10 sccm, and the flow rate of PH3 is 50-150 sccm. The first quantum well Gax4In1-x4P is grown on the lower waveguide layer. The growth time is controlled at 1-3 minutes to achieve a thickness of 4-7 nm.

[0150] S1063: Maintain the temperature at 630±10℃, and introduce group III source gases trimethylaluminum (TMAl), TMGa, TMIn and PH3. The flow rate of TMAl is controlled at 5-15 sccm, the flow rate of TMGa is 5-10 sccm, the flow rate of TMIn is 3-8 sccm and the flow rate of PH3 is 50-150 sccm. Grow the first barrier layer (Alx5Ga1-x5)y4In1-y4P on the first quantum well. The growth time is controlled at 2-5 minutes to achieve a thickness of 6-15 nm.

[0151] S1064: Repeat steps S1062 and S1063 to grow the second quantum well, the second barrier layer, the third quantum well, the third barrier layer, and the fourth quantum well in sequence. The growth parameters of each quantum well and barrier layer are fine-tuned to optimize the composition. For example, the TMIn flux of the second quantum well is slightly increased to increase the indium content, ensuring the integrity of the multi-quantum well structure.

[0152] S1065: After the fourth quantum well is grown, maintain the temperature at 630±10℃ and introduce TMAl, TMIn, PH3 and TMGa, PH3 respectively. The flow rate of TMAl is controlled at 3-10 sccm (for the AlInP layer), the flow rate of TMGa is controlled at 2-8 sccm (for the GaP layer), and the flow rate of PH3 is maintained at 50-150 sccm to grow Alx11In1-x11P / GaP superlattices. The growth time of each pair of superlattices is controlled at 0.5-2 minutes, and the total number of pairs is 2-20, thus completing the growth of the superlattice structure.

[0153] In this embodiment, the slow cooling in S1061 reduces thermal stress and prevents exacerbation of lattice mismatch between the lower waveguide layer and the quantum well, as sudden temperature changes can lead to interface defects or stress accumulation, affecting crystal integrity. S1062 utilizes MOCVD vapor-phase epitaxy; after gas decomposes on the substrate surface, it migrates and adsorbs to form a thin quantum well. Adjusting the indium content (x4 between 0.35-0.45) controls the emission wavelength to around 660 nm. The barrier layer in S1063 acts as a potential barrier layer, providing bandgap shift through high aluminum content, confining carriers within the quantum well, reducing leakage, and controlling the growth time ensures uniform thickness. S1064 forms multiple quantum wells through alternating growth, utilizing quantum size effects to superimpose optical gain and improve output power; parameter fine-tuning compensates for growth inhomogeneities. The superlattice in S1065 consists of alternating AlInP and GaP thin layers. Strain compensation and bandgap engineering optimize carrier injection, and the thin-layer structure enhances hole injection efficiency. This improves electrical parameters, such as reducing series resistance and increasing photoelectric conversion efficiency.

[0154] S107, with the upper waveguide layer, upper confinement layer-1 and upper confinement layer-2 grown sequentially on the superlattice structure.

[0155] In some embodiments, the H2 flow rate is maintained at 500-1000 sccm, and the growth chamber temperature is gradually changed from 630±10℃ to 680±10℃ at a rate of 2-3℃ / min. The growth of the (Alx12Ga1-x12)y7In1-y7P waveguide layer is based on temperature stabilization, followed by the introduction of TMAl, TMGa, and TMIn, with a PH3 flow rate of 50-70 sccm. Unintentional doping is used, and the thickness is monitored to 30-200 nm (preferably 60 nm) using a laser interferometer. The composition satisfies the following conditions: 0.35≤x12<0.5, preferably x12=0.45; 0.4≤y7≤0.6, preferably y7=0.5. Without changing the temperature and the flow rates of H2 and PH3, adjust the flow rate ratio of TMAl:TMGa:TMIn to 7:3:5, introduce Cp2Mg or DEZn as the doping source, with a flow rate of 0.5-1 sccm, and control the doping concentration to 1E18-3E18 atoms / cm³. Grow to 0.1-0.5 μm, with the composition satisfying 0.6≤x13≤0.75 and 0.4≤y8≤0.6.

[0156] A (Alx14Ga1-x14)y9In1-y9P confinement layer –2 was grown. The flow ratio of TMAl:TMGa:TMIn was adjusted to 10:0:5, and the flow rate of Cp2Mg or DEZn was reduced to 0.3-0.7 sccm. The growth was carried out to a depth of 0.5-1.5 μm, with the composition satisfying 0.75≤x14≤1, 0.4≤y9≤0.6, and x13>x2, x14>x13. The composition was monitored by XRF during the growth process, and the doping concentration was monitored by a Hall effect analyzer.

[0157] S108, a bandgap transition layer and a GaAs cap layer are grown sequentially on the upper confinement layer-2. The bandgap transition layer is used to achieve a smooth band transition, and the GaAs cap layer is used to provide an ohmic contact interface.

[0158] S108 includes the following steps:

[0159] S1081: Maintain the temperature of the growth chamber of the metal-organic chemical vapor deposition equipment at 680±10℃, use a high-precision temperature control system to ensure stability within ±1℃, prepare the gas environment for the growth bandgap transition layer, and monitor the pressure of the growth chamber at 50-100 Torr.

[0160] S1082: After the temperature stabilizes at 680±10℃, trimethylaluminum (TMAl), trimethylgallium (TMGa), trimethylindium (TMIn) from group III source gases and phosphine (PH3) from group V source gases are introduced. The flow rate of TMAl is controlled at 5-15 sccm, the flow rate of TMGa is 10-20 sccm, the flow rate of TMIn is 5-10 sccm, and the flow rate of PH3 is 100-200 sccm. A (Al0.5Ga0.5)0.5In0.5P bandgap transition layer is grown on the upper confinement layer-2. The growth time is controlled at 2-5 minutes to achieve a thickness of 30-80 nm. A doping source, magnesia pyrocene (Cp2Mg) or diethylzinc (DEZn), is introduced. The flow rate is adjusted to 0.5-2 sccm, and the doping concentration is controlled in the range of 1E18-3E18 atoms / cm³.

[0161] S1083: Maintain the temperature at 680±10℃, introduce group III source gases TMGa, TMIn and PH3, control the TMGa flow rate at 10-20 sccm, the TMIn flow rate at 5-10 sccm, and the PH3 flow rate at 100-200 sccm, grow a Ga0.5In0.5P bandgap transition layer on the first bandgap transition layer, control the growth time at 2-5 minutes to achieve a thickness of 30-80 nm, and continue to use Cp2Mg or DEZn as doping source, with a flow rate of 0.5-2 sccm and a doping concentration controlled at 1E18-3E18 atoms / cm³.

[0162] S1084: The growth chamber temperature is reduced from 680±10℃ to 540±10℃ at a controllable rate of 5-10℃ / min. Group III source gas TMGa and Group V source gas arsine (AsH3) are introduced, with the TMGa flow rate controlled at 20-50 sccm and the AsH3 flow rate controlled at 100-300 sccm. A GaAs cap layer is grown on the second bandgap transition layer, with the growth time controlled at 5-15 minutes to achieve a thickness of 0.1-0.5 μm. A doping source, carbon tetrabromide (CBr4) or DEZn, is introduced, with the flow rate adjusted to 1-5 sccm and the doping concentration controlled in the range of 4E19-1E20 atoms / cm³.

[0163] S1085: After growth is complete, maintain the temperature at 540±10℃ for a short in-situ annealing for 1-2 minutes, and gradually reduce all gas flow rates to zero. Use in-situ monitoring tools such as a spectroscopic ellipsometry to check the layer thickness and interface quality to ensure the uniformity of the growth of the bandgap transition layer and the cap layer, in preparation for device packaging.

[0164] In step S1081 of this embodiment, temperature stability ensures a consistent gas decomposition rate, as temperature fluctuations can cause lattice mismatch or stress accumulation, affecting interface quality. Step S1082 utilizes MOCVD vapor phase epitaxy, where the gas decomposes on the hot substrate surface and deposits to form an alloy layer. Doping controls the band structure, achieving a smooth transition and reducing band shift. Step S1083 uses gradient composition growth, adjusting the indium and gallium content to achieve lattice constant matching, reducing stress on the cap layer, and controlling the growth time to ensure uniform thickness. In step S1084, low-temperature growth reduces thermal damage to the gallium arsenide layer, doping provides high conductivity, facilitating ohmic contact formation, and optimized gas flow ensures accurate stoichiometry. In step S1085, annealing promotes atomic rearrangement and defect repair, and monitoring tools provide real-time data feedback, allowing parameter adjustments and ensuring growth quality. This improves interlayer adhesion, optimizes overall structural uniformity, and enhances device yield.

[0165] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0166] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for fabricating a single-mode 660nm semiconductor laser device with a superlattice structure, characterized in that, The single-mode 660nm semiconductor laser device with a superlattice structure includes, from bottom to top, a substrate and buffer layer, a lower confinement and waveguide layer, a quantum well active region, a superlattice structure, an upper waveguide and confinement layer, and a transition layer and cap layer. The methods include: S101 provides a GaAs substrate and performs surface heat treatment; S102, a GaAs buffer layer is grown on a GaAs substrate; S103, performs growth cessation to deplete As atoms; S104, Lower confinement layer-1 and lower confinement layer-2 are grown sequentially on the GaAs buffer layer; S105, a lower waveguide layer is grown on the lower confinement layer-2 to confine the optical field and guide the laser mode; S105 includes the following steps: The metal-organic source and phosphine required for growing the lower waveguide layer were purified, and a phosphine atmosphere and initial growth temperature were established on the surface of the lower confinement layer-2. Under a phosphine atmosphere, the growth temperature is uniformly reduced from the initial value to the first intermediate temperature, while a metal-organic source is introduced at a first ratio to grow the transition layer, and then the introduction of the metal-organic source is stopped. The growth temperature is continuously and uniformly reduced from the first intermediate temperature to the target growth temperature. The ratio of metal-organic source is adjusted to the second ratio and the gas flow rate is increased to grow the first part of the waveguide layer thickness. The growth status is determined by measuring the thickness uniformity. Based on the measurement results, the metal-organic source flux is selectively adjusted or maintained, and the remaining thickness of the lower waveguide layer is continued to grow to the target value. After stopping the introduction of the organometallic source, the phosphine atmosphere and the target growth temperature were kept at the same temperature to maintain the phosphine atmosphere and growth temperature. S106, a multi-quantum well structure and a superlattice structure are grown sequentially on the lower waveguide layer; S106 includes the following steps: The growth chamber temperature is uniformly reduced from the growth temperature of the lower waveguide layer to the target growth temperature of the multi-quantum well structure. At the target growth temperature, a group III source and phosphine are introduced to grow the first quantum well layer on the lower waveguide layer. Maintaining the target growth temperature, a group III source containing an aluminum source and phosphine are introduced to grow a first barrier layer on the first quantum well layer; Repeat the growth process of quantum well layers and barrier layers, and grow subsequent quantum well layers and barrier layers on the first barrier layer in sequence to complete the multi-quantum well structure; A superlattice structure was grown on the multi-quantum-well structure by alternately introducing different group III sources and phosphine; S107, with the upper waveguide layer, upper confinement layer-1 and upper confinement layer-2 grown sequentially on the superlattice structure; S108, a bandgap transition layer and a GaAs cap layer are grown sequentially on the upper confinement layer-2. The bandgap transition layer is used to achieve a smooth band transition, and the GaAs cap layer is used to provide an ohmic contact interface. S108 includes the following steps: The growth chamber temperature is maintained at the growth temperature of the upper confinement layer-2, and the gas environment and pressure conditions are prepared for the growth bandgap transition layer. At the growth temperature, a group III source containing an aluminum source and phosphine are introduced to grow a first bandgap transition layer on the upper confinement layer-2 and perform p-type doping. Maintaining the growth temperature, a group III source without aluminum source and phosphine are introduced to grow a second bandgap transition layer on the first bandgap transition layer and perform p-type doping. The growth chamber temperature is uniformly reduced from the growth temperature to the cap layer growth temperature, and a group III source and arsine are introduced to grow a GaAs cap layer on the second bandgap transition layer and perform high-concentration p-type doping. In-situ annealing was performed at the cap layer growth temperature, all gas supply was stopped, and the bandgap transition layer and cap layer were tested.

2. The preparation method according to claim 1, characterized in that, The substrate and buffer layer include: GaAs substrate (1) and GaAs buffer layer (2). The GaAs substrate (1) is made of GaAs material, and the GaAs buffer layer (2) is disposed on the GaAs substrate (1); The lower confinement and waveguide layer includes: (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1 (3) as the first layer of the segmented confinement layer, which improves the conduction band gap and enhances the carrier confinement capability by adjusting the Al composition; (Alx2Ga1-x2)y2In1-y2P lower confinement layer-2 (4) is above (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1 (3); The lower waveguide layer (5) of (Alx3Ga1-x3)y3In1-y3P is located above the lower confinement layer-2 (4) of (Alx2Ga1-x2)y2In1-y2P. It is used to guide the optical field and form a symmetrical optical confinement region with the upper waveguide and confinement layer to ensure the stability of the laser mode.

3. The preparation method according to claim 1, characterized in that, The active regions of the quantum wells include: Gax4In1-x4P first quantum well (6), (Alx5Ga1-x5)y4In1-y4P first barrier layer (7), Gax6In1-x6P second quantum well (8), (Alx7Ga1-x7)y5In1-y5P second barrier layer (9), Gax8In1-x8P third quantum well (10), (Alx9Ga1-x9)y6In1-y6P third barrier layer (11), and Gax10In1-x10P fourth quantum well (12). The superlattice structure includes: an Alx11In1-x11P / GaP superlattice (13) grown alternately from AlInP and GaP materials, forming a periodic barrier; The upper waveguide and confinement layer include: (Alx12Ga1-x12)y7In1-y7P upper waveguide layer (14), (Alx13Ga1-x13)y8In1-y8P upper confinement layer-1 (15), and (Alx14Ga1-x14)y9In1-y9P upper confinement layer-2 (16). The transition layer and cap layer include: (Al0.5Ga0.5)0.5In0.5P bandgap transition layer (17), Ga0.5In0.5P bandgap transition layer (18) and GaAs cap layer (19); the GaAs cap layer (19) is the outermost layer, which facilitates the preparation of electrodes.

4. The preparation method according to claim 1, characterized in that, S102 includes the following steps: The surface-heat-treated GaAs substrate was cooled from 720±10℃ to 680±10℃ at a set cooling rate in an H2 environment. After the temperature stabilized at 680±10℃, trimethylgallium (TMGa) and arsine (AsH3) were introduced into the MOCVD growth chamber, while hydrogen (H2) was kept as the carrier gas. Silane is introduced into the growth chamber as an N-type dopant source; Maintaining the gas flow of TMGa, AsH3 and Si2H6 and a growth temperature of 680±10℃, a GaAs buffer layer of a set thickness is epitaxially grown on a GaAs substrate. After the GaAs buffer layer has grown to the set thickness, the flow of TMGa and Si2H6 is stopped, and the growth of the buffer layer is terminated.

5. The preparation method according to claim 1, characterized in that, S103 includes the following steps: The temperature of the growth chamber of the metal-organic chemical vapor deposition equipment was maintained at 680±10℃, and temperature fluctuations were monitored in real time using a built-in thermocouple. Stop the supply of Group III source gas trimethylgallium (TMGa) and Group V source gas arsine (AsH3) by closing the solenoid valves of the corresponding gas pipelines. The stop time is synchronized with the temperature stabilization to cut off the supply of epitaxial growth source. After stopping the group III and group V sources, phosphine PH3 gas is introduced, with the flow rate controlled in the range of 50-150 sccm and maintained, in order to switch the growth environment from arsenide to phosphide system. The growth pause time was controlled to be between 3 and 30 seconds. During this period, the concentration of As atoms in the reaction chamber was monitored in real time using an in-situ mass spectrometer or laser spectrometer to ensure that it dropped below the threshold, indicating that the As atoms were depleted.

6. The preparation method according to claim 1, characterized in that, S104 includes the following steps: The temperature of the growth chamber of the metal-organic chemical vapor deposition equipment was maintained at 680±10℃, and a gaseous environment was prepared for the growth of the lower confinement layer-1. Group III source gases trimethylaluminum™Al, trimethylgallium™Ga, and trimethylindium™In, and Group V source gas phosphine were introduced. The flow rate of TMAl was controlled at 5-20 sccm, the flow rate of TMGa was 10-30 sccm, the flow rate of TMIn was 5-15 sccm, and the flow rate of PH3 was 100-300 sccm. A (Alx1Ga1-x1)y1In1-y1P lower confinement layer-1 was grown on the GaAs buffer layer for 10-30 minutes. After growing the lower confinement layer-1, the temperature is maintained at 680±10℃, and the doping source silane Si2H6 is introduced with the flow rate adjusted to 0.5-2 sccm to achieve n-type doping in the lower confinement layer-1. Without interrupting the temperature, TMAl, TMGa, TMIn and PH3 were continuously introduced to grow (Alx2Ga1-x2)y2In1-y2P lower confinement layer-2 on the lower confinement layer-1, and the growth time was extended to 30-60 minutes. After growth is completed, in-situ thickness and doping uniformity checks are performed. A laser interferometer is used to monitor the layer thickness and composition in real time to ensure the interface quality between lower confinement layer-1 and lower confinement layer-2.

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