Gfsk modulation optimization method and circuit for vco non-linearity compensation

Abstract

The application discloses a GFSK modulation method and circuit for VCO non-linear compensation, aiming at solving the modulation frequency deviation instability problem of a voltage-controlled oscillator in a two-point modulation architecture caused by control voltage fluctuation and frequency band switching. The application adds a compensation capacitor group matched with the main tuning capacitor characteristics to the FSK_MOD module, so that the capacitance value changes synchronously with the control voltage to offset the total capacitance drift of the resonant cavity; meanwhile, the output voltage of the DAC module is dynamically adjusted based on the frequency band control signal to real-time suppress the influence of the load capacitance jump across the frequency band. The corresponding circuit integrates the series compensation capacitor and the fixed capacitor in the FSK_MOD module to form a compensation branch, and configures the compensation current injection end with the operational amplifier. By using the application, the modulation frequency deviation can be stably maintained within the tolerance range required by the Bluetooth protocol in the whole working frequency band, and the anti-adjacent channel interference ability and data transmission reliability of the wireless communication system are greatly improved.

Description

Technical Field

[0001] This invention relates to a GFSK modulation optimization method for nonlinear compensation of voltage-controlled oscillators (VCOs), and also to a corresponding GFSK modulation optimization circuit, belonging to the field of electronic oscillator technology. Background Technology

[0002] In low-power wireless communication systems such as Bluetooth and ZigBee, Gaussian Frequency Shift Keying (GFSK) has become a core modulation technology due to its anti-interference capabilities and spectral efficiency. According to core specifications of the Bluetooth protocol (such as Bluetooth 5.0, but not limited to this), the transmitter must ensure that the frequency deviation (FD) is strictly stable within ±250kHz at a rate of 1Mbps. The stability of the frequency deviation directly determines the bit error rate and the ability to resist adjacent channel interference in the communication link, becoming a critical performance indicator, especially in high-density deployment scenarios.

[0003] To address these issues, the industry commonly employs a two-point modulation architecture: low-frequency data is modulated via fractional-order division using a phase-locked loop (PLL), and a fractional-order band control word is generated using a Σ-Δ modulator to achieve in-band noise suppression; high-speed data is directly modulated via a VCO, bypassing the PLL loop bandwidth limitation to respond to transient frequency hopping requirements. While this two-point modulation architecture combines dynamic response and noise performance, the modulation nonlinearity of the VCO path remains unresolved. Specifically, fluctuations in the control voltage cause changes in the capacitance of the variable capacitor, leading to a drift in the modulation sensitivity (KVCO_MOD) of the voltage-controlled oscillator; when the band control word SW_VC switches bands (e.g., 2400MHz→2460MHz), the load capacitance jump further amplifies the frequency deviation difference.

[0004] Existing compensation schemes attempt to suppress frequency offset fluctuations by fixing compensation capacitors or gain calibration, but they have fundamental drawbacks: fixed compensation cannot adapt to the dynamic changes of VC and SW_VC, and is only effective at specific operating points; open-loop calibration relies on pre-stored lookup tables and does not establish a feedback correlation between KVCO_MOD and real-time operating status, leading to deterioration of frequency offset stability in cross-frequency / cross-voltage scenarios. Therefore, a compensation mechanism that dynamically suppresses VCO nonlinear effects is urgently needed to achieve accurate and stable control of GFSK frequency offset across the entire frequency band. Summary of the Invention

[0005] The primary technical problem to be solved by this invention is to provide a GFSK modulation optimization method for VCO nonlinear compensation.

[0006] Another technical problem to be solved by the present invention is to provide a GFSK modulation optimization circuit for VCO nonlinear compensation.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] According to a first aspect of the present invention, a GFSK modulation optimization method for VCO nonlinear compensation is provided, comprising the following steps:

[0009] (a) Add at least one set of variable capacitors (C15, C16) to the FSK_MOD module of the VCO. The voltage-capacitance characteristics of the variable capacitors (C15, C16) are the same as those of the main tuning capacitors (C11, C12). When the control voltage changes, the capacitance of the main tuning capacitors (C11, C12) changes in the same direction as the capacitance of the variable capacitors (C15, C16) to stabilize the modulation sensitivity.

[0010] (b) Adjust the output voltage of the DAC module in real time based on the frequency band control word. When the frequency band switching causes the modulation sensitivity to change, make the modulation voltage difference output by the DAC module change in the opposite direction to the modulation sensitivity, so as to offset the effect of the load capacitance jump when crossing frequency bands.

[0011] Preferably, when the positive terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the same direction as the control voltage; when the negative terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the opposite direction to the control voltage.

[0012] Preferably, a compensation current is dynamically injected into the current mirror array of the DAC module according to the current band control word, so that the modulation voltage difference changes inversely to the modulation sensitivity.

[0013] Preferably, the modulation voltage difference is the difference between the output voltage of the DAC module and the reference voltage of the FSK_MOD module.

[0014] According to a second aspect of the present invention, a GFSK modulation optimization circuit for VCO nonlinear compensation is provided, comprising an FSK_MOD module and a DAC module; wherein,

[0015] The FSK_MOD module includes:

[0016] First variable capacitor and second variable capacitor;

[0017] The third and fourth variable capacitors;

[0018] First fixed capacitor and second fixed capacitor;

[0019] The compensation branch consists of a first variable capacitor and a second variable capacitor connected in series.

[0020] The DAC module includes:

[0021] Current mirror array;

[0022] Operational amplifier;

[0023] The compensation current injection terminal is connected to the operational amplifier and is used to dynamically adjust the input current of the operational amplifier according to the frequency band control word.

[0024] Preferably, in the compensation branch, the negative terminals of the first variable capacitor and the second variable capacitor are connected to a fixed voltage.

[0025] Preferably, in the FSK_MOD module, the compensation branch formed by the first variable capacitor and the second variable capacitor connected in series is connected between the first fixed capacitor and the second fixed capacitor.

[0026] Preferably, in the current mirror array, the input stage PMOS transistor and multiple bias PMOS transistors constitute the main current mirror; multiple switching PMOS transistors controlled by GFSK data constitute the output current regulation unit.

[0027] Preferably, by changing the GFSK data to control different PMOS transistors, the magnitude of the output current is adjusted, thereby changing the output voltage of the DAC module.

[0028] Compared with existing technologies, this invention effectively solves the nonlinear distortion problem caused by control voltage fluctuations and frequency band switching in GFSK modulation of the VCO through a unique dual dynamic compensation design. Specifically, this invention, on the one hand, adds a compensation capacitor bank to the FSK_MOD module, which changes synchronously with the main tuning capacitor according to the control voltage, thus offsetting the resonant cavity capacitance changes caused by voltage fluctuations and significantly suppressing frequency offset drift within a single frequency band; on the other hand, it dynamically adjusts the output voltage of the DAC module based on the frequency band control signal, compensating for the load capacitance jump effect during frequency band switching in real time, and eliminating frequency offset differences between different frequency bands. The above-mentioned collaborative mechanism ensures that the modulation frequency offset is stably maintained within the tolerance range required by the Bluetooth protocol across the entire operating frequency band, greatly improving the anti-adjacent channel interference capability and data transmission reliability of the wireless communication system. Attached Figure Description

[0029] Figure 1A This is a schematic diagram of a VCO modulation circuit in the prior art;

[0030] Figure 1B This is the circuit schematic of the VC_BAND module in the VCO modulation circuit.

[0031] Figure 1C This is the circuit schematic of the FSK_MOD module in the VCO modulation circuit.

[0032] Figure 2This is a schematic diagram of the voltage-capacitance characteristic curve of a variable capacitor.

[0033] Figure 3 The measured characteristics of VCO modulation sensitivity under uncompensated conditions are shown in the graph.

[0034] Figure 4 This is a circuit schematic diagram of the improved FSK_MOD module according to an embodiment of the present invention;

[0035] Figure 5A This is a schematic diagram showing the simulation comparison results of frequency deviation under different control voltages without compensation.

[0036] Figure 5B The diagram shows the simulation comparison results of frequency deviation under different control voltages after compensation.

[0037] Figure 6 The test results of the frequency offset change trend across frequency bands after compensation by the FSK_MOD module are shown in the figure.

[0038] Figure 7 This is a circuit schematic diagram of the improved DAC module according to an embodiment of the present invention;

[0039] Figure 8 The graph shows the test results for frequency offset stability across the entire frequency band after double compensation. Detailed Implementation

[0040] The technical content of the present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0041] The technical concept of this invention is as follows: Addressing the frequency offset fluctuation problem caused by the dynamic drift of the modulation sensitivity (KVCO_MOD) of the voltage-controlled oscillator (VCO) under the GFSK two-point modulation architecture in wireless communication systems (such as Bluetooth), which is influenced by control voltage and frequency band switching, a dual dynamic compensation mechanism is proposed. Firstly, a variable compensation capacitor with the same voltage-capacitance characteristics as the main tuning capacitor is added to the VCO modulation end. When the control voltage increases, causing the main capacitance value to decrease, the compensation capacitor value decreases synchronously. By dynamically reducing the modulation sensitivity of the FSK_MOD module, the increasing frequency offset trend caused by changes in the total capacitance of the resonant cavity is offset, thereby stabilizing KVCO_MOD and suppressing frequency offset fluctuations within a single frequency band. Secondly, based on a pre-calibrated frequency band control word, the output voltage of the DAC (digital-to-analog converter) module is adjusted in real time. When frequency band switching causes an increase in KVCO_MOD, the modulation voltage difference is actively reduced to offset the effect of load capacitance jumps and eliminate cross-band frequency offset differences. Through the above technical means, the GFSK modulation frequency offset can be accurately stabilized within the protocol tolerance of ±250kHz throughout the entire operating frequency band, significantly improving the anti-interference capability and reliability of the wireless communication system.

[0042] exist Figure 1AIn the existing VCO modulation circuit shown, a switching circuit consisting of two PMOS transistors PM0 and PM1 and two NMOS transistors NM0 and NM1 is used as the basis, connected by cross-coupling to form the oscillation core. The control voltage VC, after being filtered by variable capacitors C11 and C12, forms an LC resonant circuit with inductor L0, determining the oscillation frequency. Variable capacitors C11 and C12 constitute the main tuning capacitor. The control voltage VC also acts as an input signal to PMOS transistors PM0 and PM1 to adjust the oscillation frequency. The VC_BAND module is used to implement voltage control for different frequency bands. The FSK_MOD module introduces frequency shift keying modulation, giving the output signal modulation characteristics. The DAC module is connected to the FSK_MOD module, converting the digital baseband signal into an analog voltage, and achieving frequency modulation by controlling the voltage difference of the VCO resonant cavity capacitors. YP and YN are output terminals, leading out the processed oscillation signal. NMOS transistors NM0 and NM1 are connected in parallel and grounded, working in conjunction with PMOS transistors PM0 and PM1 to control the signal path in different operating states.

[0043] Figure 1B This is the circuit schematic of the VC_BAND module in an existing VCO modulation circuit. The VC_BAND module contains four identical sub-circuits. Each sub-circuit includes a switch pair consisting of two inverters, connected to the four control signal input terminals SW_VC. <3> SW_VC <2> SW_VC <1> SW_VC <0> When the control signal is activated, the inverter conducts, forming a signal transmission path. In each sub-circuit, the YP terminal is connected to capacitors (C3, C5, C7, C9), and the other end of the capacitor is connected to one end of the VCM2 transistor; the other end of the VCM2 transistor is connected to the corresponding capacitor (C4, C6, C8, C10), finally leading to the YN terminal. A parallel branch is provided between the two ends of the VCM2 transistor, containing two inductors connected in series. When the control signal turns on the inverter, the signal starts from the YP terminal, is filtered by the capacitor, enters the VCM2 transistor for amplification or switching, and is then output to the YN terminal through the capacitor. The VCM2 transistor plays a crucial role here; its on / off state determines whether the signal can pass through this sub-circuit. By switching different SW_VC control signals, the corresponding capacitor can be selectively connected to the signal path from YP to YN, thereby achieving the function of adjusting the oscillation frequency. The four sub-circuits work together to determine the operating frequency range and adjustment accuracy of the entire VCO circuit.

[0044] Figure 1CThis is the circuit schematic of the FSK_MOD module in an existing VCO modulation circuit. The FSK_MOD module consists of two variable capacitors (C1 and C2), two fixed capacitors, and a first parallel branch containing two inductors connected in series. The YP terminal is connected to one end of variable capacitor C1, and the other end of C1 is connected to the DAC_OUT signal output from the DAC module. Similarly, one end of variable capacitor C2 is also connected to the DAC_OUT signal, and the other end is connected to the YN terminal. Between C1 and C2, a branch consisting of two inductors connected in series is connected in parallel. When the DAC_OUT signal changes, the capacitance values ​​of variable capacitors C1 and C2 change, thereby adjusting the oscillation frequency. Simultaneously, the two series inductors and the variable capacitors together form an LC resonant circuit, further influencing the oscillation frequency and the frequency modulation characteristics of the signal, realizing the FSK modulation function, so that the frequency of the output signal changes with the DAC_OUT signal.

[0045] The voltage-capacitance curve of the variable capacitor is as follows: Figure 2 As shown, the voltage at one end of the variable capacitor is V1. When the voltage is greater than V1, the value of the variable capacitor increases; when the voltage is less than V1, the value of the variable capacitor decreases. If the voltage at one end of the variable capacitor is fixed, the capacitance value changes with the increase or decrease of the voltage at the other end, depending on which end of the variable capacitor is connected to the fixed voltage. In various embodiments of the present invention, if the positive terminal of the variable capacitor is connected to the fixed voltage, the capacitance value of the variable capacitor changes in the same direction as the control voltage; if the negative terminal of the variable capacitor is connected to the fixed voltage, the capacitance value of the variable capacitor changes in the opposite direction to the control voltage.

[0046] Based on this, the aforementioned VCO modulation circuit mainly achieves frequency adjustment and modulation in the following way: A control voltage VC is applied to variable capacitors C11 and C12. The negative terminals of variable capacitors C11 and C12 are connected to a fixed voltage. According to the inherent characteristics of variable capacitors, when the control voltage VC (applied to the positive terminal) increases, the capacitance values ​​of C11 and C12 decrease. Therefore, variable capacitors C11 and C12 change their capacitance values ​​in real time according to the change in the control voltage VC, thereby adjusting the oscillation frequency. The capacitance variation affects the LC product (L is the inductance) of the VCO resonant cavity. The VC_BAND module adjusts the load capacitance according to the frequency band control word SW_VC<3:0> to achieve fine adjustment of the output frequency. Simultaneously, GFSK data (i.e., gfsk_data) is used. <n-1:0>The random data controlled DAC input is outputted at different rates, and the output voltage DAC_OUT and the reference voltage VCM of the FSK_MOD module act on another set of variable capacitors C1 and C2 to form a pressure difference, and further adjust the output frequency to complete modulation.

[0047] In the VCO modulation process, there are two main problems:

[0048] (1) When the control voltage VC changes, the capacitance values of the variable capacitors C11 and C12 will change accordingly, which will cause the LC product of the resonant cavity of the VCO to change, and then affect the oscillation frequency. However, the output amplitude of the GFSK data controlled DAC module does not change accordingly, so that the frequency range of the VCO modulation will also change, resulting in that the modulation accuracy is affected.

[0049] (2) When the output of the VC_BAND module changes, the load capacitance of the VCO will also change. This change of load capacitance will cause the frequency of the VCO modulation to shift, thereby affecting the stability of the modulation effect.

[0050] The reasons for the above problems are analyzed as follows:

[0051] It is known to those skilled in the art that the oscillation frequency of the VCO is calculated by the following formula:

[0052] (1)

[0053] Wherein, is the oscillation frequency of the VCO, and L is the inductance of the VCO.

[0054] In an embodiment of the present application, the equivalent capacitance in the above formula is calculated by the following formula:

[0055] Ctot = Cvc + Cvc_band + Cfsk_mod (2)

[0056] Wherein, Ctot is the equivalent capacitance, including the variable capacitance C11 and C12 (denoted as Cvc) adjusted by the control voltage VC, the equivalent capacitance Cvc_band adjusted by the VC_BAND module, and the equivalent capacitance Cfsk_mod adjusted by the FSK_MOD module. VC is the control voltage on the filter in the PLL, which changes in the range of 0.3v-0.8v, and when the frequency band control word SW_VC is fixed, it is used to adjust the frequency between 2400MHz-2430MHz; the VC_BAND module adjusts the frequency band control word SW_VC, which is used to adjust the change between the three frequency bands of 2400MHz-2430MHz, 2430MHz-2460MHz and 2460MHz-2480MHz; the capacitance array in the FSK_MOD module is used to adjust the range of frequency deviation.

[0057] Within the frequency range of 2400MHz to 2430MHz, the voltage values ​​of DAC_OUT and VCM remain constant, therefore the capacitance values ​​of variable capacitors C1 and C2 also remain constant. However, when VC varies between 0.3V and 0.8V, the equivalent capacitance Ctot changes, which in turn causes a change in the KVCO of the FSK_MOD module. Within the frequency range of 2400MHz to 2430MHz, Cvc changes with the filter voltage. When the output frequency of the VCO increases, the capacitance value of the variable capacitor Cvc decreases, making the overall equivalent capacitance Ctot smaller, increasing the KVCO of the FSK_MOD module, and thus causing the output frequency to increase.

[0058] Because KVCO_MOD is highly dependent on the operating frequency and control voltage VC: when the output frequency changes (e.g., 2400MHz→2480MHz), the equivalent capacitance of the VCO resonant cavity changes dynamically with the control voltage VC (0.3V~0.8V) and the frequency band control word SW_VC, resulting in KVCO_MOD exhibiting strong nonlinearity. Figure 3 The measured results show that in the 2400MHz band (SW_VC=6), the frequency offset fluctuation is as high as 48kHz (540kHz→588kHz), which far exceeds the tolerance of the Bluetooth protocol and causes serious degradation of communication quality.

[0059] To address the aforementioned problems, the embodiments of the present invention firstly... Figure 1C Based on the FSK_MOD module shown, a second parallel branch has been added. For example... Figure 4 As shown, this branch consists of two variable capacitors C15 and C16 connected in series. Their connection method is as follows: one end of variable capacitor C15 is connected between the fixed capacitor C17 and the original variable capacitor C1, and one end of variable capacitor C16 is connected between the original variable capacitor C2 and the fixed capacitor C18. The other ends (i.e., the negative terminals) of variable capacitors C15 and C16 are connected internally within the branch and connected to a fixed voltage. The most critical design difference is that variable capacitors C15 and C16 use the exact same connection method as the main tuning capacitors C11 and C12 (both negative terminals are connected to a fixed voltage), thus exhibiting consistent voltage-capacitance characteristics—when the control voltage VC increases, the capacitance of all capacitors decreases synchronously. However, their functional roles in the circuit are configured differently: C11 and C12 are the main tuning capacitors, and their reduced capacitance directly reduces the total capacitance Ctot of the resonant cavity, resulting in an increase in frequency deviation; while C15 and C16 are the dynamic compensation capacitors, and their reduced capacitance will reduce the modulation sensitivity of the FSK_MOD module, thereby suppressing the trend of increasing frequency deviation caused by changes in C11 and C12.

[0060] As the negative terminal of the variable capacitors C15 and C16 is also connected to a fixed voltage (same as C11 / C12), when the control voltage VC increases: the capacitance of the variable capacitors C11 and C12 decreases -> Ctot decreases -> tends to increase the frequency f, KVCO_MOD increases. At the same time, the capacitance of the variable capacitors C15 and C16 also decreases (as they have the same voltage-capacitance characteristic connection). The variable capacitors C15 and C16 are in series in the compensation branch of the FSK_MOD module, and their decrease in capacitance means that the contribution of this compensation branch to the total Ctot also decreases when the control voltage VC increases (or equivalently, the capacitive reactance of this branch increases).

[0061] The variable capacitors C15 and C16 are introduced into the equivalent capacitance part of the FSK_MOD module. When the control voltage VC increases, causing the capacitance Cvc of the main tuning capacitor to decrease, the C15 and C16 part in the FSK_MOD module also decreases, thereby reducing the modulation sensitivity KVCO of the FSK_MOD module itself (as KVCO is related to the change rate of the capacitance introduced by the FSK_MOD module).

[0062] The decrease in KVCO directly offsets the tendency for KVCO_MOD to increase due to the decrease in Ctot (caused by the decrease in Cvc). The effect is that: when the control voltage VC changes, the KVCO_MOD of the entire VCO remains relatively stable. Therefore, in the case of a fixed voltage difference (V DAC_OUT -V CM ) between DAC_OUT and VCM (2400MHz-2430MHz frequency band), the frequency offset △f generated by GFSK modulation also remains approximately unchanged.

[0063] The core purpose of setting the variable capacitors C15 and C16 in Figure 4 is to dynamically adjust the KVCO characteristic of the FSK_MOD module through the control voltage VC, so that its change tendency is opposite to that caused by the main tuning path (C11 and C12). This dynamic compensation makes the KVCO_MOD of the VCO approximately constant at different voltage values (0.3v-0.8v) of the control voltage VC. The final result is shown in Figure 5B : after compensation, the frequency offset is 446kHz when the control voltage VC=0.3V, and the frequency offset is 466kHz when the control voltage VC=0.8V, with a deviation of 20kHz, which is significantly better than the uncompensated state (48kHz deviation), making the frequency offset more stably remain near the ±250kHz tolerance required by the Bluetooth protocol within the 2400MHz-2430MHz frequency band.

[0064] It should be noted that the voltage values ​​of DAC_OUT and VCM are fixed within the range of 2400MHz to 2430MHz. When the voltage of DAC_OUT varies within the range of 0.4V to 0.7V, there will be a difference in the GFSK output frequency. When VC = 0.3V and VC = 0.8V, due to the change in the capacitance values ​​of variable capacitors C1 and C2, the GFSK output frequency difference is smaller when VC = 0.3V, and larger when VC = 0.8V. The magnitude of this frequency difference is determined by the KVCO of the FSK_MOD module.

[0065] The corresponding simulation results are as follows Figure 5A and Figure 5B As shown: Figure 5A The results show that without compensation, the GFSK output frequency deviation is 540kHz at VC=0.3V and 588kHz at VC=0.8V, a deviation of 48kHz. Figure 5B The results show that after compensation, the frequency deviation is 446kHz when VC=0.3V and 466kHz when VC=0.8V, reducing the deviation to 20kHz, demonstrating a significant optimization effect.

[0066] Figure 6 This shows the actual effect of the FSK_MOD module after optimization. The horizontal axis represents the frequency channels, ranging from 2400MHz to 2480MHz; the vertical axis represents the frequency offset, in MHz. Figure 6 As can be seen, the frequency offset exhibits a step-like variation across different frequency bands:

[0067] Within the frequency range of 2400MHz to 2430MHz, with SW_VC = 6, the frequency offset remains at approximately 0.25MHz. This is because, within this range, the optimized FSK_MOD module adds variable capacitors C15 and C16 for compensation, keeping KVCO approximately constant and thus maintaining frequency offset stability.

[0068] Within the frequency range of 2430MHz to 2460MHz, with SW_VC = 7, the frequency offset increases to approximately 0.45MHz. This indicates that when the value of the band control word SW_VC changes, the load capacitance also changes, leading to a change in the equivalent capacitance Ctot, which in turn affects KVCO and the frequency offset. Despite compensation, a certain degree of frequency offset variation still exists due to the adjustment of SW_VC.

[0069] Within the frequency range of 2460MHz to 2480MHz, the corresponding SW_VC=8, the frequency offset remains at approximately 0.45MHz.

[0070] Overall, Figure 6 The diagram illustrates the frequency offset variations under different frequency bands and SW_VC values. By optimizing the FSK_MOD module and adding a compensating variable capacitor, the frequency offset variation can be reduced to some extent, improving the stability of the modulation frequency. However, when the frequency band control word SW_VC changes significantly, further compensation measures are still needed to reduce the magnitude of the frequency offset variation.

[0071] Below, in conjunction with Figure 7 and Figure 8 This invention further describes the technical measures implemented in embodiments of the present invention when the frequency band control word SW_VC undergoes significant changes. Figure 7 In the DAC module shown, PMOS transistor PM0 serves as the input stage, forming a main current mirror with multiple PMOS transistors (PM1, PM2, ..., PMn-1) to generate bias current. These bias currents are controlled by GFSK data and are used to regulate the output current through different PMOS transistors (PMCO, PMC1, ..., PMCn-1). NMOS transistor NM0, along with NM1, I0, I1, I2, etc., forms a current source to provide bias current to the circuit. These current sources are connected to the output of the main current mirror and work together at the input of operational amplifier OP. Operational amplifier OP, as the output stage, converts the input current into voltage, forming the DAC_OUT output signal. By changing the GFSK data to control different PMOS transistors, the magnitude of the output current can be adjusted, thereby changing the voltage value of the output signal DAC_OUT. This design allows the DAC module to output corresponding analog voltage signals according to different combinations of GFSK data, meeting the requirements of GFSK modulation.

[0072] After PLL calibration, the values ​​of the band control word SW_VC for each channel are determined. Different SW_VC values ​​correspond to different load capacitances of the VCO, and changes in load capacitance will cause differences in the modulation frequency. To reduce the impact of this difference on the modulation frequency, the output amplitude of the DAC module needs to be compensated. Figure 7 As shown, the compensation currents are △I0, △I1, and △I2, respectively. The compensation current injection terminals (△I0, △I1, and △I2) dynamically adjust the input current of the operational amplifier according to the frequency band control word SW_VC, so that the amplitude of the output voltage VDAC_OUT is opposite to the trend of KVCO_MOD, in order to maintain a constant frequency deviation.

[0073] After optimization of the FSK_MOD module, the frequency offset is relatively small when the band control word SW_VC = 6 (corresponding to the frequency range of 2400MHz to 2430MHz). However, when SW_VC in the VC_BAND module changes, the equivalent capacitance Ctot will change according to formula (2). For example, when the band control word SW_VC changes from 6 to 7, the equivalent capacitance Ctot decreases, causing the KVCO in the FSK_MOD module to increase, thereby increasing the frequency offset.

[0074] To maintain constant frequency offset, the compensation scheme provided in this embodiment of the invention is as follows:

[0075] (1) Due to the change in SW_VC, the KVCO of the FSK_MOD module increases. In order to maintain the frequency offset, the output amplitude of DAC_OUT needs to be reduced accordingly.

[0076] (2) To reduce or increase the voltage value of DAC_OUT, compensation can be achieved by adjusting the currents I0, I1, and I2. Specifically, by increasing or decreasing these current values, the output amplitude of DAC_OUT can be changed, thereby fine-tuning the modulation frequency.

[0077] (3) The change in frequency offset is When KVCO_MOD increases, V is decreased. DAC_OUT -V CM The value of can guarantee that Δf remains approximately constant. For example, if KVCO_MOD increases by 20%, then (V DAC_OUT -V CM The value is reduced by approximately 20% to maintain the stability of Δf.

[0078] Figure 8 This shows the actual effect after further compensation using the band control word SW_VC. The horizontal axis represents the frequency channel, ranging from 2400MHz to 2480MHz; the vertical axis represents the frequency offset, in MHz.

[0079] from Figure 8 As can be seen, the frequency offset exhibits a step-like variation across different frequency bands:

[0080] Within the frequency range of 2400MHz to 2430MHz, with the corresponding band control word SW_VC = 6, the frequency offset remains at approximately 0.25MHz. A compensation scheme is used to adjust the output amplitude of the DAC module, ensuring stable frequency offset within this range.

[0081] Within the frequency range of 2430MHz to 2460MHz, with the corresponding band control word SW_VC = 7, the frequency offset remains at approximately 0.25MHz. This indicates that, through the compensation scheme, the frequency offset can remain stable even if the SW_VC value changes.

[0082] Within the frequency range of 2460MHz to 2480MHz, the corresponding band control word SW_VC=8, and the frequency offset remains at approximately 0.25MHz.

[0083] Overall, Figure 8 The paper demonstrates that, under different frequency bands and SW_VC values, the compensation scheme can maintain stable frequency offset, effectively reducing the impact of different SW_VC values ​​on the modulation frequency and improving the stability and consistency of the modulation frequency. This shows that the above compensation scheme can effectively reduce the impact of different SW_VC values ​​on the modulation frequency, improving the stability and consistency of the modulation frequency. This is particularly important in multi-channel wireless communication, as it ensures that the modulation performance of each channel remains within the expected range, thereby improving the reliability and communication quality of the entire wireless system.

[0084] In summary, the GFSK modulation optimization method and circuit for VCO nonlinear compensation provided by this invention effectively solves the nonlinear distortion problem caused by control voltage fluctuations and frequency band switching in GFSK modulation of the VCO through a unique dual dynamic compensation design. Specifically, this invention, on the one hand, adds a compensation capacitor bank to the FSK_MOD module, which changes synchronously with the main tuning capacitor according to the control voltage, thus offsetting the resonant cavity capacitance changes caused by voltage fluctuations and significantly suppressing frequency offset drift within a single frequency band; on the other hand, it dynamically adjusts the output voltage of the DAC module based on the frequency band control signal, compensating in real time for the impact of load capacitance jumps during frequency band switching, and eliminating frequency offset differences between different frequency bands. The above-mentioned synergistic mechanism enables the modulation frequency offset to be stably maintained within the tolerance range required by the Bluetooth protocol across the entire operating frequency band, greatly improving the anti-adjacent channel interference capability and data transmission reliability of the wireless communication system.

[0085] It should be noted that the above embodiments are merely illustrative examples. The technical solutions of each embodiment can be combined, and all are within the protection scope of this invention.

[0086] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0087] The GFSK modulation optimization method and circuit for VCO nonlinear compensation provided by this invention have been described in detail above. Any obvious modifications made by those skilled in the art without departing from the essence of this invention will constitute an infringement of the patent rights of this invention and will incur corresponding legal liability.

Claims

1. A GFSK modulation optimization method for VCO nonlinear compensation, characterized in that... Includes the following steps: (a) A parallel branch is added to the FSK_MOD module of the VCO. The parallel branch consists of two series-connected variable capacitors (C15, C16). The voltage-capacitance characteristics of the variable capacitors (C15, C16) are the same as those of the main tuning capacitors (C11, C12). One end of the first variable capacitor (C15) is connected between the first fixed capacitor (C17) and the third variable capacitor (C1). One end of the second variable capacitor (C16) is connected between the fourth variable capacitor (C2) and the second fixed capacitor (C18). The other ends of the variable capacitors (C15, C16) are connected within the parallel branch and connected to a fixed voltage. When the control voltage changes, the capacitance of the main tuning capacitors (C11, C12) changes in the same direction as the capacitance of the variable capacitors (C15, C16) to stabilize the modulation sensitivity. (b) Real-time adjustment of the output voltage of the DAC module based on the frequency band control word, wherein the DAC module uses a PMOS transistor (PM0) as the input stage and forms a main current mirror with multiple PMOS transistors (PM1, PM2, ..., PMn-1) to generate bias current; the bias current is controlled by GFSK data and the output current is adjusted by different PMOS transistors (PMC0, PMC1, ..., PMCn-1); the DAC module also includes a current source composed of NMOS transistors (NM0, NM1) and I0, I1, I2. The current source and the main current mirror work together at the input of the operational amplifier (OP); the operational amplifier (OP) converts the input current into voltage, forming the output voltage of the DAC module; the input current of the operational amplifier (OP) is dynamically adjusted according to the frequency band control word through the compensation current injection terminals (△I0, △I1 and △I2) to realize the real-time adjustment of the output voltage; when the frequency band switching causes the modulation sensitivity to change, the modulation voltage difference output by the DAC module changes in the opposite direction to the modulation sensitivity to offset the effect of the load capacitance jump when crossing frequency bands.

2. The GFSK modulation optimization method as described in claim 1, characterized in that: When the positive terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the same direction as the control voltage; when the negative terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the opposite direction as the control voltage.

3. The GFSK modulation optimization method as described in claim 1, characterized in that: The modulation voltage difference is the difference between the output voltage (VDAC_OUT) of the DAC module and the reference voltage (VCM) of the FSK_MOD module.

4. A GFSK modulation optimization circuit, used to implement the GFSK modulation optimization method for VCO nonlinear compensation as described in any one of claims 1 to 3, characterized in that... This includes the FSK_MOD module and the DAC module; among which, The FSK_MOD module includes: First variable capacitor (C15) and second variable capacitor (C16); The third variable capacitor (C1) and the fourth variable capacitor (C2); First fixed capacitor (C17) and second fixed capacitor (C18); The compensation branch consists of a first variable capacitor (C15) and a second variable capacitor (C16) connected in series. One end of the first variable capacitor (C15) is connected between a first fixed capacitor (C17) and a third variable capacitor (C1). One end of the second variable capacitor (C16) is connected between a fourth variable capacitor (C2) and a second fixed capacitor (C18). The other ends of the first variable capacitor (C15) and the second variable capacitor (C16) are connected in parallel within the branch and connected to a fixed voltage. The DAC module includes: The current mirror array consists of a main current mirror composed of a PMOS transistor (PM0) as the input stage and multiple PMOS transistors (PM1, PM2, ..., PMn-1), and an output current regulation unit composed of multiple PMOS transistors (PMC0, PMC1, ..., PMCn-1) controlled by GFSK data. The current source is formed by NMOS transistors (NM0, NM1) and I0, I1, I2; An operational amplifier, the input terminal of which is connected to the output terminal of the main current mirror and the current source; The compensation current injection terminals (△I0, △I1, and △I2) are connected to the input terminals of the operational amplifier and are used to dynamically adjust the input current of the operational amplifier according to the frequency band control word.

5. The GFSK modulation optimization circuit as described in claim 4, characterized in that... In the FSK_MOD module, one end of the third variable capacitor (C1) and the fourth variable capacitor (C2) are respectively connected to the first fixed capacitor (C17) and the second variable capacitor (C16), and the other end is connected to the output voltage of the DAC module.

6. The GFSK modulation optimization circuit as described in claim 4, characterized in that: By changing the GFSK data to control different PMOS transistors, the magnitude of the output current is adjusted, thereby changing the output voltage of the DAC module.

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