Fractional-turn winding based asymmetric half-bridge flyback combiner circuit and conversion method

Abstract

The application provides an asymmetric half-bridge flyback confluence circuit based on a fractional-turn winding and a conversion method, which can be applied to the fields of voltage conversion technology and transformer current sharing technology. The circuit comprises: a half-bridge inverter module for inverting and regulating an input voltage to obtain a high-frequency alternating voltage; a fractional-turn winding transformer comprising a primary winding and N fractional-turn secondary windings, the primary winding and the N fractional-turn secondary windings being used together to step down the high-frequency alternating voltage to obtain an intermediate alternating voltage; and a rectifying and confluence module electrically connected to the fractional-turn winding transformer, comprising M winding rectifying sub-modules in parallel, the M winding rectifying sub-modules being electrically connected to the N fractional-turn secondary windings respectively, and the M winding rectifying sub-modules being used to control the charging and discharging states of the M winding rectifying sub-modules in response to the polarity states of the N fractional-turn secondary windings, so as to rectify and confluence the intermediate alternating voltage to obtain a target voltage and a target current.

Description

Technical Field

[0001] This invention relates to the fields of voltage conversion technology and transformer current sharing technology, and more specifically to an asymmetric half-bridge flyback bus circuit and conversion method based on fractional-turn windings. Background Technology

[0002] Because asymmetrical half-bridge flyback topologies can step down input voltages over a wide range, they are widely used in low-voltage, high-current (3.3~5V, 10A~50A) applications with high power system performance requirements, such as in aerospace. However, for low-voltage, high-current output scenarios, winding losses are often significant, and uneven current distribution is prone to occur in the transformer windings of asymmetrical half-bridge flyback topologies. This can lead to substantial winding losses and circuit overheating during voltage conversion.

[0003] In the process of realizing the above-mentioned inventive concept, it was found that: when multiple secondary windings in the existing asymmetric half-bridge flyback topology are running simultaneously, the different bus lengths of the secondary windings lead to uneven current distribution, resulting in large winding losses. As a result, in the process of converting the input voltage into a low voltage and high current, the topology is prone to problems such as uneven stress on power devices and local overheating, which reduces the efficiency of voltage conversion, the stability of the topology, and the safety of the power supply. Summary of the Invention

[0004] In view of the above problems, the present invention provides an asymmetric half-bridge flyback bus circuit and conversion method based on fractional-turn windings.

[0005] According to a first aspect of the present invention, an asymmetric half-bridge flyback bus circuit based on fractional-turn windings is provided, comprising: a half-bridge inverter module electrically connected to an input power supply, the half-bridge inverter module being used to invert and regulate the input voltage to obtain a high-frequency AC voltage; a fractional-turn transformer electrically connected to the half-bridge inverter module, the fractional-turn transformer including a primary winding and N fractional-turn secondary windings, the primary winding and the N fractional-turn secondary windings being used together to step down the high-frequency AC voltage to obtain an intermediate AC voltage, where N≥2; and a rectifier bus. The current module is electrically connected to the fractional-turn winding transformer. The rectifier-combiner module includes M parallel winding rectifier sub-modules. The M winding rectifier sub-modules are electrically connected to N fractional-turn secondary windings respectively. The M winding rectifier sub-modules are used to control the charging and discharging states of the M winding rectifier sub-modules in response to the polarity state of the N fractional-turn secondary windings, so as to rectify and combine the intermediate AC voltage to obtain the target voltage and target current, M≥1; wherein, the number of turns of the N fractional-turn secondary windings is inversely proportional to the number of rectifier units in each winding rectifier sub-module.

[0006] According to an embodiment of the present invention, M winding rectifier submodules include N rectifier units, and each winding rectifier submodule includes N / M rectifier units. Each rectifier unit comprises: when N=2, a first terminal of the first rectifier unit is electrically connected to the opposite-named terminal of the first fractional-turn secondary winding, and a second terminal of the first rectifier unit is electrically connected to the same-named terminal of the second fractional-turn secondary winding; a first terminal of the second rectifier unit is electrically connected to the opposite-named terminal of the second fractional-turn secondary winding, and a second terminal of the second rectifier unit is electrically connected to the same-named terminal of the first fractional-turn secondary winding; when N>2, the first terminal of the first rectifier unit is electrically connected to the opposite-named terminal of the first fractional-turn secondary winding. The terminals are electrically connected as follows: the second terminal of the first rectifier unit is electrically connected to the same-name terminal of the second fractional-turn secondary winding; the first terminal of the nth rectifier unit is electrically connected to the opposite-name terminal of the nth fractional-turn secondary winding, and the second terminal of the nth rectifier unit is electrically connected to the same-name terminal of the (n+1)th fractional-turn secondary winding; the first terminal of the N / Mth rectifier unit is electrically connected to the opposite-name terminal of the N / Mth fractional-turn secondary winding, and the second terminal of the N / Mth rectifier unit is electrically connected to the same-name terminal of the first fractional-turn secondary winding, where 2≤n≤N / M-1; and the first terminals of the output filter capacitors in the N rectifier units are electrically connected to each other, and the second terminals of the output filter capacitors are electrically connected to each other.

[0007] According to an embodiment of the present invention, each rectifier unit includes: an output filter capacitor, the first end of which is electrically connected to the opposite-named end of the fractional-turn secondary winding, and the second end of which is electrically connected to the first end of the synchronous rectifier tube; and a synchronous rectifier tube, the first end of which is electrically connected to the second end of the output filter capacitor, and the second end of which is electrically connected to the same-named end of the next fractional-turn secondary winding.

[0008] According to an embodiment of the present invention, the number of rectifier units in each winding rectifier submodule is 2. Q In the case of , the number of turns in each fractional-turn secondary winding is (1 / 2). Q The winding rectifier submodule contains a Q-level busbar, where Q represents the fractional-turn winding parameters, of which 2 Q = N / M, Q≥1.

[0009] According to an embodiment of the present invention, the bus point includes a positive bus point and a negative bus point, and the number of rectifier units in each winding rectifier submodule is 2. Q In the case of 2 Q The output filter capacitors are divided into groups of two. Q-1 The second output filter capacitor bank Q-1 The first terminals of the two output filter capacitors in the output filter capacitor group are connected to the second... Q-1 Connect the positive poles of the first-level bus, the second... Q-1The second terminals of the two output filter capacitors in the output filter capacitor group are connected to the second... Q-1 Each first-order bus negative pole is connected; wherein, when Q≥2, the number of the (q-1)th-order positive and negative poles in the Q-order bus points is twice that of the q-th-order positive and negative poles, and every two positive and negative poles in the (q-1)th-order bus points are connected to the corresponding positive and negative poles in the q-th-order bus points; 1 <q≤Q。

[0010] According to an embodiment of the present invention, the positive conductor used to connect two adjacent positive terminals of the bus and the negative conductor used to connect two adjacent negative terminals of the bus are conductors with the same length and width and symmetrical impedance.

[0011] According to an embodiment of the present invention, a half-bridge inverter module includes: a half-bridge inverter submodule electrically connected to an input power supply; the half-bridge inverter submodule includes a first power switch and a second power switch; a first terminal of the first power switch is electrically connected to the positive terminal of the input power supply, a second terminal of the first power switch is electrically connected to a resonator module, a first terminal of the second power switch is electrically connected to the resonator module, and a second terminal of the second power switch is electrically connected to the negative terminal of the input power supply; by controlling the duty cycle of the first and second power switches, the input voltage is inverted and regulated to obtain an intermediate high-frequency voltage; the resonator... The module is electrically connected to the half-bridge inverter sub-module. The resonant sub-module includes a resonant inductor, a resonant capacitor, and a magnetizing inductor. The first terminal of the resonant inductor is electrically connected to the second terminal of the first power switch, and the second terminal of the resonant inductor is electrically connected to the same-name terminal of the primary winding. The first terminal of the resonant capacitor is electrically connected to the second terminal of the second power switch, and the second terminal of the resonant capacitor is electrically connected to the opposite-name terminal of the primary winding. The first terminal of the magnetizing inductor is electrically connected to the second terminal of the resonant inductor, and the second terminal of the magnetizing inductor is electrically connected to the second terminal of the resonant capacitor. The resonant sub-module is used to perform resonant filtering on the intermediate high-frequency voltage to obtain a high-frequency AC voltage.

[0012] According to an embodiment of the present invention, the switching cycles of the first power switch and the second power switch include a first time period and a second time period. During the first time period, the first power switch is closed and the second power switch is open, so that the magnetizing inductor is in a charging state, the corresponding terminals of the N fractional turns of the secondary windings corresponding to the corresponding terminals of the primary winding are at a high potential, all N synchronous rectifiers are open and all N output filter capacitors are in a discharging state. During the second time period, the first power switch is open and the second power switch is closed, so that the magnetizing inductor is in a discharging state, the corresponding terminals of the N fractional turns of the secondary windings corresponding to the corresponding terminals of the primary winding are at a low potential, all N synchronous rectifiers are closed and all N output filter capacitors are charging, so as to rectify and combine the intermediate AC voltage obtained after the step-down process.

[0013] According to an embodiment of the present invention, the primary winding is an odd-numbered-turn winding, and the primary winding and N fractional-turn secondary windings are distributed in an even-numbered-layer circuit board. The intermediate-layer winding of the primary winding is split into two parallel windings that are symmetrically distributed and electrically connected to the other layers of the primary winding except for the intermediate-layer winding. The other layers of the primary winding except for the intermediate-layer winding are symmetrically distributed in the multi-layer intermediate circuit board of the even-numbered-layer circuit board. The N fractional-turn secondary windings are symmetrically distributed in the top and bottom layers of the even-numbered-layer circuit board.

[0014] A second aspect of the present invention provides a voltage conversion method, comprising: sending an input voltage to a half-bridge inverter module; the half-bridge inverter module performing inversion and voltage regulation on the input voltage to obtain and send a high-frequency AC voltage to a fractional-turn winding transformer; based on the turns ratio between the primary winding and N fractional-turn secondary windings in the fractional-turn winding transformer, performing voltage reduction on the high-frequency AC voltage to obtain and send an intermediate AC voltage to a rectifier bus module; and, in response to the polarity state of the N fractional-turn secondary windings, using M winding rectifier submodules in the rectifier bus module to rectify and combine the intermediate AC voltage to obtain and output a target voltage and a target current.

[0015] According to the asymmetric half-bridge flyback bus circuit and conversion method based on fractional-turn windings of the present invention, the asymmetric half-bridge flyback circuit based on fractional-turn windings may include a half-bridge inverter module, a fractional-turn winding transformer, and a rectifier bus module. The half-bridge inverter module is used to control the state of the primary winding in the fractional-turn winding transformer that is electrically connected to the half-bridge inverter module, thereby controlling the polarity state of the N fractional-turn secondary windings. In response to the change in the polarity state of the N fractional-turn secondary windings, the charging and discharging states of the M winding rectifier sub-modules in the rectifier bus module change, thereby processing the input voltage and efficiently obtaining and outputting a stable small voltage (target voltage, e.g., 5V) and a large current (target current, e.g., 24A).

[0016] According to an embodiment of the present invention, furthermore, through the rectifier units within the M parallel winding rectifier submodules within the rectifier bus module, the rectification and filtering processes are equivalent to the N fractional-turn secondary windings connected in series with the M winding rectifier submodules sharing the voltage. This reduces the voltage flowing through the N fractional-turn secondary windings, allowing the number of turns in the secondary windings to be smaller, thereby significantly shortening the winding length, reducing winding losses (copper losses) and the heat generated by the transformer during operation, improving circuit reliability, and improving the circuit's thermal distribution. Simultaneously, the symmetrical structure formed by the M parallel winding rectifier submodules allows the magnetic flux of the fractional-turn secondary windings to alternate and cancel each other out, reducing AC losses.

[0017] According to embodiments of the present invention, by combining a tree-like network structure with symmetrical pairwise current merging and hierarchical merging with M winding rectifier submodules, precise current distribution can be achieved for any number of parallel winding rectifier submodules and N fractional-turn secondary windings. This results in a circuit with advantages such as regular structure, strong scalability, and automatic current balancing, making it better suited for low-voltage, high-current power converter scenarios with output current requirements ranging from tens to hundreds of amperes and output voltages from 1 to 12V. Attached Figure Description

[0018] The above-described features, other objects, and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A schematic diagram of an asymmetric half-bridge flyback circuit based on fractional-turn windings according to an embodiment of the present invention is shown.

[0020] Figure 2 A schematic diagram of a structure containing two rectifier units according to an embodiment of the present invention is shown;

[0021] Figure 3a A schematic diagram of a structure containing more than two rectifier units according to an embodiment of the present invention is shown;

[0022] Figure 3b A schematic diagram of a structure containing more than two rectifier units according to another embodiment of the present invention is shown;

[0023] Figure 4 A schematic diagram of the internal structure of the rectifier unit according to an embodiment of the present invention is shown;

[0024] Figure 5a A schematic diagram of current sharing and collection of a 1 / 2-turn secondary winding according to an embodiment of the present invention is shown;

[0025] Figure 5b A schematic diagram of the current sharing and merging circuit of a 1 / 2-turn secondary winding according to an embodiment of the present invention is shown;

[0026] Figure 6a A schematic diagram of current sharing and collection of a 1 / 4-turn secondary winding according to an embodiment of the present invention is shown;

[0027] Figure 6b A schematic diagram of the current sharing and merging circuit of a 1 / 4-turn secondary winding according to an embodiment of the present invention is shown;

[0028] Figure 7 A schematic diagram of the structure of a half-bridge inverter module according to an embodiment of the present invention is shown;

[0029] Figure 8A schematic diagram of an asymmetric half-bridge flyback bus circuit with a 1 / 2-turn secondary winding containing a winding rectifier submodule is shown according to an embodiment of the present invention.

[0030] Figure 9 A schematic diagram of an asymmetric half-bridge flyback bus circuit with a 1 / 4-turn secondary winding containing a winding rectifier submodule is shown according to an embodiment of the present invention.

[0031] Figure 10 A schematic diagram of an asymmetric half-bridge flyback bus circuit with a 1 / 2-turn secondary winding of a parallel rectifier submodule according to an embodiment of the present invention is shown.

[0032] Figure 11a A schematic diagram of the structure of the first layer winding of a 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0033] Figure 11b A schematic diagram of the structure of the second layer winding of the 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0034] Figure 11c A schematic diagram of the third layer winding of a 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0035] Figure 11d A schematic diagram of the fourth layer winding of a 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0036] Figure 12 A schematic diagram comparing the winding losses of a full-turn winding and a 1 / 2-turn winding according to an embodiment of the present invention is shown;

[0037] Figure 13 A schematic diagram showing the efficiency comparison between a full-turn winding and a 1 / 2-turn winding according to an embodiment of the present invention is shown;

[0038] Figure 14 A flowchart of a voltage conversion method according to an embodiment of the present invention is shown. Detailed Implementation

[0039] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the invention. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the invention for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0040] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0041] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0042] When using expressions such as "at least one of A, B and C", they should generally be interpreted in accordance with the meaning that is commonly understood by those skilled in the art (e.g., "a system having at least one of A, B and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B and C, etc.).

[0043] In the technical solution of this invention, the user information (including but not limited to user personal information, user image information, user device information, such as location information) and data (including but not limited to data used for analysis, stored data, and displayed data) involved are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, storage, use, processing, transmission, provision, invention, and application of related data all comply with relevant laws, regulations, and standards, take necessary confidentiality measures, do not violate public order and good morals, and provide corresponding operation entry points for users to choose to authorize or refuse.

[0044] With the increasing demands for power system performance in the aerospace field, space power supplies typically need to convert an input voltage of approximately 100V to a low-voltage, high-current output (5V / 24A). Therefore, power converters used for this conversion must meet wide-range voltage gain requirements while also withstanding low device voltage stress to ensure system reliability and lifespan. Based on this, the asymmetric half-bridge flyback topology, due to its wide-gain characteristics and low voltage stress, has been applied in aerospace power supply applications such as those with a 100V bus architecture.

[0045] However, asymmetric half-bridge flyback topologies often experience significant winding losses and overheating during voltage conversion. Furthermore, they suffer from current path asymmetry. Specifically, when multiple secondary windings operate in parallel, uneven current distribution between different modules or turns can occur, leading to reduced system efficiency and increased losses. During development, it was discovered that in existing asymmetric half-bridge flyback topologies, the uneven current distribution among multiple secondary windings results in substantial winding losses. This leads to uneven stress on power devices and localized overheating during the conversion of input voltage to low-voltage, high-current, thus compromising voltage conversion efficiency, topology stability, and power supply safety.

[0046] In view of this, embodiments of the present invention provide an asymmetric half-bridge flyback bus circuit based on fractional-turn windings, comprising: a half-bridge inverter module electrically connected to the input power supply, the half-bridge inverter module being used to invert and regulate the input voltage to obtain a high-frequency AC voltage; a fractional-turn transformer electrically connected to the half-bridge inverter module, the fractional-turn transformer including a primary winding and N fractional-turn secondary windings, the primary winding and the N fractional-turn secondary windings being used together to step down the high-frequency AC voltage to obtain an intermediate AC voltage, where N≥2; and a rectifier bus. The current module is electrically connected to the fractional-turn winding transformer. The rectifier-combiner module includes M parallel winding rectifier sub-modules. The M winding rectifier sub-modules are electrically connected to N fractional-turn secondary windings respectively. The M winding rectifier sub-modules are used to control the charging and discharging states of the M winding rectifier sub-modules in response to the polarity state of the N fractional-turn secondary windings, so as to rectify and combine the intermediate AC voltage to obtain the target voltage and target current, M≥1; wherein, the number of turns of the N fractional-turn secondary windings is inversely proportional to the number of rectifier units in each winding rectifier sub-module.

[0047] Figure 1 A schematic diagram of an asymmetric half-bridge flyback bus circuit based on fractional-turn windings according to an embodiment of the present invention is shown.

[0048] like Figure 1 As shown, the asymmetric half-bridge flyback circuit based on fractional-turn windings in this embodiment may include a half-bridge inverter module 101, a fractional-turn winding transformer 102, and a rectifier busbar module 103.

[0049] Specifically, the half-bridge inverter module 101 can be electrically connected to the input power supply. The half-bridge inverter module 101 can be used to invert and regulate the input voltage Vin to obtain a high-frequency AC voltage (500kHz-1MHz, 70~120V).

[0050] The fractional-turn transformer 102 can be electrically connected to the half-bridge inverter module 101. The fractional-turn transformer 102 can include a primary winding Np and N fractional-turn secondary windings (for example, the first fractional-turn secondary winding Ns1 and the second fractional-turn secondary winding Ns2 shown in the figure). The primary winding Np and the N fractional-turn secondary windings are used together to step down the high-frequency AC voltage to obtain an intermediate AC voltage, where N≥2 and N is an even number.

[0051] In the fractional-turn transformer 102, the corresponding terminals of the primary winding Np and the fractional-turn secondary winding are in opposite directions. The fractional-turn secondary winding can be a secondary winding with a fractional number of turns; that is, the number of turns of the fractional-turn secondary winding can be... The primary winding Np can be an odd number of turns. For example, the turns ratio between the primary winding Np and the two fractional-turn secondary windings can be 3:0.5:0.5.

[0052] The primary winding Np of the fractional-turn transformer 102 can be electrically connected to the half-bridge inverter module 101, and the N fractional-turn secondary windings can be electrically connected to the rectifier-bus module 103. By adjusting the turns ratio between the primary winding Np and the N fractional-turn secondary windings, the high-frequency AC voltage can be stepped down to obtain an ideal voltage. The N fractional-turn secondary windings have the same number of turns.

[0053] The rectifier-combiner module 103 can be electrically connected to the fractional-turn winding transformer 102. The rectifier-combiner module 103 includes M parallel-connected winding rectifier submodules 106, each of which is electrically connected to N fractional-turn secondary windings. The M winding rectifier submodules 106 are used to control their charging and discharging states in response to the polarity states of the N fractional-turn secondary windings, thereby rectifying and combining the intermediate AC voltage to obtain the target voltage and target current, where M ≥ 1. Figure 1 Only one winding rectifier submodule 106 is shown in the figure.

[0054] The number of turns in the N fractional-turn secondary windings is inversely proportional to the number of rectifier units 107 in each winding rectifier submodule 106.

[0055] Typically, multiple winding rectifier submodules 106 can be connected in parallel within the rectifier bus module 103 to reduce the current flowing through the N fractional-turn secondary windings, thereby reducing the losses of the N fractional-turn secondary windings. Simultaneously, the parallel connection of multiple winding rectifier submodules 106 allows the rectifier bus module 103, which is connected in series with the N fractional-turn secondary windings, to have a symmetrical structure, enabling the magnetic flux of the N fractional-turn secondary windings to be interleaved and canceled out, further reducing AC losses.

[0056] For example, in a rectifier bus module that includes a single-winding rectifier submodule, the current flowing through the N fractional-turn secondary windings is I, and the resistance is R. After connecting two winding rectifier submodules in parallel, the resistance of the N fractional-turn secondary windings remains unchanged at R, but the current in each fractional-turn secondary winding is halved, thus increasing the loss. Compared to a single winding rectifier submodule, it reduces The loss.

[0057] Each winding rectifier submodule 106 may include multiple rectifier units 107. The number of rectifier units 107 corresponds to the number of fractional-turn secondary windings connected in series in each winding rectifier submodule 106. That is, when multiple winding rectifier submodules 106 are connected in parallel, N fractional-turn secondary windings can be evenly distributed in each winding rectifier submodule 106. Simultaneously, the number of turns in the N fractional-turn secondary windings is inversely proportional to the number of rectifier units 107 in each winding rectifier submodule 106. The more rectifier units 107 in a winding rectifier submodule 106, the smaller the number of turns in the fractional-turn secondary windings connected in series with that winding rectifier submodule 106. Figure 1 This only shows the general connection of the circuit. The number of rectifier units and the number of turns of the fractional-turn secondary winding are only examples and no specific limitations are imposed.

[0058] For example, a fractional-turn transformer includes four fractional-turn secondary windings. In the case where the rectifier bus module includes a winding rectifier submodule, the winding rectifier submodule includes four rectifier units. The winding rectifier submodule is connected in series with the four fractional-turn secondary windings, and the number of turns in each fractional-turn secondary winding is... Turns.

[0059] For example, a fractional-turn transformer includes four fractional-turn secondary windings. In the case where the rectifier busbar module includes two parallel winding rectifier submodules, each winding rectifier submodule includes two rectifier units. Each winding rectifier submodule is connected in series with the two fractional-turn secondary windings, and the number of turns in each fractional-turn secondary winding is... Turns.

[0060] For example, a fractional-turn winding transformer includes eight fractional-turn secondary windings. In the case where the rectifier busbar module includes two parallel winding rectifier submodules, each winding rectifier submodule includes four rectifier units. Each winding rectifier submodule is connected in series with four fractional-turn secondary windings, and the number of turns in each fractional-turn secondary winding is... Turns.

[0061] By controlling the half-bridge inverter module 101 to change the direction of the current flowing through the primary winding Np of the fractional-turn transformer 102, the magnetic flux direction of the primary winding Np is reversed. Based on the principle of electromagnetic induction, the polarity state of the N fractional-turn secondary windings and the charging and discharging state of the M winding rectifier submodules 106 are changed, thereby rectifying the intermediate AC voltage. Then, through the multi-stage busbar of the circuit, the rectified current is staged and combined to obtain and output the target voltage and target current.

[0062] According to embodiments of the present invention, an asymmetric half-bridge flyback circuit based on fractional-turn windings may include a half-bridge inverter module, a fractional-turn transformer, and a rectifier-busbar module. The half-bridge inverter module is used to control the state of the primary winding in the fractional-turn transformer that is electrically connected to the half-bridge inverter module, thereby controlling the polarity state of the N fractional-turn secondary windings. In response to changes in the polarity state of the N fractional-turn secondary windings, the charging and discharging states of the M winding rectifier submodules within the rectifier-busbar module change, thereby processing the input voltage to efficiently obtain and output a stable small voltage (target voltage, e.g., 5V) and a large current (target current, e.g., 24A).

[0063] According to an embodiment of the present invention, furthermore, through the rectifier units within the M parallel winding rectifier submodules within the rectifier bus module, the rectification and filtering processes are equivalent to the N fractional-turn secondary windings connected in series with the M winding rectifier submodules sharing the voltage. This reduces the voltage flowing through the N fractional-turn secondary windings, allowing the number of turns in the secondary windings to be smaller, thereby significantly shortening the winding length, reducing winding losses (copper losses) and the heat generated by the transformer during operation, improving circuit reliability, and improving the circuit's thermal distribution. Simultaneously, the symmetrical structure formed by the M parallel winding rectifier submodules allows the magnetic flux of the fractional-turn secondary windings to alternate and cancel each other out, reducing AC losses.

[0064] According to an embodiment of the present invention, by combining a tree-like network structure with symmetrical pairwise current merging and hierarchical merging with M winding rectifier submodules, precise current distribution can be achieved for any number of parallel winding rectifier submodules and N fractional-turn secondary windings. This results in a circuit with advantages such as regular structure, strong scalability, and automatic current balancing, making it better suited for low-voltage, high-current power converter scenarios with output current requirements ranging from tens to hundreds of amperes and output voltages from 1 to 12V.

[0065] The M winding rectifier submodules may include N rectifier units, and each winding rectifier submodule may include N / M rectifier units. The rectifier units are connected in series with the fractional-turn secondary windings.

[0066] Figure 2A schematic diagram of a structure containing two rectifier units according to an embodiment of the present invention is shown.

[0067] like Figure 2 As shown, in the case of only two rectifier units, the number of winding rectifier submodules 106 is also typically only one. Specifically, the first terminal of the first rectifier unit 201 is electrically connected to the opposite terminal of the first fractional-turn secondary winding Ns1, and the second terminal of the first rectifier unit 201 is electrically connected to the same terminal of the second fractional-turn secondary winding Ns2. The first terminal of the second rectifier unit 202 is electrically connected to the opposite terminal of the second fractional-turn secondary winding Ns2, and the second terminal of the second rectifier unit 202 is electrically connected to the same terminal of the first fractional-turn secondary winding Ns1. The first terminals (positive plates) of the output filter capacitors in the first rectifier unit 201 and the second rectifier unit 202 are electrically connected to each other, and the second terminals (negative plates) of the output filter capacitors are electrically connected to each other, thereby forming a junction point.

[0068] When there are more than two rectifier units, the number of rectifier units in each winding rectifier submodule is related to the number of winding rectifier submodules. Specifically, when N>2, the first terminal of the first rectifier unit is electrically connected to the opposite terminal of the first fractional-turn secondary winding, and the second terminal of the first rectifier unit is electrically connected to the same terminal of the second fractional-turn secondary winding. The first terminal of the nth rectifier unit is electrically connected to the opposite terminal of the nth fractional-turn secondary winding, and the second terminal of the nth rectifier unit is electrically connected to the same terminal of the (n+1)th fractional-turn secondary winding. The first terminal of the N / Mth (N divided by M)th rectifier unit is electrically connected to the opposite terminal of the N / Mth fractional-turn secondary winding, and the second terminal of the N / Mth rectifier unit is electrically connected to the same terminal of the first fractional-turn secondary winding, where 2≤n≤N / M-1.

[0069] Figure 3a A schematic diagram of a structure containing more than two rectifier units according to an embodiment of the present invention is shown.

[0070] like Figure 3aAs shown, in the case of having four rectifier units and only one winding rectifier submodule 106, the winding rectifier submodule 106 can include four rectifier units. The first terminal of the first rectifier unit 201 is electrically connected to the opposite terminal of the first fractional-turn secondary winding Ns1, and the second terminal of the first rectifier unit 201 is electrically connected to the same terminal of the second fractional-turn secondary winding Ns2. The first terminal of the second rectifier unit 202 is electrically connected to the opposite terminal of the second fractional-turn secondary winding Ns2, and the second terminal of the second rectifier unit 202 is electrically connected to the same terminal of the third fractional-turn secondary winding Ns3. The first terminal of the third rectifier unit 301 is electrically connected to the opposite terminal of the third fractional-turn secondary winding Ns3, and the second terminal of the third rectifier unit 301 is electrically connected to the same terminal of the fourth fractional-turn secondary winding Ns4. The first end of the fourth rectifier unit 302 is electrically connected to the opposite-named end of the fourth fractional-turn secondary winding Ns4, and the second end of the fourth rectifier unit 302 is electrically connected to the same-named end of the first fractional-turn secondary winding Ns1.

[0071] Figure 3b A schematic diagram of a structure containing more than two rectifier units is shown according to another embodiment of the present invention.

[0072] like Figure 3b As shown, in the case of having four rectifier units and two winding rectifier submodules, each winding rectifier submodule can include two rectifier units, and the two winding rectifier submodules are connected in parallel.

[0073] The first terminal of the first rectifier unit 201 within the first winding rectifier submodule 303 is electrically connected to the opposite-named terminal of the first fractional-turn secondary winding Ns1, and the second terminal of the first rectifier unit 201 is electrically connected to the same-named terminal of the second fractional-turn secondary winding Ns2. The first terminal of the second rectifier unit 202 is electrically connected to the opposite-named terminal of the second fractional-turn secondary winding Ns2, and the second terminal of the second rectifier unit 202 is electrically connected to the same-named terminal of the first fractional-turn secondary winding Ns1.

[0074] The first terminal of the third rectifier unit 301 within the second winding rectifier submodule 304 is electrically connected to the opposite-named terminal of the third fractional-turn secondary winding Ns3, and the second terminal of the third rectifier unit 301 is electrically connected to the same-named terminal of the fourth fractional-turn secondary winding Ns4. The first terminal of the fourth rectifier unit 302 is electrically connected to the opposite-named terminal of the fourth fractional-turn secondary winding Ns4, and the second terminal of the fourth rectifier unit 302 is electrically connected to the same-named terminal of the third fractional-turn secondary winding Ns3.

[0075] Furthermore, regardless of the number of rectifier units in the circuit, the first terminals (positive plates) of the output filter capacitors in each rectifier unit are electrically connected to each other, and the second terminals (negative plates) of the output filter capacitors are electrically connected to each other, thereby constructing a junction point.

[0076] By utilizing the rectifier unit to share the voltage of the secondary winding of the transformer as a whole, a fractional-turn secondary winding can be used to form a complete circuit winding based on multiple rectifier units and multiple fractional-turn secondary windings.

[0077] According to an embodiment of the present invention, each winding rectifier submodule includes at least two rectifier units, and N / M rectifier units in each winding rectifier submodule are connected in series with N / M fractional-turn secondary windings. By using rectifier units and fractional-turn secondary windings inversely proportional to the number of turns of the fractional-turn secondary windings, a complete secondary winding structure is equivalently formed, thereby sharing the voltage for the secondary windings. This allows the number of turns in the secondary windings to be smaller, significantly shortening the winding length, reducing winding losses (copper losses) and the heat generated by the transformer during operation, improving circuit reliability, and improving the circuit's thermal distribution. Simultaneously, by electrically connecting the first terminals (positive plates) of the output filter capacitors in each rectifier unit to each other, and the second terminals (negative plates) of the output filter capacitors to each other, multiple busbars are constructed to accurately and evenly distribute the current in the rectifier busbar module. The current is then combined through these busbars and merged step-by-step according to a binary tree structure, ultimately forming a single current output. Passive current balancing is achieved without relying on active current control.

[0078] Figure 4 A schematic diagram of the internal structure of the rectifier unit 107 according to an embodiment of the present invention is shown.

[0079] like Figure 4 As shown, each rectifier unit 107 may include an output filter capacitor C and a synchronous rectifier diode SR. Figure 4 The diagram only shows the connection relationship between the output filter capacitor and the synchronous rectifier diode.

[0080] Each winding rectifier submodule may include at least two rectifier units 107, namely, at least two output filter capacitors C and at least two synchronous rectifier diodes SR. The first terminal of the output filter capacitor C within the rectifier unit 107 is electrically connected to the opposite-named terminal of the fractional-turn secondary winding, and the second terminal of the output filter capacitor C is electrically connected to the first terminal of the synchronous rectifier diode SR. The first terminal of the synchronous rectifier diode SR is electrically connected to the second terminal of the output filter capacitor C, and the second terminal of the synchronous rectifier diode SR is electrically connected to the same-named terminal of the next fractional-turn secondary winding.

[0081] As the direction of the magnetic flux in the primary winding changes, the synchronous rectifier tube SR in each rectifier unit is turned on or off accordingly. When the synchronous rectifier tube SR is turned on, the output filter capacitor C in each rectifier unit is in a charging and power supply state. When the synchronous rectifier tube SR is turned off, the output filter capacitor C in each rectifier unit is in a discharging and power supply state.

[0082] By changing the rectification and filtering state of the synchronous rectifier tube SR and the charging and discharging state of the output filter capacitor C in each rectifier unit, the voltage is shared by the secondary winding of the transformer connected in series with each rectifier unit, thereby reducing the voltage of the secondary winding. This reduces the number of turns (fractional turns) of the secondary winding, and the circuit composed of at least two fractional-turn secondary windings, at least two synchronous rectifier tubes SR, and at least two output filter capacitors C is equivalent to the complete secondary winding of the transformer.

[0083] Then, the current passing through the synchronous rectifier tube SR and the output filter capacitor C is combined in parallel at at least one bus point through each output filter capacitor C to obtain and output the target current and target voltage.

[0084] According to an embodiment of the present invention, each rectifier unit may include an output filter capacitor and a synchronous rectifier diode. Responding to different states of the primary winding, the charging and discharging states of the output filter capacitor and the on / off states of the synchronous rectifier diode are used to achieve a combined output voltage division of filtering and rectification. This allows for the use of a fractional-turn secondary winding structure with a smaller number of turns in the circuit, shortening the winding length, reducing winding losses (copper losses) and the heat generated by the transformer during operation, improving circuit reliability, and enhancing the circuit's thermal distribution.

[0085] The rectifier-combiner module may also include an output load. The first end of the output load is electrically connected to the positive output terminal of the circuit, and the second end of the output load is electrically connected to the negative output terminal of the circuit. The first end of the output filter capacitors in the N rectifier units that are electrically connected to each other is electrically connected to the positive output terminal of the circuit, and the second end of the output filter capacitors in the N rectifier units that are electrically connected to each other is electrically connected to the negative output terminal of the circuit.

[0086] According to an embodiment of the present invention, the number of rectifier units in each winding rectifier submodule is 2. Q In the case of , the number of turns in each fractional-turn secondary winding is (1 / 2). Q The rectifier submodule contains a Q-level busbar, where Q can be characterized as a fractional-turn winding parameter, where 2 Q = N / M, Q≥1.

[0087] By electrically connecting the first end (positive plate) of the output filter capacitor in each rectifier unit to each other, and electrically connecting the second end (negative plate) of the output filter capacitor to each other, multiple multi-level current-sharing points can be constructed based on the tree-shaped current-sharing and current-combining concept, and the current output by the output filter capacitor can be controlled by the multiple multi-level current-combining points.

[0088] For example, if a winding rectifier submodule contains two rectifier units, it can contain one primary bus point; if a winding rectifier submodule contains four rectifier units, it can contain two primary bus points and one secondary bus point; and if a winding rectifier submodule contains eight rectifier units, it can contain four primary bus points, two secondary bus points, and one tertiary bus point.

[0089] According to embodiments of the present invention, the number of rectifier units within the winding rectifier submodule is inversely proportional to the number of turns in the series-connected fractional-turn secondary winding. This allows for the use of any rectifier unit paired with a corresponding fractional-turn secondary winding, enabling efficient input voltage conversion while reducing winding length and circuit size and weight. Furthermore, by setting multiple bus points in the rectifier bus circuit based on the number of rectifier units, the circuit structure is symmetrically distributed, allowing for precise and even current distribution. This reduces heat generation, improves heat distribution, and enables the magnetic flux of the fractional-turn secondary winding to alternate and cancel each other out, thus reducing AC losses.

[0090] According to an embodiment of the present invention, specifically, the busbar may include a positive busbar and a negative busbar.

[0091] The number of rectifier units in each winding rectifier submodule is 2 Q In the case of 2 Q The output filter capacitors can be divided into groups of two, totaling 2. Q-1 One output filter capacitor bank. The second one. Q-1 The first terminals of the two output filter capacitors in the output filter capacitor group are connected to the second... Q-1 Connect the positive poles of the first-level bus, the second... Q-1 The second terminals of the two output filter capacitors in the output filter capacitor group are connected to the second... Q-1 Connect the negative pole of the first-level bus.

[0092] Where, when Q≥2, the number of positive and negative terminals of the (q-1)th stage in the Q-stage busbar is twice that of the positive and negative terminals of the q-th stage, and every two positive and negative terminals of the (q-1)th stage are connected to the corresponding positive and negative terminals of the q-th stage busbar; 1 <q≤Q。

[0093] For example, if there are eight rectifier units in the winding rectifier submodule, the eight rectifier units can be divided into four output filter capacitor groups in pairs (the first and second rectifier units are the first group, the third and fourth rectifier units are the second group, the fifth and sixth rectifier units are the third group, and the seventh and eighth rectifier units are the fourth group).

[0094] Then, connect the first terminals of the first and second output filter capacitors in the first group to the positive terminal of the first-stage bus, and connect the second terminals of the first and second output filter capacitors to the negative terminal of the first-stage bus. In the second group, connect the first terminals of the third and fourth output filter capacitors to the positive terminal of the second-stage bus, and connect the second terminals of the third and fourth output filter capacitors to the negative terminal of the second-stage bus. In the third group, connect the first terminals of the fifth and sixth output filter capacitors to the positive terminal of the third-stage bus, and connect the second terminals of the fifth and sixth output filter capacitors to the negative terminal of the third-stage bus. In the fourth group, connect the first terminals of the seventh and eighth output filter capacitors to the positive terminal of the fourth-stage bus, and connect the second terminals of the seventh and eighth output filter capacitors to the negative terminal of the fourth-stage bus.

[0095] Then connect the first and second primary positive terminals of the bus to the first secondary positive terminal, and connect the first and second primary negative terminals of the bus to the first secondary negative terminal. Similarly, connect the third and fourth primary positive terminals of the bus to the second secondary positive terminal, and connect the third and fourth primary negative terminals of the bus to the second secondary negative terminal.

[0096] Finally, connect the first and second secondary bus positive terminals to the tertiary bus positive terminal, and connect the first and second secondary bus negative terminals to the tertiary bus negative terminal. Connect the tertiary bus positive terminal to the positive output terminal of the circuit, and connect the tertiary bus negative terminal to the negative output terminal of the circuit.

[0097] According to an embodiment of the present invention, the positive conductor used to connect two adjacent positive terminals of the bus and the negative conductor used to connect two adjacent negative terminals of the bus are conductors with the same length and width and symmetrical impedance.

[0098] Figure 5a A schematic diagram of the current sharing and collection of a 1 / 2-turn secondary winding according to an embodiment of the present invention is shown.

[0099] like Figure 5aAs shown, the gray area represents the core region of the fractional-turn transformer, and the blue area represents the two fractional-turn secondary windings of the transformer. The two 1 / 2-turn fractional-turn secondary windings serve as sub-windings in the integrated core, coupled to the same transformer core column. The two fractional-turn secondary windings are electrically connected together via two output filter capacitors (the first output filter capacitor C1 and the second output filter capacitor C2) and two synchronous rectifier diodes (the first synchronous rectifier diode SR1 and the second synchronous rectifier diode SR2). Then, using wires (copper foil or PCB wiring) of the same length and width with symmetrical impedance, the first terminals of the first output filter capacitor C1 and the second output filter capacitor C2 are connected to the primary bus positive terminal (red line R). S+ The second terminals of the first output filter capacitor C1 and the second output filter capacitor C2 are connected to the negative terminal of the first-stage bus (green line R). S- The positive and negative terminals of the first-stage bus are connected to the two ends of the output load, respectively, so as to use the positive and negative terminals of the first-stage bus for bus output.

[0100] Figure 5b A schematic diagram of a current-sharing and busbar circuit with a 1 / 2-turn secondary winding according to an embodiment of the present invention is shown.

[0101] like Figure 5b As shown, Figure 5b for Figure 5a The equivalent circuit structure diagram is shown below. The opposite-named terminal of the first fractional-turn secondary winding Ns1 is electrically connected to the first terminal of the first output filter capacitor C1. The second terminal of the first output filter capacitor C1 is electrically connected to the first terminal of the first synchronous rectifier SR1. The second terminal of the first synchronous rectifier SR1 is electrically connected to the same-named terminal of the second fractional-turn secondary winding Ns2. The opposite-named terminal of the second fractional-turn secondary winding Ns2 is electrically connected to the first terminal of the second output filter capacitor C2. The second terminal of the second output filter capacitor C2 is electrically connected to the first terminal of the second synchronous rectifier SR2. The second terminal of the second synchronous rectifier SR2 is electrically connected to the same-named terminal of the first fractional-turn secondary winding Ns1.

[0102] The first terminal of the first output filter capacitor C1 and the first terminal of the second output filter capacitor C2 are connected to the positive terminal of the first-stage bus (the first terminal of the output load), and the second terminals of the first output filter capacitor C1 and the second terminal of the second output filter capacitor C2 are connected to the negative terminal of the first-stage bus (the second terminal of the output load). Furthermore, because the circuit structure is completely symmetrical, i.e., the electrical paths are of equal length and the impedances are consistent, automatic current sharing can be achieved even under passive conditions.

[0103] Specifically, current sharing can be achieved by referring to formulas (1) to (7).

[0104] (1);

[0105] Among them, V O It can be characterized as the voltage across the output load in a circuit containing a 1 / 2-turn fractional-turn secondary winding, V O1 R1 can be represented as the voltage across the first output filter capacitor, R1 can be represented as the output impedance of the first output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding, and I1 can be represented as the current output by the first output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding.

[0106] (2);

[0107] Among them, V O2 R2 can be represented as the voltage across the second output filter capacitor, R2 can be represented as the output impedance of the second output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding, and I2 can be represented as the current output by the second output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding.

[0108] (3);

[0109] Among them, R 1+ R can be characterized as the output impedance of the first terminal of the first output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding. 1- R can be characterized as the output impedance at the second terminal of the first output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding. 2+ R can be characterized as the output impedance at the first terminal of the second output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding. 2- It can be characterized as the output impedance of the second terminal of the second output filter capacitor in a circuit containing a 1 / 2-turn fractional-turn secondary winding.

[0110] (4);

[0111] Where N can be represented as the number of turns in the fractional-turn secondary winding. It can be characterized as a change in magnetic flux. It can be characterized as a change over time.

[0112] (5);

[0113] Among them, R L It can be characterized as the resistance of the output load.

[0114] (6);

[0115] (7);

[0116] Based on the above formula, it can be determined that This allows for current sharing in the circuit when a busbar is introduced.

[0117] Figure 6a A schematic diagram of the current sharing and collection of a 1 / 4-turn secondary winding according to an embodiment of the present invention is shown.

[0118] like Figure 6a As shown, the gray area represents the core region of the fractional-turn transformer, and the blue area represents the four fractional-turn secondary windings of the fractional-turn transformer. The four 1 / 4-turn fractional-turn secondary windings serve as sub-windings in the integrated core and are coupled to the same transformer core column. The four fractional-turn secondary windings can be electrically connected together through four output filter capacitors (the first output filter capacitor C1, the second output filter capacitor C2, the third output filter capacitor C3, and the fourth output filter capacitor C4) and four synchronous rectifier tubes (the first synchronous rectifier tube SR1, the second synchronous rectifier tube SR2, the third synchronous rectifier tube SR3, and the fourth synchronous rectifier tube SR4).

[0119] Then, using wires (copper foil or PCB traces) of the same length and width with symmetrical impedance, connect the first terminal of the first output filter capacitor C1 and the first terminal of the second output filter capacitor C2 to the positive terminal of the first stage bus (red line R). S+ (Node2+), the second terminal of the first output filter capacitor C1 and the second terminal of the second output filter capacitor C2 are connected to the negative terminal of the first stage bus (green line R). S- , Node2-). The first terminal of the third output filter capacitor C3 and the first terminal of the fourth output filter capacitor C4 are connected to the positive terminal of the second primary bus (red line R). S+ (Node1+), the second terminal of the third output filter capacitor C3 and the second terminal of the fourth output filter capacitor C4 are connected to the negative terminal of the second primary bus (green line R). S- (Node1-). Then, using wires of the same length and width with symmetrical impedance, connect the first primary bus positive terminal and the second primary bus positive terminal to the secondary bus positive terminal, and connect the first primary bus negative terminal and the second primary bus negative terminal to the secondary bus negative terminal. The secondary bus positive terminal and the secondary bus negative terminal are respectively connected to the two ends of the output load, thereby using the secondary bus positive terminal and the secondary bus negative terminal for combined output.

[0120] Figure 6bA schematic diagram of a current-sharing and busbar circuit for a 1 / 4-turn secondary winding according to an embodiment of the present invention is shown.

[0121] like Figure 6b As shown, Figure 6b for Figure 6a The equivalent circuit structure diagram. The first fractional-turn secondary winding Ns. 1_1 The opposite-named terminal is electrically connected to the first terminal of the first output filter capacitor C1, the second terminal of the first output filter capacitor C1 is electrically connected to the first terminal of the first synchronous rectifier SR1, and the second terminal of the first synchronous rectifier SR1 is electrically connected to the second fractional-turn secondary winding Ns. 1_2 The same-name terminal connection, the second fractional-turn secondary winding Ns 1_2 The opposite-named terminal is electrically connected to the first terminal of the second output filter capacitor C2, the second terminal of the second output filter capacitor C2 is electrically connected to the first terminal of the second synchronous rectifier SR2, and the second terminal of the second synchronous rectifier SR2 is electrically connected to the third fractional-turn secondary winding Ns. 1_3 The same-named terminal connection. The third fractional-turn secondary winding Ns 1_3 The opposite-named terminal is electrically connected to the first terminal of the third output filter capacitor C3, the second terminal of the third output filter capacitor C3 is electrically connected to the first terminal of the third synchronous rectifier SR3, and the second terminal of the third synchronous rectifier SR3 is electrically connected to the fourth fractional-turn secondary winding Ns. 1_4 The same-name terminal connection, the fourth fractional-turn secondary winding Ns 1_4 The opposite-named terminal is electrically connected to the first terminal of the fourth output filter capacitor C4, the second terminal of the fourth output filter capacitor C4 is electrically connected to the first terminal of the fourth synchronous rectifier SR4, and the second terminal of the fourth synchronous rectifier SR4 is electrically connected to the first fractional-turn secondary winding Ns. 1_1 The same-named terminal electrical connection.

[0122] The first terminal of the first output filter capacitor C1 and the first terminal of the second output filter capacitor C2 are connected to the positive terminal of the first-stage bus. The second terminals of the first output filter capacitor C1 and the second terminal of the second output filter capacitor C2 are connected to the negative terminal of the first-stage bus. The first terminal of the third output filter capacitor C3 and the first terminal of the fourth output filter capacitor C4 are connected to the positive terminal of the second-stage bus. The second terminals of the third output filter capacitor C3 and the fourth output filter capacitor C4 are connected to the negative terminal of the second-stage bus. The positive terminals of the first and second-stage bus are then connected to the positive terminal of the second-stage bus (the first terminal of the output load), and the negative terminals of the first and second-stage bus are connected to the negative terminal of the second-stage bus (the second terminal of the output load). Because the circuit structure is completely symmetrical—that is, the electrical paths are of equal length and the impedances are consistent—automatic current sharing can be achieved even under passive conditions.

[0123] Specifically, current sharing can be achieved by referring to formulas (8) to (19).

[0124] (8);

[0125] Among them, V OO R can be characterized as the voltage across the output load in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_1 This can be characterized as the output impedance of the first output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding, I. 1_1 R can be characterized as the current output by the first output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_1&2 It can be characterized as the total output impedance of the first and second output filter capacitors in a circuit containing a 1 / 4-turn fractional-turn secondary winding.

[0126] (9);

[0127] Among them, R 1_2 This can be characterized as the output impedance of the second output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding, I. 1_2 It can be characterized as the current output by the second output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding.

[0128] (10);

[0129] Among them, V O3 This can be represented by the voltage across the third output filter capacitor, R. 1_3 This can be characterized as the output impedance of the third output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding, I. 1_3 R can be characterized as the current output by the third output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_3&4 It can be characterized as the total output impedance of the third and fourth output filter capacitors in a circuit containing a 1 / 4-turn fractional-turn secondary winding.

[0130] (11);

[0131] Among them, V O4 This can be represented by the voltage across the fourth output filter capacitor, R. 1_4 The output impedance, I, can be characterized as the fourth output filter capacitor of the 1 / 4-turn winding. 1_4 It can be characterized as the current output by the fourth output filter capacitor of the 1 / 4-turn winding.

[0132] (12);

[0133] Among them, R 1_1+ R can be characterized as the output impedance at the first terminal of the first output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_1- R can be characterized as the output impedance at the second terminal of the first output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_2+ R can be characterized as the output impedance at the first terminal of the second output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_2- R can be characterized as the output impedance at the second terminal of the second output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_3+ R can be characterized as the output impedance at the first terminal of the third output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_3- R can be characterized as the output impedance at the second terminal of the third output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_4+ R can be characterized as the output impedance at the first terminal of the fourth output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding. 1_4- It can be characterized as the output impedance of the second terminal of the fourth output filter capacitor in a circuit containing a 1 / 4-turn fractional-turn secondary winding.

[0134] (13);

[0135] Among them, R 1_1&2+ R can be characterized as the total output impedance of the first output filter capacitor and the first terminal of the second output filter capacitor of the 1 / 4-turn winding. 1_1&2- R can be characterized as the total output impedance of the second terminals of the first and second output filter capacitors of the 1 / 4-turn winding. 1_3&4+ R can be characterized as the total output impedance of the first terminals of the third and fourth output filter capacitors of the 1 / 4-turn winding. 1_3&4+ It can be characterized as the total output impedance of the second terminals of the third and fourth output filter capacitors of the 1 / 4-turn winding.

[0136] (14);

[0137] (15);

[0138] (16);

[0139] (17);

[0140] (18);

[0141] (19);

[0142] Based on the above formula, I can be determined. 1_1 = I 1_2 = I 1_3 =I 1_4 This allows for current sharing in the circuit when a busbar is introduced.

[0143] Furthermore, the traces used to connect various devices on the circuit board can be vertically connected or a hybrid horizontal / vertical connection, as long as the symmetry of each busbar is ensured.

[0144] According to an embodiment of the present invention, by dividing the rectifier units within the winding rectifier submodule into pairs, and thus including more than two rectifier units within the winding rectifier submodule, based on a tree-like structure of "first-level bus + second-level integration", the connection method of copper foil or PCB wiring with consistent length, width, and impedance symmetry is used, so that the current in the circuit structure can be gradually gathered from the branch modules and finally merged for output, achieving a symmetrical circuit structure, equal electrical path length, and naturally balanced current distribution with the same impedance.

[0145] Figure 7 A schematic diagram of a half-bridge inverter module according to an embodiment of the present invention is shown.

[0146] like Figure 7 As shown, the half-bridge inverter module may include a half-bridge inverter submodule 701 and a resonator module 702.

[0147] Specifically, the half-bridge inverter submodule 701 can be electrically connected to the input power supply. The half-bridge inverter submodule 701 includes a first power switch S1 and a second power switch S2. The first terminal of the first power switch S1 is electrically connected to the positive terminal of the input power supply, and the second terminal of the first power switch S1 is electrically connected to the resonant module 702. The first terminal of the second power switch S2 is electrically connected to the resonant module 702, and the second terminal of the second power switch S2 is electrically connected to the negative terminal of the input power supply. By controlling the duty cycle of the first power switch S1 and the second power switch S2, the input voltage Vin is inverted and regulated to obtain an intermediate high-frequency voltage.

[0148] The resonant module 702 can be electrically connected to the half-bridge inverter submodule 701. The resonant module 702 includes a resonant inductor Lr, a resonant capacitor Cr, and a magnetizing inductor Lm. The first end of the resonant inductor Lr is electrically connected to the second end of the first power switch S1, and the second end of the resonant inductor Lr is electrically connected to the same-named end of the primary winding Np. The first end of the resonant capacitor Cr is electrically connected to the second end of the second power switch S2, and the second end of the resonant capacitor Cr is electrically connected to the opposite-named end of the primary winding Np. The first end of the magnetizing inductor Lm is electrically connected to the second end of the resonant inductor Lr, and the second end of the magnetizing inductor Lm is electrically connected to the second end of the resonant capacitor Cr. The resonant module 702 is used to perform resonant filtering on the intermediate high-frequency voltage to obtain a high-frequency AC voltage.

[0149] According to an embodiment of the present invention, a half-bridge inverter module may include a half-bridge inverter submodule and a resonant module. By controlling the on and off states of the first and second power switches within the half-bridge inverter submodule, energy can be stored or released by the magnetizing inductor, thereby controlling the polarity of the fractional-turn secondary winding.

[0150] According to an embodiment of the present invention, the switching cycle of the first power switch and the second power switch includes a first time period and a second time period.

[0151] According to an embodiment of the present invention, during the first time period, the first power switch is closed and the second power switch is open, so that the magnetizing inductor is in a charging state, the corresponding terminals of the N fractional turns of the secondary windings corresponding to the primary winding are at a high potential, the N synchronous rectifiers are all open and the N output filter capacitors are in a discharging state.

[0152] According to an embodiment of the present invention, during the second time period, the first power switch is turned off and the second power switch is turned on, so that the magnetizing inductor is in a discharging state, the corresponding terminals of the N fractional turns of the secondary windings corresponding to the primary winding are at a low potential, the N synchronous rectifiers are all turned on and the N output filter capacitors are in a charging state, so as to rectify and combine the intermediate AC voltage obtained after the step-down process.

[0153] The first period can be characterized as the energy storage stage. The first power switch is closed, and the second power switch is open. The input voltage can be applied to the primary winding through the first power switch, the resonant inductor, and the magnetizing inductor, and the magnetizing inductor stores energy. At this time, the polarity of the fractional-turn secondary winding ensures that the synchronous rectifier diodes are all in the off state, and the output load can be powered by the output filter capacitor.

[0154] The second period can be characterized as the energy release stage. The second power switch is closed, the first power switch is open, the voltage of the primary winding reverses, and the energy stored in the magnetizing inductor is transferred to the fractional-turn secondary winding via magnetic coupling. Depending on the connection method between the fractional-turn secondary winding and the rectifier-bus module, the synchronous rectifier tubes in the same series circuit are turned on, and the output of the fractional-turn secondary winding is connected in parallel at the output terminal via the output filter capacitor.

[0155] During the dead zone when the first and second power switches are turned off, the resonant inductor and resonant capacitor can resonate, allowing the first and second power switches to conduct under zero voltage conditions, thereby effectively reducing switching losses and improving system efficiency.

[0156] According to an embodiment of the present invention, by controlling the duty cycle of the first switching power transistor and the second switching power transistor, the length of the first time period and the second time period are controlled, so as to perform inversion and voltage regulation processing on the input voltage, control the polarity of the fractional-turn secondary winding, and generate and output small voltage and large current.

[0157] Figure 8 A schematic diagram of an asymmetric half-bridge flyback circuit with a 1 / 2-turn secondary winding containing a winding rectifier submodule, according to an embodiment of the present invention, is shown.

[0158] like Figure 8 As shown, the first terminal of the first power switch S1 is electrically connected to the positive terminal of the input power supply, the second terminal of the first power switch S1 is electrically connected to the first terminal of the resonant inductor Lr, the first terminal of the second power switch S2 is electrically connected to the first terminal of the resonant inductor Lr, the second terminal of the second power switch S2 is electrically connected to the negative terminal of the input power supply, the second terminal of the resonant inductor Lr is electrically connected to the same-name terminal of the primary winding and the first terminal of the magnetizing inductor Lm, the first terminal of the resonant capacitor Cr is electrically connected to the second terminal of the second power switch S2, and the second terminal of the resonant capacitor Cr is electrically connected to the opposite-name terminal of the primary winding and the second terminal of the magnetizing inductor Lm.

[0159] The opposite-named terminal of the first fractional-turn secondary winding Ns1 is electrically connected to the first terminal of the first output filter capacitor C1. The second terminal of the first output filter capacitor C1 is electrically connected to the first terminal of the first synchronous rectifier SR1. The second terminal of the first synchronous rectifier SR1 is electrically connected to the same-named terminal of the second fractional-turn secondary winding Ns2. The opposite-named terminal of the second fractional-turn secondary winding Ns2 is electrically connected to the first terminal of the second output filter capacitor C2. The second terminal of the second output filter capacitor C2 is electrically connected to the first terminal of the second synchronous rectifier SR2. The second terminal of the second synchronous rectifier SR2 is electrically connected to the same-named terminal of the first fractional-turn secondary winding Ns1. The first terminals of the first output filter capacitor C1 and the second output filter capacitor C2 are electrically connected to the output load R. LThe first terminal (the positive output terminal of the circuit), the second terminal of the first output filter capacitor C1, and the second terminal of the second output filter capacitor C2 are electrically connected to the output load R. L The second terminal (the negative output terminal of the circuit).

[0160] Figure 9 A schematic diagram of an asymmetric half-bridge flyback circuit with a 1 / 4-turn secondary winding containing a winding rectifier submodule, according to an embodiment of the present invention, is shown.

[0161] like Figure 9 As shown, in Figure 8 Based on the connection structure of the half-bridge inverter module and the primary winding Np shown, the opposite-named terminal of the first fractional-turn secondary winding Ns1 is electrically connected to the first terminal of the first output filter capacitor C1, the second terminal of the first output filter capacitor C1 is electrically connected to the first terminal of the first synchronous rectifier SR1, the second terminal of the first synchronous rectifier SR1 is electrically connected to the same-named terminal of the second fractional-turn secondary winding Ns2, the opposite-named terminal of the second fractional-turn secondary winding Ns2 is electrically connected to the first terminal of the second output filter capacitor C2, the second terminal of the second output filter capacitor C2 is electrically connected to the first terminal of the second synchronous rectifier SR2, and the second terminal of the second synchronous rectifier SR2 is electrically connected to the same-named terminal of the third fractional-turn secondary winding Ns3. The opposite-named terminal of the third fractional-turn secondary winding Ns3 is electrically connected to the first terminal of the third output filter capacitor C3. The second terminal of the third output filter capacitor C3 is electrically connected to the first terminal of the third synchronous rectifier SR3. The second terminal of the third synchronous rectifier SR3 is electrically connected to the same-named terminal of the fourth fractional-turn secondary winding Ns4. The opposite-named terminal of the fourth fractional-turn secondary winding Ns4 is electrically connected to the first terminal of the fourth output filter capacitor C4. The second terminal of the fourth output filter capacitor C4 is electrically connected to the first terminal of the fourth synchronous rectifier SR4. The second terminal of the fourth synchronous rectifier SR4 is electrically connected to the same-named terminal of the first fractional-turn secondary winding Ns1.

[0162] The first terminal of the first output filter capacitor C1, the first terminal of the second output filter capacitor C2, the first terminal of the third output filter capacitor C3, and the first terminal of the fourth output filter capacitor C4 are electrically connected to the output load R. L The first terminal (the positive output terminal of the circuit), the second terminal of the first output filter capacitor C1, the second terminal of the second output filter capacitor C2, the second terminal of the third output filter capacitor C3, and the second terminal of the fourth output filter capacitor C4 are electrically connected to the output load R. L The second terminal (the negative output terminal of the circuit).

[0163] Figure 10A schematic diagram of an asymmetric half-bridge flyback circuit with a 1 / 2-turn secondary winding of two parallel rectifier submodules according to an embodiment of the present invention is shown.

[0164] like Figure 10 As shown, in Figure 8 Based on the connection structure of the half-bridge inverter module and the primary winding Np shown, the opposite-named terminal of the first fractional-turn secondary winding Ns1 in the first winding rectifier submodule is electrically connected to the first terminal of the first output filter capacitor C1. The second terminal of the first output filter capacitor C1 is electrically connected to the first terminal of the first synchronous rectifier tube SR1. The second terminal of the first synchronous rectifier tube SR1 is electrically connected to the same-named terminal of the second fractional-turn secondary winding Ns2. The opposite-named terminal of the second fractional-turn secondary winding Ns2 is electrically connected to the first terminal of the second output filter capacitor C2. The second terminal of the second output filter capacitor C2 is electrically connected to the first terminal of the second synchronous rectifier tube SR2. The second terminal of the second synchronous rectifier tube SR2 is electrically connected to the same-named terminal of the first fractional-turn secondary winding Ns1.

[0165] The opposite-named terminal of the third fractional-turn secondary winding Ns3 in the second winding rectifier module is electrically connected to the first terminal of the third output filter capacitor C3. The second terminal of the third output filter capacitor C3 is electrically connected to the first terminal of the third synchronous rectifier tube SR3. The second terminal of the third synchronous rectifier tube SR3 is electrically connected to the same-named terminal of the fourth fractional-turn secondary winding Ns4. The opposite-named terminal of the fourth fractional-turn secondary winding Ns4 is electrically connected to the first terminal of the fourth output filter capacitor C4. The second terminal of the fourth output filter capacitor C4 is electrically connected to the first terminal of the fourth synchronous rectifier tube SR4. The second terminal of the fourth synchronous rectifier tube SR4 is electrically connected to the same-named terminal of the third fractional-turn secondary winding Ns3.

[0166] The first terminal of the first output filter capacitor C1, the first terminal of the second output filter capacitor C2, the first terminal of the third output filter capacitor C3, and the first terminal of the fourth output filter capacitor C4 are electrically connected to the output load R. L The first terminal (the positive output terminal of the circuit), the second terminal of the first output filter capacitor C1, the second terminal of the second output filter capacitor C2, the second terminal of the third output filter capacitor C3, and the second terminal of the fourth output filter capacitor C4 are electrically connected to the output load R. L The second terminal (the negative output terminal of the circuit).

[0167] In the case of multiple parallel winding rectifier submodules, regardless of how many rectifier units are included in each winding rectifier submodule, it is only necessary to ensure that the multiple winding rectifier submodules are connected in parallel and that the positive plates of all output filter capacitors are electrically connected together and the negative plates are electrically connected together, thereby forming the corresponding busbar.

[0168] According to an embodiment of the present invention, the primary winding can be an odd-numbered-turn winding. The primary winding and N fractional-turn secondary windings are distributed in an even-numbered-layer circuit board. The intermediate-layer winding of the primary winding is split into two parallel windings that are symmetrically distributed and electrically connected to the other layers of the primary winding except for the intermediate-layer winding. The other layers of the primary winding except for the intermediate-layer winding are symmetrically distributed in the multi-layer intermediate circuit board of the even-numbered-layer circuit board. The N fractional-turn secondary windings can be symmetrically distributed in the top and bottom layers of the even-numbered-layer circuit board, respectively.

[0169] For example, with five turns in the primary winding and four fractional-turn secondary windings, the first and second fractional-turn secondary windings are located on the first layer of the multilayer circuit board, while the third and fourth fractional-turn secondary windings are located on the penultimate layer. The first turn of the primary winding is located on the first intermediate layer, the second on the second, the fourth on the third, and the fifth on the fourth. The third turn is split into two parallel windings, vertically distributed across the four intermediate layers via vias located on the first through fourth intermediate layers. This allows the entire circuit board to be a six-layer board (first layer, four intermediate layers, and penultimate layer).

[0170] Figure 11a A schematic diagram of the first layer of winding of a 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0171] like Figure 11a As shown, with two parallel winding rectifier submodules, each containing two rectifier units, the first-layer circuit board can include a first fractional-turn secondary winding Ns1 and a second fractional-turn secondary winding Ns2. The first fractional-turn secondary winding Ns1 can be connected to the first synchronous rectifier diode SR1, outputting energy to the first output filter capacitor C1. The second fractional-turn secondary winding Ns2 can be connected to the second synchronous rectifier diode SR2, outputting energy to the second output filter capacitor C2. The positive and negative terminals of the first and second output filter capacitors C1 and C2 ultimately converge to the load.

[0172] Figure 11b A schematic diagram of the structure of the second layer winding of the 1 / 2 turn secondary winding in a PCB board is shown according to an embodiment of the present invention. Figure 11c A schematic diagram of the third layer winding of a 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0173] like Figure 11b and 11cAs shown, the second and third layers contain primary windings Np. The second-layer windings of the primary windings Np are connected in parallel to achieve a symmetrical distribution of odd-numbered turns on even-numbered circuit boards. The first-layer winding starts from the input voltage Vin- of the second-layer circuit board and is wound in two turns along the path. The connection points at one end of the second-layer winding used for parallel connection are marked as via 1 and via 2. The third-layer winding starts from the input voltage Vin+ of the third-layer circuit board and is wound in two turns along the path. The connection points at the other end of the second-layer winding used for parallel connection are marked as via 1 and via 2. The middle parallel turns of the second and third-layer circuit boards are connected through buried vias, thus forming a three-turn closed structure to ensure symmetrical current distribution.

[0174] Figure 11d A schematic diagram of the fourth layer winding of a 1 / 2-turn secondary winding in a PCB board is shown according to an embodiment of the present invention.

[0175] like Figure 11d As shown, with two parallel winding rectifier submodules, each containing two rectifier units, the fourth-layer circuit board can include a third fractional-turn secondary winding Ns3 and a fourth fractional-turn secondary winding Ns4. The third fractional-turn secondary winding Ns3 can be connected to the third synchronous rectifier diode SR3, outputting energy to the third output filter capacitor C3. The fourth fractional-turn secondary winding Ns4 can be connected to the fourth synchronous rectifier diode SR4, outputting energy to the fourth output filter capacitor C4. The positive and negative terminals of the third and fourth output filter capacitors C3 and C4 ultimately converge to the load.

[0176] According to embodiments of the present invention, by arranging odd-numbered-turn primary windings in an even-numbered-layer circuit board in a surrounding distribution and parallel via arrangement, and forming a symmetrical structure, the current is symmetrically distributed. This results in an even-numbered-layer circuit board accommodating the primary windings and multiple fractional-turn secondary windings, thereby reducing winding losses, the number of circuit board layers, circuit volume, and thermal load, while improving circuit conversion efficiency. It offers advantages in terms of size, heat dissipation, and power density, contributing to system thermal management and reliability improvement, and meeting the high demands of aerospace power supplies for high efficiency, high power density, high reliability, and lightweight and compact design.

[0177] Figure 12 A schematic diagram comparing the winding losses of a full-turn winding and a 1 / 2-turn winding according to an embodiment of the present invention is shown.

[0178] like Figure 12As shown, the vertical axis represents losses, with units of W. Under the same copper thickness (3 oz), loss tests were performed on an existing circuit with a full-turn winding and on the circuit of this invention with a 1 / 2-turn winding and multiple busbars. The results show the primary-side conduction loss (light blue), secondary-side conduction loss (orange), primary-side turn-off loss (gray), secondary-side turn-off loss (dark yellow), transformer core loss (dark blue), transformer winding loss (green), and auxiliary source loss (light yellow) corresponding to the existing circuit with a full-turn winding, and the primary-side conduction loss, secondary-side turn-off loss, secondary-side turn-off loss, transformer core loss, transformer winding loss, and auxiliary source loss corresponding to the circuit of this invention with a 1 / 2-turn winding. From the loss tests of the existing circuit with full-turn windings and the circuit of the present invention with half-turn windings and multi-stage bus points, it can be seen that the transformer winding loss of the existing circuit with full-turn windings is 5.5W, while the transformer winding loss of the circuit of the present invention with half-turn windings and multi-stage bus points is 2.2W. That is, the transformer winding loss of the present invention is reduced to about 40% compared with the prior art.

[0179] Figure 13 A schematic diagram showing the efficiency comparison between a full-turn winding and a 1 / 2-turn winding according to an embodiment of the present invention is shown.

[0180] like Figure 13 As shown, under the same constraints of 100V rated input and 120W output, efficiency tests were conducted on full-turn winding circuits with different sizes of resonant capacitors and the circuit of this invention with different sizes of resonant capacitors and the application of 1 / 2-turn windings and multi-stage bus points. The results show that the conversion efficiency of the circuit of this invention with 1 / 2-turn windings and multi-stage bus points is consistently higher than that of the full-turn winding circuit (the blue line represents the conversion efficiency of the circuit with full-turn windings, and the orange line represents the conversion efficiency of the circuit of this invention with 1 / 2-turn windings). Furthermore, the conversion efficiency with a resonant capacitor of 2.2uF can be increased from approximately 92.4% in the prior art to 95.6%, a significant improvement. Therefore, while maintaining low winding losses and high conversion efficiency, it can meet the aerospace field's requirements for high power density (>100W / in). 3 ) and stringent requirements for high reliability.

[0181] Figure 14 A flowchart of a voltage conversion method according to an embodiment of the present invention is shown.

[0182] like Figure 14 As shown, the data signal amplification and reset method of this embodiment includes operations S1410 to S1440.

[0183] In operation S1410, the input power supply sends the input voltage to the half-bridge inverter module.

[0184] In operation S1420, the half-bridge inverter module performs inversion and voltage regulation on the input voltage to obtain and send a high-frequency AC voltage to the fractional-turn winding transformer.

[0185] In operation S1430, based on the turns ratio between the primary winding and the N fractional-turn secondary windings in the fractional-turn transformer, the high-frequency AC voltage is stepped down to obtain the intermediate AC voltage for the sorting bus module.

[0186] In operation S1440, in response to the polarity state of the N fractional-turn secondary windings, the intermediate AC voltage is rectified and combined using the M winding rectifier submodules in the current rectifier module to obtain and output the target voltage and target current.

[0187] According to an embodiment of the present invention, the polarity state of N fractional-turn secondary windings is controlled by utilizing a half-bridge inverter module to control the state of the primary winding electrically connected to the half-bridge inverter module in a fractional-turn transformer. In response to changes in the polarity state of the N fractional-turn secondary windings, the charging and discharging states of the M winding rectifier submodules within the rectifier busbar module change, thereby processing the input voltage and efficiently obtaining and outputting a stable small voltage and large current. Simultaneously, current is busbed to ensure even current distribution in the circuit, improving circuit reliability and thermal distribution.

[0188] Those skilled in the art will understand that the features described in the various embodiments of the present invention can be combined or combined in various ways, even if such combinations or combinations are not explicitly described in the present invention. In particular, the features described in the various embodiments of the present invention can be combined and / or combined in various ways without departing from the spirit and teachings of the present invention. All such combinations and / or combinations fall within the scope of the present invention.

Claims

1. An asymmetric half-bridge flyback bus circuit based on fractional-turn windings, characterized in that, include: A half-bridge inverter module is electrically connected to the input power supply. The half-bridge inverter module is used to invert and regulate the input voltage to obtain a high-frequency AC voltage. A fractional-turn winding transformer is electrically connected to the half-bridge inverter module. The fractional-turn winding transformer includes a primary winding and N fractional-turn secondary windings. The primary winding and the N fractional-turn secondary windings are used together to step down the high-frequency AC voltage to obtain an intermediate AC voltage, where N≥2. A rectifier-combiner module is electrically connected to the fractional-turn winding transformer. The rectifier-combiner module includes M parallel winding rectifier submodules, each electrically connected to one of the N fractional-turn secondary windings. The M winding rectifier submodules control the charging and discharging states of the M winding rectifier submodules in response to the polarity state of the N fractional-turn secondary windings to rectify and combine the intermediate AC voltage, obtaining the target voltage and target current, where M ≥ 1. The number of turns in the N fractional-turn secondary windings is inversely proportional to the number of rectifier units in each winding rectifier submodule. The M winding rectifier modules include N rectifier units, with each winding rectifier module containing N / M rectifier units. Each rectifier unit, when N = 2, has its first terminal electrically connected to the opposite-named terminal of the first fractional-turn secondary winding, and its second terminal electrically connected to the same-named terminal of the second fractional-turn secondary winding. The first terminal of the second rectifier unit is electrically connected to the opposite terminal of the second fractional-turn secondary winding, and the second terminal of the second rectifier unit is electrically connected to the same terminal of the first fractional-turn secondary winding. When N>2, the first terminal of the first rectifier unit is electrically connected to the opposite terminal of the first fractional-turn secondary winding, and the second terminal of the first rectifier unit is electrically connected to the same terminal of the second fractional-turn secondary winding. The first terminal of the nth rectifier unit is electrically connected to the opposite terminal of the nth fractional-turn secondary winding, and the second terminal of the nth rectifier unit is electrically connected to the same terminal of the (n+1)th fractional-turn secondary winding. The first terminal of the N / Mth rectifier unit is electrically connected to the opposite terminal of the N / Mth fractional-turn secondary winding, and the second terminal of the N / Mth rectifier unit is electrically connected to the same terminal of the first fractional-turn secondary winding. 2≤n≤N / M-1, the first terminals of the output filter capacitors within the N rectifier units are electrically connected to each other, and the second terminals of the output filter capacitors are electrically connected to each other.

2. The circuit according to claim 1, characterized in that, Each rectifier unit includes: An output filter capacitor, wherein the first end of the output filter capacitor is electrically connected to the opposite end of the fractional-turn secondary winding, and the second end of the output filter capacitor is electrically connected to the first end of the synchronous rectifier tube; The synchronous rectifier tube has its first end electrically connected to the second end of the output filter capacitor, and its second end electrically connected to the same-named end of the next fractional-turn secondary winding.

3. The circuit according to claim 1, characterized in that, The number of rectifier units in each winding rectifier submodule is 2. Q In the case of , the number of turns in each fractional-turn secondary winding is (1 / 2). Q The winding rectifier submodule contains a Q-level busbar, where Q represents the fractional-turn winding parameters, where 2 Q = N / M, Q≥1.

4. The circuit according to claim 3, characterized in that, The confluence point includes the positive confluence point and the negative confluence point. The number of rectifier units in each winding rectifier submodule is 2. Q In the case of 2 Q The output filter capacitors are divided into groups of two. Q-1 The second output filter capacitor bank Q-1 The first terminals of the two output filter capacitors in the output filter capacitor group are connected to the second... Q-1 The first-level bus positive pole is connected, the second... Q-1 The second terminals of the two output filter capacitors in the output filter capacitor group are connected to the second... Q-1 Connect the negative poles of the primary busbars; Wherein, when Q≥2, the number of positive and negative terminals of the (q-1)th stage in the Q-stage bus points is twice that of the positive and negative terminals of the q-th stage bus points, and every two positive and negative terminals of the (q-1)th stage bus points are connected to the corresponding positive and negative terminals of the q-th stage bus points; 1 <q≤Q。 5. The circuit according to claim 4, characterized in that, The positive conductor used to connect the positive poles of two adjacent busbars and the negative conductor used to connect the negative poles of two adjacent busbars are conductors of the same length and width and with symmetrical impedance.

6. The circuit according to claim 1, characterized in that, The half-bridge inverter module includes: A half-bridge inverter submodule is electrically connected to the input power supply. The half-bridge inverter submodule includes a first power switch and a second power switch. The first terminal of the first power switch is electrically connected to the positive terminal of the input power supply, and the second terminal of the first power switch is electrically connected to the resonant module. The first terminal of the second power switch is electrically connected to the resonant module, and the second terminal of the second power switch is electrically connected to the negative terminal of the input power supply. By controlling the duty cycle of the first power switch and the second power switch, the input voltage is inverted and regulated to obtain an intermediate high-frequency voltage. A resonant module is electrically connected to the half-bridge inverter submodule. The resonant module includes a resonant inductor, a resonant capacitor, and a magnetizing inductor. The first terminal of the resonant inductor is electrically connected to the second terminal of the first power switch, and the second terminal of the resonant inductor is electrically connected to the same-name terminal of the primary winding. The first terminal of the resonant capacitor is electrically connected to the second terminal of the second power switch, and the second terminal of the resonant capacitor is electrically connected to the opposite-name terminal of the primary winding. The first terminal of the magnetizing inductor is electrically connected to the second terminal of the resonant inductor, and the second terminal of the magnetizing inductor is electrically connected to the second terminal of the resonant capacitor. The resonant module is used to perform resonant filtering on the intermediate high-frequency voltage to obtain the high-frequency AC voltage.

7. The circuit according to claim 6, characterized in that, The switching cycles of the first power switch and the second power switch include a first time period and a second time period; During the first time period, the first power switch is closed and the second power switch is open, so that the magnetizing inductor is in a charging state, the corresponding terminals of the N fractional turns of the secondary windings are at a high potential, the N synchronous rectifiers are all open and the N output filter capacitors are in a discharging state. During the second time period, the first power switch is turned off and the second power switch is turned on, so that the magnetizing inductor is in a discharging state, and the corresponding terminals of the N fractional-turn secondary windings are at a low potential. All N synchronous rectifiers are turned on and the N output filter capacitors are in a charging state, so as to rectify and combine the intermediate AC voltage obtained after the step-down process.

8. The circuit according to claim 1, characterized in that, The primary winding is an odd-numbered-turn winding. The primary winding and the N fractional-turn secondary windings are distributed in an even-numbered-layer circuit board. The middle layer winding of the primary winding is split into two parallel windings that are symmetrically distributed and electrically connected to the other layers of the primary winding except for the middle layer winding. The other layers of the primary winding except for the middle layer winding are symmetrically distributed in the multi-layer intermediate circuit board of the even-numbered-layer circuit board. The N fractional-turn secondary windings are symmetrically distributed in the top and bottom layers of the even-numbered-layer circuit board.

9. A voltage transformation method for the circuit according to any one of claims 1 to 8, characterized in that, include: The input power supply sends the input voltage to the half-bridge inverter module; The half-bridge inverter module performs inversion and voltage regulation on the input voltage to obtain and send a high-frequency AC voltage to the fractional-turn winding transformer. Based on the turns ratio between the primary winding and the N fractional-turn secondary windings in the fractional-turn transformer, the high-frequency AC voltage is stepped down to obtain the intermediate AC voltage for the sorting and busbar module. In response to the polarity state of the N fractional-turn secondary windings, the intermediate AC voltage is rectified and combined using the M winding rectifier submodules within the rectifier-combiner module to obtain and output the target voltage and target current.

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