Silicon wafer cutting line mark judgment method and device and electronic equipment

Abstract

The invention provides a silicon wafer cutting line mark judgment method and device and electronic equipment, and belongs to the technical field of semiconductor manufacturing. The silicon wafer cutting line mark judgment method comprises the steps that the surface appearance of a cut silicon wafer is measured, height data of N position points on the target diameter of the silicon wafer relative to a reference plane are obtained, N is an integer larger than 1, and the target diameter is parallel to the cutting direction; respectively calculating a contour height fluctuation standard deviation in a neighborhood of each position point according to the height data; the maximum standard deviation in the contour height fluctuation standard deviations of the N position points is selected; and comparing the maximum standard deviation with a plurality of detection thresholds, and determining the cutting line mark grade of the silicon wafer. According to the technical scheme, the cutting line mark grade of the silicon wafer can be accurately judged.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method and apparatus for determining silicon wafer cutting marks, and an electronic device. Background Technology

[0002] In the silicon wafer manufacturing process, multi-wire dicing is the core technology for cutting silicon ingots into thin wafers. The processing quality of multi-wire dicing directly determines the surface morphology of the silicon wafer and has a decisive impact on the yield of subsequent key processes such as photolithography, etching, and thin film deposition.

[0003] During the silicon wafer dicing process, the interaction of various complex factors, such as slurry abrasion, steel wire vibration, tension fluctuations, unstable cutting speed, and process parameter drift, can easily induce localized morphological anomalies on the silicon wafer surface. Among these, "line marks" are one of the most typical defects in silicon wafers. These defects typically manifest as nanoscale height variations or irregular textures, but they are often difficult to observe directly on the silicon wafer using conventional methods during the dicing process. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a method, apparatus, and electronic device for determining silicon wafer dicing marks, which can accurately determine the grade of dicing marks on silicon wafers.

[0005] To achieve the above objectives, the technical solution adopted in the embodiments of the present invention is as follows:

[0006] A method for determining silicon wafer dicing marks includes:

[0007] The surface morphology of the cut silicon wafer is measured to obtain the height data of N positions on the target diameter of the silicon wafer relative to the reference plane, where N is an integer greater than 1, and the target diameter is parallel to the cutting direction;

[0008] Calculate the standard deviation of the contour height fluctuation within the neighborhood of each location point based on the height data;

[0009] Select the maximum standard deviation among the standard deviations of the profile height fluctuation at N location points;

[0010] The maximum standard deviation is compared with multiple detection thresholds to determine the dicing grade of the silicon wafer.

[0011] In some embodiments, the value of N is proportional to the size of the silicon wafer.

[0012] In some embodiments, calculating the standard deviation of contour height fluctuation within the neighborhood of each location point based on the height data includes:

[0013] Add the height data of each location point to the k height data of its k-1 adjacent locations, divide by k, and obtain the average height value, where k is an integer greater than 1;

[0014] For each of the k height data points, calculate its height difference from the average height value;

[0015] Square each height difference, sum the squares of all height differences, divide by k-1, and obtain the variance.

[0016] The standard deviation of the profile height fluctuation is obtained by taking the arithmetic square root of the variance.

[0017] In some embodiments, the plurality of detection thresholds includes detection threshold 1, ..., detection threshold n, detection threshold n+1, ..., detection threshold N arranged in ascending order, and the step of comparing the maximum standard deviation with the plurality of detection thresholds to determine the dicing mark level of the silicon wafer includes:

[0018] The maximum standard deviation is matched sequentially with multiple detection thresholds. When the maximum standard deviation is greater than or equal to the detection threshold n and less than the detection threshold n+1, the cutting mark level of the silicon wafer is determined to be n+1.

[0019] In some embodiments, the detection threshold includes detection threshold 1 and detection threshold 2, wherein detection threshold 1 has a value of 3 and detection threshold 2 has a value of 6, and the step of comparing the maximum standard deviation with multiple detection thresholds to determine the dicing mark level of the silicon wafer includes:

[0020] When the maximum standard deviation is less than 3, the dicing mark grade of the silicon wafer is determined to be grade 1;

[0021] When the maximum standard deviation is greater than or equal to 3 and less than 6, the dicing mark grade of the silicon wafer is determined to be grade 2;

[0022] When the maximum standard deviation is greater than or equal to 6, the dicing mark grade of the silicon wafer is determined to be grade 3.

[0023] In some embodiments, after determining that the dicing mark level of the silicon wafer is level 2, the method further includes:

[0024] Adjusting the process parameters for dicing the silicon wafer includes at least one of the following:

[0025] Adjust the tension of the cutting wire used to cut the silicon wafer;

[0026] Adjust the concentration of the slurry used for cutting silicon wafers;

[0027] Inspect the wear of the guide rollers used to cut the silicon wafers;

[0028] Adjust the cutting speed for slicing silicon wafers.

[0029] In some embodiments, after determining that the dicing mark level of the silicon wafer is level 3, the method further includes performing at least one of the following:

[0030] The silicon wafer cutting equipment was shut down for inspection.

[0031] Replace the mortar used for cutting silicon wafers;

[0032] Calibrate the wire tension control system for cutting silicon wafers.

[0033] This invention also provides a silicon wafer dicing line determination device, comprising:

[0034] The measurement module is used to measure the surface morphology of the cut silicon wafer and obtain the height data of N positions on the target diameter of the silicon wafer relative to the reference plane, where N is an integer greater than 1, and the target diameter is parallel to the cutting direction.

[0035] The calculation module is used to calculate the standard deviation of contour height fluctuation in the neighborhood of each location point based on the height data.

[0036] The selection module is used to select the maximum standard deviation among the standard deviations of profile height fluctuation at N location points.

[0037] The processing module is used to compare the maximum standard deviation with multiple detection thresholds to determine the dicing grade of the silicon wafer.

[0038] This invention also provides an electronic device, including: a processor, a memory, and a program stored in the memory and executable on the processor, wherein when the program is executed by the processor, it implements the steps of the silicon wafer dicing line determination method as described above.

[0039] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the silicon wafer dicing line determination method as described above.

[0040] This invention also provides a computer program product, including computer instructions, which, when executed by a processor, implement the steps of the silicon wafer dicing line determination method as described above.

[0041] The beneficial effects of this invention are:

[0042] In this embodiment, the surface morphology of the cut silicon wafer is measured to obtain the height data of N points on the target diameter of the silicon wafer relative to the reference plane. The standard deviation of the contour height fluctuation within the neighborhood of each point is calculated based on the height data. The maximum standard deviation among the N points is selected. The maximum standard deviation is compared with multiple detection thresholds to determine the cutting mark level of the silicon wafer. Through this embodiment, after the silicon wafer is cut, the cutting marks can be detected based on the correlation between the standard deviation of the contour height fluctuation and the cutting mark level. This provides a quantitative quality feedback indicator for the cutting process, helping to quickly locate equipment or process parameter problems. Subsequently, the cutting process parameters can be adjusted promptly based on the cutting mark level, improving the stability and controllability of the production process. Furthermore, abnormal silicon wafers can be promptly rejected based on the cutting mark level, avoiding subsequent ineffective polishing, grinding, and other processing steps, saving additional manufacturing costs and production resources. This embodiment has low computational complexity and can be easily deployed in existing online or offline detection systems to achieve the detection and judgment of silicon wafer cutting mark levels. Attached Figure Description

[0043] Figure 1 A schematic diagram showing cutting lines on the surface of a silicon wafer;

[0044] Figure 2 A schematic flowchart illustrating the silicon wafer dicing line determination method according to an embodiment of the present invention;

[0045] Figure 3 A schematic diagram showing the STD curve of a silicon wafer according to an embodiment of the present invention;

[0046] Figure 4 A schematic diagram illustrating the correlation between STD values ​​and silicon wafer dicing marks;

[0047] Figure 5 This is a schematic diagram of the silicon wafer dicing mark determination device according to an embodiment of the present invention;

[0048] Figure 6 This is a schematic diagram illustrating the composition of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0050] In related technologies, during the dicing of silicon wafers, various factors can easily cause conditions such as… Figure 1 The cutting marks shown are a problem. The lack of effective online monitoring and morphology prediction methods in the front-end cutting process makes it impossible to promptly identify and provide process feedback on anomalies such as silicon wafer cutting marks. This lag in detection severely impacts the timeliness of production adjustments and process controllability. Furthermore, if abnormal silicon wafers with severe cutting marks are not promptly sorted and removed at the front end, they will continue to flow into subsequent polishing and grinding processes. This not only fails to repair inherent defects like cutting marks but also wastes additional processing costs and occupies valuable production resources, leading to increased manufacturing costs in the downstream stages.

[0051] This invention provides a method, apparatus, and electronic device for determining silicon wafer dicing marks, which can accurately determine the grade of silicon wafer dicing marks.

[0052] This invention provides a method for determining silicon wafer dicing marks, such as... Figure 2 As shown, it includes:

[0053] Step S1: Measure the surface morphology of the cut silicon wafer and obtain the height data of N positions on the target diameter of the silicon wafer relative to the reference plane, where N is an integer greater than 1, and the target diameter is parallel to the cutting direction;

[0054] Step S2: Calculate the standard deviation of contour height fluctuation in the neighborhood of each location point based on the height data;

[0055] Step S3: Select the maximum standard deviation among the standard deviations of the profile height fluctuation of N location points;

[0056] Step S4: Compare the maximum standard deviation with multiple detection thresholds to determine the dicing grade of the silicon wafer.

[0057] In this embodiment, the surface morphology of the cut silicon wafer is measured to obtain the height data of N points on the target diameter of the silicon wafer relative to the reference plane. The standard deviation of the contour height fluctuation within the neighborhood of each point is calculated based on the height data. The maximum standard deviation among the N points is selected. The maximum standard deviation is compared with multiple detection thresholds to determine the cutting mark level of the silicon wafer. Through this embodiment, after the silicon wafer is cut, the cutting marks can be detected based on the correlation between the standard deviation of the contour height fluctuation and the cutting mark level. This provides a quantitative quality feedback indicator for the cutting process, helping to quickly locate equipment or process parameter problems. Subsequently, the cutting process parameters can be adjusted promptly based on the cutting mark level, improving the stability and controllability of the production process. Furthermore, abnormal silicon wafers can be promptly rejected based on the cutting mark level, avoiding subsequent ineffective polishing, grinding, and other processing steps, saving additional manufacturing costs and production resources. This embodiment has low computational complexity and can be easily deployed in existing online or offline detection systems to achieve the detection and judgment of silicon wafer cutting mark levels.

[0058] In some embodiments, the value of N is proportional to the size of the silicon wafer. The larger the size of the silicon wafer, the larger the value of N. For example, with a silicon wafer size of 12 inches, the value of N can be 73; if the silicon wafer size is smaller than 12 inches, the value of N is less than 73. For example, when the silicon wafer size is 8 inches, the value of N can be 40-60, such as 40, 45, 50, 55, or 60; when the silicon wafer size is 6 inches, the value of N can be 30-40, such as 30, 35, or 40.

[0059] After the silicon wafers are cut, the surface morphology of the cut silicon wafers can be measured using atomic force microscopy, scanning electron microscopy, optical profilometer, etc., to obtain the height data of N points on the target diameter of the silicon wafer relative to a reference plane. Taking a 12-inch silicon wafer as an example, the height data of 73 points relative to the reference plane can be obtained. Figure 3 As shown, the blue curve represents the height data of 73 locations on one silicon wafer relative to the reference plane, and the brown curve represents the height data of 73 locations on another silicon wafer relative to the reference plane. The horizontal axis represents the serial number of the location point, and the vertical axis represents the height of the location point relative to the reference plane, with the unit being micrometers.

[0060] After acquiring the height data for each location point, the height data of each location point can be added to the height data of k adjacent k-1 location points, and divided by k to obtain the average height value, where k is an integer greater than 1. For each of the k height data points, the height difference between it and the average height value is calculated. The square of each height difference is calculated, and the sum of the squares of all height differences is divided by k-1 to obtain the variance. The square root of the variance is taken to obtain the standard deviation of the profile height fluctuation (STD). The value of k can be set as needed, for example, it can be 2, 3, 4, or 5. In some embodiments, the value of k can be 3. In this case, the height data of each location point can be added to the height data of 2 adjacent location points (a total of 3 height data points), and divided by 3 to obtain the average height value. For each of the 3 height data points, the height difference between it and the average height value is calculated. The square of each height difference is calculated, and the sum of the squares of all height differences is divided by 2 to obtain the variance. The square root of the variance is taken to obtain the standard deviation of the profile height fluctuation.

[0061] Specifically, taking a 12-inch silicon wafer as an example, there are 73 location points on the target diameter: N1, N2, ..., N73. For location point N1, the standard deviation of its profile height fluctuation with the next two location points N2 and N3 is calculated and denoted as STD1; for location point N2, the standard deviation of its profile height fluctuation with the next two location points N3 and N4 is calculated and denoted as STD2; and so on. For location point N71, the standard deviation of its profile height fluctuation with the next two location points N72 and N73 is calculated and denoted as STD71; for the last location points N72 and N73, in order to maintain the consistency of data length and cover all location points, the calculation result of location point N71 is used, that is, STD72 = STD71, STD73 = STD71; then, the largest STD value among the 73 STD values ​​is selected as the maximum STD value of the silicon wafer.

[0062] like Figure 4The diagram illustrates the relationship between STD values ​​and dicing marks. The vertical axis represents the STD value. When the STD value is < 3, the silicon wafer surface is confirmed to be free of abnormalities. When the STD value is between 3 and 6, slight dicing marks are present on the silicon wafer surface. When the STD value is > 6, severe dicing marks are present on the silicon wafer surface. There is a correlation between the maximum STD value of the silicon wafer and the dicing mark grade. Therefore, by comparing the maximum STD value of the silicon wafer as the maximum standard deviation with multiple detection thresholds, the dicing mark grade of the silicon wafer can be determined. In some embodiments, the multiple detection thresholds include detection thresholds 1, ..., n, n+1, ..., N arranged in ascending order. The maximum standard deviation is sequentially matched with the multiple detection thresholds. When the maximum standard deviation is greater than or equal to detection threshold n and less than detection threshold n+1, the dicing mark grade of the silicon wafer is determined to be n+1.

[0063] Multiple detection thresholds can be obtained in advance. Specifically, a large number of silicon wafers with known dicing mark grades are obtained, and the surface morphology of these silicon wafers is scanned. Steps S1-S3 above are repeated to obtain the maximum standard deviation of the contour height fluctuation standard deviation of each silicon wafer. The detection threshold value is set according to the maximum standard deviation corresponding to each dicing mark grade.

[0064] The technical solution of this embodiment enables timely detection of the dicing mark level of silicon wafers. When the dicing mark level indicates severe dicing marks, abnormal silicon wafers can be promptly rejected, avoiding subsequent ineffective polishing, grinding, and other processing steps, thus saving additional manufacturing costs and production resources. When the dicing mark level indicates mild dicing marks, subsequent cutting process parameters can be adjusted in a timely manner based on the dicing mark level, improving the stability and controllability of the production process.

[0065] In a specific example, the detection threshold includes detection threshold 1 and detection threshold 2, where detection threshold 1 has a value of 3 and detection threshold 2 has a value of 6. The step of comparing the maximum standard deviation with multiple detection thresholds to determine the dicing mark level of the silicon wafer includes:

[0066] When the maximum standard deviation is less than 3, the cutting mark level of the silicon wafer is determined to be level 1, which means that the surface morphology of the silicon wafer is good and there are no cutting marks, which has no impact on subsequent processes.

[0067] When the maximum standard deviation is greater than or equal to 3 and less than 6, the cutting mark level of the silicon wafer is determined to be level 2, indicating that there are slight marks on the surface of the silicon wafer, which have no impact on subsequent processes;

[0068] When the maximum standard deviation is greater than or equal to 6, the cutting mark level of the silicon wafer is determined to be level 3, indicating that there are serious marks on the surface of the silicon wafer, which affect the subsequent yield and process.

[0069] In some embodiments, after determining that the dicing mark level of the silicon wafer is level 2, the method further includes:

[0070] Adjusting the process parameters for dicing the silicon wafer includes at least one of the following:

[0071] Adjust the tension of the cutting wire used to cut the silicon wafer;

[0072] Adjust the concentration of the slurry used for cutting silicon wafers;

[0073] Inspect the wear of the guide rollers used to cut the silicon wafers;

[0074] Adjust the cutting speed for slicing silicon wafers.

[0075] This allows for timely adjustments to subsequent cutting process parameters, reducing cutting marks on the surface of the silicon wafers after cutting, improving the surface morphology of the silicon wafers after cutting, and enhancing the stability and controllability of the production process.

[0076] In some embodiments, after determining that the dicing mark level of the silicon wafer is level 3, the method further includes performing at least one of the following:

[0077] The silicon wafer cutting equipment was shut down for inspection.

[0078] Replace the mortar used for cutting silicon wafers;

[0079] Calibrate the wire tension control system for cutting silicon wafers.

[0080] This allows for timely adjustments to subsequent cutting process parameters, reducing cutting marks on the surface of the silicon wafers after cutting, improving the surface morphology of the silicon wafers after cutting, and enhancing the stability and controllability of the production process.

[0081] This invention also provides a silicon wafer dicing line determination device 100, such as... Figure 5 As shown, it includes:

[0082] The measurement module 101 is used to measure the surface morphology of the cut silicon wafer and obtain the height data of N positions on the target diameter of the silicon wafer relative to the reference plane, where N is an integer greater than 1, and the target diameter is parallel to the cutting direction.

[0083] Calculation module 102 is used to calculate the standard deviation of contour height fluctuation in the neighborhood of each location point based on the height data;

[0084] Select module 103, used to select the maximum standard deviation among the standard deviations of profile height fluctuation at N location points;

[0085] The processing module 104 is used to compare the maximum standard deviation with multiple detection thresholds to determine the dicing grade of the silicon wafer.

[0086] In this embodiment, the surface morphology of the cut silicon wafer is measured to obtain the height data of N points on the target diameter of the silicon wafer relative to the reference plane. The standard deviation of the contour height fluctuation within the neighborhood of each point is calculated based on the height data. The maximum standard deviation among the N points is selected. The maximum standard deviation is compared with multiple detection thresholds to determine the cutting mark level of the silicon wafer. Through this embodiment, after the silicon wafer is cut, the cutting marks can be detected based on the correlation between the standard deviation of the contour height fluctuation and the cutting mark level. This provides a quantitative quality feedback indicator for the cutting process, helping to quickly locate equipment or process parameter problems. Subsequently, the cutting process parameters can be adjusted promptly based on the cutting mark level, improving the stability and controllability of the production process. Furthermore, abnormal silicon wafers can be promptly rejected based on the cutting mark level, avoiding subsequent ineffective polishing, grinding, and other processing steps, saving additional manufacturing costs and production resources. This embodiment has low computational complexity and can be easily deployed in existing online or offline detection systems to achieve the detection and judgment of silicon wafer cutting mark levels.

[0087] In some embodiments, the value of N is proportional to the size of the silicon wafer. The larger the size of the silicon wafer, the larger the value of N. For example, with a silicon wafer size of 12 inches, the value of N can be 73; if the silicon wafer size is smaller than 12 inches, the value of N is less than 73. For example, when the silicon wafer size is 8 inches, the value of N can be 40-60, such as 40, 45, 50, 55, or 60; when the silicon wafer size is 6 inches, the value of N can be 30-40, such as 30, 35, or 40.

[0088] In some embodiments, the calculation module 102 is specifically used to add the height data of each location point to the k height data of the adjacent k-1 location points, divide by k, and obtain the average height value, where k is an integer greater than 1; for each height data in the k height data, calculate the height difference between it and the average height value; square each height difference, sum the square values ​​of all height differences, divide by k-1, and obtain the variance; take the arithmetic square root of the variance to obtain the standard deviation of the contour height fluctuation.

[0089] Specifically, taking a 12-inch silicon wafer as an example, there are 73 location points on the target diameter: N1, N2, ..., N73. For location point N1, the standard deviation of its profile height fluctuation with the next two location points N2 and N3 is calculated and denoted as STD1; for location point N2, the standard deviation of its profile height fluctuation with the next two location points N3 and N4 is calculated and denoted as STD2; and so on. For location point N71, the standard deviation of its profile height fluctuation with the next two location points N72 and N73 is calculated and denoted as STD71; for the last location points N72 and N73, in order to maintain the consistency of data length and cover all location points, the calculation result of location point N71 is used, that is, STD72 = STD71, STD73 = STD71; then, the largest STD value among the 73 STD values ​​is selected as the maximum STD value of the silicon wafer.

[0090] In some embodiments, the plurality of detection thresholds include detection threshold 1, ..., detection threshold n, detection threshold n+1, ..., detection threshold N arranged in ascending order. The processing module 104 is specifically used to match the maximum standard deviation with the plurality of detection thresholds in sequence. When the maximum standard deviation is greater than or equal to the detection threshold n and less than the detection threshold n+1, the dicing mark level of the silicon wafer is determined to be n+1.

[0091] In a specific example, the detection threshold includes detection threshold 1 and detection threshold 2. The value of detection threshold 1 is 3, and the value of detection threshold 2 is 6. The processing module 104 is specifically used to determine that the cutting line grade of the silicon wafer is grade 1 when the maximum standard deviation is less than 3, indicating that the surface morphology of the silicon wafer is good and there are no cutting lines, which has no impact on subsequent processes.

[0092] When the maximum standard deviation is greater than or equal to 3 and less than 6, the cutting mark level of the silicon wafer is determined to be level 2, indicating that there are slight marks on the surface of the silicon wafer, which have no impact on subsequent processes;

[0093] When the maximum standard deviation is greater than or equal to 6, the cutting mark level of the silicon wafer is determined to be level 3, indicating that there are serious marks on the surface of the silicon wafer, which affect the subsequent yield and process.

[0094] In some embodiments, after determining that the dicing mark level of the silicon wafer is level 2, the apparatus further includes an adjustment module for adjusting the process parameters for dicing the silicon wafer, including at least one of the following:

[0095] Adjust the tension of the cutting wire used to cut the silicon wafer;

[0096] Adjust the concentration of the slurry used for cutting silicon wafers;

[0097] Inspect the wear of the guide rollers used to cut the silicon wafers;

[0098] Adjust the cutting speed for slicing silicon wafers.

[0099] This allows for timely adjustments to subsequent cutting process parameters, reducing cutting marks on the surface of the silicon wafers after cutting, improving the surface morphology of the silicon wafers after cutting, and enhancing the stability and controllability of the production process.

[0100] In some embodiments, after determining that the dicing mark level of the silicon wafer is level 3, the adjustment module is further configured to perform at least one of the following:

[0101] The silicon wafer cutting equipment was shut down for inspection.

[0102] Replace the mortar used for cutting silicon wafers;

[0103] Calibrate the wire tension control system for cutting silicon wafers.

[0104] This allows for timely adjustments to subsequent cutting process parameters, reducing cutting marks on the surface of the silicon wafers after cutting, improving the surface morphology of the silicon wafers after cutting, and enhancing the stability and controllability of the production process.

[0105] Please refer to Figure 6 The present invention also provides an electronic device 200, including a processor 201, a memory 202, and a computer program stored in the memory 202 and executable on the processor 201. When the computer program is executed by the processor 201, it implements the various processes of the above-described silicon wafer dicing line determination method embodiment and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0106] This application also provides a computer program product, including computer instructions, which, when executed by a processor, implement the above-described... Figure 2 The various processes of the method embodiments shown can achieve the same technical effect, and will not be described again here to avoid repetition.

[0107] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0108] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0109] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of the present invention.

Claims

1. A method of determining a kerf mark of a silicon wafer, characterized by, The method comprises the following steps: measuring the surface topography of the cut silicon wafer to obtain height data of N position points on a target diameter of the silicon wafer relative to a reference plane, wherein N is an integer greater than 1, and the target diameter is parallel to the cutting direction; calculating the standard deviation of profile height fluctuation in the neighborhood of each position point according to the height data; selecting the maximum standard deviation of profile height fluctuation from the N position points; comparing the maximum standard deviation with a plurality of detection thresholds to determine the cutting line mark grade of the silicon wafer.

2. The method of claim 1, wherein the step of determining the presence of a scratch on the dicing line is performed by using a light source and a camera. The value of N is proportional to the size of the silicon wafer.

3. The method of claim 1, wherein the step of determining the presence of a scratch on the dicing line is performed by a method comprising: The calculation of the standard deviation of profile height fluctuation in the neighborhood of each position point according to the height data comprises the following steps: ​ adding the height data of each position point and the k height data of the adjacent k-1 position points, dividing by k to obtain an average height value, and k is an integer greater than 1; for each height data in the k height data, calculating the height difference between the height data and the average height value; squaring each height difference, summing the square values of all height differences, and dividing by k-1 to obtain a variance; taking the arithmetic square root of the variance to obtain the standard deviation of profile height fluctuation.

4. The method of claim 1, wherein the step of determining the presence of a scratch on the dicing line is performed by using a light source and a camera. The plurality of detection thresholds comprises detection threshold 1, …, detection threshold n, detection threshold n+1, …, detection threshold N arranged in ascending order, and the comparison of the maximum standard deviation with a plurality of detection thresholds to determine the cutting line mark grade of the silicon wafer comprises the following steps: matching the maximum standard deviation with a plurality of detection thresholds in turn, and when the maximum standard deviation is greater than or equal to detection threshold n and less than detection threshold n+1, determining that the cutting line mark grade of the silicon wafer is n+1.

5. The method of claim 4, wherein the step of determining the presence of a scratch on the cutting line of the silicon wafer is performed by using a scratch detection algorithm. The detection threshold comprises detection threshold 1 and detection threshold 2, the value of detection threshold 1 is 3, and the value of detection threshold 2 is 6, and the comparison of the maximum standard deviation with a plurality of detection thresholds to determine the cutting line mark grade of the silicon wafer comprises the following steps: when the maximum standard deviation is less than 3, determining that the cutting line mark grade of the silicon wafer is grade 1; when the maximum standard deviation is greater than or equal to 3 and less than 6, determining that the cutting line mark grade of the silicon wafer is grade 2; when the maximum standard deviation is greater than or equal to 6, determining that the cutting line mark grade of the silicon wafer is grade 3.

6. The method of claim 5, wherein the step of determining the presence of a scratch on the dicing line is performed by the steps of: After determining that the cutting line mark grade of the silicon wafer is grade 2, the method further comprises the following steps: ​ adjusting the process parameters for cutting the silicon wafer, including at least one of the following: adjusting the tension of the steel wire for cutting the silicon wafer; adjusting the concentration of the slurry for cutting the silicon wafer; checking the wear degree of the guide wheel for cutting the silicon wafer; adjusting the cutting speed for cutting the silicon wafer.

7. The method of claim 5, wherein the step of determining the presence of a scratch on the cutting line of the silicon wafer is performed by using a scratch detection algorithm. After determining that the cutting line mark grade of the silicon wafer is grade 3, the method further comprises at least one of the following steps: stopping the cutting equipment for the silicon wafer for inspection; replacing the slurry for cutting the silicon wafer; calibrating the steel wire tension control system for cutting the silicon wafer.

8. A device for determining silicon wafer dicing marks, characterized in that, The method comprises the following steps: a measuring module for measuring the surface topography of the cut silicon wafer to obtain height data of N position points on a target diameter of the silicon wafer relative to a reference plane, wherein N is an integer greater than 1, and the target diameter is parallel to the cutting direction; a calculating module configured to calculate a standard deviation of profile height fluctuation in a neighborhood of each of the position points according to the height data; a selecting module configured to select a maximum standard deviation from the standard deviations of profile height fluctuation of the N position points; a processing module configured to compare the maximum standard deviation with a plurality of detection thresholds to determine a grade of the cutting line mark of the silicon wafer.

9. An electronic device, comprising: comprising: a processor, a memory, and a program stored in the memory and executable in the processor, the program, when executed by the processor, implements the steps of the method for determining a cutting line mark of a silicon wafer according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, a computer readable storage medium storing a computer program, the computer program, when executed by a processor, implements the steps of the method for determining a cutting line mark of a silicon wafer according to any one of claims 1 to 7.

11. A computer program product, characterised in that, computer instructions, the computer instructions, when executed by a processor, implement the steps of the method for determining a cutting line mark of a silicon wafer according to any one of claims 1 to 7.

Images