Thin film probe device for chip testing and manufacturing method thereof, testing machine

Abstract

The embodiment of the present application provides a thin film probe device for chip testing and a manufacturing method and a testing machine thereof, and belongs to the technical field of chip integrated circuit testing. The thin film probe device is electrically connected with a PCB of a testing machine and a chip to be tested in use, and comprises: a flexible insulating film; an upward probe array arranged on the upper surface of the flexible insulating film, one end of an upward probe of the upward probe array being electrically connected with a circuit in the flexible insulating film, and the other end being in electrical contact with the bottom of the chip to be tested; a downward probe array arranged on the lower surface of the flexible insulating film, one end of a downward probe of the downward probe array being electrically connected with the circuit in the flexible insulating film, and the other end being in electrical contact with the PCB; and a conductive circuit formed in the flexible insulating film, the upward probe array and the downward probe array being electrically interconnected through micro-vias. The thin film probe device of the present application supports high-frequency testing and is suitable for high-density package testing.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip integrated circuit testing, and particularly relates to a thin film probe device for chip testing and a manufacturing method and a testing machine thereof. BACKGROUND

[0002] In the field of chip integrated circuit testing, the conductive rubber socket is a key interface component for connecting the chip under test and the PCB circuit of the testing machine. It forms a conductive channel by dispersing conductive particles in the silicone elastomer, and then realizes mechanical contact and electrical connection with the chip pad by using the compression deformation of the elastomer.

[0003] However, with the development of chip manufacturing technology towards high density and high frequency, the traditional conductive rubber socket exposes many technical bottlenecks. First, its high frequency performance is limited, and the effective bandwidth under-20dB condition is usually less than 10GHz, which is difficult to meet the testing requirements of high-speed SerDes, high-frequency memory and millimeter wave chips. Second, its testing density is limited, and the pin pitch of the traditional conductive rubber socket is usually greater than 300μm, which cannot adapt to the testing requirements of high-density advanced packaging chips (such as FCBGA, Chiplets, etc.) with pin pitch less than 100μm. Third, its service life is limited, and the typical service life of the conductive rubber socket is about 500,000 times, which cannot meet the requirements of millions of times of testing life in today's mass production, thereby increasing the maintenance cost and testing downtime cost.

[0004] In addition, the contact resistance of the traditional conductive rubber socket is high and fluctuates significantly in different application scenarios, which will affect the chip testing accuracy and consistency. At the same time, for complex chips with high pin count and small pitch, the comprehensive cost becomes very high.

[0005] Therefore, a new thin film probe device for chip testing and a manufacturing method and a testing machine thereof are proposed to solve the above problems in whole or in part. SUMMARY

[0006] In order to solve at least one aspect of the above problems and defects in the prior art, embodiments of the present application provide a thin film probe device for chip testing and a manufacturing method and a testing machine thereof. By using the bidirectional integrated probe structure based on the flexible insulating film and the internal precise copper wire layout, the shortest signal transmission path is formed, the parasitic inductance and capacitance are minimized, thereby supporting high frequency testing up to 67GHz, and the upper and lower probe arrays can realize pin pitch less than 100μm, effectively adapting to the testing requirements of high-density advanced packaging. The technical solution is as follows:

[0007] According to one aspect of the present application, there is provided a thin film probe device for chip testing, which electrically connects a chip under test and a PCB of a tester when in use, comprising specifically:

[0008] a flexible insulating film;

[0009] an upward probe array arranged on an upper surface of the flexible insulating film, one end of each upward probe in the upward probe array being electrically connected to a circuit in the flexible insulating film, and the other end being in electrical contact with the bottom of the chip under test;

[0010] a downward probe array arranged on a lower surface of the flexible insulating film, one end of each downward probe in the downward probe array being electrically connected to the circuit in the flexible insulating film, and the other end being in electrical contact with the PCB;

[0011] a conductive circuit formed inside the flexible insulating film, the conductive circuit electrically interconnecting the upward probe array and the downward probe array through micro-vias.

[0012] In some embodiments, the thin film probe device is detachably connected to the tester, the upward probe array is in elastic electrical contact with the bottom of the chip under test, and / or the downward probe array is in elastic electrical contact with the PCB.

[0013] In some embodiments, the probes in the upward probe array and the downward probe array are made of a material comprising a nickel-phosphorus alloy substrate and a hard gold layer plated on the surface thereof, the thickness of the hard gold layer being set to 0.1-0.3 μm; the ratio of the height to the diameter of the probes in the upward probe array and / or the downward probe array is set to 1:2-2.5.

[0014] In some embodiments, the upward probe array and the downward probe array are arranged in a manner matched with the alignment of the solder ball array on the bottom of the chip under test and the pad array on the PCB, respectively.

[0015] In some embodiments, the flexible insulating film is a polyimide film, the thickness of which is set to 25-50 μm; the conductive circuit is a copper wire, the line width of which is set to 15-30 μm.

[0016] In some embodiments, the inside of the flexible insulating film is provided with a plurality of probe support structures, each of the plurality of probe support structures being a coiled structure composed of a plurality of layers of coiled metal, both ends of each coiled structure extending outwardly toward the upper surface and the lower surface of the flexible insulating film, so as to form the upward probe array and the downward probe array on the upper surface and the lower surface, respectively, and the coiled structure forms the conductive circuit.

[0017] In some embodiments, the multi-layer winding metal is wound into a substantially hollow rectangular shape, and the upward probe array and the downward probe array are substantially perpendicular to the surface corresponding to the flexible insulating film, so that each upward probe, the corresponding hollow rectangle and each downward probe form a substantially "middle" shape, and the inner cavity of the hollow rectangle is filled with the flexible insulating film.

[0018] In some embodiments, the hollow rectangle is provided as a hollow rectangle with an opening or a closed hollow rectangle, and the flexible insulating film filled in the inner cavity of the hollow rectangle is formed with a closed cavity structure for buffering pressure.

[0019] In some embodiments, the cross-sectional shape of the closed cavity structure is provided as an ellipse or a rectangle, and the longitudinal direction of the closed cavity structure is the height direction of the upward probe array and the downward probe array.

[0020] In some embodiments, the shape of the flexible insulating film is provided as a rectangular shape, and the cross-sectional shape formed by the upward probe array, the downward probe array and the flexible insulating film is a "non" shape.

[0021] In some embodiments, the shape of each upward probe in the upward probe array is provided as a micro-convex shape or a cylindrical shape, and the shape of each downward probe in the downward probe array is provided as a cylindrical shape, and when the probe is provided as a cylindrical shape, a dome-shaped structure is provided at the free end of the cylindrical body.

[0022] In some embodiments, the radius of curvature of the top of the dome-shaped structure is provided as 10-25 μm; when the probe is provided as a cylindrical shape, the bottom diameter of each probe in the probe array is provided as 20-50 μm; and the height of each probe in the probe array is provided as 80-200 μm.

[0023] In some embodiments, when the shape of each upward probe in the upward probe array is provided as a micro-convex shape, the micro-convex shape is provided as a hemisphere or a semi-ellipsoid, the height of the micro-convex shape is provided as 50-150 μm, the diameter is provided as 20-50 μm, and the ratio of the contact diameter of the upward probe to the diameter of the solder ball on the bottom of the chip to be tested is 25-35%.

[0024] In some embodiments, the shape of the flexible insulating film is provided as a substantially square wave shape (i.e. a "few" shape), and the flexible insulating film includes a main body, a first extension and a second extension, the upward probe array is provided on the upper surface of the main body of the flexible insulating film, and the downward probe array is formed on the lower surface of the first extension and the second extension, respectively.

[0025] In some embodiments, the main body is shaped as an inverted "N" character, an upward probe array is arranged on the top surface of the top of the inverted "N" character, the first extension is horizontally outwardly extended from the left end of the inverted "N" character, and a downward probe array is arranged on the lower surface of the first extension, and the second extension is horizontally outwardly extended from the right end of the inverted "N" character, and a downward probe array is arranged on the lower surface of the second extension.

[0026] In some embodiments, the top lower surface of the inverted "N" character of the main body is provided with a metal layer, the upper surface of the metal layer is electrically connected with the conductive circuit, and the lower surface of the metal layer is provided with a plurality of metal elastic support structures for buffering pressure.

[0027] In some embodiments, each of the plurality of metal elastic support structures is shaped as a spiral, one end of each metal elastic support structure is electrically connected with the metal layer, and the other end is electrically connected with the PCB in use.

[0028] According to another aspect of the present application, a manufacturing method of a thin film probe device for chip testing is provided, which is used for manufacturing the thin film probe device described in the above aspects, and specifically includes:

[0029] providing a flexible insulating film substrate;

[0030] patterning the circuit and the probe pattern on the flexible insulating film substrate by a photolithography process;

[0031] forming the circuit pattern and the structural contour by a dry etching process;

[0032] depositing a seed layer;

[0033] forming a micro via by laser drilling;

[0034] forming the conductive circuit and the probe structure by an electroplating process;

[0035] removing the excess photoresist and the seed layer;

[0036] performing surface treatment;

[0037] chemically depositing a protective layer.

[0038] In some embodiments, the dry etching process uses inductive coupled plasma etching, and the specific process parameters include that the etching gas is a mixed gas of Cl2 and Ar, the mixing ratio is Cl2: Ar = 1:2, the working pressure is set to 8-12 mTorr, and the radio frequency power is set to 450-550 W.

[0039] In some embodiments, the seed layer is deposited by electron beam physical vapor deposition of titanium / copper composite seed layer, the deposition vacuum degree is ≤10 -5Pa, the total thickness of the seed layer is set to 200-500 nm.

[0040] In some embodiments, the laser drilling uses ultraviolet laser drilling, and the drilling diameter is set to 20-50 μm.

[0041] In some embodiments, the electroplating process uses pulse electroplating, and the specific process parameters include: the current density is set to 2-5 ASD, the electroplating temperature is set to 50-60℃, and the plating thickness is set to 15-20 μm.

[0042] In some embodiments, in the chemical deposition of the protective layer step, a nickel layer and a gold layer are chemically deposited, wherein the thickness of the nickel layer is set to 2-3 μm, the thickness of the gold layer is set to 0.05-0.1 μm, and the deposition temperature is set to 80-85℃.

[0043] In some embodiments, when manufacturing a thin film probe device with a sealed cavity structure, after providing a flexible insulating thin film substrate, a process step of forming the sealed cavity structure is further included, which specifically includes:

[0044] forming a sacrificial layer on the flexible insulating thin film substrate as a cavity mold;

[0045] depositing a reinforcing layer to cover the sacrificial layer;

[0046] forming a channel by etching and removing the sacrificial layer;

[0047] sealing the channel to obtain a sealed cavity structure.

[0048] According to another aspect of the present application, a test machine for chip testing is provided, which includes a test machine body and a thin film probe device detachably connected to the test machine body.

[0049] In some embodiments, the thin film probe device uses the thin film probe device described in the above aspects or the thin film probe device obtained by using the preparation method described in the above aspects.

[0050] The thin film probe device for chip testing and the manufacturing method thereof, and the test machine provided by the embodiments of the present application have at least one or part of the following advantages:

[0051] (1) By using the bidirectional integrated probe structure based on the flexible insulating thin film and the internal precise copper wire layout, the shortest signal transmission path is formed, and the parasitic inductance and capacitance are minimized, which enables the thin film probe device to support high-frequency testing up to 67 GHz, and at the same time, the probe array of the thin film probe device can realize a pin pitch of less than 100 μm, effectively adapting to the testing requirements of high-density advanced packaging;

[0052] (2) By adopting a probe material system consisting of a high-hardness, wear-resistant nickel-phosphorus alloy substrate and a hard gold plating layer, and combined with an optimized dome-shaped downward probe design, the contact pressure distribution is more uniform, avoiding damage to the PCB circuit pads. The probe can withstand more than 1 million insertion and removal tests, and its lifespan is significantly better than that of traditional conductive rubber sockets. At the same time, it maintains stable contact resistance (<30mΩ), ensuring the consistency and reliability of the test.

[0053] (3) By integrating advanced semiconductor processes such as photolithography, ICP dry etching, and pulse electroplating, and establishing a fully controllable precision manufacturing and quality control process, nanometer-level control of probe shape and size (tolerance ±2μm) has been achieved. Online monitoring is introduced during the manufacturing process to ensure that the product yield is greater than 98%, which is suitable for large-scale production.

[0054] (4) Based on finite element analysis (FEA) and actual testing, the optimal ratio range (25-35%) of probe diameter to solder ball diameter and the optimal range (1:2-2.5) of probe depth-to-width ratio were established. The parametric model provides accurate theoretical basis and practical guidance for probe design for chips of different specifications, improving the efficiency and success rate of thin film probe device design.

[0055] (5) By using a thin-film probe device with a lower metal pad array, the risk of damage to the PCB circuit of the test machine is eliminated to the maximum extent while maintaining the advantages of high-frequency performance. This further simplifies the manufacturing process, thereby effectively reducing costs and facilitating maintenance. It is suitable for various testing scenarios such as engineering verification, high PCB life requirements, or space constraints.

[0056] (6) By adjusting the probe array structure on the upper and lower surfaces of the flexible insulating film, as well as adjusting the film structure and the pressure buffer structure inside the film, it can be adapted to various testing machines and their PCB structures, and has wide compatibility. Attached Figure Description

[0057] These and / or other aspects and advantages of the present invention will become apparent and readily understood from the following description of preferred embodiments taken in conjunction with the accompanying drawings, in which:

[0058] Figure 1 This is a schematic diagram of the overall structure of a thin-film probe device for chip testing according to an embodiment of the present invention;

[0059] Figure 2 for Figure 1 A schematic diagram of the probe array structure of one embodiment of the thin-film probe device shown;

[0060] Figure 3 This is a schematic diagram of the structure of an upward probe according to an embodiment of the present invention;

[0061] Figure 4 A schematic diagram of a bottom pad structure of a chip to be tested matched with the thin film probe device of the present application;

[0062] Figure 5 A schematic diagram of a probe support structure in a flexible insulating thin film of an embodiment of the thin film probe device according to the present application;

[0063] Figure 6 A schematic diagram of a probe support structure in a flexible insulating thin film of another embodiment of the thin film probe device according to the present application;

[0064] Figure 7 A schematic diagram of a probe support structure in a flexible insulating thin film of yet another embodiment of the thin film probe device according to the present application;

[0065] Figure 8 A schematic diagram of a probe support structure in a flexible insulating thin film of still another embodiment of the thin film probe device according to the present application;

[0066] Figure 9 A schematic diagram of a principle overall structure of the thin film probe device for chip testing according to another embodiment of the present application;

[0067] Figure 10 A manufacturing process flow chart of an air cavity structure in a film of a manufacturing method of the thin film probe device according to the present application;

[0068] Figure 11 A scattering curve diagram at a high frequency of 67GHz, 100GHz for a series of different lengths of internal or package traces of a chip obtained by ANSYS simulation of the thin film probe device of the present application;

[0069] Figure 12 A probe fatigue curve diagram of the thin film probe device of the present application after repeated chip testing;

[0070] Figure 13 A probe height change curve diagram of a key position of the thin film probe device of the present application during accelerated life testing. DETAILED DESCRIPTION

[0071] The technical solutions of the present application will be further specifically explained below by embodiments and in conjunction with the drawings. In the specification, the same or similar reference numerals indicate the same or similar components. The following description of the embodiments of the present application with reference to the drawings is intended to explain the general inventive concept of the present application, and should not be understood as a limitation of the present application.

[0072] Embodiments of the present application provide a thin film probe device for chip testing. By means of bidirectional integrated probe structure based on flexible insulating film and internal precise copper wire layout, the shortest signal transmission path is formed, which maximally reduces parasitic inductance and capacitance, thereby being able to support high frequency testing up to 67GHz, while the upper and lower probe arrays can realize pin pitch less than 100μm, effectively adapting to the testing requirements of high-density advanced packaging. And through process control, the service life is prolonged, the electrical contact stability is improved, and the overall cost is reduced.

[0073] Referring to Figure 1 , a schematic overall structure of a thin film probe device 100 for chip testing is shown.

[0074] Referring to Figure 2 , a schematic probe array structure of an embodiment of the thin film probe device 100 shown in Figure 1 .

[0075] Referring to Figure 1 and Figure 2 , the thin film probe device 100 is electrically connected to the PCB of the tester and the chip under test 200 when in use. The thin film probe device 100 specifically comprises:

[0076] a flexible insulating film 110;

[0077] an upward probe array 120 arranged on the upper surface of the flexible insulating film 110, one end of the upward probe in the upward probe array 120 being electrically connected to the circuit in the flexible insulating film 110, and the other end being in electrical contact with the bottom (e.g. solder ball 210) of the chip under test 200;

[0078] a downward probe array 130 arranged on the lower surface of the flexible insulating film 110, one end of the downward probe in the downward probe array 130 being electrically connected to the circuit in the flexible insulating film 110, and the other end being in electrical contact with the PCB (e.g. PCB test circuit 310 in the tester 300) of the tester;

[0079] a conductive circuit 140 formed inside the flexible insulating film 110 and electrically interconnected with the upward probe array 120 and the downward probe array 130 through micro-via (specifically described later).

[0080] The core of the present application is to provide a kind of test probe structure based on flexible insulating film, for replacing traditional conductive rubber. Preferably, the film probe device 100 of the present application adopts the integrated design of bidirectional probe (upward probe array 120 and downward probe array 130). That is, the upward and downward probe arrays are simultaneously manufactured on the flexible circuit board formed by the same piece of flexible insulating film (such as polyimide PI), so as to realize the high reliability, high performance and high density electrical contact connection between the chip under test 200 (through the solder ball / solder ball array 210 at the bottom of its package) and the PCB 310 of the tester 300.

[0081] As shown in Figure 1 Exemplarily, the film probe device 100 is detachably connected with the tester 300, and the upward probe array 120 is in elastic electrical contact with the bottom of the chip under test 200 and / or the downward probe array 130 is in elastic electrical contact with the PCB 310. The test structure of the matching chip detection process includes, from top to bottom, as a whole:

[0082] The chip under test 200 is, for example, a DRAM chip, an advanced CPU, a GPU, a LPDDR5 / 6 memory chip, a 5G millimeter wave communication chip, etc. Generally, the package of the chip under test 200 is in the form of a rectangular sheet structure, and the specific size is determined according to the chip specification, and the thickness is generally 0.5-1.0 mm. The chip bottom adopts a ball grid array package, which contains tin ball solder joints arranged in a matrix, i.e. solder balls 210, and the diameter of each solder ball ranges from 0.25 to 0.35 mm, and the material is tin-silver-copper alloy. During testing, the chip under test 200 is located at the top layer of the test structure, and the side with the solder balls 210 is in downward electrical contact with the upward probe array 120 of the lower film probe device 100.

[0083] The flexible insulating film 110 of the film probe device 100 is preferably made of a single-layer flexible circuit board structure using a polyimide film. The thickness of the polyimide substrate is usually set to 25-50 μm, and precise copper conductors (usually copper conductors with a line width of 15-30 μm) are made by semiconductor process, and the upward probe array 120 and the downward probe array 130 are formed on the upper and lower surfaces respectively by integrated process. The cross-sectional shape of the flexible insulating film 110 is set to be rectangular, of course, those skilled in the art can understand that the flexible insulating film 110 can be set to be a rectangular solid shape, a square shape, a thin circular truncated cone shape, a thin circular cylinder shape, a thin polyhedral shape, etc., and the present example is only an illustrative example, and those skilled in the art should not understand it as a limitation of the present application.

[0084] For example, the cross-sectional shape of the upward probe array 120, the downward probe array 130 and the flexible insulating film 110 is "non" shape, "feng" shape or fishbone shape, etc. The above examples are only illustrative, and those skilled in the art should not understand it as a limitation to the present application.

[0085] Specifically, for the upward probe array 120, the shape of each upward probe can be micro convex shape or cylinder. Preferably, the micro convex shape is provided, which can be a hemisphere or a semi-ellipsoid. The height of each upward probe is 50-150 μm, and the diameter is 20-50 μm, which is accurately corresponding to the chip 200 to be tested (for example, the array or arrangement of the solder balls 210 of the chip 200 to be tested).

[0086] Specifically, for the downward probe array 130, the shape of each downward probe is preferably provided as a cylinder combined with a dome shape, wherein the height of each downward probe is 80-200 μm, and the curvature radius of the dome-shaped top is 10-25 μm, and the diameter of the cylinder bottom is 20-50 μm. The design of the cylinder combined with the dome shape helps to ensure that the downward probe is in maximum uniform contact with the pads in the PCB 310, avoiding stress concentration.

[0087] For example, the shape of each upward probe in the upward probe array 120 is provided as a cylinder combined with a dome shape, wherein the height of each upward probe is 80-200 μm, and the curvature radius of the dome-shaped top is 10-25 μm, and the diameter of the cylinder bottom is 20-50 μm. The design of the cylinder combined with the dome shape helps to ensure that the upward probe is in maximum uniform contact with the bottom of the chip (for example, the solder balls of the chip bottom), avoiding stress concentration.

[0088] For example, when the upward probe and the downward probe are both designed as a cylinder combined with a dome shape, the size of the upward probe, the density of the upward probe in the upward probe array, the arrangement, the size of the downward probe, the density of the downward probe in the downward probe array, the arrangement, etc. can be the same or different. Those skilled in the art can make corresponding design according to actual needs.

[0089] The upward and downward probe structure and the interconnection between the film and the circuit can be realized by setting a micro-via structure, for example, forming a micro-via by laser drilling in the manufacturing process, and then forming a conductive circuit and a probe structure by electroplating process to realize the electrical connection between the probe and the circuit in the film.

[0090] The PCB 310 of the test machine 300 is usually made of high-performance FR-4 or polytetrafluoroethylene material, and the thickness is about 1.0-1.6 mm. Preferably, the pad array on the board surface of the PCB 310 (the pad array is usuallyFigure 1 The pads on the upper surface of the PCB 310 shown in the figure are arranged to be substantially flush with the surface of the board, and of course, special-shaped pad arrays of certain working conditions or certain designs, such as pad array structures partially protruding from the surface of the board, are also applicable to the thin-film probe device of each embodiment of the present application, and the pad array is arranged to be accurately corresponding to the downward probe array 130, and the surface of the pad array is subjected to chemical nickel-gold plating treatment. When testing, the tester 300 is located at the bottom layer of the test structure, and one side of the PCB 310 faces upward to the downward probe array 130 of the thin-film probe device 100 and forms an elastic electrical contact.

[0091] Referring to Figure 3 , the structure of the upward probe in the upward probe array of an example is shown.

[0092] In an example, preferably, each upward probe 121 in the upward probe array 120 is in a micro-convex shape, and further preferably, the micro-convex shape is arranged as a hemisphere or a semi-ellipsoid.

[0093] In an example, more preferably, the ratio of the contact diameter of the upward probe 121 to the diameter of each solder ball of the solder balls 210 at the bottom of the chip under test 200 is 25-35%. Strictly setting and controlling the ratio of the diameters of the two is the key to achieving reliable contact and stable electrical performance. For example, in Figure 3 , the size of the solder balls 210 at the bottom of the chip under test 200 is 450 μm in diameter, and the size of the upward probe 121 of the thin-film probe device 100 is 140 μm in diameter and 280 μm in height.

[0094] In an example, the probe material generally needs to use a high-hardness and wear-resistant metal composite material. Preferably, the upward probe and the downward probe are made of a material including a nickel-phosphorus alloy substrate and a hard gold layer plated on the surface thereof, wherein the thickness of the hard gold layer is set to 0.1-0.3 μm. The above-mentioned metal composite material has excellent mechanical strength, elasticity, electrical conductivity and oxidation resistance.

[0095] In an example, preferably, the ratio of the height to the diameter of the upward probe and / or the downward probe is set to 1:2-2.5, and the probe structure thus arranged can provide necessary elastic deformation space while ensuring mechanical strength during chip testing.

[0096] Referring to Figure 4 , the array arrangement and specific structure size parameters of the solder balls 210 of the chip under test 200 (315 ball @ 0.80 mm x 0.7 mm pitch) of an example are shown.

[0097] Preferably, the arrangement of the upward probe array 120 and the downward probe array 130 respectively matches the array of solder balls 210 on the bottom of the chip under test 200 and the pad array of the PCB circuit 310 of the tester 300 in precise alignment.

[0098] Specifically, the tips / ends of the upward and downward probe structures are actually physical extensions of the copper conductive lines on the flexible insulating film 110, which are formed synchronously with the copper conductive lines by, for example, a precise electroplating process and arranged in a high-density array, the positions of which are in precise alignment with and match the array of solder balls 210 on the chip under test 200 (such as 315ball@0.80mmx0.7mm pitch). Figure 4

[0099] Further, the internal circuit of the flexible insulating film 110 is pre-provided and processed, i.e., the copper conductive lines are thin-film circuits with complex wiring in a two-dimensional plane, for example, the lines may have bending, winding, branching, and other wiring conditions, and need to have power supply, signal transmission, impedance control, structural support, and other functions. Those skilled in the art can understand that the internal circuit of the film can adopt the circuit designed in the prior art, such as a probe card, a conductive rubber socket, etc., which will not be described in detail here.

[0100] Exemplarily, the thin-film circuit needs to include a power delivery network (PDN), which provides the power (such as VDD) and ground (VSS) required for the chip under test 200 to work. Part of the lines in the thin-film circuit are designed to be relatively wide to carry larger current, forming a miniature power delivery network to efficiently and stably deliver power from the power module on the PCB 310 of the tester 300 to the chip under test 200.

[0101] Exemplarily, the thin-film circuit needs to include a signal routing channel, which is the most core function of the thin-film circuit. All data exchanges (such as DDR signals) between the chip under test 200 and the external test environment are transmitted back and forth through the fine lines in the thin-film circuit. The width and pitch of these lines need to be precisely controlled to ensure that the data signals up to several thousand Mbps are not distorted and do not produce interference during transmission.

[0102] Therefore, by setting the probe structure parameters and arranging the upward probe array 120 and the downward probe array 130, the complex circuit lines inside the thin-film circuit are maximized to adapt to the application in high-performance chip testing and to embody excellent high-frequency performance, high test density, high contact stability, and longer service life.

[0103] ​In one example, specifically, the inner portion of the flexible insulating film 110 is provided with a plurality of probe support structures, each of which is a winding structure composed of a plurality of layers of winding metal, both ends of each winding structure extending outwardly toward the upper and lower surfaces of the flexible insulating film 110 to form the upward probe array 120 and the downward probe array 130 on the upper and lower surfaces respectively, and the winding structure forms the conductive line 140. Through such a design, the film probe device can be widened and the effective bandwidth of high frequency use can be improved. For example, under the condition of -20 dB, the film probe device provided by the present application can be applied to a scenario with an effective bandwidth higher than 10 GHz, thereby greatly widening the effective high frequency use bandwidth. At the same time, through the above design, the present application can also be applied to the testing scenario of high-density advanced packaging chips.

[0104] The following will be described in more detail in combination with a plurality of specific embodiments of the probe support structure.

[0105] Referring to Figure 5 , a probe support structure 150a in the flexible insulating film 110 of one embodiment is shown.

[0106] Referring to Figure 6 , a probe support structure 150b in the flexible insulating film 110 of another embodiment is shown.

[0107] As shown in Figure 5 and Figure 6 , the probe support structure 150a and the probe support structure 150b are wound by a plurality of layers of winding metal into a generally hollow rectangular shape, and the upward probe array 120 and the downward probe array 130 are generally perpendicular to the surface corresponding to the flexible insulating film 110, so that each upward probe, the corresponding hollow rectangle and each downward probe form a generally "middle" shape (as shown in Figure 5 and Figure 6 ). The inner cavity of the hollow rectangle is filled through the flexible insulating film 110.

[0108] For example, the upward probe array 120 and the downward probe array 130 form an included angle of about 80°-110° with the surface corresponding to the flexible insulating film 110 (i.e. a generally perpendicular state). That is, the upward probe array 120 and the downward probe array 130 can form an included angle of 105°, 90°, 85°, etc. with the surface corresponding to the flexible insulating film 110.

[0109] For example, Figure 5 , the plurality of layers of winding metal of the probe support structure 150a form a conductive line, one end of which extends outwardly toward the upper surface to form an upward probe, the other end of which extends outwardly toward the lower surface to form a downward probe, and the middle portion is wound into a hollow rectangle with an opening (as shown in Figure 5The hollow rectangle of the opening forms the conductive line described above.

[0110] Exemplarily, Figure 6 The probe support structure 150b is first formed by winding the multi-layer wire into a closed hollow rectangle, and then the two free ends of the multi-layer wire extend outwardly towards the upper and lower surfaces of the flexible insulating film to form corresponding upward and downward probes. The winding structure formed by the multi-layer wire, i.e. the upward and downward probes, corresponds to the conductive line described above.

[0111] By forming a complex winding structure in the polyimide film, i.e. exposing the probe array structure of a set size and array arrangement on the upper and lower surfaces of the polyimide film, there is actually a winding structure electrically connecting the corresponding upward and downward probes inside the film.

[0112] Exemplarily, by adjusting the winding structure (for example Figure 5 、 Figure 6 The different winding structures shown can realize that a corresponding set of upward and downward probes are collinear in the vertical direction, or that the set of upward and downward probes are not collinear, i.e. offset by a certain distance. Such a setting can adjust the arrangement form of the upward probe array 120 and / or the downward probe array 130 of the thin film probe device 100 through a simple process, to fully adapt to different structures of the chip under test 200 and the test machine 300 in actual chip testing.

[0113] When the chip is tested, the thin film probe device 100 is subjected to pressure from top to bottom, and the winding structure can effectively disperse the concentrated "point pressure" or "surface pressure" into more uniformly distributed stress, thereby avoiding excessive local pressure from piercing or damaging the fragile structures of the film, probes, and in-film circuits below.

[0114] Referring to Figure 7 , another embodiment of the probe support structure 150c in the flexible insulating film 110 is shown.

[0115] Based on the above Figure 5 or Figure 6 embodiments, a closed cavity structure 151 for buffering pressure is formed in the flexible insulating film 110 in the inner cavity of the hollow rectangle. Preferably, the cross-sectional shape of the closed cavity structure 151 is set to be elliptical or rectangular, and the longitudinal direction of the closed cavity structure 151 is the height direction of the upward probe array 120 and the downward probe array 130.

[0116] In one example, as Figure 7As shown, the flexible insulating film 110 is internally provided with a plurality of probe support structures 150c, each of which has a closed cavity structure 151. The conductive circuit 140 (which can use the multi-layer metal winding structure of the above embodiments) is fixedly connected to the corresponding upward probe 121 and downward probe 131 around the outside of the closed cavity structure 151.

[0117] By using advanced semiconductor processes, such as the air spacer late integration process, a tiny closed cavity structure 151, such as an air cavity, is manufactured inside the polyimide film. That is, the probe array structure of a set size and array arrangement is exposed on the upper and lower surfaces of the polyimide film, and there is actually a reserved air cavity inside the film. The winding metal and / or conductive circuit is arranged around the air cavity and connected to the corresponding upward and downward probe structures.

[0118] Since air is highly compressible, when the film probe device 100 is subjected to pressure from top to bottom during chip testing, the air gap in the film can be compressed, thereby absorbing and buffering mechanical stress like a micro "air cushion" to protect the precision devices below.

[0119] Referring to Figure 8 , another embodiment of the probe support structure in the flexible insulating film 110 is shown, which is formed by changing the shape of the flexible insulating film 110 and setting a metal buffer structure on the lower surface (the side surface in contact with the tester 300).

[0120] In one example, the flexible insulating film 110 is shaped as a generally "U" shape (i.e., a square wave shape), and includes a main body 111, a first extension 112, and a second extension 113. The upward probe array 120 is arranged on the upper surface of the main body 111 of the flexible insulating film, and the downward probe array 130 is formed on the lower surface of the first extension 112 and the second extension 113, respectively.

[0121] Specifically, the main body 111 is shaped as an inverted "N" shape, the upward probe array 120 is arranged on the upper surface of the top of the inverted "N" shape, the first extension 112 is horizontally (i.e., along the longitudinal direction of the main body 111) outwardly extended from the left end of the inverted "N" shape, and the downward probe array 130 is formed on the lower surface of the first extension 112. The second extension 113 is horizontally (i.e., along the longitudinal direction of the main body 111) outwardly extended from the right end of the inverted "N" shape, and the downward probe array 130 is formed on the lower surface of the second extension 113.

[0122] In one example, the two sides of the inverted "N" shape of the main body 111 can be arranged to be substantially perpendicular to the top or at a preset angle. For example, the two sides of the inverted "N" shape can form an angle of 20°-120° with the "I" shaped top, such as 30°, 45°, 60°, 80°, so that the cross-sectional shape of the main body 111 is trapezoidal, i.e. substantially inverted "N" shape. Of course, the two sides of the inverted "N" shape can also form an angle of 90° with the "I" shaped top, i.e. inverted "N" shape. Of course, the two sides of the inverted "N" shape can also form an angle of 100°, 105°, 120°, etc. with the "I" shaped top, so that the main body 111 forms a boat shape or inverted trapezoidal, i.e. substantially inverted "N" shape. In one example, the top lower surface of the inverted "N" shape of the main body 111 is provided with a metal layer 114, the upper surface of the metal layer 114 is electrically connected with the conductive circuit in the film (such as the conductive circuit 140 shown in the figure), and the lower surface of the metal layer 114 is formed with a plurality of metal elastic support structures 115 for buffering pressure. Figures 5-7

[0123] Specifically, each of the plurality of metal elastic support structures 115 is arranged in a spiral shape, one end of each metal elastic support structure 115 is electrically connected with the metal layer 114, and the other end is electrically connected with the PCB 310 of the test machine 300 in use.

[0124] Referring to Figure 9 , the principle of the overall structure of the thin film probe device 100' for chip testing is shown. The thin film probe device 100' is a variant embodiment of the thin film probe device 100. The principle of the thin film probe device 100' is exactly the same as that of the thin film probe device 100, which will not be repeated here.

[0125] In one example, considering that the actual chip testing environment is prone to limited connector space or extremely high PCB circuit protection requirements in testing scenarios, the structure of the above-mentioned thin film probe device 100 is improved, that is, the upper surface in contact with the chip under test 200 retains the upward probe array 120 integrally formed with the flexible insulating film, and the lower surface is replaced with a metal pad and a through channel (metal pad array 160) to realize electrical contact / electrical connection with the PCB 310 of the test machine 300.

[0126] Specifically, the thin film probe device 100' includes: a flexible insulating film 110'; an upward probe array 120 arranged on the upper surface of the flexible insulating film 110', one end of the upward probe in the upward probe array 120 is electrically connected with the circuit in the flexible insulating film 110', and the other end is in electrical contact with the solder ball 210 at the bottom of the chip under test 200;

[0127] ​A metal pad array 160 is disposed on the lower surface of the flexible insulating film 110'. The metal pad array 160 is electrically connected to the circuit in the flexible insulating film 110' through, for example, a conductive channel and forms pressure contact with the PCB 310 of the test machine 300.

[0128] Conductive lines 140, formed inside a flexible insulating film 110', electrically interconnect the upward probe array 120 and the metal pad array 160.

[0129] For example, combined Figure 2 , Figures 5-7 As shown, the conductive line 140 in the thin film probe device 100' can be designed as the conductive line 140 of the thin film probe device 100 in any of the above embodiments or examples.

[0130] The structure and materials of the flexible insulating film 110' are exactly the same as those of the flexible insulating film 110, the only difference being the shape of the flexible insulating film 110'. Other specific structural parameters can be set and adjusted by referring to the thin film probe device 100 described above, combined with the actual chip testing environment and performance requirements, and will not be elaborated here.

[0131] Figure 8 The structure of the generally square-wave (i.e., generally "U"-shaped) flexible insulating film 110 shown is as follows: Figure 9 The thin-film probe device 100' shown is ideally suited for scenarios requiring frequent changes to chip samples and test plans in the early stages of chip product development, tests with extremely high PCB lifespan requirements (e.g., situations requiring repeated use of the same test board for long-term, high-volume testing), and in-package testing environments with extremely limited test space (e.g., when the Z-axis space of the test interface cannot accommodate a bidirectional probe structure). Its advantages specifically include:

[0132] ① Reduce the risk of PCB damage: Since the pads of the PCB 310 are in surface contact rather than point contact with the completely flat metal pad array 160 below, the contact pressure is greatly dispersed, which fundamentally eliminates the possibility of PCB pad deformation or damage caused by probe pressure.

[0133] ② When using the thin film probe device 100', the process can be further simplified and the manufacturing cost optimized: the most complex and demanding electroplating and etching process, which requires downward probes, is eliminated, which significantly simplifies the manufacturing process, improves production yield, and reduces costs.

[0134] ③ When using the thin-film probe device 100', it can also maintain good high-frequency performance: the flat pad contact interface is conducive to controlling the characteristic impedance of the transmission line, reducing signal reflection, and supporting further expanded high-frequency testing needs.

[0135] The following describes the use of the film probe device provided by the present application. Specifically as follows:

[0136] For example, when the chip test is performed, the film probe device 100 is first subjected to vertical pressure applied by the test fixture, so that the solder balls 210 of the chip under test 200 are matched with the upward probe array 120 and form elastic pressure contact.

[0137] Then, in the flexible insulating film 110 of the film probe device 100, the upward probe array 120 and the downward probe array 130 are electrically interconnected by the internal conductive circuit 140.

[0138] Finally, the flexible insulating film 110 and the PCB 310 of the test machine 300 are continuously subjected to vertical pressure and contact, the downward probe array 130 and the pads on the PCB 310 form elastic pressure contact, and the contact pressure is maintained by the elastic deformation of each downward probe.

[0139] The elastic deformation in the contact process is derived from the flexible structure of the flexible insulating film 110 and the buffer of the pre-set probe support structure.

[0140] Specifically, in the mechanical contact process, the chip under test 200 is lowered under the action of pressure so that the solder balls 210 are in contact with the upward probe array 120, and each upward probe is elastically deformed. At the same time, the downward probe array 130 is in a pre-pressed state on the pads of the PCB 310. The flexible characteristic of the flexible insulating film 110 absorbs the coplanar error of each contact surface.

[0141] At the same time, in the process of transmitting electrical signals, the test signal is input from the pads of the PCB 310 of the test machine 300, enters the flexible insulating film 110 through the downward probe array 130; the test signal is transmitted to the upward probe array 120 through the internal circuit and conductive circuit of the flexible insulating film 110; finally, it is transmitted to the solder balls 210 at the bottom of the chip under test 200 which are electrically connected with the internal circuit of the chip through the upward probe array 120; the feedback electrical signal in the chip under test 200 is returned to the test machine 300 along the same path in the opposite direction to complete the chip test.

[0142] For example, according to the cooperation of the chip under test 200 with various structures and the test machine 300 with various structures that may occur in the actual chip test scene, the design scheme of the specific film probe device 100 of each embodiment described above can be adjusted to adapt to the actual chip under test 200 and the test machine 300.

[0143] For example, any one of the probe support structures in Figures 5-7 may be combined withFigure 8 The flexible insulating film 110 of "a few" shapes (i.e. square wave shape) are combined to form the thin film probe device with different shapes or internal structures. For another example, Figures 5-7 The specific settings of the various probe support structures in the above embodiments can also be combined with each other. That is, the above embodiments can be combined and combined according to the actual chip testing environment and the specific structure of the chip to be tested and the tester. Here, only some illustrative examples are provided, and those skilled in the art should not be construed as a limitation on the present application.

[0144] According to another aspect of the present application, a manufacturing method of a thin film probe device for chip testing is provided, which is used to manufacture the thin film probe device described in the above aspects. The semiconductor micro-processing technology is used to realize the batch manufacturing of micron-level probe arrays on the polyimide flexible substrate. The process flow of the manufacturing method specifically includes:

[0145] Step S110: providing a flexible insulating film substrate.

[0146] A polyimide film with a thickness of 25-50 μm is selected. First, a plasma surface activation treatment is performed using a plasma cleaning machine, a vacuum degree of 10 -2 Pa order of magnitude, a treatment temperature of 150-200 °C, and a treatment time of 5-10 minutes, so as to enhance the adhesion between the substrate and the metal layer and lay a foundation for the subsequent process.

[0147] Step S120: patterning the circuit and probe pattern on the flexible insulating film substrate by a photoetching process.

[0148] The photo lithography process is used to transfer the circuit pattern to the photoresist by spin coating, exposure, and development steps using, for example, an ultraviolet photoetching machine. The thickness of the photoresist is 3-5 μm, the exposure wavelength is 365 nm, and the development time is 60-90 seconds, so as to define the fine pattern of the probe and the circuit.

[0149] Step S130: forming a circuit pattern and a structure contour by a dry etching process.

[0150] The ICP dry etching process uses an inductively coupled plasma technology for precise etching. The etching gas is a mixture of Cl2 and Ar with a mixing ratio of Cl2: Ar = 1:2; the working pressure is set to 8-12 mTorr; and the radio frequency power is set to 450-550 W. Finally, an accurate circuit pattern and a structure contour are formed.

[0151] Step S140: depositing a seed layer.

[0152] The electron beam physical vapor deposition process is used to deposit a titanium / copper composite seed layer in a vacuum environment using an electron beam evaporation table. The vacuum degree is 10-5 Pa, deposition rate 0.5-1.0 nm / s, seed layer thickness 200-500 nm, to provide a conductive substrate for subsequent electroplating process.

[0153] Step S150: Forming micro-via by laser drilling.

[0154] Using UV laser to make micro-via, using for example precision laser drilling machine, laser wavelength 355 nm, drilling diameter 20-50 pm, to realize interlayer electrical interconnection.

[0155] Step S160: Forming conductive circuit and probe structure by electroplating process.

[0156] Using electrochemical deposition process to form probe structure (upward and downward probe array) using for example precision electroplating tank, current density 2-5 ASD, electroplating temperature 50-60 °C, plating layer thickness 15-20 pm, to build conductive circuit and probe body structure.

[0157] Step S170: Removing excess photoresist and seed layer.

[0158] Removing photoresist and excess seed layer, using a photoresist remover to configure the chemical liquid concentration according to the process requirements, and adjusting the processing time according to the thickness of the photoresist layer, to complete the pattern definition.

[0159] Step S180: Surface treatment.

[0160] Surface treatment by spin etching, for example using a spin etching machine, rotation speed 1000-3000 rpm, etching liquid flow accurately controlled to achieve uniform surface treatment.

[0161] Step S190: Chemical deposition of protective layer.

[0162] Chemical deposition of nickel-gold protective layer using chemical plating equipment, nickel layer thickness 2-3 pm, gold layer thickness 0.05-0.1 pm, chemical plating set temperature 80-85 °C, to improve probe wear resistance and conductivity.

[0163] Referring to Figure 10 , a manufacturing process flow of air cavity structure in thin film probe device is shown.

[0164] In one example, when the probe support structure inside the flexible insulating thin film uses a sealed cavity structure, a semiconductor process of embedding air gap in dielectric layer (Air spacer Late Integration) needs to be used in the preparation process.

[0165] The effect of the array of closed cavity structures formed by the probe array is similar to countless tiny "air springs". When the probe is subjected to vertical pressure, the closed cavity structure can absorb and disperse stress by compression deformation, thereby protecting the delicate copper wire structure and the probe array structure from damage. The manufacturing process of the air cavity structure specifically includes:

[0166] Step S210: Build the basic structure and "air bag mold" to prepare the precise mold for the subsequent formation of the array of closed cavity structures.

[0167] On the fin structure formed on the substrate, a solid virtual gate is established, which will become the core support column of the future closed cavity structure.

[0168] On both sides of the virtual gate, a layer of special sacrificial layer material is deposited. This layer of sacrificial layer material determines the shape, size and position of the future closed cavity structure, and is the "mold" for forming the buffer cavity.

[0169] The SiN spacer layer is selectively removed, leaving only the SiBCN layer, to reserve space for the subsequent formation of the closed cavity structure.

[0170] Step S220: Build a solid "protective ceiling" to prevent the structure and pressure above from directly collapsing the future closed cavity structure. A solid support layer needs to be built.

[0171] Preferably, a three-layer (silicon nitride / silicon dioxide / silicon nitride) spacer layer deposition is used to deposit a reinforcement layer. A plurality of solid dielectric layers are deposited on the top of the overall structure by chemical vapor deposition or other methods. These dielectric layers will form a solid "ceiling" that can evenly distribute the pressure applied above to the support column below, rather than concentrating on a single point.

[0172] Step S230: Hollow out the "air bag" and complete the packaging. Remove the mold material to form a real buffer cavity, i.e. the closed cavity structure, and seal it.

[0173] Open the "construction access", remove the "virtual gate" material at the top by selective etching technology to form a vertical access. This access is the only entrance for subsequent entry and hollowing out of the "air bag mold".

[0174] Build the metal interlayer (MOL) to prepare the self-aligned contact (SAC) and contact hole (COAG) for electrical connection of the metal layer to the device below (such as source and drain, gate).

[0175] Through the above-mentioned channel, using a highly selective chemical etchant, the sacrificial layer material as the "mold" is accurately and completely removed (remove the interlayer dielectric, SAC cap, TS cap, silicon dioxide layer). At this point, on the side of the solid support column, the desired closed cavity structure has been formed.

[0176] Step S240: Obtain a closed cavity structure after sealing the channel.

[0177] Using atomic layer deposition technology, precise material deposition is carried out at the entrance of the closed cavity structure. The deposition process will gradually narrow the entrance and eventually completely seal it, permanently sealing the air to form a stable, closed air buffer interval.

[0178] During the process of manufacturing the thin film probe device through the above-mentioned process, the process parameters and process quality need to be controlled, and the thin film probe device obtained after manufacturing also needs to be completed Quality detection. Exemplarily, quality control and detection mainly include the following three links.

[0179] ① Process on-line monitoring:

[0180] Workshop environment monitoring: Through the workshop monitoring system, the temperature, humidity and cleanliness (such as particulate matter concentration) of the production environment are monitored in real time. Preferably, the clean room level should be maintained at ISO-5 (100 level) or higher to ensure process stability and avoid defects introduced by environmental factors.

[0181] Real-time monitoring of film thickness: After the metal deposition and electroplating process, a film thickness measuring instrument is used to measure the thickness of the deposited metal layer (such as the copper conductive layer, gold plating layer) online. The film thickness measuring instrument can use spectral ellipsometry technology, and the measurement accuracy can reach nanometer level, ensuring that the wire thickness meets the design specifications (such as 15-30 μm), thereby ensuring the accuracy of impedance control.

[0182] ② Precise measurement of key parameters of the product offline:

[0183] At key process nodes and finished product stages, the physical size and material composition of the probe structure of the upward probe array and the downward probe array are sampled and precisely measured.

[0184] Three-dimensional topography and coplanarity detection of the probe, using a three-dimensional optical surface profiler to scan the formed probe array. Based on the white light interference principle, the three-dimensional topography of the probe is reconstructed, and the key dimensions such as probe height (50-150 μm), diameter (20-50 μm) and top curvature radius (10-25 μm) are accurately measured.

[0185] Material composition and electrical property analysis of the probe, quantitative analysis of the composition and thickness of the gold plating layer on the surface of the probe by X-ray fluorescence analyzer to ensure the purity and thickness (0.1-0.3 μm) of the gold layer meet the design requirements. The dielectric constant and interface trap density of the flexible insulating film are characterized by the CVS (capacitance-voltage test) system to evaluate the applicability of its high-frequency electrical properties.

[0186] ③Final electrical function test of finished product:

[0187] Flying probe test, 100% electrical function test of the finished thin film probe device by flying probe tester. The flying probe tester controls multiple probes through a program, automatically contacts the test points on the thin film circuit one by one, verifies the conduction (no short circuit or open circuit), insulation resistance and specific resistance value of each circuit, and ensures that each product is functional.

[0188] At the same time, in order to cooperate with the actual structure design and production of the thin film probe device, important parameters can also be simulated and calculated by simulation software (such as ANSYS) to evaluate the performance of the thin film probe device.

[0189] Referring to Figure 11 , the scattering curves for a series of different lengths of internal or packaged traces of chips at high frequencies of 67 GHz and 100 GHz obtained by ANSYS simulation are shown.

[0190] In the scattering parameter (S-Parameter) simulation, the frequency is set at 67 GHz and 100 GHz, which belongs to the high frequency range, and is usually used for testing of cutting-edge chips such as millimeter waves. The scattering curve results reflect the excellent performance of the thin film probe device in high-frequency test scenarios.

[0191] At low frequencies, a trace may be a simple wire. When entering the high frequency or ultra-high frequency range, a trace will exhibit obvious transmission line effects, parasitic capacitance and inductance effects, resulting in signal distortion, reflection and loss. By measuring the curve of S-Parameter changing with frequency, the performance of the chip and circuit in the target working frequency band (such as signal integrity, energy loss, isolation, etc.) can be effectively analyzed.

[0192] As shown in Figure 11 , the reflection coefficient (S11), also known as return loss, is used to measure how much of the signal incident from one port is reflected back to the same port, which directly reflects the impedance matching of the port. The smaller the value of S11, the less the reflection, the better the matching, and the more ideal the performance. By observing the S11 curve, it can be effectively judged whether the trace has good impedance matching in the test frequency band.

[0193] Figure 11The three curves in the middle 100 GHz together describe a performance channel (also called a banana chart). S11 Org, in the middle, is the ideal design target line. S11 +tolerance, at the bottom, is the best performance boundary. S11 -tolerance, at the top, is the worst performance boundary.

[0194] Referring to Figure 12 , a probe fatigue curve of repeatedly testing a chip using the thin film probe device is shown.

[0195] Through simulation tests, the estimated life of the thin film probe device can reach 1 million times, which has obvious advantages compared with existing conductive rubber products.

[0196] 24-pin data is the original test data collected from the 24 pins of the chip respectively. It includes specific electrical performance test data (such as voltage, current, signal timing, S parameter, etc.). The average value curve is to quickly understand the overall performance level of the chip. For example, the average value of a certain test parameter (such as operating current, signal rise time) of all 24 pins can be calculated to provide a representative, centralized trend index. The trend curve is a line that fits the data points on the chart, which reveals the overall direction, pattern or rule of data change, and can clearly show whether the parameter is rising, falling, remaining stable or periodically fluctuating.

[0197] As shown in Figure 12 , in the life test, the trend curve of the performance parameter changing with time is drawn to predict when it will fail. When the probe length is lower than the required value (about 20 μm), it indicates that the thin film probe device has reached the end of its service life, and the number of tests has reached about 1.3 million times.

[0198] Referring to Figure 13 , the probe height change curve at the key position of the thin film probe device during accelerated life test is shown.

[0199] The accelerated life test can set the test environment to constantly alternating extremely high and extremely low temperature environments to simulate thermal expansion and contraction in daily use, accelerate the fatigue and aging of the materials of the thin film probe device, especially the probe array structure, and evaluate its long-term reliability.

[0200] Through simulation tests, the probe height at the key position of the thin film probe device is still greater than 12.5 μm required by the test after 500,000 times of accelerated cycle test (thermal test).

[0201] According to still another aspect of the present application, a tester for testing a chip is also provided, which includes a tester body and a thin film probe device detachably connected to the tester body.

[0202] In one example, the thin film probe device uses the thin film probe device described in each of the above embodiments or the thin film probe device obtained by using the preparation method described in the above aspects.

[0203] The thin film probe device for chip testing and the manufacturing method thereof provided by the embodiments of the present application have at least one or part of the following advantages:

[0204] (1) By using the bidirectional integrated probe structure based on the flexible insulating film and the internal precise copper wire layout, the shortest signal transmission path is formed, and the parasitic inductance and capacitance are minimized, which enables the thin film probe device to support high-frequency testing up to 67GHz, and the probe array can realize a pin pitch of less than 100μm, effectively adapting to the testing needs of high-density advanced packaging;

[0205] (2) By using the probe material system composed of a high-hardness, wear-resistant nickel-phosphorus alloy substrate and a hard gold plating layer, and combining with the optimized dome-shaped downward probe design, the contact pressure distribution is more uniform, and damage to the PCB circuit pad is avoided. The probe can withstand more than 1 million insertion and extraction tests, and has a significantly longer service life than traditional conductive rubber sockets, while maintaining stable contact resistance (<30mΩ), ensuring the consistency and reliability of the test;

[0206] (3) By integrating advanced semiconductor processes such as photolithography, ICP dry etching, and pulse plating, and establishing a full-process controllable precision manufacturing and quality control process, nanoscale control (tolerance ±2μm) of the probe shape and size is realized, online monitoring is introduced during the manufacturing process to ensure a product yield of more than 98%, and mass production is suitable;

[0207] (4) Based on finite element analysis (FEA) and actual testing, a preferred ratio range (25-35%) of the probe diameter to the solder ball diameter and a preferred range (1:2-2.5) of the probe aspect ratio are established, and a parameterized model is used to provide accurate theoretical basis and practical guidance for probe design for different specifications of chips, thereby improving the efficiency and success rate of thin film probe device design;

[0208] (5) By using the thin film probe device with the lower metal pad array, while maintaining the high-frequency performance advantage, the damage risk of the test machine PCB circuit is minimized, the manufacturing process is further simplified, thereby effectively reducing the cost, facilitating maintenance, and being suitable for various testing scenarios such as engineering verification, high PCB service life requirement, or space limitation;

[0209] (6) By adjusting the probe array structure on the upper and lower surfaces of the flexible insulating film and adjusting the film body structure and the structure for pressure buffering in the film, the thin film probe device can be adapted to various test machines and their PCB structures, and has wide adaptability.

[0210] While some embodiments of the general inventive concept have been shown and described, it is to be understood that changes can be made in embodiments without departing from the principles and spirit of the general inventive concept, the scope of which is defined in the claims and their equivalents.

Claims

1. A thin-film probe device for chip testing, wherein the thin-film probe device is electrically connected to the chip under test and the PCB of the testing machine during use, characterized in that, The thin film probe device includes: A flexible insulating film; An upward probe array disposed on the upper surface of the flexible insulating film, one end of an upward probe in the upward probe array being electrically connected to a circuit in the flexible insulating film, and the other end being in electrical contact with the bottom of the chip under test; A downward probe array disposed on the lower surface of the flexible insulating film, one end of a downward probe in the downward probe array being electrically connected to a circuit in the flexible insulating film, and the other end being in electrical contact with the PCB; A conductive line formed inside the flexible insulating film, the conductive line electrically interconnecting the upward probe array and the downward probe array through a micro via hole; wherein A plurality of probe support structures are provided inside the flexible insulating film, each probe support structure being a winding structure composed of multiple layers of winding metal, both ends of each winding structure extending outward toward the upper surface and the lower surface of the flexible insulating film respectively to form the upward probe array and the downward probe array on the upper surface and the lower surface respectively, and the winding structure forming the conductive line; The shape of the flexible insulating film is set to be generally square-wave-shaped, which includes a main body, a first extension portion and a second extension portion, an upward probe array is provided on the upper surface of the main body, and downward probe arrays are respectively formed on the lower surfaces of the first extension portion and the second extension portion; The shape of the main body is set to be an inverted "U" shape, an upward probe array is provided on the upper surface of the top of the inverted "U" shape, the first extension portion extends horizontally outward from the left end of the inverted "U" shape and a downward probe array is formed on its lower surface, and the second extension portion extends horizontally outward from the right end of the inverted "U" shape and a downward probe array is formed on its lower surface.

2. The thin film probe device according to claim 1, wherein The thin film probe device is detachably connected to a tester, The upward probe array is in elastic electrical contact with the bottom of the chip under test, and / or The downward probe array is in elastic electrical contact with the PCB.

3. The thin film probe device according to claim 1, wherein The probes in the upward probe array and the downward probe array are made of a material including a nickel-phosphorus alloy matrix and a hard gold layer plated on its surface, and the thickness of the hard gold layer is set to be 0.1 - 0.3 μm; The ratio of the height to the diameter of the probes in the upward probe array and / or the downward probe array is set to be 1:2 - 2.

5.

4. The thin film probe device according to claim 1, wherein The arrangement patterns of the upward probe array and the downward probe array are respectively in对位匹配 with the solder ball array at the bottom of the chip under test and the pad array of the PCB.

5. The thin film probe device according to claim 1, wherein The flexible insulating film is a polyimide film, and the thickness is set to be 25 - 50 μm; The conductive line is a copper wire, and the line width of the copper wire is set to be 15 - 30 μm.

6. The thin film probe device according to any one of claims 1 - 5, wherein It should be noted that the term "对位匹配" in needs to be further determined according to the actual context for a more accurate translation. It might be a very specific technical term that could be translated more precisely if more context information is available. The multi-layer wound metal is wound into a generally hollow rectangular shape, and the upward probe array and the downward probe array are substantially perpendicular to the corresponding surface of the flexible insulating film, so that each upward probe, the corresponding hollow rectangle, and each downward probe integrally form a generally "middle" shape. The inner cavity of the hollow rectangle is filled with the flexible insulating film.

7. The thin film probe device according to claim 6, wherein: The hollow rectangle is provided as a hollow rectangle with an opening or a closed hollow rectangle. A sealed cavity structure for buffering pressure is formed in the flexible insulating film filled in the inner cavity of the hollow rectangle.

8. The thin film probe device according to claim 7, wherein: The cross-sectional shape of the sealed cavity structure is set as an ellipse or a rectangle, and the longitudinal direction of the sealed cavity structure is the height direction of the upward probe array and the downward probe array.

9. The thin film probe device according to any one of claims 1-5, wherein: The shape of the flexible insulating film is set as a cuboid shape. The cross-sectional shape formed by the upward probe array, the downward probe array, and the flexible insulating film is a "non" shape.

10. The thin film probe device according to claim 9, wherein: The shape of each upward probe in the upward probe array is set as a micro-convex shape or a cylindrical shape. The shape of each downward probe in the downward probe array is set as a cylindrical shape. When the probe is set as a cylindrical shape, a dome-shaped structure is provided at the free end of the cylinder.

11. The thin film probe device according to claim 10, wherein: The radius of curvature of the top of the dome-shaped structure is set to 10-25 μm. When the probe is set as a cylindrical shape, the bottom diameter of each probe in the probe array is set to 20-50 μm. The height of each probe in the probe array is set to 80-200 μm.

12. The thin film probe device according to claim 10, wherein: When the shape of each upward probe in the upward probe array is set as a micro-convex shape, The micro-convex shape is set as a hemisphere or a semi-ellipsoid. The height of the micro-convex shape is set to 50-150 μm, and the diameter is set to 20-50 μm. The ratio of the contact diameter of the probe in the upward probe array to the diameter of the solder ball at the bottom of the待测芯片 (to be determined chip) is 25-35%.

13. The thin film probe device according to any one of claims 1-5, wherein: A metal layer is provided on the lower surface of the top of the inverted "U" shape of the main body. The upper surface of the metal layer is electrically connected to the conductive circuit. A plurality of metal elastic support structures for buffering pressure are formed on the lower surface of the metal layer.

14. The thin film probe device according to claim 13, wherein: The shape of each metal elastic support structure in the plurality of metal elastic support structures is set as a spiral shape. One end of each metal elastic support structure is electrically connected to the metal layer, and the other end is electrically connected to the PCB during use.

15. A method for manufacturing a thin-film probe device for chip testing, the method being used to manufacture the thin-film probe device according to any one of claims 1-14, characterized in that, The manufacturing method includes: Providing a flexible insulating film substrate; The circuit and probe pattern are patterned on the flexible insulating thin film substrate using photolithography. Circuit patterns and structural outlines are formed using dry etching processes; Seed layer deposition; Micro-holes are formed by laser drilling; Conductive circuits and probe structures are formed through electroplating processes; Remove excess photoresist and seed layer; Perform surface treatment; Chemical deposition protective layer.

16. The manufacturing method according to claim 15, characterized in that, The dry etching process uses inductively coupled plasma etching, and the specific process parameters include: The etching gas is a mixture of Cl2 and Ar, with a mixing ratio of Cl2:Ar = 1:2; The working pressure is set to 8-12 mTorr; The radio frequency power is set to 450-550W.

17. The manufacturing method according to claim 15, characterized in that, The deposited seed layer is an electron beam physical vapor deposition titanium / copper composite seed layer, with a deposition vacuum degree ≤10. -5 Pa, the total thickness of the seed layer is set to 200-500nm.

18. The manufacturing method according to claim 15, characterized in that, The laser drilling uses ultraviolet laser drilling, and the drilling diameter is set to 20-50μm.

19. The manufacturing method according to claim 15, characterized in that, The electroplating process uses pulse electroplating, and the specific process parameters include: The current density is set to 2-5 ASD, the electroplating temperature is set to 50-60℃, and the coating thickness is set to 15-20μm.

20. The manufacturing method according to claim 15, characterized in that, In the step of chemically depositing a protective layer, a nickel layer and a gold layer are chemically deposited, wherein... The nickel layer thickness was set to 2-3 μm, the gold layer thickness was set to 0.05-0.1 μm, and the deposition temperature was set to 80-85℃.

21. The manufacturing method according to any one of claims 15-20, characterized in that, When manufacturing a thin-film probe device with a closed cavity structure, the step of providing the flexible insulating thin-film substrate further includes a process step of forming the closed cavity structure, the process step specifically including: A sacrificial layer is formed on a flexible insulating thin film substrate to serve as a cavity mold; The deposited reinforcement layer covers the sacrificial layer; Channels are formed by etching and the sacrificial layer is removed; The sealed cavity structure is obtained by sealing the channel.

22. A test machine for chip testing, characterized in that, The testing machine includes a testing machine body and a thin film probe device detachably connected to the testing machine body. The thin film probe device is a thin film probe device according to any one of claims 1-14 or a thin film probe device obtained by the manufacturing method according to any one of claims 15-21.

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