Power module testing methods, systems, devices, and media

Abstract

The application provides a power module test method, system, device and medium. The method is applied to a chip test device, the chip test device includes a probe card, the probe card includes a plurality of phase sequence modules, and each phase sequence module is connected with a drive board. For the plurality of phase sequence modules, when it is detected that a target drive board is powered on, the target drive board reads test configuration information from the phase sequence module, the target drive board generates a first target phase sequence drive voltage based on initial phase sequence voltage information in the test configuration information, when a drive instruction is received, the target drive board generates a drive signal, and based on the drive signal, the first target phase sequence drive voltage is transmitted to the power module under test through the phase sequence module at a target pin to drive the power module under test. Therefore, no matter how the drive board is placed, the phase sequence drive voltage generated by the drive board can be accurately matched to the corresponding phase sequence of the device through the power module under test, manual operation errors are reduced, and test safety is ensured.

Description

Technical Field

[0001] This application relates to chip testing technology, and in particular to a power module testing method, system, device and medium. Background Technology

[0002] In the field of power module testing, ensuring the correct phase sequence of the three phases (U-phase, V-phase, and W-phase) of the power module is a core prerequisite for guaranteeing test safety and accuracy. The design of the power module's drive circuit is highly dependent on the phase relationship of the three-phase voltages. If the drive voltage received by the phase sequence does not match the requirements of the power module, it will not only cause the power module to fail to turn on and off normally, but may also lead to permanent damage to components in the power module, distortion of test data, and systemic failure of the entire test system. In related technologies, the phase sequence information is often fixedly stored on the drive board to achieve the matching of phase sequence and drive voltage. Specifically, each drive board is configured with fixed phase sequence information and stored in onboard memory. When in use, it is precisely inserted into the corresponding phase sequence slot on the probe board, and then the matching drive voltage is set by commands and the phase sequence information stored on the board to ensure that the power module obtains the correct phase sequence output. However, this method is highly dependent on manual alignment and insertion. If an operational error causes the drive board to be installed in the wrong slot or pin with a different phase sequence, it will directly cause a mismatch between the drive voltage and the module's phase sequence requirements, leading to test abnormalities or even component damage. Summary of the Invention

[0003] To address the aforementioned technical problems, embodiments of this application provide a power module testing method, system, device, and medium.

[0004] One aspect of this application provides a power module testing method applied to a chip testing device. The chip testing device includes a probe board, which includes multiple phase sequence modules. Each phase sequence module is connected to a driver board. The method includes: for the multiple phase sequence modules, in response to detecting that a target driver board is powered on, the target driver board reads test configuration information from the phase sequence modules. The test configuration information includes initial phase sequence voltage information. The target driver board is a driver board connected to the phase sequence modules. The target driver board generates a first target phase sequence driving voltage based on the initial phase sequence voltage information. In response to receiving a driving command, the target driver board generates a driving signal and, based on the driving signal, transmits the first target phase sequence driving voltage to the power module under test through the phase sequence modules via a target pin to drive the power module under test. The target pin is a pin in the power module under test corresponding to the phase sequence module.

[0005] Another aspect of this application provides a power module testing system applied to a chip testing device. The system includes: multiple phase sequence modules and multiple driver boards. The multiple phase sequence modules are deployed on the probe board of the chip testing device. Each phase sequence module is connected to a driver board and connected to a corresponding pin in the power module under test. Each phase sequence module is used to store corresponding test configuration information, including initial phase sequence voltage information. A target driver board is used to read the test configuration information from the phase sequence modules connected to the target driver board after power-on, and generate a first target phase sequence driving voltage based on the initial phase sequence voltage information in the test configuration information. Upon receiving a driving command, a driving signal is generated, and based on the driving signal, the first target phase sequence driving voltage is transmitted to the power module under test through the phase sequence modules via a target pin. The target pin is a pin in the power module under test corresponding to the phase sequence module. The target driver board is one of the multiple driver boards.

[0006] In another aspect of this application, a chip testing device is provided, the chip testing device including a host computer and a slave computer, wherein the power module testing system described above is deployed in the slave computer.

[0007] In another aspect of this application, an electronic device is provided, comprising: a memory for storing a computer program; and a processor for executing the computer program stored in the memory, wherein when the computer program is executed, it implements the power module testing method described above.

[0008] In another aspect, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the above-described method.

[0009] The power module testing method, system, device, and medium in this application embodiment include a chip testing device comprising a probe board, which includes multiple phase sequence modules. Each phase sequence module is connected to a driver board. For multiple phase sequence modules, when the target driver board (the driver board connected to the phase sequence module) is detected to be powered on, the target driver board reads the test configuration information from the phase sequence module. Based on the initial phase sequence voltage information, the target driver board generates a first target phase sequence driving voltage. Upon receiving a driving signal, the target driver board transmits the first target phase sequence driving voltage to the power module under test through the phase sequence module connected to it via the driving signal and the target pin to drive the power module under test. Therefore, through dynamic information interaction (dynamic mapping) between the driver board and the phase sequence module, the phase sequence voltage information corresponding to the phase sequence is stored in the phase sequence module in the probe board. The driver board only needs to be connected to the phase sequence module. After power-on, it can automatically read the above information and adapt to the driver board of the corresponding phase sequence. This ensures that no matter how the driver board is placed, the phase sequence driving voltage it generates can be accurately matched to the corresponding phase sequence of the device through the corresponding pin on the power module under test. This avoids the risk of tube explosion caused by manual wiring errors, visual judgment errors, or input errors, simplifies the maintenance and replacement process, reduces human operation errors, and ensures test safety.

[0010] Furthermore, since the phase sequence module can store initial phase sequence voltage information and test configuration information, the driver board can directly read the complete configuration (initial phase sequence voltage information and test configuration information) after power-on. This eliminates the need for the host computer to repeatedly send test data, significantly reducing the frequency of interaction between the host and slave computers, shortening test preparation and execution time, and effectively improving test efficiency and productivity. In addition, because the core information (initial phase sequence voltage information) is stored in the phase sequence module, when changing the driver board or switching to different models of the power module under test, there is no need to reconfigure the phase sequence information. The driver board only needs to automatically read the data in the phase sequence module. Moreover, after changing the probe board, the system can also automatically identify the configuration of the new power module under test through the information stored in the phase sequence module, without the need for downtime adjustments. This ensures the continuous and stable testing process and reduces maintenance complexity and time costs.

[0011] The technical solution of this application will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0012] The accompanying drawings, which form part of this specification, illustrate embodiments of this application and, together with the description, serve to explain the principles of this application.

[0013] This application can be more clearly understood with reference to the accompanying drawings and the following detailed description, wherein:

[0014] Figure 1 This is a flowchart illustrating a power module testing method provided in an exemplary embodiment of this application;

[0015] Figure 2 This is a flowchart illustrating a power module testing method provided in another exemplary embodiment of this application;

[0016] Figure 3 This is a schematic diagram of a power module testing method provided in an application example of this application;

[0017] Figure 4 This is a flowchart illustrating a power module testing method provided in yet another exemplary embodiment of this application;

[0018] Figure 5 This is a schematic diagram of a probe plate provided in an exemplary embodiment of this application;

[0019] Figure 6 This is a schematic diagram of a probe plate provided in another exemplary embodiment of this application;

[0020] Figure 7 This is a schematic diagram of the power module testing system provided in an exemplary embodiment of this application;

[0021] Figure 8 This is a schematic diagram of a chip testing device provided in an exemplary embodiment of this application;

[0022] Figure 9 This is a schematic diagram of the structure of an application embodiment of the electronic device disclosed herein. Detailed Implementation

[0023] Various exemplary embodiments of this application will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of this application.

[0024] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this application are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0025] It should also be understood that in the embodiments of this application, "multiple" can refer to two or more, and "at least one" can refer to one, two or more.

[0026] It should also be understood that any component, data or structure mentioned in the embodiments of this application can generally be understood as one or more unless explicitly defined or given contrary guidance in the context.

[0027] Furthermore, the term "and / or" in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this application generally indicates that the preceding and following related objects have an "or" relationship.

[0028] It should also be understood that the description of the various embodiments in this application emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0029] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0030] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the scope of this application and its application or use.

[0031] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0032] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0033] The embodiments of this application can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate together with a wide range of other general-purpose or special-purpose computing system environments or configurations. Well-known examples of terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments including any of the above systems, etc.

[0034] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0035] In the process of developing this application, research revealed that the fixed phase sequence storage method of the driver board heavily relies on manual, precise insertion of the driver board with pre-configured phase sequence information into the corresponding phase sequence slot of the probe board. If operational errors lead to the driver board being incorrectly installed into a slot or pin with a non-corresponding phase sequence, the driver board will output a drive voltage that does not match the phase sequence requirements of the power module during testing, directly causing test abnormalities or even damaging the power module. Furthermore, the driver board experiences a high workload during testing, resulting in a relatively high probability of damage and replacement frequency. New driver boards do not have pre-set phase sequence information at the factory, requiring reconfiguration via communication protocol after each replacement. This not only interrupts the testing process but also increases the complexity and time cost of subsequent maintenance, hindering the continuous and stable operation of the testing system.

[0036] Figure 1 This is a schematic flowchart of a power module testing method provided in an exemplary embodiment of this application. This embodiment can be applied to chip testing equipment, such as... Figure 1 As shown, it includes the following steps:

[0037] In step S100, for multiple phase sequence modules, in response to detecting that the target driver board is powered on, the target driver board reads the test configuration information from the phase sequence module.

[0038] The test configuration information includes: initial phase sequence voltage information, and the target driver board is the driver board connected to the phase sequence module. The chip testing equipment includes: a probe board, which includes multiple phase sequence modules, each of which is connected to a driver board.

[0039] Chip testing equipment is used to test the functionality and / or performance of a device under test (DUT). For example, a chip testing equipment can be an Automatic Test Equipment (ATE). The chip testing equipment may include a host computer and a slave computer (test head). The host computer may include at least one of the following: a computer, server, smartphone, or tablet computer, etc. The host computer and the slave computer communicate with each other and the host computer controls the slave computer to test the DUT. The slave computer is used to test the functionality and / or performance of the DUT. The DUT may be, for example, a power module. A power module may include at least one of the following: an Insulated Gate Bipolar Transistor (IGBT) and a Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor (SiC MOSFET), etc.

[0040] A probe board is a carrier board with precise conductive probes (or contacts). Its core function is to act as an intermediary bridge, enabling temporary / semi-permanent connections between chip testing equipment and the device under test (DUT), such as a power module. It is used to transmit electrical signals to the DUT, detect electrical parameters (such as continuity, voltage, current, and phase), or verify connection logic. Probe boards can be deployed on a lower-level computer. Each phase sequence module is equipped with a storage medium, which stores test configuration information. The storage medium can be, for example, an electrically erasable programmable read-only memory (EEPROM).

[0041] A driver board is used to drive the power module under test. For example, the driver board can be a driver board for driving IGBTs or a driver board for driving SiC MOSFETs. In one embodiment, the driver board may include a controller. The controller may be, for example, a microcontroller unit (MCU). After the target driver board is powered on, the MCU of the target driver board can read the test configuration information from the phase sequence module connected to the target driver board according to a preset read / write protocol, and use the read test configuration information to test the power module.

[0042] For example, phase sequence refers to the specific name or identifier of each bridge arm (such as upper / lower bridge arm) in the power module under test. The power module under test may include: the bridge arm corresponding to the UT phase sequence (U-phase upper bridge arm), the bridge arm corresponding to the VT phase sequence (V-phase upper bridge arm), the bridge arm corresponding to the WT phase sequence (W-phase upper bridge arm), the bridge arm corresponding to the UB phase sequence (U-phase lower bridge arm), the bridge arm corresponding to the VB phase sequence (V-phase lower bridge arm), and the bridge arm corresponding to the WB phase sequence (W-phase lower bridge arm). Accordingly, the phase sequence modules that the probe board may include are: UT phase sequence module, VT phase sequence module, WT phase sequence module, UB phase sequence module, VB phase sequence module, and WB phase sequence module. The UT phase sequence module corresponds to phase sequence UT, the VT phase sequence module corresponds to phase sequence VT, the WT phase sequence module corresponds to phase sequence WT, the UB phase sequence module corresponds to phase sequence UB, the VB phase sequence module corresponds to phase sequence VB, and the WB phase sequence module corresponds to phase sequence WB. The UT phase sequence module stores the test configuration information for phase sequence UT, the VT phase sequence module stores the test configuration information for phase sequence VT, the WT phase sequence module stores the test configuration information for phase sequence WT, the UB phase sequence module stores the test configuration information for phase sequence UB, the VB phase sequence module stores the test configuration information for phase sequence VB, and the WB phase sequence module stores the test configuration information for phase sequence WB. The test configuration information stored in each phase sequence module includes the initial phase sequence voltage information for that phase sequence.

[0043] The initial phase sequence voltage information may include the voltage value that drives the corresponding phase sequence. For example, the initial phase sequence voltage information stored in the VT phase sequence module includes the voltage value that drives the phase sequence VT.

[0044] In one implementation, the test configuration information may further include the identifier of the corresponding phase sequence module, the resistance value of the gate resistor plate, etc. For example, after the target driver board is powered on, the target driver board can read the test configuration information from the phase sequence module connected to it based on a preset read / write protocol; the target driver board can also transmit the initial phase sequence voltage information to the host computer, and the host computer displays the initial phase sequence voltage information on the operation interface.

[0045] In step S110, the target driver board generates the first target phase sequence driving voltage based on the initial phase sequence voltage information.

[0046] The first target phase sequence drive voltage refers to the drive voltage used to drive the bridge arm in the power module under test, which corresponds to the phase sequence of the module. A bridge arm (Converter Arm) is a component in a converter circuit that connects AC terminals and DC terminals, and has unidirectional or bidirectional conductivity.

[0047] In one example, assuming the driver board connected to the VT phase sequence module is the target driver board, the target driver board reads the initial phase sequence voltage information from the VT phase sequence module and generates a driving voltage (first target phase sequence driving voltage) based on the initial voltage information to drive the bridge arm corresponding to (identified) the VT phase sequence in the power module under test.

[0048] In step S120, in response to receiving the drive command, the target driver board generates a drive signal and, based on the drive signal, transmits the first target phase sequence drive voltage to the power module under test through the phase sequence module via the target pin to drive the power module under test.

[0049] The target pin is the pin in the power under test (UT) module corresponding to the phase sequence module. The pin corresponding to the phase sequence module can be understood as the pin configured for the phase sequence in the UT module. Specifically, each phase sequence in the UT module is configured with at least one pin, which is connected to the corresponding bridge arm in the UT module. The pins of each phase sequence in the UT module are connected to the probes on the probe board to achieve data / information interaction with the chip testing equipment. For example, the target pin corresponding to the UT phase sequence module is the pin configured for the UT phase sequence in the UT module.

[0050] In one example, the target driver board is also connected to a gate resistor board, which controls the switching speed between the target driver board and the power module under test. The target driver board receives drive commands from the host computer, generates drive signals, and outputs voltage (first target phase sequence drive voltage and drive signal) to the power module under test through the gate resistor board, so that the target driver board can transmit the first target phase sequence drive voltage to the power module under test through the phase sequence module connected to it.

[0051] In this embodiment, dynamic information interaction (dynamic mapping) between the driver board and the phase sequence module is used. The initial phase sequence voltage information corresponding to the phase sequence is stored in the phase sequence module on the probe board. The driver board only needs to be connected to the phase sequence module. After power-on, it can automatically read the above information and adapt to the corresponding phase sequence driver board. This ensures that regardless of the driver board's placement, the generated phase sequence drive voltage can be accurately matched to the corresponding phase sequence of the power under test through the corresponding pins on the power under test module. This avoids the risk of tube failure caused by manual wiring errors, visual judgment mistakes, or input errors, simplifies the maintenance and replacement process, reduces human error, and ensures test safety. Furthermore, since the phase sequence module can store test configuration information, the driver board can directly read the complete configuration after power-on, eliminating the need for repeated test data transmission from the host computer. This significantly reduces the frequency of interaction between the host and slave computers, shortens test preparation and execution time, and effectively improves test efficiency and productivity. Because the driver board is more prone to failure than the probe board, and its replacement frequency is much higher in actual production testing, a phase sequence module with storage function is placed on the probe board to store test configuration information and other test data. This ensures that replacing the driver board does not affect the storage of this information. Furthermore, since core information (test configuration information) is stored in the phase sequence module, there is no need to reconfigure the phase sequence information when replacing the driver board; the driver board simply needs to automatically read the data from the phase sequence module. Moreover, after replacing the probe board, the system can automatically identify the configuration of the new power module under test using the information stored in the phase sequence module, eliminating the need for downtime adjustments. This ensures a continuous and stable testing process and reduces maintenance complexity and time costs.

[0052] In some optional implementations, the power module testing method in this application embodiment may further include: in response to the target driver board not reading the initial phase sequence voltage information in the phase sequence module, the target driver board obtains the default phase sequence voltage information from the host computer of the chip testing equipment as the initial phase sequence voltage information.

[0053] The host computer pre-stores the default phase sequence voltage information corresponding to each phase sequence module. The default phase sequence voltage information for each phase sequence module can include the voltage value driving the corresponding phase sequence. When the target driver board does not read the initial phase sequence voltage information from the phase sequence module connected to it, the target driver board can obtain the default phase sequence voltage information corresponding to the phase sequence module from the host computer, transmit the default phase sequence voltage information to the phase sequence module, and store it in the phase sequence module. Then, the target driver board reads the default phase sequence voltage information from the phase sequence module as the initial phase sequence voltage information, and then executes steps S110 to S120.

[0054] In one implementation, when the target driver board fails to read the initial phase sequence voltage information in the phase sequence module, an alarm message can be generated and displayed on the operation interface.

[0055] In this embodiment, when the target driver board fails to read the initial phase sequence voltage information from the phase sequence module connected to it, it can automatically obtain the corresponding default phase sequence voltage information from the host computer and write the information into the phase sequence module connected to it. This ensures that the test system can still start normally in the case of missing information, and ensures that the initial phase sequence voltage information is stored in the phase sequence module during the next test, avoiding test interruption caused by information reading failure, and improving the system's fault tolerance and stability.

[0056] Figure 2 This is a flowchart illustrating a power module testing method provided in another exemplary embodiment of this application. In some alternative embodiments, such as... Figure 2 As shown, the power module testing method in this application embodiment may further include the following steps:

[0057] Step S200: In response to the target driver board receiving a phase sequence voltage modification command, the initial phase sequence voltage information in the phase sequence module is modified based on the new phase sequence voltage information in the phase sequence voltage modification command to obtain new initial phase sequence voltage information.

[0058] The phase sequence voltage modification command can include: new phase sequence voltage information.

[0059] For example, the target driver board can read the initial phase sequence voltage information from the phase sequence module and send the initial phase sequence voltage information to the host computer. The host computer can display the information on the operation interface. The user can input new phase sequence voltage information on the operation interface. The host computer generates a phase sequence voltage modification command based on the new phase sequence voltage information input by the user, and then sends the phase sequence voltage modification command to the target driver board. When the target driver board receives the phase sequence voltage modification command, it modifies the initial phase sequence voltage information in the phase sequence module connected to it to the new phase sequence voltage information.

[0060] In step S210, the phase sequence module stores the new initial phase sequence voltage information so that the target driver board drives the power module under test based on the new initial phase sequence voltage information.

[0061] The phase sequence module stores the new initial phase sequence voltage information. The target driver board reads the new initial phase sequence voltage information and then executes steps S110 to S120. The target driver board can also read back the driving voltage it generated based on the new initial phase sequence voltage information.

[0062] For example, Figure 3This is a schematic diagram of a power module testing method provided in an application example of this application. In this example, a probe board is deployed on a lower-level machine. The probe board includes a UT phase sequence module, a VT phase sequence module, a WT phase sequence module, a UB phase sequence module, a VB phase sequence module, and a WB phase sequence module. Each phase sequence module is connected to a driver board. In this example, the UT phase sequence module and the target driver board connected to it are used as examples. Other phase sequence modules can be referenced from the UT phase sequence module, such as... Figure 3 As shown, it includes:

[0063] S1, the target driver board is powered on;

[0064] S2, determine whether the initial phase sequence voltage information has been read, that is, determine whether the target driver board has read the initial phase sequence voltage information in the UT phase sequence module. If it has been read, proceed to step S4; if it has not been read, proceed to step S3.

[0065] S3, the target driver board obtains the default phase sequence voltage information corresponding to the UT phase sequence module from the host computer and writes it into the UT phase sequence module. The target driver board reads the default phase sequence voltage information from the UT phase sequence module as the initial phase sequence voltage information.

[0066] S4, Generate the first target phase sequence driving voltage based on the initial phase sequence voltage information;

[0067] S5, the target driver board receives the driver command sent by the host computer;

[0068] S6, the target driver board generates a drive signal;

[0069] S7, the target driver board, based on the drive signal, sends the first target phase sequence drive voltage to the power module under test through the UT phase sequence module via the pin (target pin) corresponding to the UT phase sequence module;

[0070] S8. Determine whether the phase sequence voltage modification command has been received. That is, the target driver board determines whether it has received the phase sequence voltage modification command sent by the host computer. If it has been received, proceed to step S9. If it has not been received, proceed to step S10.

[0071] S9, Based on the new phase sequence voltage information in the phase sequence voltage modification instruction, the initial phase sequence voltage information in the phase sequence module is modified to obtain the new initial phase sequence voltage information. The UT phase sequence module stores the new initial phase sequence voltage information, and the target driver board reads the new initial phase sequence voltage information.

[0072] S10, Operation complete.

[0073] In this embodiment, the target driver board dynamically modifies the initial phase sequence voltage information stored in the phase sequence module, enabling the target driver board to drive the power module under test based on the updated initial phase sequence voltage. This achieves flexible adaptation to different test requirements and improves the convenience of driving voltage adjustment and system adaptability.

[0074] In some optional implementations, the power module testing method in this application embodiment may further include: the target driver board collects the sampling voltage information of the target circuit in the power module under test based on the phase sequence module, and transmits the sampling voltage information to the host computer.

[0075] The target circuit is the bridge arm in the power module under test that corresponds to the phase sequence module, and it is driven by the target driver board. The sampled voltage information includes the voltage values ​​in the target circuit.

[0076] For example, the target driver board may include a drive voltage sampling module, which is used to collect voltage values ​​in the target circuit. Assuming the target driver board is a driver board connected to the UT phase sequence module, the target circuit is the bridge arm corresponding to the UT phase sequence in the power under test module. The target driver board can collect the voltage values ​​(sampled voltage information) of the bridge arm corresponding to the UT phase sequence in the power under test module through the UT phase sequence module, and the target driver board can send the sampled voltage information to the host computer.

[0077] In this embodiment, the target driver board controls the phase sequence module connected to it to collect the sampled voltage in the target circuit and upload it to the host computer. This allows the host computer to monitor the circuit voltage status of the power module under test in real time, providing a basis for test data calibration and anomaly warning, and ensuring test accuracy and safety.

[0078] In some alternative implementations, in the embodiments of this application, each phase sequence module is connected to a temperature sampling module, which is used to collect the temperature value of the corresponding bridge arm in the power module under test; the temperature sampling module can be, for example, a temperature sampling board, which can be deployed in the lower-level machine.

[0079] Accordingly, each temperature sampling module collects the sampling temperature information of the bridge arm corresponding to the corresponding phase sequence in the power module under test based on the corresponding phase sequence module, and transmits the sampling temperature information to the control board.

[0080] For example, a control board is also deployed in the lower-level machine. The control board is connected to each driver board, each temperature sampling module and the upper-level machine. It can monitor the temperature value of the bridge arm corresponding to each phase sequence in the power module under test through temperature sensors, etc. Taking the temperature sampling module connected to the WT phase sequence module as an example, the temperature sampling module can collect the temperature value of the bridge arm corresponding to the WT phase sequence in the power module under test through the WT phase sequence module, and transmit the temperature value as the sampled temperature information to the control board. The control board transmits the sampled temperature information to the upper-level machine.

[0081] In this embodiment, the temperature sampling module collects the temperature value of the bridge arm corresponding to the corresponding phase sequence in the power module under test through the corresponding phase sequence module and uploads it to the control board. This facilitates real-time monitoring of the temperature status of the power module under test, provides a basis for overheat protection and test data calibration, and ensures test safety and accuracy.

[0082] Figure 4 This is a flowchart illustrating a power module testing method provided in another exemplary embodiment of this application. In some alternative implementations, such as... Figure 4 As shown, the power module testing method in this application embodiment may further include the following steps:

[0083] In step S300, in response to receiving the instruction to drive with the limiting voltage, the target driver board reads the limiting phase sequence voltage information from the phase sequence module.

[0084] Each phase sequence module also stores limiting phase sequence voltage information. The limiting phase sequence voltage information can include the limiting voltage value.

[0085] In one implementation, when the target driver board receives a command from the host computer to drive with the limit voltage, the target driver board reads the limit phase sequence voltage information from the phase sequence module connected to it based on a preset read / write protocol.

[0086] In step S310, the target driver board generates a second target phase sequence driving voltage based on the limit phase sequence voltage information.

[0087] The second target phase sequence driving voltage refers to the driving voltage used to drive the bridge arm in the power module under test that corresponds to the phase sequence of the phase sequence module.

[0088] In step S320, in response to receiving the drive command, the target driver board generates a drive signal and, based on the drive signal, transmits the second target phase sequence drive voltage to the power module under test through the phase sequence module via the target pin to drive the power module under test.

[0089] The method of driving the power module under test by the second target phase sequence driving voltage is the same as the method of driving the power module under test by the first target phase sequence driving voltage. Please refer to the method of driving the power module under test by the first target phase sequence driving voltage, which will not be repeated here.

[0090] In this embodiment, by storing the limiting phase sequence voltage information in the phase sequence module and reading it through the driver board, the power module under test is driven by the limiting voltage (the second target phase sequence driving voltage), meeting the requirements of extreme operating conditions, enriching the test scenario coverage, and improving the comprehensiveness of the test and the applicability of the system. The limiting phase sequence voltage information can be manually input and saved, or the chip testing equipment can save the corresponding voltage information after completing a limit test. Specifically, the limiting phase sequence voltage information can be manually input into the host computer, which then sends it to the driver board, and the driver board writes the limiting phase sequence voltage information into the phase sequence module for storage; alternatively, after a limit test is completed, the host computer can automatically send the limiting phase sequence voltage information corresponding to that test to the driver board, and the driver board writes it into the phase sequence module for storage.

[0091] In one example Figure 5 This is a schematic diagram of a probe plate provided in an exemplary embodiment of this application. Figure 5 As shown, the probe board includes multiple phase sequence modules, each comprising a connector and a storage medium. Specifically, the probe board may include: a UT phase sequence module, a VT phase sequence module, a WT phase sequence module, a UB phase sequence module, a VB phase sequence module, and a WB phase sequence module. The storage medium of each phase sequence module stores test configuration information. The driver board connects to the phase sequence modules via connectors. Each phase sequence module connects to a corresponding pin on the power module under test.

[0092] Connectors (also known as connectors or plugs) are electronic components used to enable detachable and reusable connections between two or more electronic modules / components. In this embodiment, the driver board can be connected to the phase sequence module via a connector to read test configuration information from the phase sequence module. Specifically, the driver board can be plugged into the connector and communicate with the storage medium via a single-wire serial interface. The storage medium may include, for example, electrically erasable programmable read-only memory (EEPROM) or flash memory.

[0093] For example, Figure 6 This is a schematic diagram of a probe plate provided in another exemplary embodiment of this application. For example... Figure 6As shown, the driver board may include an MCU. After the target driver board is powered on and running, the MCU of the target driver board can read the test configuration information from the storage medium of the phase sequence module connected to it based on a preset read / write protocol. It can generate the first target phase sequence drive voltage based on the initial phase sequence voltage information in the test configuration information. Other information in the test configuration information (the identifier of the phase sequence module, the corresponding phase sequence name, the resistance value of the gate resistor plate, etc.) is used as the configuration for testing the power module under test.

[0094] Figure 7 This is a schematic diagram of the structure of a power module testing system provided in an exemplary embodiment of this application. This power module testing system can be applied to chip testing equipment, such as… Figure 7 As shown, the power module testing system includes: multiple phase sequence modules 410 and multiple driver boards 420. Figure 7 Only one driver board 420 is shown. Multiple phase sequence modules 410 are deployed on the probe board 430 of the chip test equipment. Each phase sequence module 410 is connected to a driver board and each phase sequence module 410 is connected to a corresponding pin in the power module under test 440. Figure 7 This example only demonstrates the connection method between one phase sequence module and the driver board; other phase sequence modules are not included. Figure 7 The connection methods of other phase sequence modules and the driver board are shown here.

[0095] Each phase sequence module 410 is used to store corresponding test configuration information, including initial phase sequence voltage information. In one embodiment, the probe board includes: UT phase sequence module, VT phase sequence module, WT phase sequence module, UB phase sequence module, VB phase sequence module, and WB phase sequence module.

[0096] The target driver board is used to read test configuration information from the phase sequence module connected to the target driver board after power-on, and generate a first target phase sequence drive voltage based on the initial phase sequence voltage information in the test configuration information. When a drive command is received, a drive signal is generated, and based on the drive signal, the first target phase sequence drive voltage is transmitted to the power module under test through the phase sequence module via the target pin. The target pin is the pin in the power module under test that corresponds to the phase sequence module. The target driver board is one of multiple driver boards.

[0097] In one example, the target driver board is also connected to a gate resistor board, which controls the switching speed between the target driver board and the power module under test. The target driver board receives drive commands from the host computer, generates drive signals, and outputs voltage to the power module under test through the gate resistor board, so that the target driver board can transmit the first target phase sequence drive voltage to the power module under test through the phase sequence module connected to it.

[0098] In some optional implementations, in the embodiments of this application, the target driver board is further configured to modify the initial phase sequence voltage information in the phase sequence module based on the new phase sequence voltage in the phase sequence voltage modification instruction when receiving the phase sequence voltage modification instruction, so as to obtain new initial phase sequence voltage information, so that the phase sequence module stores the new initial phase sequence voltage information.

[0099] In one example, the host computer sends a phase sequence voltage modification command to the target driver board. The target driver board modifies the initial phase sequence voltage information in the phase sequence module connected to it to the new phase sequence voltage information in the phase sequence voltage modification command, and determines the modified new phase sequence voltage information as the new initial phase sequence voltage information. The storage medium in the phase sequence module stores the new initial phase sequence voltage information. The target driver board reads the new initial phase sequence voltage information, generates the corresponding driving voltage based on the new initial voltage information, and drives the power module under test with the driving voltage.

[0100] In one example, the target driver board is also used to obtain default phase sequence voltage information from the host computer of the chip test equipment as initial phase sequence voltage information when the initial phase sequence voltage information is not read in the phase sequence module connected to the target driver board.

[0101] In some alternative implementations, the power module testing system further includes: multiple temperature sampling modules 450, each temperature sampling module 450 being connected to a phase sequence module;

[0102] Each temperature sampling module 450 is used to collect the sampling temperature information of the corresponding bridge arm in the power module under test based on the corresponding phase sequence module, and transmit the sampling temperature information to the control board.

[0103] The target driver board is also used to collect the sampling voltage information of the target circuit in the power module under test based on the phase sequence module connected to the target driver board, and transmit the sampling voltage information to the host computer. The target circuit is the bridge arm in the power module under test that corresponds to the phase sequence module.

[0104] In some optional implementations, in the embodiments of this application, each phase sequence module is also used to store limiting phase sequence voltage information;

[0105] The target driver board is also used to respond to a command to drive with a limit voltage, read the limit phase sequence voltage information from the phase sequence module connected to the target driver board, generate a second target phase sequence drive voltage based on the limit phase sequence voltage information, generate a drive signal upon receiving a drive command, and based on the drive signal, send the second target phase sequence drive voltage to the power module under test through the phase sequence module via the target pin to drive the power module under test.

[0106] In one example, the host computer sends a command to the target driver board to drive with a limit voltage. The target driver board reads the limit phase sequence voltage information from the phase sequence module connected to it, and then generates a second target phase sequence drive voltage based on the limit phase sequence voltage information. When it receives the drive command sent by the host computer, it generates a drive signal and sends the second target phase sequence drive voltage to the power under test module through the gate resistor board. When the gate resistor board determines that the second target phase sequence drive voltage carries a drive signal, the gate resistor board turns on, so that the target driver board can transmit the second target phase sequence drive voltage to the power under test module through the phase sequence module connected to it.

[0107] The power module testing system of this application corresponds to the embodiments of the power module testing methods described above, and the relevant contents can be referred to each other, which will not be repeated here.

[0108] The beneficial technical effects corresponding to the exemplary embodiments of the power module testing system of this application can be found in the corresponding beneficial technical effects in the exemplary method section above, and will not be repeated here.

[0109] Figure 8 This is a schematic diagram of a chip testing device provided in an exemplary embodiment of this application. Figure 8 As shown, the chip testing equipment 500 includes a host computer 510 and a slave computer 520, and the power module testing system 530 described above is deployed in the slave computer 520.

[0110] The chip testing equipment in this application corresponds to the power module testing method described above, and the relevant content can be referred to each other. It will not be repeated here.

[0111] The beneficial technical effects of the exemplary chip testing equipment in this application can be found in the corresponding beneficial technical effects of the exemplary system section described above, and will not be repeated here.

[0112] In addition, this disclosure also provides an electronic device, including:

[0113] Memory, used to store computer programs;

[0114] A processor is configured to execute a computer program stored in the memory, wherein when the computer program is executed, it implements the power module testing method described in any of the above embodiments of the present disclosure.

[0115] Figure 9 This is a schematic diagram illustrating the structure of an application embodiment of the electronic device disclosed herein. Below, reference is made to… Figure 9This describes an electronic device according to embodiments of the present disclosure. The electronic device may be either or both of a first device and a second device, or a standalone device independent of them, which may communicate with the first device and the second device to receive acquired input signals from them.

[0116] like Figure 9 As shown, the electronic device includes one or more processors and memory.

[0117] A processor can be a central processing unit (CPU) or other form of processing unit with data processing and / or instruction execution capabilities, and can control other components in an electronic device to perform desired functions.

[0118] The memory may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and a processor may execute the program instructions to implement the power module testing methods of the various embodiments of this disclosure described above, and / or other desired functions.

[0119] In one example, the electronic device may also include input devices and output devices, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0120] In addition, the input device may include, for example, a keyboard, a mouse, etc.

[0121] This output device can output various information to the outside, including determined distance information, direction information, etc. The output device may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0122] Of course, for the sake of simplicity, Figure 9 Only some of the components of the electronic device relevant to this disclosure are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device may include any other suitable components depending on the specific application.

[0123] In addition to the methods and apparatus described above, embodiments of this disclosure may also be computer program products comprising computer program instructions that, when executed by a processor, cause the processor to perform the steps in the power module testing methods according to various embodiments of this disclosure as described in the foregoing sections of this specification.

[0124] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this disclosure. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on a user's computing device, partially on a user's computing device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0125] Furthermore, embodiments of this disclosure may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps in the power module testing methods according to various embodiments of this disclosure as described in the foregoing portion of this specification.

[0126] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.

[0127] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as ROM, RAM, magnetic disk, or optical disk.

[0128] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0129] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0130] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0131] The methods and apparatus of this disclosure may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of this disclosure are not limited to the order specifically described above unless otherwise specifically stated. Furthermore, in some embodiments, this disclosure may also be implemented as a program recorded on a recording medium, the program including machine-readable instructions for implementing the methods according to this disclosure. Thus, this disclosure also covers recording media storing programs for performing the methods according to this disclosure.

[0132] It should also be noted that in the apparatus, devices, and methods of this disclosure, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions to this disclosure.

[0133] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0134] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A power module testing method, characterized in that, The method is applied to a chip testing equipment, the chip testing equipment including a probe board, the probe board including multiple phase sequence modules, each phase sequence module being detachably connected to a driver board, and each phase sequence module storing corresponding test configuration information. For multiple phase sequence modules, in response to detecting that the target driver board is powered on, the target driver board reads test configuration information from the phase sequence module. The test configuration information in the phase sequence module includes the initial phase sequence voltage information of the corresponding phase sequence. The target driver board is a driver board connected to the phase sequence module. The target driver board generates a first target phase sequence driving voltage based on the initial phase sequence voltage information. The first target phase sequence driving voltage is used to drive the driving voltage of the bridge arm in the power module under test, which is identified by the phase sequence corresponding to the phase sequence module. In response to receiving a drive command, the target driver board generates a drive signal and, based on the drive signal, transmits the first target phase sequence drive voltage to the power module under test via the phase sequence module through the phase sequence module to drive the power module under test. The target pin is the pin in the power module under test that corresponds to the phase sequence module.

2. The method according to claim 1, characterized in that, Also includes: In response to the target driver board not reading the initial phase sequence voltage information in the phase sequence module, the target driver board obtains the default phase sequence voltage information from the host computer of the chip testing equipment as the initial phase sequence voltage information.

3. The method according to claim 1, characterized in that, Also includes: In response to the target driver board receiving a phase sequence voltage modification command, the initial phase sequence voltage information in the phase sequence module is modified based on the new phase sequence voltage information in the phase sequence voltage modification command to obtain new initial phase sequence voltage information; The phase sequence module stores the new initial phase sequence voltage information so that the target driver board drives the power module under test based on the new initial phase sequence voltage information.

4. The method according to any one of claims 1-3, characterized in that, Also includes: The target driver board collects the sampling voltage information of the target circuit in the power module under test based on the phase sequence module, and transmits the sampling voltage information to the host computer. The target circuit is the bridge arm in the power module under test that corresponds to the phase sequence module.

5. The method according to claim 4, characterized in that, Each of the phase sequence modules is connected to a temperature sampling module, and the method further includes: Each of the temperature sampling modules collects the sampling temperature information of the bridge arm corresponding to the corresponding phase sequence in the power module under test based on the corresponding phase sequence module, and transmits the sampling temperature information to the control board.

6. The method according to claim 1, characterized in that, Each phase sequence module also stores limiting phase sequence voltage information; In response to receiving a command to drive with a limiting voltage, the target driver board reads the limiting phase sequence voltage information from the phase sequence module; The target driver board generates a second target phase sequence driving voltage based on the extreme phase sequence voltage information; In response to receiving the drive command, the target driver board generates the drive signal, and based on the drive signal, transmits the second target phase sequence drive voltage to the power module under test through the phase sequence module via the target pin to drive the power module under test.

7. A power module testing system, characterized in that, The system, which is applied to chip testing equipment, includes: multiple phase sequence modules and multiple driver boards. The multiple phase sequence modules are deployed on the probe board of the chip testing equipment. Each phase sequence module is detachably connected to one of the driver boards. Each phase sequence module is connected to a corresponding pin in the power module under test. Each phase sequence module is used to store corresponding test configuration information. The test configuration information in any phase sequence module includes the initial phase sequence voltage information of the corresponding phase sequence. The target driver board is used to read test configuration information from the phase sequence module connected to the target driver board after power-on, and generate a first target phase sequence drive voltage based on the initial phase sequence voltage information in the test configuration information. When a drive command is received, a drive signal is generated, and based on the drive signal, the first target phase sequence drive voltage is transmitted to the power under test module through the phase sequence module via a target pin. The target pin is a pin in the power under test corresponding to the phase sequence module. The target driver board is one of a plurality of driver boards. The first target phase sequence drive voltage is used to drive the drive voltage of the bridge arm in the power under test that is identified by the phase sequence corresponding to the phase sequence module.

8. The system according to claim 7, characterized in that, The target driver board is further configured to, upon receiving a phase sequence voltage modification instruction, modify the initial phase sequence voltage information in the phase sequence module based on the new phase sequence voltage information in the phase sequence voltage modification instruction to obtain new initial phase sequence voltage information, so that the phase sequence module stores the new initial phase sequence voltage information.

9. The system according to claim 7 or 8, characterized in that, Also includes: Multiple temperature sampling modules are provided, and each temperature sampling module is connected to one of the phase sequence modules. Each of the temperature sampling modules is used to collect the sampling temperature information of the corresponding bridge arm in the power under test module based on the corresponding phase sequence module, and transmit the sampling temperature information to the control board. The target driver board is also used to collect the sampling voltage information of the target circuit in the power module under test based on the phase sequence module, and transmit the sampling voltage information to the host computer. The target circuit is the bridge arm in the power module under test that corresponds to the phase sequence module.

10. A chip testing device, characterized in that, The chip testing equipment includes a host computer and a slave computer, wherein the power module testing system according to any one of claims 7-9 is deployed in the slave computer.

11. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor is configured to execute a computer program stored in the memory, wherein when the computer program is executed, it implements the power module testing method according to any one of claims 1-6.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1-6.

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