Component layout spacing checking method and system, electronic equipment and computer storage medium
By constructing a rectangular tree and an edge tree, and using the expanded border to traverse the circuit layout, the target components are extracted and the target boundary distance is calculated. This solves the problem of long time consumption in checking the layout spacing of circuit board components and achieves efficient layout spacing checking.
Patent Information
- Application Number
- CN202511490432.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-17
- Publication Date
- 2026-01-23
AI Technical Summary
Existing circuit board component layout spacing checks are time-consuming, especially with complex copper foil patterns or high-density interconnect designs, where the check time increases exponentially.
By constructing a rectangular tree and an edge tree, the circuit layout is traversed by expanding the borders to extract target components that overlap with the current component, and the distance between the target boundaries is calculated to determine whether the layout spacing meets the requirements.
While ensuring the accuracy of the inspection, the amount of calculation and inspection time have been greatly reduced, thus solving the problem of long inspection times.
Smart Images
Figure CN121389952A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of circuit design, and in particular relates to a component layout spacing checking method and system, electronic equipment and computer storage medium. BACKGROUND
[0002] In the process of designing a circuit board (PCB), design rule checking (DRC) is one of the core links to ensure electrical safety and manufacturing feasibility. Common design rule checking items include line width checking, spacing checking, coverage checking, etc. Among them, minimum spacing checking is an indispensable step, and the accuracy of the detection result directly affects the electrical performance of the finished circuit board.
[0003] At present, the spacing between all components in the circuit layout is usually calculated in a traversal manner, and then it is determined whether the spacing between the components meets the design rule. However, in the case of a large or complex circuit layout, this method will consume a lot of time, especially for complex copper foil patterns or high-density interconnection (HDI) designs, the time consumed for checking increases exponentially. SUMMARY
[0004] The purpose of the present application is to provide a component layout spacing checking method and system, electronic equipment and computer storage medium, to at least solve the problem of long time consumption in checking the layout spacing of components of the existing circuit board.
[0005] To solve the above technical problems, the present application provides a component layout spacing checking method, comprising: obtaining a circuit layout, wherein the circuit layout contains a plurality of components; constructing a first frame for each component to obtain a rectangular tree; enlarging the first frame of the current component according to a preset standard spacing to obtain a second frame; traversing the rectangular tree using the second frame to obtain components having an overlapping relationship with the second frame of the current component, denoted as target components; constructing an external rectangle for each boundary of the current component and the target component to obtain a third frame; obtaining target boundaries of the current component and the target component using the third frame; calculating the distance between the target boundaries of the current component and the target component; if the distance is less than the preset standard spacing, it is determined that the layout spacing of the current component does not meet the requirements.
[0006] Optionally, in the component layout spacing checking method, the first frame is an external rectangle of the component.
[0007] Optionally, in the element layout spacing checking method, if a first frame in the rectangle tree collides with the second frame of the current element, the element corresponding to the first frame is a target element.
[0008] Optionally, in the element layout spacing checking method, the method of obtaining the target boundary of the current element and the target element by using the third frame comprises: judging whether the number of boundaries of the current element is greater than the number of boundaries of the target element; if the number of boundaries of the current element is greater than the number of boundaries of the target element, expanding the third frame of the target element according to a preset standard spacing to obtain a fourth frame; and constructing all the third frames of the current element into an edge tree; otherwise, expanding the third frame of the current element according to a preset standard spacing to obtain a fourth frame; and constructing all the third frames of the target element into an edge tree; traversing the edge tree by using the fourth frame to obtain the target boundary of the current element and the target element.
[0009] Optionally, in the element layout spacing checking method, the method of obtaining the target boundary of the current element and the target element by using the fourth frame to traverse the edge tree comprises: if a third frame in the edge tree collides with the fourth frame, the boundary corresponding to the third frame and the boundary corresponding to the fourth frame are target boundaries.
[0010] Optionally, in the element layout spacing checking method, the element layout spacing checking method further comprises: after each collision of the third frame and the fourth frame, calculating the distance between the boundary corresponding to the third frame and the boundary corresponding to the fourth frame; if the distance is less than the preset standard spacing, judging that the layout spacing of the current element does not meet the requirement, and terminating the traversal of the edge tree.
[0011] Optionally, in the element layout spacing checking method, the element layout spacing checking method further comprises: traversing all the elements to obtain all the elements in the circuit layout whose layout spacing does not meet the requirement.
[0012] Optionally, in the element layout spacing checking method, the element layout spacing checking method is realized based on an XSmartPR circuit design software.
[0013] To solve the above technical problems, the application further provides an element layout spacing checking system for realizing the element layout spacing checking method as claimed in any one of the above, and the element layout spacing checking system comprises: The circuit layout acquisition module is configured to acquire a circuit layout, wherein the circuit layout comprises a plurality of elements. The target element acquisition module is configured to construct a first frame for each element to obtain a rectangular tree, to expand the first frame of the current element according to a preset standard distance to obtain a second frame, and to traverse the rectangular tree using the second frame to obtain elements having an overlapping relationship with the second frame of the current element, which are recorded as target elements. The target boundary acquisition module is configured to construct a circumscribed rectangle for each boundary of the current element and the target element to obtain a third frame, and to obtain target boundaries of the current element and the target element using the third frame. The distance judgment module is configured to calculate a distance between the target boundary of the current element and the target boundary of the target element, and to determine that the layout distance of the current element does not meet the requirement when the distance is less than a preset standard distance.
[0014] Optionally, in the element layout distance inspection system, the element layout distance inspection system further comprises: The result output module is configured to collect and arrange all elements having a layout distance that does not meet the requirement in the circuit layout, and to output the result in the form of a report.
[0015] To solve the above technical problems, the present application further provides an electronic device comprising a memory, a processor and an executable program stored in the memory and capable of being executed by the processor; when the processor executes the executable program, the element layout distance inspection method according to any one of the above is executed.
[0016] To solve the above technical problems, the present application further provides a computer storage medium, wherein the computer storage medium stores an executable program; when the executable program is executed, the element layout distance inspection method according to any one of the above is implemented.
[0017] The element layout spacing inspection method and system, the electronic device and the computer storage medium provided by the application, comprising: acquiring a circuit layout, the circuit layout containing a plurality of elements; constructing a first frame for each element to obtain a rectangular tree; expanding the first frame of the current element according to a preset standard spacing to obtain a second frame; traversing the rectangular tree by using the second frame to obtain an element having an overlapping relationship with the second frame of the current element, which is recorded as a target element; constructing an external rectangle for each boundary of the current element and the target element to obtain a third frame; obtaining a target boundary of the current element and the target element by using the third frame; calculating the distance between the target boundary of the current element and the target boundary of the target element; if the distance is less than the preset standard spacing, judging that the layout spacing of the current element does not meet the requirements. By extracting the target element having an overlapping relationship with the current element and calculating the distance between the target boundary of the target element and the current element, whether the layout spacing of the current element meets the requirements is judged, which not only does not need to calculate the spacing between all elements in a traversal manner, but also does not need to calculate the distance between all boundaries between the elements when calculating the spacing, thereby greatly reducing the calculation amount and the time of the circuit board element layout spacing inspection on the basis of ensuring the accuracy of the layout spacing inspection, and solving the problem of long time consumption of the existing circuit board element layout spacing inspection. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 The flowchart of the element layout spacing inspection method provided by the present embodiment; FIGS. 2(A) to 2(E) are schematic diagrams of the relative relationship of elements in each step of the element layout spacing inspection method provided by the present embodiment; Figure 3 The structural schematic diagram of the element layout spacing inspection system provided by the present embodiment; Figure 4 The complete structural schematic diagram of the element layout spacing inspection system provided by the present embodiment; Among them, the following marks are explained: 100-current element; 110-first frame of the current element; 120-second frame of the current element; 130-third frame of the current element; 200-target element; 210-first frame of the target element; 220-third frame of the target element; 230-fourth frame of the target element. DETAILED DESCRIPTION
[0019] The element layout distance inspection method and system, electronic device and computer storage medium are further described in detail below in combination with the drawings and specific embodiments. It should be noted that the drawings are very simplified and use non-precise proportions, and are only used to facilitate and clarify the purpose of assisting in describing the embodiments of the present application. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different proportions are sometimes used in different drawings to show different focuses.
[0020] It should be noted that "first", "second", and the like in the description, claims, and drawings of the present application are used to distinguish similar objects in order to describe the embodiments of the present application, and are not intended to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.
[0021] The present embodiment provides an element layout distance inspection method, as shown in Figure 1 , comprising: S1, obtaining a circuit layout, the circuit layout containing a plurality of elements; S2, constructing a first frame for each element to obtain a rectangular tree; S3, expanding the first frame of the current element according to a preset standard distance to obtain a second frame; S4, traversing the rectangular tree using the second frame to obtain elements that have an overlapping relationship with the second frame of the current element, denoted as target elements; S5, constructing an external rectangle for each boundary of the current element and the target element to obtain a third frame; S6, obtaining target boundaries of the current element and the target element using the third frame; S7, calculating the distance between the target boundaries of the current element and the target element; S8, if the distance is less than the preset standard distance, determining that the layout distance of the current element does not meet the requirements.
[0022] The element layout spacing checking method provided in the embodiment can determine whether the layout spacing of the current element meets the requirement by extracting the target element having an overlapping relationship with the current element and calculating the distance between the target element and the target boundary of the current element, without calculating the spacing between all elements in a traversal manner, and without calculating the distance between all boundaries between elements when calculating the spacing, thereby greatly reducing the calculation amount and the time for checking the layout spacing of the circuit board elements on the basis of ensuring the accuracy of the layout spacing checking, and solving the problem of long time consumption in checking the layout spacing of the circuit board elements.
[0023] Specifically, in the embodiment, step S1 is to acquire a circuit layout containing a plurality of elements.
[0024] In actual application, the elements contained in the circuit layout include but are not limited to copper skin, wiring, via, pad, regular area, various patch devices (such as resistor, capacitor) and the like.
[0025] When the element layout spacing checking method provided in the embodiment is implemented based on the XSmartPR circuit design software, the circuit layout should be able to be correctly opened and displayed by the XSmartPR circuit design software, and normal editing and saving operations and the like can be performed.
[0026] Of course, in other embodiments, other circuit design software capable of editing elements into a polygon data structure can be used to implement the element layout spacing checking method provided in the present application, and the present application does not limit this.
[0027] Further, in the embodiment, step S2 is to construct a first frame for each element to obtain a rectangular tree.
[0028] Specifically, in the embodiment, the first frame is a circumscribed rectangle of the element. The first frames of all elements in the circuit layout are summarized to obtain a set of first frames, denoted as a rectangular tree. By constructing the rectangular tree, a hierarchical spatial index structure can be constructed to realize efficient range query and collision detection.
[0029] In a specific embodiment, taking the circuit layout shown in FIG. 2(A) as an example, the circuit layout includes an A element 100 and a B element 200. The circumscribed rectangles of the A element 100 and the B element 200 are constructed as shown in FIG. 2(B) to obtain a first frame 110 of the A element 100 and a first frame 210 of the B element 200. The first frame 110 of the A element 100 and the first frame 210 of the B element 200 are summarized to obtain a rectangular tree.
[0030] Further, in the embodiment, step S3 is to expand the first frame of the current element according to a preset standard spacing to obtain a second frame.
[0031] Specifically, in the embodiment, the preset standard distance d can be the theoretical distance (distance in design rules) between the current component and the component for which the distance is to be calculated, so that all components that can have a distance less than the theoretical distance from the current component can be obtained using the second frame.
[0032] In actual applications, the preset standard distance d can be a fixed value, in which case it is determined whether the distance between all components satisfies the preset standard distance d. For example, when the preset standard distance d is a fixed 2 mm, then regardless of whether the components in the circuit layout are copper skins, vias, pads, or components, the distance between each pair of components is ensured to be no less than 2 mm.
[0033] Of course, in other embodiments, the preset standard distance d can also be set to different values according to different components, so as to determine the preset standard distance for different components. For example, for vias and pads, the preset standard distance d is set to 1.2 mm; for components and pads, the preset standard distance d is set to 2.2 mm; when determining, if the current component is a pad, then the distance between the pad and the via is ensured to be no less than 1.2 mm, and the distance between the pad and the component is ensured to be no less than 2.2 mm.
[0034] Preferably, in consideration of the process deviation of the production process, the preset standard distance d can be set to be slightly larger than the theoretical distance, so as to ensure that the distance between each component in the actual production circuit diagram conforms to the design rules.
[0035] Still taking the above example as an example, assuming that the A component 100 is the current component, and the preset standard distance between the A component 100 and the B component 200 is d, then the first frame 110 of the A component 100 is enlarged using the preset standard distance d as the magnification factor, to obtain the second frame 120, as shown in FIG. 2(C).
[0036] Further, in the embodiment, in step S4, the second frame is used to traverse the rectangular tree to obtain components that have an overlapping relationship with the second frame of the current component, which are recorded as target components.
[0037] Specifically, in the embodiment, if a first frame in the rectangular tree collides with the second frame of the current component, then the component corresponding to the first frame is a target component. The collision scenarios include intersection, coincidence, inclusion, or being included, etc. between the second frame of the current component and the first frame in the rectangular tree.
[0038] Still taking the above example as an example, as shown in FIG. 2(C), the second frame 120 of the A component 100 intersects with the first frame 210 of the B component 200, so the B component 200 is defined as a target component.
[0039] Of course, when there are more elements in the circuit layout, those skilled in the art can learn how to traverse the rectangle tree using the second border to obtain all target elements according to the above examples, and the present application will not repeat them here.
[0040] Further, in the present embodiment, step S5, an outer rectangle is constructed for each boundary of the current element and the target element to obtain a third border.
[0041] Specifically, in the present embodiment, since the target element obtained via step S4 is likely to have a small spacing with the current element, which does not meet the design rule, and other elements not selected as the target element indicate that the spacing with the current element certainly meets the design rule, therefore, only constructing an outer rectangle for each boundary of the current element and the target element can save part of the calculation amount, thereby reducing part of the time consumption and improving the efficiency of the element layout spacing check.
[0042] In practical applications, different elements are replaced by polygons with different numbers of boundaries, and still taking the above example as an example, the A element 100 is a pentagon, and the B element 200 is a triangle. Therefore, when constructing the third border, an outer rectangle needs to be constructed for each of the five boundaries of the A element 100, thereby obtaining five third borders (red dashed line frame, yellow dashed line frame, green dashed line frame, blue dashed line frame and purple dashed line frame); similarly, an outer rectangle needs to be constructed for each of the three boundaries of the B element 200, thereby obtaining three third borders (red dashed line frame, green dashed line frame and blue dashed line frame), as shown in FIG. 2(D).
[0043] It should be noted that in the present embodiment, when constructing the outer rectangle for the boundary, the boundary is located on the diagonal of the outer rectangle, and the two end points of the boundary are the two opposite vertices of the outer rectangle. In addition, the third borders of the same element have edge coincidence and vertex sharing between each other.
[0044] In other embodiments, the boundary can also be used as the center line of the outer rectangle, and a square outer rectangle can be constructed to obtain the third border. Even, the outer rectangle of the boundary can be constructed in a way that combines the center line and the diagonal to obtain the third border. Of course, there can be other construction rules of the outer rectangle to obtain the third border, which are not limited by the present application.
[0045] Further, in the present embodiment, step S6, the target boundary of the current element and the target element is obtained using the third border.
[0046] Specifically, in order to further reduce the calculation amount of the layout spacing check and improve the efficiency, in the embodiment, firstly, it is judged whether the boundary number of the current element is greater than the boundary number of the target element. If the boundary number of the current element is greater than the boundary number of the target element, the third frame of the target element is expanded according to the preset standard spacing to obtain a fourth frame; and all the third frames of the current element are constructed into an edge tree; otherwise, the third frame of the current element is expanded according to the preset standard spacing to obtain a fourth frame; and all the third frames of the target element are constructed into an edge tree.
[0047] Complexity analysis is performed on two different cases of whether to perform the boundary number judgment to select the reference element: if the boundary number judgment is not performed, the complexity C1 of obtaining the target boundary at this time is EA x log (EB); if the boundary number judgment is performed, the complexity C2 of obtaining the target boundary at this time is EB x log (EA); wherein EA represents the boundary number of the current element, and EB represents the boundary number of the target element. Assuming that EA = 50 and EB = 5, it can be found through complexity calculation that the greater the difference between the boundary numbers of the current element and the target element, the more obvious the performance improvement of obtaining the target boundary after the boundary number judgment.
[0048] In this way, the element with fewer boundaries is taken as the reference element, the determination of the target boundary between the two elements is realized, and the target boundary can be quickly and effectively found. At the same time, the edge tree has a similar architecture to the rectangular tree and is a kind of hierarchical spatial index structure, which can realize efficient range query and collision detection.
[0049] Still taking the above example as an example, since the boundary number of the A element 100 (the current element) is 5 and the boundary number of the B element 200 (the target element) is 3, the boundary number of the A element 100 is greater than the boundary number of the B element 200, therefore, the third frame 220 of the B element 200 is expanded according to the preset standard spacing d to obtain a fourth frame 230, as shown in FIG. 2 (E). The value of the preset standard spacing d for expanding the third frame 220 of the B element 200 to obtain the fourth frame 230 is the same as the value of the preset standard spacing d for expanding the first frame 110 of the A element 100 to obtain the second frame 120 in step S3.
[0050] At the same time, all the third frames 130 of the A element 100 are constructed into an edge tree.
[0051] After that, the fourth frame is used to traverse the edge tree to obtain the target boundary of the current element and the target element. Specifically, if a third frame in the edge tree collides with the fourth frame, the boundary corresponding to the third frame and the boundary corresponding to the fourth frame are the target boundary. The collision scenarios include intersection, coincidence, inclusion or being included, etc.
[0052] Still taking the above example, as shown in FIG. 2 (E), the fourth frame 230 (red dashed frame) of the B element 200 intersects the third frame 130 (yellow dashed frame, blue dashed frame) of the A element 100, the fourth frame 230 (blue dashed frame) of the B element 200 intersects the third frame 130 (blue dashed frame) of the A element 100, and the fourth frame 230 (green dashed frame) of the B element 200 intersects the third frame 130 (blue dashed frame) of the A element 100. Therefore, the boundaries corresponding to the three fourth frames 230 (red dashed frame, blue dashed frame and green dashed frame) of the B element 200 are all target boundaries, and the boundaries corresponding to the two third frames 130 (yellow dashed frame, blue dashed frame) on the right side of the A element 100 are target boundaries.
[0053] In actual applications, all target boundaries between two elements need to be obtained to ensure the accuracy of subsequent judgment on whether the layout spacing of the current element meets the requirements.
[0054] Further, in the present embodiment, in step S7, the distance between the target boundary of the current element and the target boundary of the target element is calculated.
[0055] Specifically, still taking the above example, the distance between the boundary corresponding to the fourth frame 230 (red dashed frame) of the B element 200 and the boundaries corresponding to the two third frames 130 (yellow dashed frame, blue dashed frame) of the A element 100, the distance between the boundary corresponding to the fourth frame 230 (blue dashed frame) of the B element 200 and the boundary corresponding to the third frame 130 (blue dashed frame) of the A element 100, and the distance between the boundary corresponding to the fourth frame 230 (green dashed frame) of the B element 200 and the boundary corresponding to the third frame 130 (blue dashed frame) of the A element 100 need to be calculated respectively.
[0056] Preferably, in order to facilitate the continuous implementation of the calculation process, fully utilize the working rate of each hardware resource, and improve the efficiency of the element layout spacing inspection, in the present embodiment, the distance between the boundary corresponding to the third frame and the boundary corresponding to the fourth frame is calculated after the collision between the third frame and the fourth frame occurs each time.
[0057] It should be noted that the calculation method of the distance between the target boundaries is well known to those skilled in the art, and will not be described herein. The distance between the target boundaries calculated in the present embodiment should be the minimum distance between the target boundaries.
[0058] Further, in the present embodiment, in step S8, if the distance is less than the preset standard spacing, it is determined that the layout spacing of the current element does not meet the requirements.
[0059] In actual application, if the distance between the boundary corresponding to the third frame and the boundary corresponding to the fourth frame is calculated after the third frame collides with the fourth frame each time, and the calculated distance is less than the preset standard distance, it is judged that the layout distance of the current component does not meet the requirement, and the iteration of the edge tree is terminated. Thus, the efficiency of component layout distance checking is further improved.
[0060] Further, in the embodiment, the component layout distance checking method further comprises: S9, all components are iterated to obtain all components with layout distance not meeting the requirement in the circuit layout.
[0061] Specifically, in the embodiment, after all components with layout distance not meeting the requirement are obtained, they can be summarized and arranged, and output in the form of a report, wherein the content of the report includes but is not limited to the name of the component with layout distance not meeting the requirement, the preset standard distance, the name of the component with distance not meeting the preset standard distance, and the calculated distance between the target boundaries of the two components.
[0062] The component layout distance checking method provided in the embodiment can avoid distance calculation between most components with long distance by establishing a rectangular tree and expanding the first frame by the preset standard distance to perform a collision strategy to screen target components, and can optimize the time-consuming EBxlog(EA) of the traditional method of circular iteration by establishing an edge tree, expanding the third frame by the preset standard distance to perform a collision strategy to screen target boundaries, and determining a reference component according to the number of component boundaries. Thus, on the basis of ensuring the accuracy of layout distance checking, the calculation amount is greatly reduced, the time of circuit board component layout distance checking is reduced, and the problem of long time consumption of existing circuit board component layout distance checking is solved.
[0063] The embodiment also provides a component layout distance checking system for implementing the component layout distance checking method as described above, as shown in Figure 3 The component layout distance checking system comprises: A circuit layout acquisition module is configured to acquire a circuit layout, wherein the circuit layout comprises a plurality of components. A target component acquisition module is configured to construct a first frame for each component to obtain a rectangular tree, to expand the first frame of the current component by a preset standard distance to obtain a second frame, and to use the second frame to iterate the rectangular tree to obtain components having an overlapping relationship with the second frame of the current component, which are recorded as target components. A target boundary acquisition module is configured to construct an external rectangle for each boundary of the current component and the target component to obtain a third frame, and to use the third frame to obtain target boundaries of the current component and the target component. The distance judgment module is configured to calculate the distance between the target boundary of the current component and the target boundary of the target component, and to judge that the layout distance of the current component does not meet the requirement when the distance is less than the preset standard distance.
[0064] The component layout distance inspection system provided in the embodiment extracts the target component having an overlapping relationship with the current component through the target component acquisition module, obtains the target boundary of the current component and the target component through the target boundary acquisition module, and judges whether the layout distance of the current component meets the requirement by calculating the distance between the target boundary of the target component and the target boundary of the current component through the distance judgment module. Not only the distance between two components does not need to be calculated in a traversal manner for all components, but also the distance between all boundaries of the components does not need to be calculated when the distance is calculated. Therefore, the calculation amount is greatly reduced, the time for inspecting the layout distance of the components of the circuit board is reduced, and the problem of long time consumption in the inspection of the layout distance of the components of the circuit board is solved on the basis of ensuring the accuracy of the layout distance inspection.
[0065] Further, in the embodiment, as shown in Figure 4 The component layout distance inspection system further comprises: A result output module is configured to collect and arrange all components having a layout distance not meeting the requirement in the circuit layout, and output in the form of a report.
[0066] In actual application, when the component layout distance inspection method provided in the embodiment is implemented based on the XSmartPR circuit design software, the component layout distance inspection system can be set in the XSmartPR circuit design software in the form of embedded development, and the specific implementation scheme is obtained by a person skilled in the art according to the prior art and the function of the component layout distance inspection system provided in the present application, which will not be described herein.
[0067] In addition, the embodiment further provides an electronic device comprising a memory, a processor, and an executable program stored in the memory and capable of being executed by the processor; the processor executes the executable program to perform the component layout distance inspection method as described above.
[0068] In addition, the embodiment further provides a computer storage medium storing an executable program; the executable program is executed to implement the component layout distance inspection method as described above.
[0069] It should be noted that the embodiments in the present specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts of each embodiment can be referred to each other. In addition, the different parts of each embodiment can also be used in combination, which is not limited by the present application.
[0070] The element layout spacing checking method and system, the electronic device and the computer storage medium provided by the embodiment comprise: acquiring a circuit layout, the circuit layout comprising a plurality of elements; constructing a first frame for each element to obtain a rectangular tree; expanding the first frame of a current element according to a preset standard spacing to obtain a second frame; traversing the rectangular tree by using the second frame to obtain an element having an overlapping relationship with the second frame of the current element, and recording the element as a target element; constructing an external rectangle for each boundary of the current element and the target element to obtain a third frame; obtaining a target boundary of the current element and the target element by using the third frame; calculating a distance between the target boundary of the current element and the target boundary of the target element; and if the distance is less than the preset standard spacing, judging that the layout spacing of the current element does not meet the requirement. By extracting the target element having the overlapping relationship with the current element and calculating the distance between the target boundary of the target element and the current element, whether the layout spacing of the current element meets the requirement is judged, the distance between two elements does not need to be calculated in a traversal manner, and the distance between all boundaries of the elements does not need to be calculated when the distance is calculated, so that the calculation amount is greatly reduced, the time for checking the layout spacing of the circuit board elements is reduced, and the problem that the existing circuit board element layout spacing checking is time-consuming is solved.
[0071] The above description is only a description of the preferred embodiments of the present application, and does not limit the scope of the present application. Any modification or change made by a person skilled in the art according to the above disclosure is within the protection scope of the claims.
Claims
1. A method for checking component layout spacing, characterized in that, include: Obtain a circuit layout, which contains multiple components; Build a first border for each element to obtain a rectangular tree; The first border of the current element is expanded according to the preset standard spacing to obtain the second border; Traverse the rectangular tree using the second border to obtain elements that overlap with the second border of the current element, and denote them as target elements; Construct a bounding rectangle for each boundary of the current element and the target element to obtain the third border; Using the third border, obtain the target boundaries between the current element and the target element; Calculate the distance between the target boundary of the current element and the target boundary of the target element; If the distance is less than the preset standard spacing, it is determined that the layout spacing of the current component does not meet the requirements.
2. The component layout spacing inspection method according to claim 1, characterized in that, The first border is the outer rectangle of the element.
3. The component layout spacing inspection method according to claim 1, characterized in that, If a first border in the rectangular tree collides with the second border of the current element, then the element corresponding to the first border is the target element.
4. The component layout spacing inspection method according to claim 1, characterized in that, The method for obtaining the target boundary between the current element and the target element using a third border includes: Determine if the number of boundaries of the current component is greater than the number of boundaries of the target component; If the number of boundaries of the current element is greater than the number of boundaries of the target element, the third border of the target element is expanded according to the preset standard spacing to obtain the fourth border; and all the third borders of the current element are constructed into an edge tree. Otherwise, expand the third border of the current element according to the preset standard spacing to obtain the fourth border; and construct an edge tree of all the third borders of the target element; Use the fourth border to traverse the edge tree and obtain the target boundaries of the current element and the target element.
5. The component layout spacing inspection method according to claim 4, characterized in that, The method of using the fourth border to traverse the edge tree to obtain the target boundaries of the current element and the target element includes: If a third border in the edge tree collides with a fourth border, then the boundary corresponding to the third border and the boundary corresponding to the fourth border are the target boundaries.
6. The component layout spacing inspection method according to claim 5, characterized in that, The component layout spacing inspection method also includes: After each collision between the third and fourth borders, calculate the distance between the boundary corresponding to the third border and the boundary corresponding to the fourth border. If the distance is less than the preset standard spacing, it is determined that the layout spacing of the current element does not meet the requirements, and the traversal of the edge tree is terminated.
7. The component layout spacing inspection method according to claim 1, characterized in that, The component layout spacing inspection method also includes: Iterate through all components to find all components whose layout spacing in the circuit layout does not meet the requirements.
8. The component layout spacing inspection method according to claim 1, characterized in that, The component layout spacing inspection method is implemented based on XSmartPR circuit design software.
9. A component layout spacing inspection system, used to implement the component layout spacing inspection method as described in any one of claims 1 to 8, characterized in that, The component layout spacing inspection system includes: A circuit layout acquisition module is used to acquire a circuit layout, which contains multiple components; The target element acquisition module is used to construct a first border for each element to obtain a rectangular tree; and to expand the first border of the current element according to a preset standard spacing to obtain a second border; and to traverse the rectangular tree using the second border to obtain elements that overlap with the second border of the current element, denoted as target elements. The target boundary acquisition module is used to construct a bounding rectangle for each boundary of the current element and the target element to obtain a third bounding box; and to obtain the target boundary of the current element and the target element using the third bounding box. The spacing determination module is used to calculate the distance between the target boundary of the current element and the target boundary of the target element; and to determine that the layout spacing of the current element does not meet the requirements when the distance is less than the preset standard spacing.
10. The component layout spacing inspection system according to claim 9, characterized in that, The component layout spacing inspection system also includes: The results output module is used to summarize and organize all components in the circuit layout whose spacing does not meet the requirements, and output them in the form of a report.
11. An electronic device, characterized in that, It includes a memory, a processor, and an executable program stored in the memory and capable of being run by the processor; when the processor runs the executable program, it performs the component layout spacing checking method as described in any one of claims 1 to 8.
12. A computer storage medium, characterized in that, The computer storage medium stores an executable program; when the executable program is executed, it implements the component layout spacing checking method as described in any one of claims 1 to 8.