一种快速同步的时钟同步电路及其控制方法
By combining a frequency detection module and a clock selection module, along with logic circuits using AND gates, NOR gates, and D flip-flops, fast clock synchronization is achieved, solving the problems of high cost, high complexity, and long switching time in existing technologies, and exhibiting good anti-interference performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-30
- Publication Date
- 2026-07-17
AI Technical Summary
Existing clock synchronization circuits suffer from high cost, complex circuitry, and long clock switching times, making it difficult to achieve rapid switching between internal and external clocks.
A combination of a frequency detection module, a clock selection module, a first clock synchronization module, a second clock synchronization module, and a third clock synchronization module is used to achieve fast clock synchronization through logic circuits such as AND gates, NOR gates, and D flip-flops, and latch-up logic is used to avoid the influence of external glitches and jitter.
It achieves clock synchronization with simple structure, small area, low cost, and the ability to quickly switch between internal and external clocks, and has good anti-interference performance.
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Figure CN121396193B_ABST
Abstract
Citation Information
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