Method, device, equipment, medium and product for constructing low-collision frequency hopping sequence

Abstract

The present application relates to the technical field of frequency hopping, and provides a construction method, device, equipment, medium and product of a low-collision frequency hopping sequence, which comprises the following steps: determining frequency hopping network parameters, and performing subsequent operations based on the frequency hopping network parameters; constructing a non-repeating element matrix; generating a chaotic sequence from a nonlinear Bernoulli chaotic function, and mapping the chaotic sequence into a multi-element sequence; converting the multi-element sequence into multiple sequences; performing cyclic shift on the non-repeating element matrix based on the multiple sequences to obtain a low-collision frequency hopping sequence. The low-collision frequency hopping sequence constructed by the present application can be applied to multi-subnet asynchronous access, can effectively reduce mutual interference caused by frequency point collision, and has good randomness and can effectively resist external hostile interference, so that it has a wide range of application scenarios in asynchronous frequency hopping networks.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of frequency hopping technology, in particular to a construction method and device of low-collision frequency hopping sequence, equipment, medium and product. BACKGROUND

[0002] Frequency hopping technology is one of the key technologies for interference suppression of communication system. It controls the frequency hopping of data symbols randomly, effectively avoiding the influence of various hostile interference, channel fading and other adverse factors. The random hopping rule of the transmitted symbols is controlled by pseudo-random frequency hopping sequence, and the characteristics of the frequency hopping sequence (such as Hamming autocorrelation, Hamming cross-correlation and frequency point uniformity) directly determine the performance of frequency hopping communication. Frequency hopping communication is generally composed of multiple subnets. Multiple nodes in each subnet realize multi-user access through TDMA mode, and the same subnet uses the same frequency hopping sequence. Different subnets use different frequency hopping sequences to realize multi-subnet multiplexing through FHMA mode. Frequency hopping subnets are generally formed by tasks. Due to the relative independence, mobility, transmission delay and other factors between subnets, the subnets cannot be completely synchronized, that is, the multiple subnets are generally quasi-synchronous or asynchronous. Under the condition of quasi-synchronization or asynchronization, it is a very good goal to realize orthogonal access of frequency hopping subnets from the perspective of the system, but it is a great technical challenge to design such a frequency hopping sequence.

[0003] The traditional pseudo-random frequency hopping sequence has good random characteristics, but under the condition of quasi-synchronous (asynchronous) access, the frequency point collision of the pseudo-random frequency hopping sequence cannot be completely eliminated. In K Under the condition of one subnet, the probability of collision of at least one frequency point at any time is 1-(1-1 / q ) K Therefore, the method to reduce the frequency point collision of frequency hopping is to increase the number of frequency points qHowever, this is not desirable in practice. Good Hamming correlation characteristics must be achieved through a fine sequence design scheme under quasi-synchronous (asynchronous) access. In recent years, a new frequency hopping technology, quasi-orthogonal frequency hopping, has received widespread attention from academia and industry. Through fine design of the frequency hopping point access strategy, this type of frequency hopping enables orthogonal (zero collision) frequency hopping or low collision frequency hopping under quasi-synchronous or asynchronous access. Some literature proposes effective methods for constructing orthogonal frequency hopping and low collision frequency hopping, namely the matrix shift method and the interleaving method. Some other literature proposes using interleaving technology and quasi-orthogonal frequency hopping characteristics to construct a set of frequency hopping sequences with two-level collision characteristics of low collision and no collision. This type of frequency hopping strategy can be used for orthogonal frequency hopping multi-user access within a subnet and low collision frequency hopping access between subnets. For the two common types of interference in frequency hopping systems, tracking interference and multi-user interference, some literature proposes the integration of quasi-orthogonal frequency hopping and wide interval frequency hopping technology. Through a series of finite field changes, wide interval-orthogonal frequency hopping sequences and wide interval-low collision frequency hopping sequences are obtained. This type of frequency hopping technology hops in a wide frequency domain interval, and also has quasi-orthogonal characteristics when accessing with low latency. However, the above frequency hopping technologies and their frequency hopping strategies have some defects: first, the frequency hopping sequence period is limited and can be easily predicted, which cannot be applied to actual systems. Second, existing quasi-orthogonal frequency hopping assumes that the access delay is limited to a few frequency hopping chips; if the access delay exceeds this interval, there will be a large frequency point collision. SUMMARY

[0004] For asynchronous frequency hopping networks, the present application aims to provide a construction method, device, equipment, medium and product of a low collision frequency hopping sequence to solve the problems of the above-mentioned traditional frequency hopping technology and its frequency hopping strategy.

[0005] In a first aspect, the present application provides a construction method of a low collision frequency hopping sequence, comprising:

[0006] Determine the frequency hopping network parameters and perform subsequent operations based on the frequency hopping network parameters;

[0007] Construct a non-repeating element matrix;

[0008] Generate a chaotic sequence from a nonlinear Bernoulli chaotic function and map the chaotic sequence to a multi-element sequence;

[0009] Convert the multi-element sequence into multiple sequences;

[0010] Cyclically shift the non-repeating element matrix based on the multiple sequences to obtain a low collision frequency hopping sequence.

[0011] In a preferred embodiment, the frequency hopping network parameters include:

[0012] The number of frequency hopping subnets K ;

[0013] the maximum latency without collision is Z -1 hop pulse width;

[0014] and the length of the chaotic sequence is L .

[0015] In a preferred embodiment, the dimension of the non-repetitive element matrix is K * Z each element in the non-repetitive element matrix C is different.

[0016] In a preferred embodiment, the mapping of the chaotic sequence into the multi-element sequence comprises:

[0017] dividing the continuous interval of the parameter and initial value of the nonlinear Bernoulli chaotic function into K non-repetitive intervals;

[0018] when the analog value in the chaotic sequence belongs to the k interval, mapping the analog value into an integer value k , thereby mapping the chaotic sequence into a K element sequence.

[0019] In a preferred embodiment, the conversion of the multi-element sequence into multiple sequences comprises:

[0020] selecting Z -1 integers different from each other and coprime with K ; and

[0021] performing modulo operation on the multi-element sequence by using the selected integers and K , to obtain Z -1 sequences.

[0022] In a preferred embodiment, the cyclic shift of the non-repetitive element matrix based on the multiple sequences to obtain the low-collision frequency hopping sequence comprises:

[0023] performing cyclic shift operation on each column vector in the non-repetitive element matrix with the element in Z -1 sequence as the shift amount, and concatenating each column vector after each shift;

[0024] reading out the sequence obtained after concatenation by row to obtain the low-collision frequency hopping sequence.

[0025] In a second aspect, the present application provides a construction device of a low-collision frequency hopping sequence, comprising:

[0026] a first processing unit configured to determine frequency hopping network parameters and perform subsequent operations based on the frequency hopping network parameters;

[0027] The second processing unit is configured to construct a non-repeating element matrix.

[0028] The third processing unit is configured to generate a chaotic sequence from a nonlinear Bernoulli chaotic function and map the chaotic sequence into a multi-element sequence.

[0029] The fourth processing unit is configured to convert the multi-element sequence into multiple sequences.

[0030] The fifth processing unit is configured to cyclically shift the non-repeating element matrix based on the multiple sequences to obtain a low-collision frequency hopping sequence.

[0031] In a third aspect, the present application provides an electronic device, comprising:

[0032] at least one processor; and a memory connected to the at least one processor in communication;

[0033] The memory stores instructions executable by the at least one processor, and the at least one processor executes the instructions stored in the memory, so as to execute the method described above.

[0034] In a fourth aspect, the present application provides a computer readable storage medium, characterized in that the computer readable storage medium is used to store instructions, when the instructions are executed, the method described above is realized.

[0035] In a fifth aspect, the present application provides a computer program product, when the computer program product is invoked by a computer, the computer executes the method described above.

[0036] In summary, due to the adoption of the above technical solutions, the present application has the following advantages:

[0037] For asynchronous frequency hopping networks, the present application constructs a new type of quasi-orthogonal, long-period, high-security frequency hopping sequence with low collision and zero collision. Among them, the present application uses Bernoulli nonlinear function to obtain a multi-element chaotic sequence with long period and high security; and through finite field expansion, multiple multi-element chaotic sequences are obtained. The chaotic sequence controls the cyclic shift of the non-repeating element matrix, and performs cascade operation. The sequence after cascade is read by row to obtain multiple long-period, high-security, low-collision (zero-collision) frequency hopping sequences. The low-collision frequency hopping sequence constructed by the present application can be applied to multi-subnet asynchronous access, and can effectively reduce the mutual interference caused by frequency point collision; and the low-collision frequency hopping sequence constructed by the present application has good randomness, and can also effectively resist external hostile interference, and has a wide application scenario in asynchronous frequency hopping networks. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figure 1A flow chart of a construction method of a low-collision frequency hopping sequence provided for an embodiment of the present application.

[0039] Figure 2 A result chart of overall distribution of Hamming autocorrelation values of a low-collision frequency hopping sequence constructed for an embodiment of the present application.

[0040] Figure 3 A result chart of overall distribution of Hamming cross-correlation values of a low-collision frequency hopping sequence constructed for an embodiment of the present application.

[0041] Figure 4 A structural schematic diagram of a construction device of a low-collision frequency hopping sequence provided for an embodiment of the present application.

[0042] Figure 5 A structural schematic diagram of an electronic device provided for an embodiment of the present application. DETAILED DESCRIPTION

[0043] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0044] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0045] EMBODIMENT

[0046] The embodiments of the present application provide a construction method of a low-collision frequency hopping sequence, and the design principle is as follows: a new type of frequency hopping sequence with low collision and zero collision fusion under asynchronous access is obtained by using a chaotic Bernoulli nonlinear function and an orthogonal frequency hopping concept, through a chaotic sequence, a matrix shift / cascading and a finite field change method. The main features are as follows:

[0047] The chaotic sequence of the Bernoulli nonlinear function is used as a control sequence. According to the knowledge of chaotic function characteristics, the Bernoulli nonlinear function has better uniformity than other chaotic nonlinear functions (Logistic and Tent, etc.). Compared with the traditional existing pseudo-random sequence, the period is longer and the security is higher.

[0048] By specific finite field extension and cyclic shift operation, the obtained frequency hopping sequence has orthogonal frequency hopping (zero collision) characteristics in low access delay (several frequency hopping chips). When the access delay increases, the frequency hopping point collision gradually increases, but the collision times are still small, having low collision characteristics. In actual communication systems, the access delay distribution generally has normal distribution characteristics with zero mean, that is, the collision distribution of the constructed frequency hopping sequence can better match the delay distribution from the perspective of probability statistics.

[0049] Therefore, compared with the existing low collision and orthogonal frequency hopping sequence, the low collision frequency hopping sequence constructed by the application has a longer period and higher security, because its characteristics are consistent with Bernoulli chaotic sequences.

[0050] In view of the above design principle, as shown in the low collision frequency hopping sequence construction method, comprising the following steps: Figure 1

[0051] Step 1: Determine the frequency hopping network parameters, and perform subsequent operations based on the frequency hopping network parameters;

[0052] In the embodiment of the application, the frequency hopping network parameters include the number of frequency hopping subnets K (generally a prime number), and the maximum delay without collision is Z -1 frequency hopping pulse width (the maximum delay is ZT h , wherein T h represents a frequency hopping pulse width, that is, a frequency hopping chip), and the chaotic sequence length L is as long as possible.

[0053] Step 2: Construct a non-repeating element matrix, denoted as:

[0054] ;

[0055] , wherein the dimension of the non-repeating element matrix C is K * Z , the column vector of the first column in the non-repeating element matrix C s , , s =1,2,..., Z , C Z,K is the element of the first row in the first column in the non-repeating element matrix C, the elements in the non-repeating element matrix C are all different, and the superscript Z represents the transpose of the matrix. Thus, the non-repeating element matrix C can be generated by a permutation of the elements in the [0, K -1] set. T ZK

[0056] ​​​Step 3: generating a chaotic sequence from the nonlinear Bernoulli chaotic function and mapping the chaotic sequence into a multi-element sequence.

[0057] The nonlinear Bernoulli chaotic function is expressed as

[10] :

[0058] ;

[0059] wherein the parameters and the initial value are fixed first. Through the iteration of the nonlinear Bernoulli chaotic function, a chaotic sequence L with a length of , is obtained, wherein n is the th analog value in the chaotic sequence. Further, the chaotic sequence K is mapped into a -element sequence, and the mapping method is as follows:

[0060] First, the continuous interval I = (0, 1) of the values of the parameters and the initial value of the nonlinear Bernoulli chaotic function is divided into K non-repeating intervals:

[0061] ;

[0062] wherein is the k th interval, and the interval boundary value , ;

[0063] Then, when the analog value in the chaotic sequence is , the analog value k is mapped into an integer value , that is, K , and the -element sequence is expressed as:

[0064] ;

[0065] wherein is the K th integer value in the n -element sequence.

[0066] Step 4: converting the multi-element sequence into multiple sequences.

[0067] Select Z -1 integers K that are different from each other and relatively prime to , and , and K for the -element sequenceThe modulo operation is performed to obtain Z -1 sequence is expressed as:

[0068] ;

[0069] ; ...

[0070] ;

[0071] wherein, denotes the modulo operation. For the convenience of expression, the above Z -1 sequence is uniformly denoted as:

[0072] .

[0073] wherein, is the th element in the Zth sequence, .

[0074] Step 5: Based on the plurality of sequences, the non-repeating element matrix is circularly shifted to obtain a low-collision frequency hopping sequence.

[0075] Firstly, the circular shift operation of the sequence is defined as follows:

[0076] The circular shift of a column vector with N elements is denoted as i , and the column vector after the circular shift is expressed as: = ;

[0077] Then, the elements in the Z -1 sequence are taken as the shift amount, and the circular shift operation is performed on each column vector in the non-repeating element matrix C, and the column vector after each shift is concatenated, and the sequence obtained after the concatenation is expressed as:

[0078] ;

[0079] Finally, the sequence obtained after the concatenation is read by rows to obtain K low-collision frequency hopping sequences with a length of L S = ZL , which is expressed as:

[0080]

[0081] wherein, denotes the K th low-collision frequency hopping sequence, ​Indicates the first K The first low-collision frequency hopping sequence L S = ZL Each element.

[0082] A specific example is as follows:

[0083] Step 1: Determine the frequency hopping network parameters: number of frequency hopping subnets K =5, the maximum collision-free delay is Z -1 = 2 frequency hopping pulse widths (i.e.) Z =3), Chaotic sequence length L =5000.

[0084] Step 2: Construct a matrix of non-repeating elements, represented as:

[0085]

[0086] The dimension of the non-repeating element matrix C is 5*3, that is, a matrix with 5 rows and 3 columns.

[0087] Step 3: Based on continuous intervals Get parameters and initial value Then, the chaotic sequence can be obtained from the nonlinear Bernoulli chaotic function. and its mapping of 5-ary sequences ,Right now:

[0088] =[...0.1662, 0.1910, 0.2196, 0.2524, 0.2901, 0.3334, 0.3833, 0.4406, 0.5064, 0.5821, 0.6691,...]

[0089] =[...0,0,1,1,1,1,1,2,2,2,3...]

[0090] Step 4: Select two distinct integers that are relatively prime to 5. Then we can obtain the following two sequences:

[0091] =[...1,1,2,2,2,2,2,3,3,3,4...];

[0092] =[...3,3,4,4,4,4,4,4,0,0,0,1...];

[0093] Step 5: Perform the cyclic shifting and cascading process as described in Step 5 above, and read out the corresponding data row by row. K=5 low collision frequency hopping sequences. Here only give l =2000, 2001, 2002,..., 2010 time cases, as follows:

[0094]

[0095] Thus, some characteristics of the low collision frequency hopping sequence constructed by the application can be obtained: the length of the low collision frequency hopping sequence is L s = LZ =15000; sequence number K =5; frequency point set size q =15. It is worth noting that although only one example is given above, different parameters can be taken to obtain different frequency hopping sequence sets, but the characteristics are the same. K , Z , , , L} and { } z=0,1,..., Z -1, different frequency hopping sequence sets can be obtained, but the characteristics are the same.

[0096] The performance of the low collision frequency hopping sequence constructed by the application is analyzed from three aspects of Hamming autocorrelation value, Hamming cross-correlation value and frequency point occurrence number.

[0097] 1. Hamming autocorrelation value ( L S =15000)

[0098] The overall distribution of the Hamming autocorrelation value of the constructed low collision frequency hopping sequence is shown in Figure 2 . The specific value of the Hamming autocorrelation value near zero time delay is shown in Table 1. It can be seen from Figure 2 that the main lobe of the Hamming autocorrelation value is very obvious, and the value is 15000. Under asynchronous time delay, the Hamming autocorrelation value is stable at about 3000. Table 1 shows the change of the Hamming autocorrelation value near zero time delay: when the time delay τ | ZT h , the Hamming autocorrelation side lobe is 0; as the time delay increases, the Hamming autocorrelation value gradually decreases.

[0099] Table 1, specific value of Hamming autocorrelation value near zero time delay ( L S =15000):

[0100]

[0101] 2. Hamming cross-correlation value ( L S =15000)

[0102] The overall distribution of the Hamming cross-correlation values of the constructed low-collision frequency hopping sequences is shown in Fig. 2. The specific values of the Hamming cross-correlation values near zero time delay are shown in Table 2. Figure 3 Figure 3 It can be seen from Table 2 that the Hamming cross-correlation values near zero time delay are small (showing low-collision and no-collision characteristics). Under asynchronous time delay, the Hamming autocorrelation values are stable at about 3000. Table 2 shows the variation of the Hamming cross-correlation values near zero time delay: when the time delay |τ|< 3 ZT h , the Hamming cross-correlation shows orthogonal characteristics (no collision); as the access time delay increases (for example, |τ|> 3 ZT h <|τ|<3 ZT h ), the Hamming cross-correlation values gradually increase, showing low-collision characteristics.

[0103] Table 2 shows the specific values of the Hamming cross-correlation near zero time delay (τ=15000): L S

[0104]

[0105] 3, Frequency point occurrence times

[0106] Table 3 shows the frequency hopping frequency point occurrence times statistics of the constructed low-collision frequency hopping sequences. It can be seen from Table 3 that each frequency point f i ( i =0, 1, 2,..., 14) is used about 1000 times in the low-collision frequency hopping sequence, and this uniformity advantage is determined by the uniformity characteristics of the Bernoulli chaotic sequence. The results of Table 3, combined with the distribution of the Hamming autocorrelation values and the Hamming cross-correlation values ( Figure 2 and Figure 3 ), can fully illustrate that the low-collision frequency hopping sequence constructed by the present application has good randomness for each frequency point.

[0107] Table 3 shows the occurrence times statistics of the frequency points f i ( i =0, 1, 2,..., 14) in each low-collision frequency hopping sequence:

[0108]

[0109] Through the above analysis, some characteristics of the low-collision frequency hopping sequence constructed by the present application can be obtained: the size of the zero-collision (orthogonal) region is Z =2 frequency hopping pulses; the size of the low-collision region is 3 Z ​​Frequency hopping pulse; frequency point average use times L s / q ≈1000 full cycle hamming cross-correlation average L s / K ≈3000.

[0110] From the above, for the asynchronous frequency modulation network, the application constructs a new type of quasi-orthogonal, long cycle, high security frequency hopping sequence with low collision and zero collision. Among them, the application uses Bernoulli nonlinear function to obtain a long cycle and high security multi-element chaotic sequence; and through finite field expansion, a plurality of multi-element chaotic sequences are obtained. The chaotic sequence controls the cyclic shift of the non-repeating element matrix, and performs cascade operation. The sequence after cascade is read by row to obtain a plurality of long cycle, high security, low collision (zero collision) frequency hopping sequences. The low collision frequency hopping sequence constructed by the application can be applied to multi-subnet asynchronous access, and can effectively reduce the mutual interference caused by frequency point collision; and the low collision frequency hopping sequence constructed by the application has good randomness, and can also effectively resist external hostile interference, and has a wide application scene in asynchronous frequency hopping network.

[0111] Based on the same technical concept, as shown in Figure 4 , the embodiment of the application also provides a construction device of low collision frequency hopping sequence, characterized by comprising:

[0112] The first processing unit is used to determine the frequency hopping network parameters and perform subsequent operations based on the frequency hopping network parameters;

[0113] The second processing unit is used to construct a non-repeating element matrix;

[0114] The third processing unit is used to generate a chaotic sequence from a nonlinear Bernoulli chaotic function, and map the chaotic sequence into a multi-element sequence;

[0115] The fourth processing unit is used to convert the multi-element sequence into a plurality of sequences;

[0116] The fifth processing unit is used to cyclically shift the non-repeating element matrix based on the plurality of sequences to obtain a low collision frequency hopping sequence.

[0117] The working principles of the above processing units can refer to the descriptions in the foregoing method embodiments, which will not be described here.

[0118] Based on the same technical concept, the embodiment of the application also provides an electronic device, which can realize the construction method process of the low collision frequency hopping sequence provided by the above-mentioned embodiments of the application. In one embodiment, the electronic device can be a server, or a terminal device or other electronic device. As Figure 5As shown, the electronic device can include:

[0119] at least one processor, and a memory connected with the at least one processor, the embodiments of the present application do not limit the specific connection medium between the processor and the memory, Figure 5 In the embodiments of the present application, the connection between the processor and the memory is taken as an example of connection through a bus. The bus is connected between Figure 5 In the embodiments of the present application, the connection between the processor and the memory is taken as an example of connection through a bus. The bus is connected between Figure 5 In the embodiments of the present application, the connection between the processor and the memory is taken as an example of connection through a bus. The bus is connected between

[0120] In the embodiments of the present application, the memory stores instructions executable by the at least one processor, and the at least one processor can execute the instructions stored in the memory to perform the method for constructing a low-collision frequency hopping sequence discussed above.

[0121] The processor is the control center of the device, and can connect each part of the control device through various interfaces and lines, and monitor the whole device by running or executing the instructions stored in the memory and calling the data stored in the memory, thereby monitoring the whole device.

[0122] In an alternative design, the processor can include one or more processing units, and the processor can integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface and application program, etc., and the modem processor mainly processes wireless communication. It can be understood that the above-mentioned modem processor can also not be integrated into the processor. In some embodiments, the processor and the memory can be implemented on the same chip, and in some embodiments, they can also be implemented on separate chips respectively.

[0123] The processor can be a general-purpose processor, such as a CPU, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method for constructing a low-collision frequency hopping sequence disclosed in the embodiments of the present application can be directly embodied as execution by a hardware processor, or executed by a combination of hardware and software modules in the processor.

[0124] The memory, as a non-volatile computer readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory can include at least one type of storage medium, for example, can include flash memory, hard disk, multimedia card, card type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic memory, magnetic disk, optical disk, etc. The memory is any other medium capable of carrying or storing desired program code in the form of instructions or data structures and capable of being accessed by a computer, but is not limited thereto. The memory in the embodiments of the present application can also be a circuit or any other device capable of realizing the storage function, used for storing program instructions and / or data.

[0125] By designing and programming the processor, the code corresponding to the construction method of the low-collision frequency hopping sequence introduced in the foregoing embodiments can be fixed in the chip, so that the chip can execute the steps of the method of the foregoing embodiments at runtime. How to design and program the processor is a technology known to those skilled in the art, and will not be described here.

[0126] Based on the same inventive concept, the embodiments of the present application also provide a storage medium storing computer instructions, when the computer instructions run on a computer, the computer instructions make the computer execute the construction method of the low-collision frequency hopping sequence discussed above.

[0127] In some optional embodiments, the present application also provides that each aspect of the construction method of the low-collision frequency hopping sequence can also be implemented in the form of a program product, which includes program code, when the program product runs on the device, the program code is used to make the control device execute the steps in the construction method of the low-collision frequency hopping sequence according to various exemplary embodiments of the present application described above in the specification.

[0128] It should be noted that, although several units or sub-units of the apparatus are mentioned in the above detailed description, such division is merely exemplary and not mandatory. Indeed, according to an embodiment of the application, the features and functionalities of two or more units described above can be embodied in one unit. Conversely, the features and functionalities of one unit described above can be further divided into units embodied by several units. Moreover, although the operations of the method of the application are described in a particular, sequential order, this is not necessarily the case. Indeed, certain of the steps can be performed in a different order than that described, or can be performed concurrently. Additionally or alternatively, certain steps can be omitted, combined, or further divided into multiple steps.

[0129] Those skilled in the art will appreciate that embodiments of the application can be devised for a method, a system, or a computer program product. Accordingly, the present application can be embodied in the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage devices, etc.) embodying computer readable program code.

[0130] The present application is described in reference to the flowchart illustrations and / or block diagrams of the methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processing system or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams block or blocks. Figure 1 one or more functions specified in the flowchart illustrations and / or block diagrams block or blocks.

[0131] The program code can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++, or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computing device, partly on the user's computing device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device or entirely on the remote computing device or server. It will be appreciated that the program code can be implemented in any combination of

[0132] In situations where the remote computing device is involved, the remote computing device can be connected to the user computing device through any kind of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., using an Internet service provider to connect through the Internet).

[0133] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the Figure 1 function specified in the flow or flows and / or blocks Figure 1 of the block or blocks.

[0134] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions executed on the computer or other programmable apparatus provide steps for implementing the Figure 1 function specified in the flow or flows and / or blocks Figure 1 of the block or blocks.

[0135] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. The present application can have various modifications and changes for those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for constructing a low collision frequency hopping sequence, applied to an asynchronous frequency hopping network, characterized in that, Comprising: determining frequency hopping network parameters, and performing subsequent operations based on the frequency hopping network parameters; The frequency hopping network parameters include: number of frequency hopping subnets K ; maximum time delay without collision is Z -1 frequency hopping pulse width; and chaotic sequence length L ; constructing a non-repeating element matrix; the non-repeating element matrix has a dimension of K Z , and each element in the non-repeating element matrix C is different. The chaotic sequence is generated by a nonlinear Bernoulli chaotic function and mapped into a multi-element sequence: the continuous interval of the parameter and initial value of the nonlinear Bernoulli chaotic function is divided into K non-repeated intervals; when the analog value in the chaotic sequence belongs to the k interval, the analog value is mapped into an integer value k , thus the chaotic sequence is mapped into K a multi-element sequence; Converting a multi-element sequence into a plurality of sequences: selecting Z -1 integer different from each other and relatively prime to K the number of elements of the multi-element sequence; and K performing a modulo operation on the multi-element sequence using the selected integer and Z -1 sequence. Based on multiple sequences, the non-repeating element matrix is cyclically shifted to obtain a low-collision frequency hopping sequence: the element in the sequence is a shift amount, the cyclic shift operation is performed on each column vector in the non-repeating element matrix, and the column vectors after each shift are concatenated; the sequence obtained after concatenation is read by rows to obtain a low-collision frequency hopping sequence. Z -1 sequence, a shift amount is performed on each column vector in the non-repeating element matrix, and the column vectors after each shift are concatenated; the sequence obtained after concatenation is read by rows to obtain a low-collision frequency hopping sequence.

2. An apparatus for constructing a low collision frequency hopping sequence, characterized by Comprising: a first processing unit configured to determine frequency hopping network parameters, and perform subsequent operations based on the frequency hopping network parameters; The frequency hopping network parameters include: number of frequency hopping subnets K ; maximum time delay without collision is Z -1 frequency hopping pulse width; and chaotic sequence length L ; A second processing unit is configured to construct a non-repeating element matrix; the non-repeating element matrix has a dimension of K Z , and elements in the non-repeating element matrix C are all different. The third processing unit is used to generate chaotic sequences from the nonlinear Bernoulli chaotic function and map the chaotic sequences into multivariate sequences: it divides the continuous intervals of the parameters and initial values ​​of the nonlinear Bernoulli chaotic function into... K The number of non-repeating intervals; when the simulated value in the chaotic sequence belongs to the number of intervals. k When there are several intervals, the simulated value is mapped to an integer value. k This maps the chaotic sequence to K metasequence; A fourth processing unit is configured to convert the multi-element sequence into a plurality of sequences by selecting Z -1 integer different from each other and relatively prime to K -1 integer and K performing a modulo operation on the multi-element sequence by using the selected integer and Z -1 sequence. The fifth processing unit is configured to perform cyclic shift on the non-repeating element matrix based on the plurality of sequences to obtain a low-collision frequency hopping sequence, that is, Z In the first sequence, the element is the shift amount. The cyclic shift operation is performed on each column vector in the non-repeating element matrix, and the column vectors after each shift are concatenated. The sequence obtained after the concatenation is read by rows to obtain the low-collision frequency hopping sequence.

3. An electronic device, comprising: Comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the at least one processor, by executing the instructions stored in the memory, performs the method of claim 1.

4. A computer-readable storage medium, characterized in that, The computer readable storage medium stores instructions that, when executed, cause the method of claim 1 to be implemented.

5. A computer program product, characterised in that, The computer program product, when invoked by a computer, causes the computer to perform the method of claim 1.

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