A PWM modulation method based on adaptive zero sequence injection
By adopting an adaptive zero-sequence injection PWM modulation method, the problem of balancing low harmonic distortion and low switching loss of inverters under different operating conditions is solved. This method achieves continuous and smooth switching of the modulation signal, reduces current surges and harmonic jumps, and is applicable to the field of new energy power generation technology.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NINGBO GINLONG TECH
- Filing Date
- 2025-12-25
- Publication Date
- 2026-04-17
AI Technical Summary
Existing inverter PWM modulation methods cannot simultaneously achieve low harmonic distortion and low switching losses under different operating conditions. They also suffer from unsmooth switching, lack of power factor adaptability, and current surges and harmonic jumps.
An adaptive zero-sequence injection PWM modulation method is adopted. By acquiring the zero-sequence components of SVPWM and DPWM, setting the phase offset and superimposing them, a unified zero-sequence component is generated, realizing continuous and smooth switching of the modulation signal. The zero-sequence concentration and phase offset values are optimized by using a cost function.
It achieves an adaptive trade-off between SVPWM and DPWM modulation, reduces harmonic distortion and switching losses, avoids current surges and harmonic jumps, and has a lightweight computational load, making it easy to apply in engineering.
Smart Images

Figure CN121417707B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of new energy power generation technology, and in particular to a PWM modulation method based on adaptive zero-sequence injection. Background Technology
[0002] Currently, commonly used inverter PWM modulation methods are mainly divided into two categories: continuous PWM modulation and discontinuous PWM modulation. For continuous PWM (CPWM) modulation, a typical example is SVPWM; its characteristics include that all three phase arms switch within each switching cycle, resulting in continuous output voltage, low harmonic distortion (THD), and high voltage utilization, but also a high number of switching cycles and significant switching losses. For discontinuous PWM (DPWM) modulation, common variants include DPWM0, DPWM1, and DPWM2. The basic idea is to select a phase arm to keep clamped on within a certain range within one power frequency cycle, avoiding high-frequency switching to reduce switching losses and device stress. This method has significant loss advantages under high-modulation and high-current conditions, but due to the existence of flat-top or flat-bottom sections in the output voltage waveform, the harmonic distortion is relatively high, especially under low-modulation or light-load conditions where waveform distortion is severe.
[0003] To balance the advantages of both SVPWM and DPWM under different operating conditions, some solutions employ hybrid modulation that switches between SVPWM and DPWM. For example, SVPWM is used when high waveform quality is required to achieve lower harmonics, while DPWM is used when losses are significant to reduce switching losses. This is typically achieved by setting a threshold (such as modulation index or power factor) in the controller; when the operating point exceeds the threshold, it switches from SVPWM to DPWM, and vice versa. However, this solution has the following drawbacks in practical use:
[0004] (1) Unsmooth switching: Since the modulation reference waveforms of SVPWM and DPWM are fundamentally different (one is continuous and the other has a flat top segment), direct switching will cause abrupt changes in the modulation wave and output voltage, resulting in current surges, harmonic jumps and control instability. (2) Discrete switching only: Most current methods only perform a two-to-one switching between the two modes, without providing an intermediate transition mode, so it is impossible to achieve stepwise optimization, especially when the modulation is moderate or the power factor changes, it is impossible to guarantee the optimal compromise. (3) Lack of power factor adaptability: Most existing switching schemes are based on fixed voltage waveform sector division and do not consider the current phase. When the power factor deviates from 1, the current peak value is not synchronized with the voltage peak value, and switching may still occur at the current peak value, thereby weakening the loss optimization effect and even causing switching stress concentration. Summary of the Invention
[0005] One objective of this application is to provide a PWM modulation method based on adaptive zero-sequence injection that can solve at least one of the defects in the aforementioned background art.
[0006] To achieve at least one of the above objectives, the technical solution adopted in this application is as follows: a PWM modulation method based on adaptive zero-sequence injection, comprising the following steps: obtaining a first zero-sequence component required for SVPWM modulation; obtaining a second zero-sequence component required for DPWM modulation, and setting a phase offset on the second zero-sequence component so that the clamping window of DPWM modulation shifts within the power frequency cycle to align with the current peak region; superimposing the first zero-sequence component and the phase-offset second zero-sequence component through zero-sequence concentration to obtain a unified zero-sequence component for generating the modulation signal; during the hybrid modulation process of PWM, by adjusting the values of zero-sequence concentration and phase offset in the unified zero-sequence component, the modulation signal is continuously and smoothly switched between SVPWM modulation and DPWM modulation.
[0007] The preferred expression for the unified zero-order component u0(t) is:
[0008] ;
[0009] Wherein, the zero-order concentration ρ is a continuous function of time t and satisfies ρ∈[0,1]; the phase offset δ changes gradually with a set slope during the hybrid modulation switching process and satisfies δ∈[0,2π]; u 0_cont (t) and u 0_disc (t, δ) represent the first zero-order component and the second zero-order component, respectively, both of which are bounded continuous functions.
[0010] Preferably, a cost function J is constructed based on the weighted sum of resonance and loss indices, relating zero-order concentration ρ and phase shift δ. Multi-objective optimization of the cost function J is then performed to achieve low harmonics and low loss, yielding the target values for zero-order concentration ρ and phase shift δ. The expression for the cost function J is:
[0011] ;
[0012] Where m represents the modulation scheme. Represents the power factor angle. This represents the total harmonic distortion (THD) value of the current. and These represent the switching loss value and the conduction loss value, respectively. thd w sw w cond These represent the corresponding weighting coefficients.
[0013] Preferably, the lightweighting process of phase offset δ is as follows: based on the minimum value of cost function J, the phase offset δ is related to the power factor angle. Relationship: +δ=0, combining the data delay in engineering practice and the fixed phase error at the hardware level, a lightweight calculation formula for phase offset δ is obtained; the lightweight process of zero-order concentration ρ is as follows: perform a low-cost approximation on the quadratic form of the cost function J; perform the derivative of the cost function J that has completed the low-cost approximation based on zero-order concentration ρ and set it to zero to obtain the theoretical optimal solution of zero-order concentration ρ; based on the obtained theoretical optimal solution, combined with the modulation threshold used for modulation scene judgment, a lightweight calculation formula for zero-order concentration ρ is obtained.
[0014] The preferred lightweight calculation formulas for zero-order concentration ρ and phase shift δ are as follows:
[0015] ;
[0016] ;
[0017] Where m1 represents the lower limit of the modulation threshold at which DPWM modulation should begin favorably, m2 represents the upper limit of the modulation threshold at which DPWM modulation should be enabled, q represents the steepness of the adjustment transition, sat{·} represents the saturation function, ε represents the reserved value, p represents the scaling exponent, ω represents the angular frequency, and T d δ0 represents the equivalent delay time for sampling, calculation, and PWM update in actual engineering practice, and represents the empirical bias angle used to compensate for fixed phase errors at the hardware level.
[0018] Preferably, the zero-order concentration ρ and phase shift δ calculated by the lightweight formula are corrected using the cost function J. Both the zero-order concentration ρ and phase shift δ are control factors, and their correction processes are identical. The correction process for one of the control factors is as follows: The two control factors are labeled as the first control factor and the second control factor, respectively. The values of the first and second control factors are calculated using the lightweight formula and substituted into the expression of the cost function J to calculate the first estimated value corresponding to the cost function J. Keeping the value of the first control factor unchanged, the second control factor undergoes the following perturbation update process: Positive and negative perturbations are applied to the second control factor, and the first control factor and the perturbated second control factor are substituted into the cost function J to calculate the second estimated value. Based on the comparison between the first and second estimated values of the cost function J, the second control factor is updated. The perturbation update process continues according to the updated second control factor until the value of the second control factor obtained from multiple consecutive perturbation updates remains unchanged, thus completing the correction of the second control factor.
[0019] Preferably, the update expressions for the zero-order concentration ρ and the phase shift δ are as follows:
[0020] ;
[0021] in, Indicates regulatory factor, ={ρ, δ}; k+1 and k These represent the control factors in the (k+1)th and kth round perturbation update processes, respectively. The updated value, Indicates regulatory factor The disturbance amount, γ represents the improvement threshold, J k This represents the first estimate of the cost function J during the k-th round of perturbation update. and These represent the effects on the regulatory factors. The second estimate of the cost function J after applying positive and negative perturbations.
[0022] Preferably, in the cost function J, the total harmonic distortion of the current is... Including current harmonic distortion under SVPWM modulation and current harmonic distortion under DPWM modulation Based on current harmonic distortion and modulation index m and power factor angle The relationship between the initial estimate of the cost function J and the total harmonic distortion of the current is used to calculate the total harmonic distortion. The approximate calculation expression is as follows:
[0023] ;
[0024] ;
[0025] ;
[0026] Among them, K cp G represents the high-frequency harmonic constant. eq ( ) represents the combined equivalent gain of each harmonic current, r H Δ represents the high-frequency harmonic gain coefficient, ⊕ represents the RMS synthesis of the two types of distortion, β(m) represents the coefficient that decreases with modulation depth m, and Δ Indicates window misalignment, g(Δ) ) represents the phase mismatch penalty function. w represents the set of high-frequency harmonics. n This represents the weight of the nth harmonic.
[0027] Preferably, in the cost function J, the switching loss Including switching losses under SVPWM modulation and switching losses under DPWM modulation Based on switching losses, modulation index m, and power factor angle The relationship is used to calculate the switching loss of the initial estimate of the cost function J. The approximate calculation expression is as follows:
[0028] ;
[0029] ;
[0030] ;
[0031] Where c1 and c2 represent the coefficients of the linear term and the squared term, respectively, Δ This indicates window misalignment, κ represents the reduction factor for the number of switches, and F1(Δ) ) and F2(Δ N represents the current-weighted penalty function for the linear term and the square term, respectively. s U represents the total number of switching operations per second, α1 and α2 represent the primary and secondary coefficients corresponding to the switch being turned on, respectively, and β1 and β2 represent the primary and secondary coefficients corresponding to the switch being turned off, respectively. dc Indicates the DC bus voltage. This indicates the magnitude of the load impedance.
[0032] Preferably, in the cost function J, the conduction loss Including conduction loss under SVPWM modulation and conduction loss under DPWM modulation Based on conduction loss, modulation index m, and power factor angle The relationship is used to calculate the switching loss of the initial estimate of the cost function J. The approximate calculation expression is as follows:
[0033] ;
[0034] ;
[0035] ;
[0036] Where x1 and x2 represent the coefficients of the linear and squared terms, respectively, and λ and μ both represent the distribution coefficients. U represents the loss disturbance of a single device continuously conducting. dc Indicates the DC bus voltage. V represents the magnitude of the load impedance. CE0 V represents the zero current intercept. F0 The forward voltage drop intercept of the anti-parallel diode, r ce The differential resistance r of a switching device represents the on-state resistance. f This represents the differential resistance of the anti-parallel diode.
[0037] Compared with the prior art, the beneficial effects of this application are as follows:
[0038] (1) By adjusting the values of zero-sequence concentration and phase offset, an adaptive trade-off can be made between the low harmonic distortion of SVPWM modulation and the low loss of DPWM modulation during the modulation process; at the same time, the entire modulation switching process is continuous and without duty cycle step, which can effectively avoid current impact and harmonic jump.
[0039] (2) By simplifying the calculation of zero-sequence concentration and phase shift, the amount of calculation can be effectively reduced, which is convenient for practical engineering applications. Attached Figure Description
[0040] Figure 1 This is a schematic diagram of the overall workflow of this application.
[0041] Figure 2 This is a schematic diagram illustrating the effect of zero-sequence concentration on the waveform of the modulated signal in this application.
[0042] Figure 3 This is a schematic diagram illustrating the effect of phase shift on the waveform of the modulated signal in this application. Detailed Implementation
[0043] The present application will now be further described in conjunction with specific embodiments. It should be noted that, in the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that the specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0044] In the description of this application, it should be noted that the terms "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., which indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and should not be construed as limiting the specific protection scope of this application.
[0045] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0046] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0047] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0048] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.
[0049] One preferred embodiment of this application, such as Figure 1 As shown, a PWM modulation method based on adaptive zero-sequence injection includes the following steps: obtaining a first zero-sequence component required for SVPWM modulation; obtaining a second zero-sequence component required for DPWM modulation and setting a phase offset on the second zero-sequence component so that the clamping window of the DPWM modulation shifts within the power frequency cycle to align with the current peak region; superimposing the first zero-sequence component and the phase-offset second zero-sequence component by adjusting the zero-sequence concentration to obtain a unified zero-sequence component for generating the modulation signal; and in the PWM hybrid modulation process, by adjusting the values of zero-sequence concentration and phase offset in the unified zero-sequence component, the modulation signal can be continuously and smoothly switched between SVPWM modulation and DPWM modulation.
[0050] Understandably, in traditional PWM hybrid modulation, either SVPWM modulation or DPWM modulation is executed, meaning that traditional PWM hybrid modulation is simply switching between SVPWM and DPWM modulation. However, the modulation waveforms produced by these two modulation methods are significantly different. This means that when performing traditional PWM hybrid modulation, the switching between SVPWM and DPWM modulation will cause a step change in the duty cycle, meaning that the entire switching process will cause a sudden change in the modulation waveform.
[0051] In the technical solution of this application, the continuous zero-sequence component (first zero-sequence component) and the discontinuous zero-sequence component (second zero-sequence component) are unified according to the control factors (zero-sequence concentration and phase offset); thus, when performing PWM hybrid modulation, by controlling the value of the control factors, the adaptive switching between SVPWM modulation and DPWM modulation can be achieved, ensuring an adaptive trade-off between the low harmonic distortion of SVPWM modulation and the low loss of DPWM modulation during the modulation process; at the same time, in addition to SVPWM modulation and DPWM modulation, there is also a transition modulation stage in the entire switching process, thereby ensuring the waveform of the modulated wave is continuous and without duty cycle step, thus effectively avoiding current surges and harmonic jumps.
[0052] In this embodiment, the expression for the unified zero-order component u0(t) is:
[0053] .
[0054] Among them, u 0_cont (t) represents the first zero-order component, u 0_disc (t, δ) represents the second zero-sequence component with phase offset δ, used to push a phase reference to +1 or -1 in a selected phase interval, i.e., normalize relative to the carrier rising / falling edge; ρ represents the zero-sequence concentration.
[0055] It is understood that the zero-sequence concentration ρ and phase offset δ are the control factors for the unified zero-sequence component u0(t). In order to ensure the continuity of duty cycle change when performing PWM hybrid modulation in this application, the zero-sequence concentration ρ and phase offset δ can be specified as follows:
[0056] (1) Let the zero-order concentration ρ be a continuous function of time t and satisfy ρ∈[0,1]; when the zero-order concentration ρ smoothly increases from 0 to 1, as follows Figure 2As shown, taking zero-sequence concentration ρ as an example with values of 0, 0.5, and 1 respectively, the reference waveform is gradually introduced from completely continuous to a flat-top / flat-bottom shape, forming a controllable clamping window to achieve a seamless transition from continuous to discontinuous. It should be noted that when the zero-sequence concentration ρ is 0, the modulation method is SVPWM modulation; when the zero-sequence concentration ρ is 1, the modulation method is DPWM modulation; and when the zero-sequence concentration ρ is in the range (0, 1), the modulation method is transition modulation.
[0057] (2) The phase offset δ changes gradually with a set slope during the hybrid modulation switching process, and satisfies δ∈[0, 2π]; for example Figure 3 As shown, taking the A-phase reference waveform (Current A) as an example, by shifting the phase by phase offset δ, the clamping window can be moved arbitrarily along the power frequency cycle, thereby aligning the clamping window with the current peak and ensuring the zero-sequence component u 0_disc (t, δ) can push a phase reference to +1 or -1 within a selected phase interval.
[0058] (3) Zero-sequence component u 0_cont (t) and u 0_disc (t, δ) are both bounded continuous functions.
[0059] It is important to know that, based on the zero-order concentration ρ and phase shift δ, and the zero-order component u... 0_cont (t) and u 0_disc By defining (t, δ), the unified zero-order component u0(t) can be regarded as the zero-order component u 0_cont (t) and u 0_disc Affine combination of (t, δ) results in the unified zero-sequence component u0(t) remaining a continuous function. Therefore, the duty cycle implemented via carrier comparison can be considered a monotonic function of the unified zero-sequence component u0(t), and thus the duty cycle changes continuously with the zero-sequence concentration ρ and phase offset δ. This ensures that there are no duty cycle steps during the adjustment of the zero-sequence concentration ρ, and no duty cycle steps during the gradual change of the phase offset δ. The combined transformation maintains the continuous change of the average value of the output phase voltage in each carrier cycle, avoiding current surges.
[0060] For ease of understanding, the entire derivation process of the unified zero-order component u0(t) will be described in detail below.
[0061] Three-phase inverters typically generate the target modulation signal by superimposing the fundamental signal and the zero-sequence signal, thereby achieving the control objective. The three-phase fundamental reference signal is defined as follows:
[0062] .
[0063] in, , , This represents the three-phase fundamental reference voltage, M represents the reference voltage amplitude, and ω represents the angular frequency of the fundamental wave.
[0064] Traditional SVPWM modulation can be viewed as a zero-sequence implementation of symmetrically allocating zero vectors, while traditional DPWM modulation can be viewed as a zero-sequence implementation that pushes a phase to saturation in a certain interval.
[0065] For SVPWM modulation, the zero-sequence component is generally... The expression is:
[0066] .
[0067] .
[0068] in, Represents the maximum spatial vector. This represents the smallest spatial vector.
[0069] For DPWM modulation, the zero-sequence component is generally... The expression is:
[0070] When the maximum space vector When in a dominant position: .
[0071] When the minimum space vector When in a dominant position: .
[0072] When constructing the unified zero-order component u0(t), the first zero-order component u 0_cont (t) can be equivalent to the continuous zero-sequence component under SVPWM modulation. ; in discontinuous zero-order components In this process, the two dominant cases are switched by introducing a phase shift δ, thereby obtaining the second zero-sequence component u. 0_disc (t, δ). Then, by introducing the zero-order concentration ρ to unify the two zero-order components, we can obtain the required unified zero-order component u0(t).
[0073] Understandably, in a three-wire inverter, simultaneously superimposing the same zero-sequence component onto the three-phase reference only changes the comparison result (duty cycle allocation) of each phase relative to the carrier, without altering the line voltage. Therefore, after obtaining the unified zero-sequence component u0(t), superimposing it onto the three-phase reference signal yields the final modulation signal actually used for comparison to generate the duty cycle. The specific expression is:
[0074] .
[0075] in, , , This represents the three-phase voltage of the modulated wave after superimposing the unified zero-sequence component u0(t).
[0076] For example, if we want to clamp the upper arm of phase A within a certain time interval, i.e., execute DPWM modulation, the zero-sequence concentration ρ can be 1, thus unifying the zero-sequence components. This makes the A-phase modulated wave voltage (Phase A reference peak) Phase A does not undergo high-frequency switching within this interval, only commutating with the sector boundary. Similarly, if it is desired to clamp the lower arm of phase A, the unified zero-sequence component can be... This makes the A-phase modulated wave voltage (Phase A reference bottom). During the clamping process described above, the clamping window can be moved arbitrarily along the power frequency cycle by limiting the phase offset δ, so that the clamping window can be aligned with the current peak.
[0077] It should be noted that, as can be seen from the above analysis, the specific values of zero-sequence concentration ρ and phase offset δ are crucial to ensuring that PWM hybrid modulation can achieve continuous and smooth switching. There are various ways to determine the specific values of zero-sequence concentration ρ and phase offset δ, which will be described in detail below for ease of understanding.
[0078] Those skilled in the art should know that SVPWM modulation features low harmonic distortion and high loss, while DPWM modulation features high harmonic distortion and low loss; the purpose of PWM hybrid modulation is to complement the advantages of these two modulation methods. Therefore, in this embodiment, harmonic distortion and loss can be used as weighted indicators to construct a cost function J for zero-sequence concentration ρ and phase shift δ. The cost function J is used to measure the sum of harmonic distortion and loss under the current modulation method. Then, by performing multi-objective optimization on the cost function J with low harmonic distortion and low loss, the specific values of zero-sequence concentration ρ and phase shift δ under the current modulation scenario can be obtained. The specific expression of the cost function J is:
[0079] .
[0080] Where m represents the modulation index, which can be defined as: the reference voltage amplitude M and the DC bus voltage U. dc The ratio of half can be specifically expressed by the formula m=M / (U dc / 2) is represented as follows, where the modulation index m takes the value m∈[0,1]; Represents the power factor angle, with a value of ∈[-π / 2, π / 2]; This represents the total harmonic distortion (THD) value of the current. and These represent the switching loss value and the conduction loss value, respectively. thdw sw w cond These represent the corresponding weighting coefficients, and the specific values can be set according to the actual application model parameters.
[0081] It is understandable that the calculation of the zero-sequence concentration ρ and phase offset δ using the cost function J can be performed online by updating the values of zero-sequence concentration ρ and phase offset δ every few carrier cycles to minimize the cost function J. However, since the computational load of directly optimizing the cost function J online is large, it is difficult to implement in engineering applications with insufficient computing resources. Therefore, in this embodiment, the values of zero-sequence concentration ρ and phase offset δ can be designed to be lightweight.
[0082] Specifically, the lightweighting process for phase offset δ is as follows: based on the minimum value of the cost function J, the phase offset δ and the power factor angle are... Relationship: With +δ=0, and considering the data latency in practical engineering and the fixed phase error at the hardware level, the lightweight calculation formula for the phase offset δ is as follows:
[0083] .
[0084] Where ω represents angular frequency, T d This represents the equivalent delay time for sampling, calculation, and PWM update in practical engineering, where δ0 represents the empirical bias angle used to compensate for fixed phase errors at the hardware level; for the equivalent delay time T d The specific value of the empirical offset angle δ0 can be calibrated based on actual simulation / experiment. The specific acquisition process is well known to those skilled in the art, so it will not be described in detail here.
[0085] The lightweighting process for zero-order concentration ρ is as follows: A low-cost approximation is performed on the quadratic form of the cost function J; the derivative of the approximated cost function J based on zero-order concentration ρ is taken and set to zero to obtain the theoretical optimal solution for zero-order concentration ρ; based on the obtained theoretical optimal solution and combined with the modulation threshold used for modulation scene judgment, the lightweight calculation formula for zero-order concentration ρ is obtained as follows:
[0086] ;
[0087] Where m1 represents the lower limit of the modulation threshold at which DPWM modulation can begin favorably. When the modulation threshold m < m1, the loss reduction effect of DPWM modulation is insufficient to offset the resulting harmonic degradation, so the zero-sequence concentration ρ should be kept at 0, i.e., SVPWM modulation should be fully implemented. m2 represents the upper limit of the modulation threshold at which DPWM modulation should be enabled. When the modulation threshold m > m2, switching losses become the main issue, and the loss reduction effect of DPWM modulation can offset the resulting harmonic degradation. Therefore, the zero-sequence concentration ρ can be set to 1, i.e., DPWM modulation should be fully implemented. In the m1 < m < m2 stage, the modulated wave undergoes a smooth transition. q represents the steepness of the transition adjustment, and the specific value can be calibrated according to actual simulation / experiment. p represents the scaling index, used to amplify or reduce the power factor angle. The specific value of the effect can be calibrated based on actual simulation / experiment; ε represents the reserved value, used in the power factor angle. When =0, a certain DPWM modulation effect can still be retained, and the value of the retained value ε can be 0.1~.2; sat{·} represents the saturation function to avoid the zero-sequence concentration ρ from exceeding the range of [0,1] or to avoid the phase offset δ from exceeding the range of [0,2π].
[0088] To facilitate understanding, the detailed derivation of the lightweight formulas for zero-sequence concentration ρ and phase shift δ will be described below.
[0089] First, we analyze the power factor angle under SVPWM modulation and DPWM modulation. The relationship between the modulation index m and the current harmonics, switching losses and conduction losses.
[0090] (1) Current harmonics are affected by the power factor angle Relationship with modulation intensity m:
[0091] For an impedance (RL) load, the nth voltage harmonic V n The generated current harmonic I n The expression is:
[0092] (1).
[0093] In the formula, R represents the resistance of the load, L represents the inductive reactance of the load, and V1 and I1 represent the first voltage harmonic and current harmonic, i.e., the fundamental voltage and the fundamental current, respectively. This indicates the magnitude of the load impedance.
[0094] Transforming the above expression (1), we obtain the following expression:
[0095] (2).
[0096] From the above expression (2), it can be seen that the power factor angle The larger the absolute value, the smaller the current harmonics.
[0097] In the linear region of the SVPWM modulation wave, the total RMS (root mean square) of the high-frequency (carrier frequency and its harmonics) harmonic voltages can be approximated as being related to the DC bus voltage U. dc Proportional, while the fundamental voltage V1∝m·U dc Therefore:
[0098] (3).
[0099] In the formula, V h This represents the equivalent voltage after combining the main harmonic components on the carrier side according to RMS, K cp (m) represents the high-frequency harmonic function, which mainly depends on the modulation method, carrier ratio, etc., and is weakly correlated with the modulation index m. Empirically, K cp (m) can be approximated by a constant K. cp .
[0100] Based on the above expression, the current harmonic distortion under SVPWM modulation can be obtained. The expression is:
[0101] (4).
[0102] In the formula, G eq ( ) represents the combined equivalent gain of each harmonic current.
[0103] As can be seen from the above expression (4), under SVPWM modulation, the current harmonic distortion is... It is approximately inversely proportional to the modulation index m by 1 / m, and to the power factor angle. The absolute values of decrease. It should be noted that when the modulation index m is close to or greater than 1, SVPWM modulation will enter an overmodulation state, resulting in a significant deterioration in current harmonic distortion.
[0104] Since there are various specific modes of DPWM modulation, such as DPWMmax, DPWMmin, DPWM0~5, etc., and the basic principle of each DPWM modulation mode is the same, for ease of understanding, the following explanation will take DPWM1 modulation as an example.
[0105] Under DPWM1 modulation, due to the introduction of low-order distortion terms caused by clamping, and slightly higher high-frequency harmonics, the current harmonic distortion under DPWM modulation is... The expression can be rewritten as:
[0106] (5).
[0107] In the formula, r H Δ represents the high-frequency harmonic gain coefficient, ⊕ represents the RMS synthesis of the two types of distortion, β(m) represents the coefficient that decreases with modulation depth m, and Δ Indicates window misalignment, Δ =δ+ g(Δ Let g(Δ) represent the phase mismatch penalty function. ) in Δ The value is minimum at =0; w represents the set of high-frequency harmonics. n This represents the weight of the nth harmonic.
[0108] From the above expressions (4) and (5), it can be seen that the current harmonics and power factor angle The relationship is: as the power factor angle As the modulation index m increases, the current harmonic distortion under both SVPWM and DPWM modulation decreases, with the minimum current harmonic distortion occurring when the clamping window of DPWM modulation corresponds to its current peak value. The relationship between current harmonics and modulation index m is as follows: In the linear region of the SVPWM modulated wave, the current harmonic distortion of both SVPWM and DPWM modulation is inversely proportional to the modulation index m, and the current harmonic distortion of SVPWM modulation is smaller than that of DPWM modulation; however, as the modulation index m increases to near 1, the current harmonic distortion of SVPWM modulation deteriorates significantly, while the current harmonic distortion of DPWM modulation becomes superior, sometimes resulting in a situation where the current harmonic distortion of DPWM modulation is smaller than that of SVPWM modulation.
[0109] (2) Switching losses are affected by the power factor angle Relationship with modulation intensity m:
[0110] By approximating the single-cycle switching energy of the switching device near the operating current with a second approximation, we can obtain the following expression:
[0111] (6).
[0112] In the formula, i represents the operating current of the switch, and E on (i) represents the energy required for a single switch to be turned on, E off (i) represents the energy required for a single switch to turn off, α1 and α2 represent the primary and secondary coefficients corresponding to the switch being turned on, respectively, and β1 and β2 represent the primary and secondary coefficients corresponding to the switch being turned off, respectively.
[0113] We can define the equivalent number of switching operations per second (N) of all switching devices in the full-bridge of a three-phase inverter under SVPWM modulation. s Then the average values of the sinusoidal current and its squared term are respectively:
[0114] (7).
[0115] In the formula, Indicates the amplitude of the fundamental current. ;in, This indicates the magnitude of the load impedance.
[0116] Because the switching time under SVPWM modulation scans the electrical angle approximately uniformly within one revolution, it is essentially unaffected by the power factor angle. The influence of switching losses under SVPWM modulation The expression is as follows:
[0117] (8).
[0118] fundamental current amplitude Substituting the expression into the above expression (8), we can obtain the following expression:
[0119] (9).
[0120] In the formula, c1 and c2 represent the coefficients of the linear term and the squared term, respectively.
[0121] From the above expression (9), it can be seen that the switching loss under SVPWM modulation is The adjustment mechanism m exhibits a first + second growth, affecting the power factor angle. Basically insensitive.
[0122] Under DPWM1 modulation, the average number of switching operations is reduced to (1-κ)N. s Where κ represents the switching frequency reduction factor, the specific value of which can be determined by those skilled in the art based on their actual needs, with an ideal value of κ≈1 / 3. Meanwhile, under DPWM1 modulation, the on / off moments of the switching devices may mismatch with the peak current; this can be mitigated by setting a current weighting factor F(Δ). )≥1 indicates window misalignment Δ ==δ+ When the deviation from 0 occurs, the penalty for the switching timing of the switching device occurring in a larger current region is Δ. When =0, F(Δ) Take the minimum value; then the switching loss under DPWM1 modulation is... The expression is as follows:
[0123] (10).
[0124] In the formula, F1(Δ ) and F2(Δ ) represent the current-weighted penalty functions for the linear and square terms, respectively.
[0125] fundamental current amplitude Substituting the expression into the above expression (10), we can obtain the following expression:
[0126] (11).
[0127] As can be seen from the above expression, the switching loss of DPWM modulation increases with the modulation index m in a first + second order, and is significantly lower than that of SVPWM modulation; and the loss reduction advantage of DPWM modulation is greatest when the clamping region aligns the current peak.
[0128] (3) Conduction loss is affected by power factor angle Relationship with modulation intensity m:
[0129] There are various types of switches for inverter bridge arms, with the most common being IGBTs and MOSFETs. For ease of understanding, the following description will use IGBTs as an example.
[0130] A model architecture for the switching device and its corresponding anti-parallel diode is constructed using a constant voltage drop and a linear resistor. The specific expression is as follows:
[0131] (11).
[0132] In the formula, V CE (i) represents the on-state voltage drop of the switch, V F (i) represents the forward voltage drop of the anti-parallel diode, V CE0 V represents the zero current intercept. F0 The forward voltage drop intercept of the anti-parallel diode, r ce The differential resistance r of a switching device represents the on-state resistance. f This represents the differential resistance of the anti-parallel diode.
[0133] Based on the above expression (11), the average conduction loss P of a single-phase branch of the inverter can be obtained. cond for:
[0134] (12).
[0135] In the formula, i T i represents the on-state current of the switching device. D This represents the on-state current of the anti-parallel diode. This indicates a periodic average calculation, i.e. This represents the average on-state current of the switching device in a single cycle. This represents the average on-state current of the anti-parallel diode in a single cycle.
[0136] For a sinusoidal current, only the power factor angle is considered. The influence trend can be approximated using the following simple model:
[0137] (13).
[0138] Will Substituting the above expression (13) into the above expression (12), we can obtain the conduction loss under SVPWM modulation. The expression is as follows:
[0139] (14).
[0140] (15).
[0141] In the formula, x1 and x2 represent the coefficients of the linear term and the square term, respectively, and λ and μ both represent the distribution coefficients for the range of values from 0 to 1.
[0142] Under DPWM modulation, since a single device (IGBT or anti-parallel diode) is continuously turned on within the clamping region, it can be considered as adding the loss disturbance caused by the continuous conduction of a single device to the on-state loss of SVPWM modulation. The conduction loss under DPWM modulation The expression is as follows:
[0143] (16).
[0144] As can be seen from the above expression, under SVPWM modulation, the conduction loss increases linearly with the modulation index m, exhibiting a first-order + second-order increase, and with cos... Slow change, i.e., power factor angle Increase (inductive hysteresis), the conduction share of the anti-parallel diode increases, if V F0 >V CE0 If the voltage drop is too high, the conduction loss will increase slightly; if the voltage drop is close, the conduction loss will remain essentially unchanged. Under DPWM modulation, since the voltage drop difference between the anti-parallel diode and the switching device is very small, the conduction loss under DPWM modulation can be considered to be basically the same as that under SVPWM modulation.
[0145] (4) Make a low-order approximation of the cost function J:
[0146] From the expression of the unified zero-sequence component u0(t), it can be seen that the ratios of the continuous zero-sequence component and the discontinuous zero-sequence component are (1-ρ) and ρ, respectively.
[0147] Due to the total harmonic distortion of the current Since it is in the form of root mean square, a low-order approximation is made on its quadratic form. Based on the above expressions (4) and (5), the following expression can be obtained:
[0148] (17).
[0149] Simplifying the above expression (17), we get the following expression:
[0150] (18).
[0151] (19).
[0152] In the formula, A0(m, This indicates the total harmonic distortion (THD) value of the SVPWM modulation section. The contribution, A1(m, This represents the total harmonic distortion (THD) of the high-frequency component of the DPWM modulation relative to the current. The contribution of B(m, The value represents the total harmonic distortion of the current in the clamping portion of the DPWM modulation. . contributions.
[0153] The switching loss value can be obtained from the above expressions (9) and (11). The expression is as follows:
[0154] (20).
[0155] Simplifying the above expression (20), we get the following expression:
[0156] (twenty one).
[0157] (twenty two).
[0158] In the formula, C0(m, This indicates the switching loss value of the SVPWM modulation section. The contribution, C1(m, () indicates the switching loss value of the DPWM modulation section. The contribution of C1(m) to the reduction of losses, if C1(m, If ) > 0, it indicates that DPMW modulation affects the switching loss value. Reduce it.
[0159] The conduction loss value can be obtained from the above expressions (14) and (16). The expression is as follows:
[0160] (twenty three).
[0161] Simplifying the above expression (23), we get the following expression:
[0162] (twenty four).
[0163] (25).
[0164] In the formula, D0(m, The ) represents the conduction loss value of the SVPWM modulation section. The contribution, D1(m, The ) indicates the conduction loss value of the DPWM modulation section. . contributions.
[0165] (5) Lightweight formulas for solving zero-sequence concentration ρ and phase shift δ:
[0166] The lightweight formula for solving the phase shift δ is as follows: From the above expressions (18), (21) and (24), it can be seen that the phase shift δ is obtained through g(δ+ ), F1(δ+ ) and F2(δ+ The total harmonic distortion and switching loss of the current are affected, and both are within δ+ =Δ =0 takes the minimum value, therefore the target requirement for minimizing the cost function J for the limit offset δ is: δ+ =0, then the theoretical angle of the limit offset δ without considering delay, etc., is: δ=- .
[0167] However, in practical engineering, the delay time T for sampling, calculation, and PWM update needs to be considered. d And the offset angle δ0 of the fixed phase error at the hardware level, such as dead zone and filtering, can be used to derive a lightweight formula for the phase offset δ.
[0168] For the lightweight formula for solving the zero-order concentration ρ: with a fixed phase offset δ, from the above expressions (18), (21) and (24), we obtain an approximate expression for the cost function J:
[0169] (26).
[0170] In the formula, This indicates the total harmonic distortion of the current in the SVPWM modulation section. The contributions are approximately the same. This indicates the total harmonic distortion (THD) value of the current in the DPWM modulation section. The contributions are approximately the same. This indicates the switching loss value of the DPWM modulation section. The contribution to loss reduction is approximately the same. This indicates the conduction loss value of the DPWM modulation section. The contributions are approximately the same.
[0171] Differentiating the above expression (26) based on the zero-order concentration ρ and setting it to zero, we obtain the following expression:
[0172] (27).
[0173] Based on the above expression (27), the expression for the optimal solution ρ° of the zero-order concentration ρ can be obtained as follows:
[0174] (28).
[0175] Combining expressions (18), (21), (24), and (28), we can see that:
[0176] When the modulation index m increases Reduce Reduce Enlarge The value remains essentially unchanged, while ρ° increases. Therefore, the optimal solution ρ° can be obtained as the adjustment regime m increases monotonically. When the power factor angle... absolute value When it increases, Reduce Reduce Reduce Basically unchanged, and due to in When it approaches 0, right The influence of is further reduced, therefore, overall, the optimal solution ρ° decreases with . Monotonically increasing.
[0177] As should be known to those skilled in the art , , , The fitted curve is quite complex. Therefore, in order to calculate the optimal solution ρ°, a first-order Taylor approximation can be applied to the optimal solution ρ°. The specific expression is as follows:
[0178] (29).
[0179] In the formula, ρ0 represents the rated operating point (m0, The baseline optimal solution corresponding to point 0).
[0180] Separating the variables from the bivariate partial differential equation corresponding to expression (29), we obtain the following expression:
[0181] (30).
[0182] In the formula, s(m) and h( Both ) are variable functions; below, variable functions s(m) and h(m) will be constructed according to their physical meaning. ).
[0183] When the modulation index m satisfies the condition that m < m1, SVPWM modulation should be used exclusively. When the modulation index m satisfies the condition that m > m2, DPWM modulation should be used exclusively. When the modulation index m satisfies m1 < m < m2, the optimal solution ρ° monotonically increases with the modulation index m. The larger m is, the more necessary it is to use DPWM modulation. Therefore:
[0184] (31).
[0185] (32).
[0186] Finally, based on the specific value of the modulation degree m, and combined with the above expressions (31) and (32), the piecewise expression of the zero-order concentration degree ρ based on the range of values of the modulation degree m can be obtained.
[0187] It is important to understand that when performing the PWM hybrid modulation of this application, the zero-sequence concentration ρ and phase offset δ are approximate optimal solutions calculated using the aforementioned lightweight formula. This results in certain deviations in the zero-sequence concentration ρ and phase offset δ under specific actual operating conditions. Therefore, for some special operating conditions, in order to ensure the accuracy of PWM hybrid modulation, the zero-sequence concentration ρ and phase offset δ can be corrected without significantly increasing the computational load, thereby improving the accuracy of the optimal solutions for zero-sequence concentration ρ and phase offset δ. For ease of understanding, the specific correction process will be described in detail below.
[0188] In this embodiment, the zero-order concentration ρ and phase shift δ calculated by the lightweight formula are corrected by the cost function J. Both the zero-order concentration ρ and the phase shift δ are control factors, and the correction process is the same. Taking the correction process of one of the control factors as an example, the specific correction process is as follows: The two control factors are labeled as the first control factor and the second control factor, respectively. The values of the first control factor and the second control factor are calculated by the lightweight formula and substituted into the expression of the cost function J to calculate the first estimated value corresponding to the cost function J. Keeping the value of the first control factor unchanged, the following perturbation update process is performed on the second control factor: positive and negative perturbations are applied to the second control factor, and the first control factor and the second control factor after the perturbation are substituted into the cost function J to calculate the second estimated value. Based on the comparison between the first estimated value and the second estimated value of the cost function J, the second control factor is updated. The perturbation update process is continued according to the updated second control factor until the value of the second control factor obtained by multiple consecutive perturbation updates remains unchanged, and the correction of the second control factor is completed.
[0189] Specifically, the update expressions for zero-order concentration ρ and phase shift δ are as follows:
[0190] ;
[0191] in, Indicates regulatory factor, ={ρ, δ}; k+1 and k These represent the control factors in the (k+1)th and kth round perturbation update processes, respectively. The updated value, Δ k Indicates regulatory factor The disturbance amount; γ represents the improvement threshold value, used for noise reduction, with a typical value of (0.5%~1%)J. k J k J represents the first estimate of the cost function J during the k-th round of perturbation update. + and J - These represent the effects on the regulatory factors. The second estimate of the cost function J after applying positive and negative perturbations.
[0192] It is understandable that, since the online calculation of the cost function J is computationally intensive, in this embodiment, the zero-sequence concentration ρ and phase shift δ are corrected based on the estimated value of the cost function J. For ease of understanding, the specific correction process of the zero-sequence concentration ρ and phase shift δ will be described in detail below in conjunction with the calculation process of the estimated value of the cost function J.
[0193] During the initialization phase, the lightweight formulas for zero-sequence concentration ρ and phase offset δ are used to calculate the initial values ρ0 and δ0; when calculating the initial estimate J0 of the cost function J, the total harmonic distortion of the current is... The above expressions (4) and (5) can be used for approximate calculation to obtain the corresponding estimated value; switching loss value The estimated value can be obtained by approximating the value using the above expressions (9) and (11); conduction loss value The estimated value can be obtained by approximating the values using the above expressions (14) to (16). The total harmonic distortion value of the current is then obtained. Switching loss value and conduction loss value After obtaining the estimated value, the initial estimated value J0 of the cost function J can be obtained through the corresponding weight coefficients.
[0194] First, perform a perturbation update correction on the phase offset δ, while keeping the value of the zero-order concentration ρ unchanged during the process.
[0195] Perform the first round of perturbation update process: the first estimated value of the cost function J is J1=J(ρ0, δ0); after applying a perturbation ±Δδ1 to the current phase offset δ1=δ0, the second estimated value J can be calculated using the above approximate expression of the cost function J. δ+ =J(ρ0, δ1+Δδ1) and J δ- =J(ρ0, δ1-Δδ1). The first estimate J1 and the second estimate J are obtained. δ+ and J δ- Afterwards, if J δ+ +γ<min(J1,J δ- The phase offset δ is updated to δ2 = δ1 + Δδ1; if J δ- +γ<min(J1,J δ+ If the phase offset δ is updated to δ2=δ1-Δδ1, then δ2=δ1 is updated; otherwise, δ2=δ1 is kept.
[0196] Execute the k-th round of perturbation update process: the first estimate of the cost function J. k =J(ρ0,δ k ); for the current phase offset δ k Apply perturbation ±Δδ k Then, using the above approximate expression for the cost function J, the second estimated value J can be calculated. δ+ =J(ρ0,δ k +Δδ k ) and J δ- =J(ρ0,δ k -Δδ k). After obtaining the first estimate J k Second estimate J δ+ and J δ- Afterwards, if J δ+ +γ<min(J k J δ- The phase offset δ is updated to δ k+1 =δ k +Δδ k If J δ- +γ<min(J k J δ+ The phase offset δ is updated to δ k+1 =δ k -Δδ k Otherwise, keep δ k+1 =δ k .
[0197] If the phase offset δ remains unchanged during N consecutive perturbation updates, it indicates that the correction of the limit offset δ is complete. The specific value of N can be selected according to the actual needs of those skilled in the art; for example, N can be 5.
[0198] After correcting the limit offset δ, the correction value δ* of the limit offset δ can be fixed, and then a perturbation update correction can be performed on the zero-order concentration ρ.
[0199] Perform the first round of perturbation update process: the first estimate of the cost function J is J1=J(ρ0, δ*); after applying a perturbation ±Δρ1 to the current zero-order concentration ρ1=ρ0, the second estimate J can be calculated using the above approximate expression of the cost function J. ρ+ =J(ρ1+Δρ1,δ*) and J ρ- =J(ρ1-Δρ1, δ*). This is used to obtain the first estimate J1 and the second estimate J. ρ+ and J ρ- Afterwards, if J ρ+ +γ<min(J1,J ρ- ), update the zero-order concentration ρ to ρ2=ρ1+Δρ1; if J ρ- +γ<min(J1,J ρ+ If the zero-order concentration ρ is updated to ρ2=ρ1-Δρ1, then ρ2=ρ1 is maintained.
[0200] Execute the k-th round of perturbation update process: the first estimate of the cost function J. k =J(ρ k ,δ*); for the current zero-order concentration ρ k Apply perturbation ±Δρ kThen, using the above approximate expression for the cost function J, the second estimated value J can be calculated. ρ+ =J(ρ k +Δρ k ,δ*) and J ρ- =J(ρ k -Δρ k ,δ*). After obtaining the first estimate J k Second estimate J ρ+ and J ρ- Afterwards, if J ρ+ +γ<min(J k J ρ- The zero-order concentration ρ is updated to ρ k+1 =ρ k +Δρ k If J δ- +γ<min(J k J ρ+ The zero-order concentration ρ is updated to ρ k+1 =ρ k -Δρ k Otherwise, keep ρ k+1 =ρ k .
[0201] If the zero-order concentration ρ remains unchanged during N consecutive perturbation updates, it indicates that the correction of the zero-order concentration ρ is complete.
[0202] The basic principles, main features, and advantages of this application have been described above. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this application. Various changes and modifications can be made to this application without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection claimed by this application is defined by the appended claims and their equivalents.
Claims
1. A PWM modulation method based on adaptive zero sequence injection, characterized in that, Includes the following steps: Obtain the first zero-sequence component required for SVPWM modulation; The second zero-sequence component required for DPWM modulation is obtained, and a phase offset is set on the second zero-sequence component so that the clamping window of DPWM modulation is shifted within the power frequency cycle to align with the current peak region. The first zero-sequence component and the second zero-sequence component with phase shift are superimposed by the zero-sequence concentration to obtain the unified zero-sequence component used to generate the modulation signal. In the hybrid modulation process of PWM, by adjusting the values of zero-sequence concentration and phase offset in the unified zero-sequence component, the modulation signal can be continuously and smoothly switched between SVPWM modulation and DPWM modulation. The expression for the unified zero-order component u0(t) is: ; In the formula, the zero-order concentration ρ is a continuous function of time t and satisfies ρ∈[0,1]; the phase offset δ changes gradually with a set slope during the hybrid modulation switching process and satisfies δ∈[0,2π]; u 0_cont (t) and u 0_disc (t, δ) represent the first zero-order component and the second zero-order component, respectively, both of which are bounded continuous functions.
2. The adaptive zero sequence injection based PWM modulation method as claimed in claim 1, wherein, A cost function J is constructed based on the weighted sum of resonance and loss indices, relating zero-order concentration ρ and phase shift δ. Multi-objective optimization of the cost function J is then performed to achieve low harmonics and low loss, yielding the target values for zero-order concentration ρ and phase shift δ. The expression for the cost function J is: ; wherein m represents a modulation degree, represents a power factor angle, represents a total harmonic distortion value of current, and respectively represent a switching loss value and a conduction loss value, w thd , w sw , w cond respectively represent corresponding weight coefficients.
3. The adaptive zero sequence injection based PWM modulation method as claimed in claim 2, wherein, The lightweighting process of phase offset δ is as follows: based on the minimum value of cost function J, the phase offset δ and power factor angle are... Relationship: +δ=0, combining the data delay in engineering practice and the fixed phase error at the hardware level, a lightweight calculation formula for phase offset δ is obtained; The lightweighting process of zero-order concentration ρ is as follows: a low-cost approximation is performed on the quadratic form of the cost function J; The cost function J, which completes the low-price approximation, is differentiated based on the zero-order concentration ρ, and the derivative is set to zero to obtain the theoretical optimal solution for the zero-order concentration ρ. Based on the obtained theoretical optimal solution, and combined with the modulation threshold used for modulation scene judgment, a lightweight calculation formula for zero-order concentration ρ is obtained.
4. The adaptive zero-sequence injection based PWM modulation method of claim 3, wherein, The lightweight calculation formulas for zero-order concentration ρ and phase shift δ are as follows: ; ; Where m represents the modulation index, m1 represents the lower limit of the favorable modulation index threshold for starting DPWM modulation, m2 represents the upper limit of the modulation index threshold that DPWM modulation should enable, q represents the steepness of the adjustment transition, sat{·} represents the saturation function, ε represents the reserved value, and p represents the scaling exponent. T represents the power factor angle, ω represents the angular frequency, and T represents the angular frequency. d δ0 represents the equivalent delay time for sampling, calculation, and PWM update in actual engineering practice, and represents the empirical bias angle used to compensate for fixed phase errors at the hardware level.
5. The PWM modulation method based on adaptive zero-sequence injection as described in claim 3, characterized in that, The zero-order concentration ρ and phase shift δ calculated by the lightweight formula are corrected by the cost function J; both the zero-order concentration ρ and the phase shift δ are control factors, and the correction process is the same. The modification process for one of the regulatory factors is as follows: The two regulatory factors are labeled as the first regulatory factor and the second regulatory factor, respectively. The values of the first regulatory factor and the second regulatory factor are calculated using the lightweight formula and substituted into the expression of the cost function J to calculate the first estimated value of the cost function J. Keeping the value of the first control factor unchanged, the second control factor is updated by the following perturbation process: positive and negative perturbations are applied to the second control factor, and the first control factor and the perturbated second control factor are substituted into the cost function J to calculate the second estimate. The second control factor is updated based on the comparison between the first and second estimates of the cost function J. The perturbation update process continues based on the updated second regulatory factor until the value of the second regulatory factor obtained from multiple consecutive perturbation updates remains unchanged, at which point the correction of the second regulatory factor is completed.
6. The adaptive zero-sequence injection based PWM modulation method of claim 5, wherein, The update expressions for zero-order concentration ρ and phase shift δ are as follows: ; in, Indicates regulatory factor, ={ρ, δ}; and These represent the control factors in the (k+1)th and kth round perturbation update processes, respectively. The updated value, Indicates regulatory factor The disturbance amount, γ represents the improvement threshold, J k This represents the first estimate of the cost function J during the k-th round of perturbation update. and These represent the effects on the regulatory factors. The second estimate of the cost function J after applying positive and negative perturbations.
7. The adaptive zero-sequence injection based PWM modulation method of claim 6, wherein, In the cost function J, the total harmonic distortion of the current Including current harmonic distortion under SVPWM modulation and current harmonic distortion under DPWM modulation ; Based on current harmonic distortion and modulation index m and power factor angle The relationship between the initial estimate of the cost function J and the total harmonic distortion of the current is used to calculate the total harmonic distortion. The approximate calculation expression is as follows: ; ; ; Among them, K cp G represents the high-frequency harmonic constant. eq ( ) represents the combined equivalent gain of each harmonic current, r H denoted by , where ⊕ represents the RMS summation of the two types of distortion, and β(m) represents the coefficient that decreases with modulation depth m. Indicates window misalignment, g( ) represents the phase mismatch penalty function. w represents the set of high-frequency harmonics. n This represents the weight of the nth harmonic.
8. The adaptive zero-sequence injection based PWM modulation method of claim 6, wherein, In the cost function J, the switching loss including the switching loss under SVPWM modulation and the switching loss under DPWM modulation ; based on the relationship between the switching loss and the modulation degree m and the power factor angle , the approximate calculation expression of the switching loss used for the initial estimation value calculation of the cost function J is as follows: ; ; ; Where c1 and c2 represent the coefficients of the linear term and the squared term, respectively. Indicates window misalignment, κ represents the reduction factor for the number of switches, F1( ) and F2 ( N represents the current-weighted penalty function for the linear term and the square term, respectively. s U represents the total number of switching operations per second, α1 and α2 represent the primary and secondary coefficients corresponding to the switch being turned on, respectively, and β1 and β2 represent the primary and secondary coefficients corresponding to the switch being turned off, respectively. dc Indicates the DC bus voltage. This indicates the magnitude of the load impedance.
9. The adaptive zero-sequence injection based PWM modulation method of claim 6, wherein, In the cost function J, the conduction loss Including conduction loss under SVPWM modulation and conduction loss under DPWM modulation Based on conduction loss, modulation index m, and power factor angle The relationship is used to calculate the switching loss of the initial estimate of the cost function J. The approximate calculation expression is as follows: ; ; ; Where x1 and x2 represent the coefficients of the linear and squared terms, respectively, and λ and μ both represent the distribution coefficients. U represents the loss disturbance of a single device continuously conducting. dc Indicates the DC bus voltage. V represents the magnitude of the load impedance. CE0 V represents the zero current intercept. F0 The forward voltage drop intercept of the anti-parallel diode, r ce The differential resistance r of a switching device represents the on-state resistance. f This represents the differential resistance of the anti-parallel diode.
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