A dynamic error vector magnitude boost bias circuit

Abstract

The application relates to the technical field of radio frequency chip power amplifiers, in particular to a dynamic error vector magnitude enhancement bias circuit structure. The structure comprises an output voltage adjusting circuit, a second-order thermal feedback circuit and a linearization circuit. By adjusting the resistance parameters of the resistors in the output voltage adjusting circuit, the reference voltage, the output voltage and the different temperature slope output voltage can be adjusted. On this basis, the first transistor and the fourth transistor adjust the edge spacing with the RF power tube in the layout, which is used for sensing the temperature change of the RF power tube, thereby effectively suppressing the gain fluctuation of the RF power tube. By adjusting the resistance parameters of the resistors in the second-order thermal feedback network, the thermal feedback capability can be flexibly enhanced or weakened. Based on the multidimensional control mechanism, the dynamic error vector magnitude can be significantly improved.

Description

Technical Field

[0001] This application relates to the field of radio frequency chip power amplifier technology, and more specifically, to a dynamic error vector amplitude enhancement bias circuit structure. Background Technology

[0002] Dynamic error vector magnitude (DEVM) is one of the core technical indicators for evaluating the linearity of a power amplifier. Its core function is to quantify the signal transmission error generated during the dynamic on-off operation of the power amplifier. In the field of wireless communication, especially in time-division duplex communication systems such as WiFi, power amplifiers need to adapt to the burst transmission requirements of data packets and are usually in a dynamic operating mode with frequent on-off cycles. DEVM can accurately characterize the signal fidelity of the power amplifier during burst transmission in this dynamic mode, and its performance directly determines the transmission reliability of the communication system.

[0003] In practical engineering applications, the switching operation of power transistors in power amplifiers causes their temperature to fluctuate dynamically over time. Since the gain characteristics of transistors are strongly correlated with temperature, dynamic temperature changes directly induce gain fluctuations in the power transistors. These gain fluctuations degrade the amplitude-phase consistency of RF signals, leading to a deterioration in DEVM (Digital Emission Monitoring) performance and ultimately severely reducing signal transmission reliability. In applications with stringent signal quality requirements, precise control of power transistor gain fluctuations is essential. Therefore, the "temperature-gain-DEVM" cascading degradation effect caused by temperature changes has become a key technical bottleneck restricting the performance improvement of high-speed wireless communication systems, urgently requiring targeted technical solutions. Summary of the Invention

[0004] This application aims to address at least one of the technical problems existing in the prior art or related technologies.

[0005] Therefore, the purpose of this application is to propose a dynamic error vector amplitude enhancement bias circuit.

[0006] This application provides a dynamic error vector amplitude enhancement bias circuit. It includes: an output voltage regulation circuit, a second-order thermal feedback circuit, and a linearization circuit.

[0007] The RF input terminal is connected to one end of the first capacitor, and the other end is connected to the base of the RF power transistor and the input terminal of the linearization circuit. The output terminal of the linearization circuit is connected to the input terminal of the second-order thermal feedback circuit. The output terminal of the second-order thermal feedback circuit is connected to the output voltage regulation circuit. The collector of the RF power transistor is connected to the first end of the second capacitor, and the second end of the second capacitor is connected to the RF output terminal.

[0008] Furthermore, the linearization circuit includes a first transistor, a first resistor, and a third capacitor, wherein the base of the first transistor is connected to the first terminal of the third capacitor and the first terminal of the first resistor, the emitter of the first transistor is connected to the base of the RF power transistor, the collector of the first transistor is connected to the first terminal of the fourth resistor and the first terminal of the fifth resistor, the second terminal of the first resistor is connected to the first terminal of the third resistor of the output voltage regulation circuit, and the second terminal of the third capacitor is grounded.

[0009] The second-order thermal feedback circuit includes a second transistor, a second resistor, a fourth resistor, and a sixth resistor. The base of the second transistor is connected to the first end of the second resistor, the collector of the second transistor is connected to the second end of the fourth resistor, and the emitter of the second transistor is connected to the first end of the sixth resistor.

[0010] The output voltage regulation circuit includes a third transistor, a fourth transistor, a first diode, a third resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The base of the third transistor is connected to the first terminal of the third resistor, the collector of the third transistor is connected to the second terminal of the fifth resistor, and the emitter of the third transistor is connected to the first terminal of the seventh resistor and the second terminal of the sixth resistor. The base of the fourth transistor is connected to the second terminal of the seventh resistor, the emitter of the fourth transistor is grounded, the collector of the fourth transistor is connected to the first terminal of the first diode and the first terminal of the ninth resistor, the second terminal of the first diode is connected to the first terminal of the eighth resistor and the second terminal of the third resistor, and the second terminal of the second resistor is connected to the second terminal of the first resistor. The second terminals of the eighth resistor and the second terminal of the ninth resistor are connected to the external power supply voltage.

[0011] Furthermore, by simultaneously adjusting the resistance values ​​of the fourth resistor, the first resistor, and the sixth resistor, the thermal feedback capability of the second-order thermal feedback circuit can be controlled.

[0012] Furthermore, the resistance values ​​of the third, seventh, eighth, and ninth resistors are adjusted simultaneously, and the reference voltages of the first and second resistors are adjusted accordingly.

[0013] Furthermore, by simultaneously adjusting the resistance values ​​of the eighth and ninth resistors, different output voltages can be obtained.

[0014] Furthermore, by simultaneously adjusting the resistance values ​​of the third and seventh resistors, the temperature slope of the output voltage can be adjusted.

[0015] Furthermore, the first and fourth transistors are arranged in the layout with their edge spacing relative to the RF power transistor to sense temperature changes in the RF power transistor.

[0016] The beneficial effects of this application include at least the following advantages: By adjusting the resistance parameters of the third, seventh, eighth, and ninth resistors, precise adjustment of the reference voltages of the first and second resistors can be achieved. Simultaneously, by adjusting the resistance values ​​of the eighth and ninth resistors, different output voltage specifications can be flexibly obtained. Furthermore, by adjusting the resistance parameters of the third and seventh resistors, output voltage regulation with different temperature slopes can be achieved based on the aforementioned output voltage. By adjusting the distance between the first and fourth transistors and the RF power transistor in the layout, temperature changes in the RF power transistor can be sensed. These temperature changes cause changes in the threshold voltages of the first and fourth transistors, which are then fed back to the output voltage regulation circuit in real time, achieving dynamic response and adaptive compensation to temperature fluctuations. More importantly, in this application, the fourth, second, and sixth resistors, together with the second transistor, constitute a highly efficient second-order thermal feedback network. By adjusting the resistance parameters of the fourth, second, and sixth resistors, the thermal feedback intensity of the second-order thermal feedback network can be flexibly enhanced or weakened, providing a new adjustment dimension for precise control of circuit performance and significantly improving the circuit's adaptability and optimization space.

[0017] Additional aspects and advantages of this application will become apparent from the description which follows, or may be learned by practice of this application. Attached Figure Description

[0018] Figure 1 A schematic diagram of a dynamic error vector amplitude enhancement bias circuit structure according to this application is shown;

[0019] Figure 2 The normalized gain response curve of the dynamic error vector amplitude enhancement bias circuit of this application is shown when the output power is 0dBm.

[0020] Figure 3 The normalized gain response curve of the dynamic error vector amplitude enhancement bias circuit of this application is shown when the output power is 28dBm.

[0021] Figure 4 The normalized gain response curve of the dynamic error vector amplitude enhancement bias circuit of this application is shown when the output power is 33dBm. Detailed Implementation

[0022] To better understand the above-mentioned objectives, features, and advantages of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0023] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of this application is not limited to the specific embodiments disclosed below.

[0024] Figure 1 This application illustrates a dynamic error vector amplitude enhancement bias circuit, comprising: an output voltage regulation circuit, a second-order thermal feedback circuit, and a linearization circuit;

[0025] The RF input terminal is connected to the first terminal of the first capacitor, and the other terminal is connected to the base of the RF power transistor and the input terminal of the linearization circuit. The output terminal of the linearization circuit is connected to the input terminal of the second-order thermal feedback circuit, and the output terminal of the second-order thermal feedback circuit is connected to the output voltage regulation circuit. The collector of the RF power transistor is connected to the first terminal of the second capacitor, and the second terminal of the second capacitor is connected to the RF output terminal.

[0026] The linearization circuit includes a first transistor, a first resistor, and a third capacitor. The base of the first transistor is connected to the first terminal of the third capacitor and the first resistor. The emitter of the first transistor is connected to the base of the RF power transistor. The collector of the first transistor is connected to the first terminals of the fourth and fifth resistors. The second terminal of the first resistor is connected to the first terminal of the third resistor. The second terminal of the third capacitor is grounded.

[0027] The second-order thermal feedback circuit includes a second transistor, a second resistor, a fourth resistor, and a sixth resistor. The base of the second transistor is connected to the first terminal of the second resistor, the collector of the second transistor is connected to the second terminal of the fourth resistor, and the emitter of the second transistor is connected to the first terminal of the sixth resistor. The fourth, second, and sixth resistors, together with the second transistor, form a second-order thermal feedback network. By adjusting the resistance values ​​of the fourth, first, and sixth resistors, the thermal feedback capability of the transistor in the second-order thermal feedback circuit can be flexibly controlled. Specifically, increasing these three resistors enhances the thermal feedback capability, while decreasing them weakens it. This provides a completely new adjustment dimension for circuit performance optimization.

[0028] The output voltage regulation circuit includes a third transistor, a fourth transistor, a first diode, a third resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The base of the third transistor is connected to the first terminal of the third resistor, the collector of the third transistor is connected to the second terminal of the fifth resistor, and the emitter of the third transistor is connected to the first terminal of the seventh resistor and the second terminal of the sixth resistor. The base of the fourth transistor is connected to the second terminal of the seventh resistor, the emitter of the fourth transistor is grounded, and the collector of the fourth transistor is connected to the first terminal of the first diode and the first terminal of the ninth resistor. The second terminal of the first diode is connected to the first terminal of the eighth resistor, the second terminal of the third resistor, the second terminal of the second resistor, and the second terminal of the first resistor. The second terminals of the eighth resistor and the second terminal of the ninth resistor are connected to an external power supply voltage. The fifth, third, seventh, eighth, and ninth resistors, along with the third transistor, the first diode, and the fourth transistor, together form a reference voltage source supplied to the first and second resistors. By setting the resistance values ​​of the third, seventh, eighth, and ninth resistors, the reference voltages of the first and second resistors can be adjusted. Adjusting the resistance values ​​of the eighth and ninth resistors allows for flexible acquisition of different output voltages. Furthermore, by adjusting the resistance values ​​of the third and seventh resistors, output voltage regulation with different temperature slopes can be achieved.

[0029] In this circuit, the first and fourth transistors are part of a temperature regulation circuit. When the RF power transistor experiences high power input, its temperature rises. The first and fourth transistors can sense this temperature change by adjusting their edge spacing relative to the RF power transistor in the layout. Consequently, the power transistor drives the first and fourth transistors to heat up synchronously. As the temperatures of the first and fourth transistors increase, their threshold voltages decrease, thereby increasing the injected current in the main circuit and ultimately achieving precise suppression of gain changes in the RF power transistor.

[0030] To clearly illustrate the technical advantages and practical application effects of this application, Figures 2-4 specifically demonstrate the dynamic adjustment performance of the bias circuit of this application to changes in the gain of the RF power transistor. This set of experimental data accurately presents the gain stability performance under different output power conditions, where see [reference needed]. Figure 2 At 0dBm output power, the gain fluctuation of the RF power transistor is strictly controlled within 0.1dB; see [link / reference]. Figure 3 At an output power of 22dBm, the gain fluctuation remains within an extremely small range of 0.1dB; see [link / reference]. Figure 4 Even in high-output-power scenarios of 33 dBm, the gain fluctuation is only within 0.2 dB.

[0031] The above experimental results fully demonstrate that the present application exhibits excellent dynamic adjustment performance for the RF power transistor gain. Especially under harsh operating conditions with continuously increasing input power, the circuit achieves precise suppression of gain fluctuations, with gain fluctuations not exceeding 0.2 dB within a 10 ms dynamic response time. Therefore, it can be seen that the present application can significantly improve temperature-induced RF power transistor gain fluctuations, which greatly contributes to improving the dynamic error vector amplitude.

[0032] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A dynamic error vector amplitude enhancement bias circuit, characterized in that, include: Output voltage regulation circuit, second-order thermal feedback circuit, and linearization circuit. The RF input terminal is connected to one end of the first capacitor, and the other end is connected to the base of the RF power transistor and the input terminal of the linearization circuit. The output terminal of the linearization circuit is connected to the input terminal of the second-order thermal feedback circuit. The output terminal of the second-order thermal feedback circuit is connected to the output voltage regulation circuit. The collector of the RF power transistor is connected to the first end of the second capacitor, and the second end of the second capacitor is connected to the RF output terminal. The linearization circuit includes a first transistor, a first resistor, and a third capacitor. The base of the first transistor is connected to the first terminal of the third capacitor and the first terminal of the first resistor. The emitter of the first transistor is connected to the base of the RF power transistor. The collector of the first transistor is connected to the first terminal of the fourth resistor and the first terminal of the fifth resistor. The second terminal of the first resistor is connected to the first terminal of the third resistor of the output voltage regulation circuit. The second terminal of the third capacitor is grounded. The second-order thermal feedback circuit includes a second transistor, a second resistor, a fourth resistor, and a sixth resistor. The base of the second transistor is connected to the first end of the second resistor, the collector of the second transistor is connected to the second end of the fourth resistor, and the emitter of the second transistor is connected to the first end of the sixth resistor. The output voltage regulation circuit includes a third transistor, a fourth transistor, a first diode, a third resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The base of the third transistor is connected to the first terminal of the third resistor, the collector of the third transistor is connected to the second terminal of the fifth resistor, and the emitter of the third transistor is connected to the first terminal of the seventh resistor and the second terminal of the sixth resistor. The base of the fourth transistor is connected to the second terminal of the seventh resistor, the emitter of the fourth transistor is grounded, the collector of the fourth transistor is connected to the first terminal of the first diode and the first terminal of the ninth resistor, the second terminal of the first diode is connected to the first terminal of the eighth resistor and the second terminal of the third resistor, the second terminal of the second resistor and the second terminal of the first resistor, and the second terminals of the eighth resistor and the ninth resistor are connected to the external power supply voltage.

2. The dynamic error vector amplitude enhancement bias circuit according to claim 1, characterized in that, Simultaneously adjust the resistance values ​​of the fourth, first, and sixth resistors to regulate the thermal feedback capability of the second-order thermal feedback circuit.

3. The dynamic error vector amplitude enhancement bias circuit according to claim 1, characterized in that, Simultaneously adjust the resistance values ​​of the third, seventh, eighth, and ninth resistors, and adjust the reference voltage of the first and second resistors.

4. The dynamic error vector amplitude enhancement bias circuit according to claim 1, characterized in that, By simultaneously adjusting the resistance values ​​of the eighth and ninth resistors, different output voltages can be obtained.

5. The dynamic error vector amplitude enhancement bias circuit according to claim 1, characterized in that, Simultaneously adjust the resistance values ​​of the third and seventh resistors to regulate the temperature slope of the output voltage.

6. The dynamic error vector amplitude enhancement bias circuit according to claim 1, characterized in that, The first and fourth transistors are arranged in the layout with their edge spacing relative to the RF power transistor to sense temperature changes in the RF power transistor.

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