Heat dissipation analysis and optimization method of IGBT (Insulated Gate Bipolar Translator) module
By establishing a thermal resistance network and a Cauer-type thermal impedance model for IGBT modules, and combining this with finite element simulation, the problems of not considering the influence of instantaneous peak junction temperature and inaccurate thermal resistance models in existing technologies have been solved. This has enabled precise heat dissipation analysis and optimization of IGBT modules, improving design efficiency and product reliability.
Patent Information
- Application Number
- CN202511587154.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-03
- Publication Date
- 2026-01-30
AI Technical Summary
Existing thermal analysis methods for IGBT modules fail to adequately consider the impact of instantaneous peak junction temperature on device lifespan. The thermal resistance model does not correspond to the actual physical packaging level, resulting in long design cycles and high costs, and a lack of systematic optimization mechanisms.
By establishing a thermal resistance network model and a Cauer-type thermal impedance model for the IGBT module, and combining them with finite element simulation algorithms, the temperature distribution field is accurately calculated. When the set parameters are not met, a heat dissipation optimization strategy is generated to achieve a closed-loop control process.
Accurately predict steady-state temperature and instantaneous junction temperature fluctuations, clearly demonstrate the heat conduction process, quickly identify heat dissipation bottlenecks, and improve design efficiency and product reliability.
Smart Images

Figure CN121435889A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of heat dissipation analysis, and particularly relates to a heat dissipation analysis and optimization method for an IGBT module. BACKGROUND
[0002] An insulated gate bipolar transistor (IGBT) module is a core power switching device in modern power electronic equipment, and its reliability directly affects the performance and service life of key equipment such as converters and inverters. The IGBT module generates significant power loss during operation, which is dissipated in the form of heat energy, causing the chip junction temperature to rise. When the junction temperature exceeds the limit temperature allowed by the semiconductor material, or when it works at high temperature for a long time, it will cause the performance degradation of the device, the aging of the material, and even permanent damage. Therefore, accurate heat dissipation analysis and effective thermal management scheme are crucial to ensure the long-term stable operation of the IGBT module.
[0003] At present, the existing IGBT module heat dissipation analysis method has the following technical defects:
[0004] Firstly, most of the existing technologies only focus on steady-state thermal resistance analysis, and it is difficult to fully consider the serious impact of transient peak junction temperature generated during switching process on device life; or only a simple thermal resistance model is established, lacking the ability to uniformly model the internal transient thermal characteristics of the module and the external heat dissipation system.
[0005] Secondly, although the Foster thermal network model widely used in the existing technology is convenient for mathematical calculation, its equivalent RC parameters have no corresponding relationship with the actual physical packaging levels of the module, and it is difficult to accurately reflect the heat conduction process in each structure layer inside the module, limiting the engineering application value of the model.
[0006] Finally, the existing "design-simulation-verification" process is an open-loop process, and when the heat dissipation performance does not meet the requirements, it mainly relies on the experience of engineers to improve by trial and error, lacking a systematic optimization mechanism based on models and data driving, resulting in a long design cycle and high development cost. SUMMARY
[0007] The present application aims to provide a heat dissipation analysis and optimization method for an IGBT module to solve the problems in the prior art. The technical problems to be solved by the present application are solved by the following technical solutions.
[0008] The present application provides a heat dissipation analysis and optimization method for an IGBT module, which comprises:
[0009] Obtaining the electrical parameters and working conditions of the IGBT module, and calculating the total power loss of the IGBT module during operation based on the electrical parameters and working conditions;
[0010] Based on the total power loss and the physical structure of the IGBT module, a thermal resistance network model of the semiconductor junction region and the cooling environment is established, and a Cauer-type thermal impedance model based on dynamic characteristics is constructed.
[0011] The total power loss is input into the thermal resistance network model and the Cauer type thermal impedance model, and the finite element simulation algorithm is called to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0012] When the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters, the heat dissipation bottleneck is located and a heat dissipation optimization strategy for controlling the heat sink fins and flow channels is generated.
[0013] The heat dissipation optimization strategy is executed, and the thermal resistance network model and Cauer-type thermal impedance model after the heat dissipation optimization strategy is executed are updated to update the temperature distribution field and the total equivalent thermal resistance.
[0014] In one embodiment, obtaining the electrical parameters and operating conditions of the IGBT module, and calculating the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions, includes:
[0015] The on-state loss and switching loss of the IGBT chip, as well as the on-state loss and turn-off loss of the freewheeling diode chip, are obtained. The on-state loss and switching loss of the IGBT chip, as well as the on-state loss and turn-off loss of the freewheeling diode chip, are summed to obtain the total power loss.
[0016] Wherein, the conduction loss of the IGBT chip is the power loss generated by the IGBT chip in the on state based on the conduction current and on-state resistance, and the switching loss is the power loss generated by the IGBT chip in the voltage-current overlap region when switching states; the conduction loss of the freewheeling diode chip is the power loss generated by the freewheeling diode chip in the on state based on the forward current and on-state resistance, and the turn-off loss is the power loss generated by the freewheeling diode chip in the turn-off state based on the reverse recovery characteristic.
[0017] In one embodiment, the establishment of a thermal resistance network model of the semiconductor junction region and cooling environment based on the total power loss and the physical structure of the IGBT module, and the construction of a Cauer-type thermal impedance model based on dynamic characteristics, include:
[0018] The junction-to-case thermal resistance of the IGBT chip junction region to the housing, the contact thermal resistance of the housing to the heat sink mounting surface, and the thermal resistance of the heat sink to the cooling environment are obtained. Based on the junction-to-case thermal resistance of the IGBT chip junction region to the housing, the contact thermal resistance of the housing to the heat sink mounting surface, and the thermal resistance of the heat sink to the cooling environment, a one-dimensional equivalent thermal resistance path from the IGBT chip junction region to the cooling environment is generated, and a thermal resistance network model is constructed according to the one-dimensional equivalent thermal resistance path.
[0019] The thermal resistance from the radiator to the cooling environment is divided into the solid conductive thermal resistance of the radiator and the convective heat transfer thermal resistance between the radiator surface and the cooling environment. The solid conductive thermal resistance is determined based on the thermal conductivity of the radiator material, the effective heat dissipation area, and the thickness. The convective heat transfer thermal resistance is determined based on the convective heat transfer coefficient and the effective heat dissipation area.
[0020] In one embodiment, the step of establishing a thermal resistance network model of the semiconductor junction region and cooling environment based on the total power loss and the physical structure of the IGBT module, and constructing a Cauer-type thermal impedance model based on dynamic characteristics, further includes:
[0021] Based on the conductivity characteristics of each layer of the IGBT module, the equivalent thermal resistance of different orders is determined, and combined with the thermal time constants of each order, a time-domain expression for the thermal resistance from the semiconductor junction to the shell is constructed:
[0022] , In the formula, Let be the order of the Cauer-type thermal impedance model. For the i-th order equivalent thermal resistance, Let be the thermal resistance from the semiconductor junction region to the outer casing at time t. Let be the i-th order thermal time constant, which is equal to the product of the corresponding order equivalent resistance and the thermal melting.
[0023] In one embodiment, the step of inputting the total power loss into the thermal resistance network model and the Cauer-type thermal impedance model, and calling the finite element simulation algorithm to solve the temperature distribution field of the IGBT chip to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment includes:
[0024] The finite element simulation algorithm is called to solve for the junction temperature of the IGBT chip, and the total equivalent thermal resistance is calculated by combining the cooling environment temperature and the total power loss. The total equivalent thermal resistance is equal to the difference between the junction temperature of the IGBT chip and the cooling environment temperature, which is used as the ratio of the numerator to the total power loss.
[0025] Based on the temperature distribution field, the temperature non-uniformity from the semiconductor junction region of the IGBT chip to the cooling environment is calculated, and the temperature non-uniformity is used to quantify the temperature distribution on the surface of the heat sink plate.
[0026] In one embodiment, the method further includes:
[0027] When obtaining the heat flow rate of a medium, the thermal conductivity of the medium, the equivalent thermal cross-sectional area perpendicular to the heat flow direction, the temperature difference between the two ends of the medium's conduction path, and the effective conduction thickness in the heat flow direction are obtained, and the heat flow rate of the medium is calculated based on the thermal conductivity of the medium, the equivalent thermal cross-sectional area, the temperature difference between the two ends of the medium's conduction path, and the effective conduction thickness.
[0028] The heat flow rate conducted by the medium is incorporated into the thermal resistance network model and the finite element simulation algorithm for solving the temperature distribution field, so as to combine the heat flow rate conducted by the medium to construct the thermal resistance network model and solve the temperature distribution field of the IGBT chip.
[0029] In one embodiment, when the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters, locating the heat dissipation bottleneck and generating a heat dissipation optimization strategy for controlling the heat sink fins and flow channels includes:
[0030] When forced air cooling is used in the heat dissipation optimization strategy, the minimum cooling air volume required by the heat dissipation mechanism is estimated using a heat balance equation, the expression of which is: , In the formula, The required rated volumetric air volume for the fan. For the density of cooling air, The specific heat capacity at constant pressure of cooling air. This is the allowable temperature rise of the cooling air after passing through the radiator. This represents the total power loss.
[0031] The present invention also provides a heat dissipation analysis and optimization device for an IGBT module, used to implement the heat dissipation analysis and optimization method for an IGBT module as described in any of the above claims, the device comprising:
[0032] The power loss calculation module is used to obtain the electrical parameters and operating conditions of the IGBT module, and calculate the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions.
[0033] The model building module is used to establish a thermal resistance network model of the semiconductor junction region and cooling environment based on the total power loss and the physical structure of the IGBT module, and to build a Cauer-type thermal impedance model based on dynamic characteristics.
[0034] The equivalent thermal resistance calculation module is used to input the total power loss into the thermal resistance network model and the Cauer type thermal impedance model, and call the finite element simulation algorithm to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0035] The heat dissipation optimization strategy generation module is used to locate the heat dissipation bottleneck and generate a heat dissipation optimization strategy for controlling the heat sink fins and flow channels when the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set indicators.
[0036] The strategy execution and update module is used to execute the heat dissipation optimization strategy and update the thermal resistance network model and Cauer-type thermal impedance model after executing the heat dissipation optimization strategy, so as to update the temperature distribution field and the total equivalent thermal resistance.
[0037] The present invention also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the heat dissipation analysis and optimization method for the IGBT module as described above.
[0038] The present invention also provides a computer storage medium storing a computer program, which, when executed by a processor, implements the heat dissipation analysis and optimization method for the IGBT module as described above.
[0039] The heat dissipation analysis and optimization method for the above-mentioned IGBT module has the following advantages compared with the existing technology:
[0040] (1) This invention combines power loss calculation, steady-state thermal resistance network and transient Cauer thermal impedance model to construct a thermal analysis framework from chip junction region to external cooling environment. It can accurately predict steady-state operating temperature and accurately simulate instantaneous junction temperature fluctuation under dynamic conditions, thus realizing a comprehensive and accurate description of the thermal behavior of IGBT module.
[0041] (2) By using a Cauer-type thermal impedance model, each order of RC parameters corresponds to a specific physical packaging layer (including chip, solder layer, direct copper-clad substrate, and metal substrate) inside the IGBT module. This not only outputs junction temperature data but also clearly shows the dynamic heat conduction process in each structural layer inside the module, providing an effective tool for in-depth analysis of thermal bottlenecks and optimization of packaging design. At the same time, the introduction of quantitative evaluation indicators for total equivalent thermal resistance and temperature non-uniformity establishes an objective and accurate evaluation system for the performance assessment of the heat dissipation system, which can quickly identify major heat dissipation bottlenecks (such as excessive contact thermal resistance or insufficient convective heat transfer), effectively avoiding the blindness of traditional experience-based design.
[0042] (3) By establishing a closed-loop control process of “evaluation-optimization-verification”, this invention transforms heat dissipation design from a traditional open-loop, single-process design into an automatically iterative optimization system. When the design does not meet the requirements, it intelligently generates optimization strategies based on the analysis results (such as optimizing fin geometry parameters and flow channel design) and automatically starts a new round of verification, which significantly improves design efficiency and success rate and greatly enhances the reliability of the product in long-term operation under complex working conditions. Attached Figure Description
[0043] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0044] Figure 1 A flowchart illustrating a heat dissipation analysis and optimization method for an IGBT module provided by the present invention;
[0045] Figure 2 A schematic diagram of the overall heat dissipation analysis process for a heat dissipation analysis and optimization method for an IGBT module, provided in a specific embodiment of the present invention;
[0046] Figure 3 A schematic diagram of the heat dissipation evaluation and optimization decision-making process of a heat dissipation analysis and optimization method for an IGBT module provided in a specific embodiment of the present invention;
[0047] Figure 4 A schematic diagram of the structure of a heat dissipation analysis and optimization device for an IGBT module provided by the present invention;
[0048] Figure 5 This is a diagram of the internal structure of the electronic device provided by the present invention. Detailed Implementation
[0049] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0050] The following is combined Figures 1 to 5 This invention describes a heat dissipation analysis and optimization method for an IGBT module.
[0051] like Figure 1As shown, in one embodiment, a method for heat dissipation analysis and optimization of an IGBT module includes the following steps:
[0052] Step S110: Obtain the electrical parameters and operating conditions of the IGBT module, and calculate the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions.
[0053] In some embodiments, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention includes the following steps in step S110:
[0054] Step S111: Obtain the conduction loss and switching loss of the IGBT chip, as well as the conduction loss and turn-off loss of the freewheeling diode chip, and sum the conduction loss and switching loss of the IGBT chip and the conduction loss and turn-off loss of the freewheeling diode chip to obtain the total power loss.
[0055] Among them, the conduction loss of the IGBT chip is the power loss generated by the IGBT chip in the on state based on the conduction current and on-state resistance, and the switching loss is the power loss generated by the IGBT chip in the voltage-current overlap region when switching states; the conduction loss of the freewheeling diode chip is the power loss generated by the freewheeling diode chip in the on state based on the forward current and on-state resistance, and the turn-off loss is the power loss generated by the freewheeling diode chip in the turn-off state based on the reverse recovery characteristics.
[0056] Combination Figure 2 and Figure 3 As shown in the specific embodiment, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention includes steps 1 to 5:
[0057] Step 1: Power loss calculation and analysis.
[0058] Specifically, based on the electrical parameters and operating conditions of the IGBT module in the target application scenario, the total power loss generated by the IGBT module during operation is calculated. This total power loss includes at least the conduction loss and switching loss of the IGBT chip, as well as the conduction loss and turn-off loss of the freewheeling diode chip.
[0059] Among them, total power loss The total power loss of the IGBT chips inside the IGBT module Total power loss of the freewheeling diode chip composition, For on-state loss With switching losses The sum of For on-state loss With shutdown loss The sum of these, the expression for the total power loss is:
[0060] , in, This represents the power loss of an IGBT chip in the on-state due to the on-current and on-resistance. This represents the power loss of the IGBT chip during the switching process due to the overlapping area of voltage and current. This represents the power loss of the freewheeling diode chip due to forward current and on-state resistance when it is in the on-state. This represents the power loss of the freewheeling diode chip during the turn-off process due to its reverse recovery characteristics.
[0061] Step S120: Based on the total power loss and the physical structure of the IGBT module, establish a thermal resistance network model of the semiconductor junction region and the cooling environment, and construct a Cauer-type thermal resistance model based on dynamic characteristics.
[0062] In some embodiments, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention includes the following steps in step S120:
[0063] Step S121: Obtain the junction thermal resistance from the IGBT chip junction to the housing, the contact thermal resistance from the housing to the heat sink mounting surface, and the thermal resistance from the heat sink to the cooling environment. Based on the junction thermal resistance from the IGBT chip junction to the housing, the contact thermal resistance from the housing to the heat sink mounting surface, and the thermal resistance from the heat sink to the cooling environment, generate a one-dimensional equivalent thermal resistance path from the IGBT chip junction to the cooling environment, and construct a thermal resistance network model based on the one-dimensional equivalent thermal resistance path.
[0064] The thermal resistance from the radiator to the cooling environment is divided into the solid conduction thermal resistance of the radiator and the convective heat transfer thermal resistance between the radiator surface and the cooling environment. The solid conduction thermal resistance is determined based on the thermal conductivity of the radiator material, the effective heat dissipation area, and the thickness, while the convective heat transfer thermal resistance is determined based on the convective heat transfer coefficient and the effective heat dissipation area.
[0065] In some embodiments, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention further includes the following steps in step S120:
[0066] Step S122: Based on the conductivity characteristics of each layer of the IGBT module, determine the equivalent thermal resistance of different orders, and combine the thermal time constants of each order to construct the time-domain expression of the thermal resistance from the semiconductor junction to the shell: , In the formula, Let be the order of the Cauer-type thermal impedance model. For the i-th order equivalent thermal resistance, Let be the thermal resistance from the semiconductor junction region to the outer casing at time t. Let be the i-th order thermal time constant, which is equal to the product of the corresponding order equivalent resistance and the thermal melting.
[0067] Combination Figure 2 and Figure 3 As shown in the specific embodiment, the present invention provides a heat dissipation analysis and optimization method for an IGBT module, step 2, construction of the resistance and thermal impedance model.
[0068] Specifically, taking the total power loss determined in step 1 as the core input condition, a thermal resistance network model is established based on the physical structure of the IGBT module, from the semiconductor junction region of the IGBT chip and diode chip to the external cooling environment; at the same time, in order to analyze transient thermal behavior, a Cauer-type thermal impedance model characterizing the dynamic heat transfer characteristics is constructed.
[0069] In this embodiment, the thermal resistance network model is a one-dimensional equivalent thermal path from the IGBT chip junction region to the external cooling environment. Its thermal resistance path includes at least the junction-case thermal resistance from the chip junction region to the module housing. Contact thermal resistance from the casing to the heat sink mounting surface Thermal resistance from radiator to environment Thermal resistance from the radiator to the environment It can be decomposed into the solid conductive thermal resistance of the heat sink itself. and the convective heat transfer thermal resistance between the radiator surface and the cooling air Its expression is:
[0070] , in, The value is determined by the thermal conductivity (k), effective heat dissipation area (A), and thickness (d) of the radiator material, and is expressed as: ,
[0071] Used to reflect the heat conduction capacity inside the radiator. Determined by the convective heat transfer coefficient (h) and the heat dissipation area (A), the expression is: , It reflects the efficiency of heat exchange between the radiator and the cooling medium (such as air or liquid).
[0072] In this embodiment, when constructing the Cauer-type thermal impedance model, the junction-to-case thermal impedance (JIT-to-case refers to the heat transfer path from the PN junction inside the IGBT chip or diode chip to the bottom surface of the module's metal substrate (i.e., the housing mounting surface), which sequentially includes the chip itself, the chip's attached solder layer, the direct copper-clad substrate (DBC), the substrate's attached solder layer, and the metal heat dissipation substrate) is defined as follows: The time-domain expression is: , In the formula, Let be the order of the Cauer thermal network model; To distinguish between different orders of RC elements, the values range from 1 to... ; The i-th order equivalent thermal resistance is related to the conductivity of each layer of material in the IGBT module, reflecting the hindering effect of that layer of material on heat transfer. Let be the i-th order thermal time constant, whose value is equal to the i-th order equivalent thermal resistance. The product of the i-th order heat capacity and the heat capacity.
[0073] Step S130: Input the total power loss into the thermal resistance network model and the Cauer type thermal resistance model, and call the finite element simulation algorithm to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0074] In some embodiments, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention includes the following steps in step S130:
[0075] Step S131: Call the finite element simulation algorithm to solve for the junction temperature of the IGBT chip, and combine the cooling environment temperature and the total power loss to calculate the total equivalent thermal resistance. The total equivalent thermal resistance is equal to the difference between the junction temperature of the IGBT chip and the cooling environment temperature, which is used as the ratio of the numerator to the total power loss.
[0076] Step S132: Based on the temperature distribution field, calculate the temperature non-uniformity from the semiconductor junction region of the IGBT chip to the cooling environment. The temperature non-uniformity is used to quantify the temperature distribution on the surface of the heat sink plate.
[0077] Combination Figure 2 and Figure 3 As shown in the specific embodiment, the present invention provides a heat dissipation analysis and optimization method for an IGBT module, step 3, solving for the temperature field and key thermal parameters.
[0078] Specifically, the total power loss calculated in step 1 is used as a steady-state heat source and loaded into the thermal resistance and thermal impedance model constructed in step 2. The junction temperature of the IGBT chip and the temperature distribution field on the heat sink surface are obtained by solving the finite element simulation algorithm. Based on the temperature distribution field, the total equivalent thermal resistance from the semiconductor junction region of the IGBT chip to the external cooling environment and the temperature non-uniformity characterizing temperature uniformity are calculated.
[0079] In this embodiment, when calculating the total equivalent thermal resistance, the total equivalent thermal resistance is... The total thermal resistance from the junction to the environment is calculated using the following formula: , In the formula, The junction temperature of the IGBT chip is obtained directly through finite element simulation calculation. External ambient temperature, This represents the total power loss.
[0080] In this embodiment, temperature non-uniformity The formula for quantifying the temperature distribution uniformity on the surface of a heat sink substrate is defined as follows: , In the formula, It is the measured value of the i-th temperature measuring point arranged on the surface of the radiator. This represents the temperature of the core region directly below the heat source. This represents the total number of temperature measurement points.
[0081] In some embodiments, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention further includes the following steps:
[0082] Step S210: Obtain the thermal conductivity of the medium, the equivalent thermal cross-sectional area perpendicular to the heat flow direction, the temperature difference at both ends of the medium conduction path, and the effective conduction thickness in the heat flow direction when the medium conducts heat flow. Calculate the heat flow rate conducted by the medium based on the thermal conductivity of the medium, the equivalent thermal cross-sectional area, the temperature difference at both ends of the medium conduction path, and the effective conduction thickness.
[0083] Step S220: The heat flow rate conducted by the medium is written into the thermal resistance network model and the finite element simulation algorithm for solving the temperature distribution field, so as to combine the heat flow rate conducted by the medium to construct the thermal resistance network model and solve the temperature distribution field of the IGBT chip.
[0084] Combination Figure 2 and Figure 3 As shown in the specific embodiment, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention, in step 2 of constructing the thermal resistance network model and step 3 of solving the temperature field, involves heat transfer analysis of the heat sink, including the heat conduction process, and its heat flow equation expression is: , In the formula, Heat flow rate through the medium, expressed in W; is the thermal conductivity of the medium, expressed in W / (m·℃); The equivalent thermal conductivity cross-sectional area is perpendicular to the heat flow direction, and the unit is m². The temperature difference between the two ends of the conduction path is expressed in °C. The effective conduction thickness in the direction of heat flow is expressed in meters (m).
[0085] Step S140: When the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters, locate the heat dissipation bottleneck and generate a heat dissipation optimization strategy for controlling the heat sink fins and flow channels.
[0086] In some embodiments, the heat dissipation analysis and optimization method for an IGBT module provided by the present invention includes the following steps in step S140:
[0087] Step S141: When forced air cooling is used in the heat dissipation optimization strategy, the minimum cooling air volume required by the heat dissipation mechanism is estimated through the heat balance equation. The expression of the heat balance equation is: ,
[0088] In the formula, The required rated volumetric air volume for the fan. For the density of cooling air, The specific heat capacity at constant pressure of cooling air. This is the allowable temperature rise of the cooling air after passing through the radiator. This represents the total power loss.
[0089] Combination Figure 2 and Figure 3 As shown in the specific embodiment, the present invention provides a heat dissipation analysis and optimization method for an IGBT module, step 4, heat dissipation capacity assessment and optimization decision.
[0090] Specifically, the junction temperature of the IGBT chip obtained in step 3 is compared with the maximum allowable junction temperature specified in the device datasheet. Simultaneously, the calculated total equivalent thermal resistance is compared with the preset design target value. If any indicator fails to meet the requirements, the main heat dissipation bottleneck is located based on the analysis results of steps 2 and 3, and a corresponding heat dissipation optimization strategy is generated and executed accordingly. This optimization strategy involves optimizing the fin geometry and flow channel design of the heat sink to reduce its solid-state thermal resistance and convective thermal resistance.
[0091] In this embodiment, when forced air cooling is used, the minimum cooling air volume required by the heat dissipation system is estimated using the following heat balance equation, the expression of which is: , In the formula, The rated volumetric air volume required to be supplied to the fan, in m³ / s; The density of cooling air is expressed in kg / m³. This is the specific heat capacity of air at constant pressure, expressed in J / (kg·K). This represents the permissible temperature rise of air after it passes through the radiator, expressed in Kelvin (K). This represents the total power loss.
[0092] In this embodiment, the applied system includes an IGBT module and a heat sink mounted on the bottom of the IGBT module; the physical structure of the IGBT module is composed of an internal IGBT chip and a freewheeling diode chip through a packaging material, and the heat generated during operation is transferred to the heat sink through the metal substrate at the bottom of the module.
[0093] Step S150: Execute the heat dissipation optimization strategy and update the thermal resistance network model and Cauer-type thermal impedance model after executing the heat dissipation optimization strategy to update the temperature distribution field and total equivalent thermal resistance.
[0094] Combination Figure 2 and Figure 3 As shown in the specific embodiment, the present invention provides a heat dissipation analysis and optimization method for an IGBT module, step 5: heat dissipation system performance verification.
[0095] Specifically, after implementing the optimization strategy in step 4, based on the new radiator design, steps 2 to 3 are repeated to update the thermal model and resolve the temperature field and key thermal parameters to verify whether the overall performance of the optimized heat dissipation system fully meets the design goals, thereby completing a complete design-analysis-optimization iteration and realizing closed-loop control of the heat dissipation analysis process.
[0096] The following section further explains the heat dissipation analysis and optimization method for an IGBT module provided by this invention, using practical applications as an example:
[0097] In practical applications, a half-bridge IGBT module in a certain type of industrial frequency converter has a rated current of 100A, a DC bus voltage of 600V, a switching frequency of 8kHz, and uses forced air cooling. The design goal is to ensure that the IGBT chip junction temperature does not exceed 125℃ at an ambient temperature of 55℃, and the total system thermal resistance is ≤0.65K / W. Implementation process: In step S1, based on the actual operating current of 75A, modulation ratio of 0.9, and power factor of 0.85, the total power loss is calculated to be 215W; of which the IGBT chip conduction loss is 85W, and the switching loss is 65W; the diode chip conduction loss is 45W, and the turn-off loss is 20W.
[0098] Therefore, a thermal resistance network model is established based on the modular physical structure, and the thermal resistance of the junction is measured. The contact thermal resistance is 0.25 K / W. The initial heatsink thermal resistance is 0.05 K / W. The value is 0.45K / W; at the same time, a fourth-order Cauer thermal impedance model is constructed, and the parameters of each order of RC (thermal resistance-capacitance unit used in Cauer thermal impedance model) strictly correspond to the chip, solder layer, DBC substrate, and copper substrate.
[0099] Subsequently, finite element simulation revealed a maximum junction temperature of 138℃, exceeding the 125℃ limit. The calculated total thermal resistance was 0.72 K / W, and the temperature non-uniformity was 8.3℃, both failing to meet design requirements. Finally, the primary heat dissipation bottleneck was identified as excessive heat sink thermal resistance. Optimization strategies included increasing the fin height from 40mm to 60mm, reducing the fin spacing from 3mm to 2.5mm, and increasing the substrate thickness from 8mm to 10mm. Repeating steps 2-3 based on the new design, simulation results showed a junction temperature reduction to 118℃, a total thermal resistance reduction to 0.58 K / W, and a temperature non-uniformity reduction to 5.1℃, thus fully meeting the design objectives.
[0100] The following describes a heat dissipation analysis and optimization device for an IGBT module provided by the present invention. The heat dissipation analysis and optimization device for an IGBT module described below and the heat dissipation analysis and optimization method for an IGBT module described above can be referred to in correspondence.
[0101] like Figure 2 As shown, in one embodiment, a heat dissipation analysis and optimization device for an IGBT module includes a power loss calculation module 410, a model building module 420, an equivalent thermal resistance calculation module 430, a heat dissipation optimization strategy generation module 440, and a strategy execution and update module 450.
[0102] The power loss calculation module 410 is used to obtain the electrical parameters and operating conditions of the IGBT module, and calculate the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions.
[0103] The model building module 420 is used to establish a thermal resistance network model of the semiconductor junction region and cooling environment based on the total power loss and the physical structure of the IGBT module, as well as to build a Cauer-type thermal impedance model based on dynamic characteristics.
[0104] The equivalent thermal resistance calculation module 430 is used to input the total power loss into the thermal resistance network model and the Cauer type thermal impedance model, and call the finite element simulation algorithm to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0105] The heat dissipation optimization strategy generation module 440 is used to locate the heat dissipation bottleneck and generate a heat dissipation optimization strategy for controlling the heat sink fins and flow channels when the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters.
[0106] The strategy execution and update module 450 is used to execute the heat dissipation optimization strategy and update the thermal resistance network model and Cauer-type thermal impedance model after the heat dissipation optimization strategy is executed, so as to update the temperature distribution field and the total equivalent thermal resistance.
[0107] In this embodiment, the power loss calculation module 410 of the heat dissipation analysis and optimization device for an IGBT module provided by the present invention is specifically used for:
[0108] The on-state and switching losses of the IGBT chip, as well as the on-state and off-state losses of the freewheeling diode chip, are obtained. The total power loss is then obtained by summing the on-state and switching losses of the IGBT chip and the on-state and off-state losses of the freewheeling diode chip.
[0109] Among them, the conduction loss of the IGBT chip is the power loss generated by the IGBT chip in the on state based on the conduction current and on-state resistance, and the switching loss is the power loss generated by the IGBT chip in the voltage-current overlap region when switching states; the conduction loss of the freewheeling diode chip is the power loss generated by the freewheeling diode chip in the on state based on the forward current and on-state resistance, and the turn-off loss is the power loss generated by the freewheeling diode chip in the turn-off state based on the reverse recovery characteristics.
[0110] In this embodiment, the heat dissipation analysis and optimization device for an IGBT module provided by the present invention, the model building module 420 is specifically used for:
[0111] The junction-to-case thermal resistance of the IGBT chip junction, the contact thermal resistance of the casing to the heat sink mounting surface, and the thermal resistance of the heat sink to the cooling environment are obtained. Based on the junction-to-case thermal resistance of the IGBT chip junction, the contact thermal resistance of the casing to the heat sink mounting surface, and the thermal resistance of the heat sink to the cooling environment, a one-dimensional equivalent thermal resistance path from the IGBT chip junction to the cooling environment is generated, and a thermal resistance network model is constructed based on the one-dimensional equivalent thermal resistance path.
[0112] The thermal resistance from the radiator to the cooling environment is divided into the solid conduction thermal resistance of the radiator and the convective heat transfer thermal resistance between the radiator surface and the cooling environment. The solid conduction thermal resistance is determined based on the thermal conductivity of the radiator material, the effective heat dissipation area, and the thickness, while the convective heat transfer thermal resistance is determined based on the convective heat transfer coefficient and the effective heat dissipation area.
[0113] In this embodiment, the heat dissipation analysis and optimization device for an IGBT module provided by the present invention, the model building module 420 is further used for:
[0114] Based on the conductivity characteristics of each layer of the IGBT module, the equivalent thermal resistance of different orders is determined, and combined with the thermal time constants of each order, a time-domain expression for the thermal resistance from the semiconductor junction to the shell is constructed: , In the formula, Let be the order of the Cauer-type thermal impedance model. For the i-th order equivalent thermal resistance, Let be the thermal resistance from the semiconductor junction region to the outer casing at time t. Let be the i-th order thermal time constant, which is equal to the product of the corresponding order equivalent resistance and the thermal melting.
[0115] In this embodiment, the heat dissipation analysis and optimization device for an IGBT module provided by the present invention, specifically uses the equivalent thermal resistance calculation module 430 for:
[0116] The finite element simulation algorithm is used to solve for the junction temperature of the IGBT chip. Combined with the cooling environment temperature and the total power loss, the total equivalent thermal resistance is calculated. The total equivalent thermal resistance is equal to the difference between the junction temperature of the IGBT chip and the cooling environment temperature, which is used as the ratio of the numerator to the total power loss.
[0117] Based on the temperature distribution field, the temperature non-uniformity from the semiconductor junction region of the IGBT chip to the cooling environment is calculated. The temperature non-uniformity is used to quantify the temperature distribution on the surface of the heat sink plate.
[0118] In this embodiment, the heat dissipation analysis and optimization device for an IGBT module provided by the present invention further includes a dielectric conduction introduction module, used for:
[0119] When obtaining the heat flow rate of a medium, the thermal conductivity of the medium, the equivalent thermal cross-sectional area perpendicular to the heat flow direction, the temperature difference between the two ends of the medium's conduction path, and the effective conduction thickness in the heat flow direction are obtained. The heat flow rate of the medium is then calculated based on the thermal conductivity of the medium, the equivalent thermal cross-sectional area, the temperature difference between the two ends of the medium's conduction path, and the effective conduction thickness.
[0120] The heat flow rate conducted by the medium is incorporated into the thermal resistance network model and the finite element simulation algorithm for solving the temperature distribution field, so as to combine the heat flow rate conducted by the medium to construct the thermal resistance network model and solve the temperature distribution field of the IGBT chip.
[0121] In this embodiment, the heat dissipation analysis and optimization device for an IGBT module provided by the present invention includes a heat dissipation optimization strategy generation module 440 specifically used for:
[0122] When forced air cooling is used in the heat dissipation optimization strategy, the minimum cooling air volume required by the heat dissipation mechanism is estimated by the heat balance equation. The expression of the heat balance equation is: , In the formula, The required rated volumetric air volume for the fan. For the density of cooling air, The specific heat capacity at constant pressure of cooling air. This is the allowable temperature rise of the cooling air after passing through the radiator. This represents the total power loss.
[0123] Figure 3 This example illustrates a schematic diagram of the physical structure of an electronic device, which can be a smart terminal. Its internal structure diagram can be as follows: Figure 4 As shown. The electronic device includes a processor, internal memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface is used to communicate with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for thermal analysis and optimization of an IGBT module, the method including:
[0124] Obtain the electrical parameters and operating conditions of the IGBT module, and calculate the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions;
[0125] Based on the total power loss and the physical structure of the IGBT module, a thermal resistance network model of the semiconductor junction region and the cooling environment is established, and a Cauer-type thermal impedance model based on dynamic characteristics is constructed.
[0126] The total power loss is input into the thermal resistance network model and the Cauer type thermal impedance model, and the finite element simulation algorithm is called to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0127] When the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters, the heat dissipation bottleneck is located and a heat dissipation optimization strategy is generated to control the heat sink fins and flow channels.
[0128] Implement a heat dissipation optimization strategy and update the thermal resistance network model and Cauer-type thermal impedance model after implementing the heat dissipation optimization strategy to update the temperature distribution field and total equivalent thermal resistance.
[0129] Those skilled in the art will understand that Figure 5 Figure 5 Figure 5The structure shown is merely a block diagram of a portion of the structure related to the present invention and does not constitute a limitation on the electronic device to which the present invention is applied. A specific electronic device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0130] On the other hand, the present invention also provides a computer storage medium storing a computer program, which, when executed by a processor, implements a method for heat dissipation analysis and optimization of an IGBT module, the method comprising:
[0131] Obtain the electrical parameters and operating conditions of the IGBT module, and calculate the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions;
[0132] Based on the total power loss and the physical structure of the IGBT module, a thermal resistance network model of the semiconductor junction region and the cooling environment is established, and a Cauer-type thermal impedance model based on dynamic characteristics is constructed.
[0133] The total power loss is input into the thermal resistance network model and the Cauer type thermal impedance model, and the finite element simulation algorithm is called to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0134] When the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters, the heat dissipation bottleneck is located and a heat dissipation optimization strategy is generated to control the heat sink fins and flow channels.
[0135] Implement a heat dissipation optimization strategy and update the thermal resistance network model and Cauer-type thermal impedance model after implementing the heat dissipation optimization strategy to update the temperature distribution field and total equivalent thermal resistance.
[0136] On another front, a computer program product or computer program is provided, comprising computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium, and when the processor executes the computer instructions, it implements a method for heat dissipation analysis and optimization of an IGBT module, the method comprising:
[0137] Obtain the electrical parameters and operating conditions of the IGBT module, and calculate the total power loss of the IGBT module during operation based on the electrical parameters and operating conditions;
[0138] Based on the total power loss and the physical structure of the IGBT module, a thermal resistance network model of the semiconductor junction region and the cooling environment is established, and a Cauer-type thermal impedance model based on dynamic characteristics is constructed.
[0139] The total power loss is input into the thermal resistance network model and the Cauer type thermal impedance model, and the finite element simulation algorithm is called to solve the temperature distribution field of the IGBT chip in order to determine the total equivalent thermal resistance between the semiconductor junction region and the cooling environment.
[0140] When the junction temperature or total equivalent thermal resistance of the IGBT chip does not meet the set parameters, the heat dissipation bottleneck is located and a heat dissipation optimization strategy is generated to control the heat sink fins and flow channels.
[0141] Implement a heat dissipation optimization strategy and update the thermal resistance network model and Cauer-type thermal impedance model after implementing the heat dissipation optimization strategy to update the temperature distribution field and total equivalent thermal resistance.
[0142] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. This computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided by this invention can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory.
[0143] By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0144] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0145] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.
Claims
1. A heat dissipation analysis and optimization method for an IGBT module, characterized in that, The method comprises: acquiring electrical parameters and working conditions of the IGBT module, and calculating total power loss of the IGBT module in operation based on the electrical parameters and working conditions; based on the total power loss and the physical structure of the IGBT module, establishing a thermal resistance network model of the semiconductor junction region and the cooling environment, and constructing a Cauer type thermal impedance model based on dynamic characteristics; inputting the total power loss into the thermal resistance network model and the Cauer type thermal impedance model, and calling a finite element simulation algorithm to solve the temperature distribution field of the IGBT chip to determine the total equivalent thermal resistance of the semiconductor junction region and the cooling environment; when the junction temperature or the total equivalent thermal resistance of the IGBT chip does not meet the set index, locating the heat dissipation bottleneck and generating a heat dissipation optimization strategy for controlling the heat dissipation fins and flow channels of the heat sink; executing the heat dissipation optimization strategy, and updating the thermal resistance network model and the Cauer type thermal impedance model after executing the heat dissipation optimization strategy to update the temperature distribution field and the total equivalent thermal resistance.
2. The heat dissipation analysis and optimization method of the IGBT module according to claim 1, characterized in that, The acquisition of the electrical parameters and working conditions of the IGBT module, and the calculation of the total power loss of the IGBT module in operation based on the electrical parameters and working conditions, comprises: acquiring the on-state loss and switching loss of the IGBT chip and the on-state loss and turn-off loss of the freewheeling diode chip, and summing the on-state loss and switching loss of the IGBT chip and the on-state loss and turn-off loss of the freewheeling diode chip to obtain the total power loss; wherein the on-state loss of the IGBT chip is the power loss generated by the on-state current and on-state resistance of the IGBT chip in the on-state, and the switching loss is the power loss generated by the voltage and current overlap area of the IGBT chip in the switching state; the on-state loss of the freewheeling diode chip is the power loss generated by the forward current and on-state resistance of the freewheeling diode chip in the on-state, and the turn-off loss is the power loss generated by the reverse recovery characteristics of the freewheeling diode chip in the off-state.
3. The method of heat dissipation analysis and optimization of an IGBT module according to claim 1, characterized in that, The establishment of the thermal resistance network model of the semiconductor junction region and the cooling environment based on the total power loss and the physical structure of the IGBT module, and the construction of the Cauer type thermal impedance model based on dynamic characteristics, comprises: acquiring the junction-to-case thermal resistance of the IGBT chip junction region to the shell, the contact thermal resistance of the shell to the mounting surface of the heat sink, and the thermal resistance of the heat sink to the cooling environment, and generating a one-dimensional equivalent thermal resistance path from the IGBT chip junction region to the cooling environment based on the junction-to-case thermal resistance of the IGBT chip junction region to the shell, the contact thermal resistance of the shell to the mounting surface of the heat sink, and the thermal resistance of the heat sink to the cooling environment, to construct a thermal resistance network model according to the one-dimensional equivalent thermal resistance path; wherein the thermal resistance of the heat sink to the cooling environment is divided into the solid conduction thermal resistance of the heat sink and the convective heat transfer thermal resistance between the surface of the heat sink and the cooling environment, the solid conduction thermal resistance is determined based on the thermal conductivity of the heat sink material and the effective heat dissipation area and thickness, and the convective heat transfer thermal resistance is determined based on the convective heat transfer coefficient and the effective heat dissipation area.
4. The heat dissipation analysis and optimization method of the IGBT module according to claim 3, characterized in that, The method further comprises: The method further comprises: , wherein is the order of the Cauer-type thermal impedance model, is the i-th order equivalent thermal resistance, is the thermal impedance from the semiconductor junction to the case at time t, is the i-th order thermal time constant, which is equal to the product of the corresponding order equivalent thermal resistance and the thermal inductance.
5. The method of heat dissipation analysis and optimization of an IGBT module according to claim 1, characterized in that, The method further comprises: The method further comprises: The method further comprises:
6. The method of heat dissipation analysis and optimization of an IGBT module according to claim 1, characterized in that, The method further comprises: The method further comprises: The method further comprises:
7. The method of heat dissipation analysis and optimization of an IGBT module according to claim 1, characterized in that, The method further comprises: The method further comprises: , wherein is the rated volume air flow required for the fan, is the density of the cooling air, is the constant pressure specific heat capacity of the cooling air, is the allowable temperature rise of the cooling air after passing through the radiator, is the total power loss.
8. A heat dissipation analysis and optimization device for an IGBT module, characterized by, The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further comprises: The method further A heat dissipation optimization strategy generation module is configured to locate a heat dissipation bottleneck and generate a heat dissipation optimization strategy for controlling the heat dissipation fins and flow channels of the heat sink when the junction temperature or the total equivalent thermal resistance of the IGBT chip does not meet a set index. A strategy execution and update module is configured to execute the heat dissipation optimization strategy and update the thermal resistance network model and the Cauer type thermal impedance model after the heat dissipation optimization strategy is executed, so as to update the temperature distribution field and the total equivalent thermal resistance. 9.An electronic device comprising a memory and a processor, the memory storing a computer program, wherein, The processor executes the computer program to implement the steps of the heat dissipation analysis and optimization method of the IGBT module in any one of claims 1 to 7.
10. A computer storage medium storing a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the heat dissipation analysis and optimization method of the IGBT module in any one of claims 1 to 7.
Citation Information
Cited By
Modeling method and system for describing electrothermal coupling characteristics of power device-radiator
CN121683294A
