Control circuit of switching power supply and switching power supply

Abstract

According to the control circuit of the switching power supply and the switching power supply, an output feedback signal and a reference voltage of the switching power supply are subjected to operational amplification and are compensated by a compensator to generate a compensation signal; comparing the compensation signal with a node voltage in the compensator to generate an enable signal; when the load of the switching power supply changes, the enable signal is effective, and the enable signal controls the main switching tube to perform switching action; and when the load of the switching power supply is stable, the enable signal is invalid, and the compensation signal controls the main switching tube to perform switching action. According to the invention, the load change is not easy to misjudge, the overshoot or undershoot of the output voltage is avoided when the load changes, the design difficulty is low, and the system stability can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power electronics, in particular to a control circuit of a switching power supply and the switching power supply. BACKGROUND

[0002] In the switching power supply, the load jump of the switching power supply, i.e. the sudden increase or decrease of the load, is often encountered. When the load decreases, the output voltage of the switching power supply will overshoot because the average value of the inductor current of the switching power supply is greater than the load current; when the load increases, the output voltage will undershoot because the average value of the inductor current is less than the load current. The ideal output needs to be adjusted by the inductor current, thereby reducing the overshoot or undershoot of the output voltage.

[0003] The prior art control mode of the switching power supply is shown in Figure 1 Taking a step-down converter as an example, the switching power supply adopts a double-loop control mode, in which the voltage loop obtains an error signal Vea by operating and amplifying the output feedback voltage FB and the reference voltage VREF through an operational amplifier; the current loop controls the on-off state of the main power tube of the switching power supply by comparing the current sampling signal Vcs1 and the error signal Vea through a comparator.

[0004] For the load jump, the existing solutions and their problems are as follows: (1) increasing the loop bandwidth, which will make the system stability worse and increase the design difficulty; (2) directly triggering the main power tube to work in the minimum on-time or maximum on-time, which will make the inductor current decrease or increase slowly; (3) increasing the dummy load after detecting the voltage overshoot or pulling up the main switch tube after detecting the undershoot, which is a nonlinear control and will add a great disturbance to the loop and is difficult to control. SUMMARY

[0005] The purpose of the present application is to provide a control circuit of a switching power supply and the switching power supply with low design difficulty, which is used to solve the problem of output overshoot or undershoot when the load jumps in the prior art, and improve the stability of the system and reduce the design difficulty of the system.

[0006] The present application also provides a control circuit of a switching power supply, which comprises an operational amplifier and a compensator, the operational amplifier receives a reference voltage and an output feedback signal of the switching power supply, the output end of the operational amplifier is connected to the compensator, and the output signal of the operational amplifier generates a compensation signal after being compensated by the compensator; further comprising,

[0007] a comparison circuit, which receives the compensation signal and the node voltage of the compensator to generate an enable signal;

[0008] a control unit, which receives the enable signal and the compensation signal to generate a switching control signal for controlling the main switch tube of the switching power supply.

[0009] When the load of the switching power supply changes, the enable signal is valid, and the enable signal and the compensation signal control the switching state of the main switch tube; when the load of the switching power supply is stable, the enable signal is invalid, and the compensation signal controls the switching state of the main switch tube.

[0010] Optionally, the comparison circuit compares the compensation signal and the node voltage to obtain the enable signal.

[0011] The comparison circuit compares the difference between the compensation signal and the node voltage with a set threshold to obtain the enable signal.

[0012] Optionally, the difference between the compensation signal and the node voltage represents the voltage of the compensation resistor in the compensator.

[0013] Optionally, the enable signal includes a first enable signal and a second enable signal, when the difference between the node voltage and the compensation signal is greater than a first set threshold, the first enable signal is valid, representing that the load decreases.

[0014] When the difference between the compensation signal and the node voltage is greater than a second set threshold, the second enable signal is valid, representing that the load increases.

[0015] Optionally, when the first enable signal is valid, the first enable signal controls the main switch tube to be turned off, and the rectifier tube of the switching power supply is always on.

[0016] Optionally, when the inductor current of the switching power supply drops to zero or the turn-on time of the rectifier tube of the switching power supply reaches a certain time, the rectifier tube is turned off, and the main switch tube is turned on.

[0017] Optionally, when the second enable signal is valid, the compensation signal controls the turn-on time of the main switch tube, and the second enable signal is used to adjust the maximum turn-on time of the main switch tube.

[0018] Optionally, the compensator includes a first capacitor and a compensation resistor, the first capacitor and the compensation resistor are connected in series between the output terminal and the ground terminal of the operational amplifier, and the connection terminal of the first capacitor and the compensation resistor generates the node voltage.

[0019] Optionally, the compensator further includes a second capacitor, and the second capacitor is connected in parallel with the series circuit composed of the first capacitor and the first resistor.

[0020] Optionally, the comparison circuit comprises a first comparator and a second comparator, the first comparator compares the difference between the node voltage and the compensation signal with a first set threshold to generate the first enable signal; and the second comparator compares the difference between the compensation signal and the node voltage with a second set threshold to generate the second enable signal.

[0021] Optionally, the control unit comprises a first current comparator, a conduction time limiting circuit and a first logic processing unit, the first current comparator compares the compensation signal with a sampling signal of the inductor charging current to generate a first comparison signal; the conduction time limiting circuit generates a conduction limiting signal for controlling the maximum conduction time of the main switch tube when the load is stable;

[0022] The first logic processing unit receives the second enable signal, the first comparison signal and the conduction time limiting signal to generate a first switch control signal for controlling the conduction time of the main switch tube.

[0023] Optionally, the control unit comprises a second current comparator and a second logic processing circuit, the second current comparator compares a second current sampling signal representing the inductor freewheeling current with the compensation signal to generate a second comparison signal;

[0024] The second logic processing circuit receives the first enable signal, the second comparison signal and a clock signal to generate a second switch control signal for controlling the conduction time of the rectifier tube.

[0025] The application also provides a switching power supply comprising a main switch tube, a rectifier tube and an inductor, and further comprising any one of the above control circuits for controlling the switching states of the main switch tube and the rectifier tube.

[0026] Compared with the prior art, the application has the following advantages: the application does not change the traditional loop of the system, but reuses the signal on the compensation device to detect the load change, thus reducing the design difficulty. When the switching power supply is unloaded, the rectifier tube can be always on under the overshoot, so that the inductor current can be reduced at the fastest speed; when the switching power supply is loaded, the duty cycle of the main switch tube can be improved, so that the inductor current can be increased at the fastest speed; the signal on the compensation device is used to detect the output change, which is less likely to be mis-triggered than directly sampling the output signal. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 a switching power supply principle diagram of the prior art;

[0028] Figure 2 a switching power supply principle diagram of the application;

[0029] Figure 3 The embodiment principle diagram of the comparison circuit in the control circuit of the application;

[0030] Figure 4 The embodiment principle diagram of the control unit in the control circuit of the application. DETAILED DESCRIPTION

[0031] The preferred embodiments of the application are described in detail below with reference to the accompanying drawings, but the application is not limited to these embodiments only. The application covers any alternatives, modifications, equivalent methods and solutions within the spirit and scope of the application.

[0032] In order to make the public have a thorough understanding of the application, the specific details are described in detail in the following preferred embodiments of the application, and the application can also be fully understood without the description of these details for those skilled in the art.

[0033] The application is described in more detail in the following paragraphs with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise proportions for the purpose of facilitating and clearly assisting in the description of the embodiments of the application.

[0034] The switching power supply of the application includes a main switch tube, a rectifier tube and an inductor. When the main switch tube is turned on, the inductor is charged and stored energy. When the rectifier tube is turned on, the inductor current flows through the rectifier tube. The switching power supply of the application can be a boost converter, a buck converter, a buck-boost converter, etc.

[0035] As shown in Figure 2 The embodiment principle diagram of the switching power supply of the application is shown in the figure. The switching power supply takes a buck converter as an example and includes a power module and a control circuit. The control circuit controls the switching state of the power tube in the power module to convert the input voltage Vin into the output voltage Vout to realize power conversion. The power module includes a main switch tube M1, a rectifier tube M2, an inductor L, an output capacitor Cout and a load. One end of the main switch tube receives the input voltage Vin. The other end of the main switch tube is connected with the rectifier tube. The common connection end of the main power tube and the rectifier tube is connected with the first end of the inductor. The second end of the inductor is connected with the output capacitor and the load.

[0036] The control circuit of the application comprises an operational amplifier 01, a compensator 02, a comparison circuit 03 and a control unit 04, the operational amplifier 01 performs operational amplification on the output feedback signal FB and the reference voltage, and the output end thereof is connected to the compensator 02, and the output signal of the operational amplifier 01 obtains the compensated signal Vea after compensation by the compensator 02. The compensator 02 comprises a compensation structure connected by a capacitor and a resistor, as shown in the figure, and can comprise the compensation resistor R1 and the first capacitor C1 connected in series, and the compensator is a first-order compensator, further comprising the second capacitor C2 connected in parallel with the series circuit of the compensation resistor R1 and the first capacitor C1, and the compensator is a second-order compensator. The comparison circuit 03 obtains the enable signal according to the compensated signal Vea and the node voltage V1 on the compensator 02, and the node voltage V1 is the voltage at the connection node of the compensation resistor R1 and the first capacitor C1, further, the comparison circuit 03 obtains the enable signal according to the difference between the compensated signal Vea and the node voltage V1, and the difference represents the voltage of the compensation resistor R1, further, the comparison circuit 03 compares the difference with the threshold voltage to obtain the enable signal. When the load of the switching power supply jumps, the enable signal is valid, further, the enable signal comprises the first enable signal EN1 and the second enable signal EN2, and the first enable signal EN1 is valid when the load decreases, and the second enable signal EN2 is valid when the load increases. The control unit 04 controls the switching state of the main switch tube and the rectifier tube according to the compensated signal Vea, the first enable signal EN1, the second enable signal EN2 and the sampling signals Vcs1 and Vcs2 of the inductor current, wherein the switching states of the main switch tube and the rectifier tube are complementary, the sampling signal Vcs1 represents the current sampling signal when the inductor charges, and the sampling signal Vcs2 represents the current sampling signal when the inductor freewheels. The application judges whether the load jumps by multiplexing the voltage signal on the compensator, reduces the design difficulty, and is less likely to be mis-triggered than directly sampling the output signal to judge whether the load jumps.

[0037] As Figure 3As shown, the schematic diagram illustrates the embodiment principle of the comparison circuit in the control circuit of the application, including comparator 301 and comparator 302. The non-inverting input terminal of comparator 301 receives first voltage V1, the inverting input terminal receives the sum of compensation signal Vea and threshold voltage Vos1, and the output terminal outputs first enable signal EN1. When V1>Vea+Vos1, i.e. V1-Vea>Vos1, first enable signal EN1 is high and valid, indicating that the voltage from the first end to the second end of resistor R1 is negative (the end of resistor R1 connected to operational amplifier 01 is the first end, and the other end is the second end), indicating that the load decreases. The non-inverting input terminal of comparator 302 receives compensation signal Vea, the inverting input terminal receives the sum of first voltage V1 and threshold voltage Vos2, and the output terminal outputs second enable signal EN2. When Vea>V2+Vos2, i.e. Vea-V1>Vos2, second enable signal EN2 is high and valid, indicating that the voltage from the first end to the second end of resistor R1 is positive, indicating that the load increases. When threshold voltages Vos1 and Vos2 are zero, any change in the load of the switching power supply due to disturbance will be judged as load jump. The application can set threshold voltages Vos1 and Vos2 to be greater than zero and a certain set value, so that the load jump is only judged when the load change exceeds a certain value, avoiding the load jump being judged when the load changes a little due to disturbance, and then frequently changing the control logic and adding nonlinear disturbance to the system.

[0038] As Figure 4As shown, the schematic diagram illustrates an embodiment schematic diagram of the control unit in the control circuit of the application, including a first control unit 401, a second control unit 402 and a drive unit 403. The first control unit 401 receives a first enable signal EN1, a compensation signal Vea and a current sampling signal Vcs2 during inductive freewheeling, and obtains a control signal Ls; further, when the load decreases, the first enable signal EN1 is valid, the control signal Ls controls the main switch tube to be off, and the rectifier tube is always on until the inductive current freewheels to zero or other logic control rectifier tube is off, and when the load is stable, the first enable signal is invalid, and the main switch tube and the rectifier tube normally perform switching action. Specifically, the first control unit 401 includes a comparator 4011 and a first logic processing unit 4012, the comparator 4011 compares the compensation signal Vea with the current sampling signal Vcs2 to output a comparison signal VC1, and the first logic processing unit 4012 includes an NAND gate 4012a and an AND gate 4012b, the NAND gate 4102a receives the comparison signal VC1 and the first enable signal EN1, the AND gate 4012b receives the output signal of the NAND gate 4102a and a clock signal clk1, and outputs the control signal Ls. When the load decreases, the compensation signal Vea decreases, the compensation signal Vea is less than the sampling signal Vcs2, the comparison signal VC1 is a high level signal, and the first enable signal EN1 is also a high level signal, so the NAND gate 4102a outputs a low level signal, and in this state, regardless of whether the clock signal clk1 is low or high, the AND gate 4012b always outputs a low level control signal Ls, which is equivalent to the clock signal clk1 being shielded at the normal off time of the rectifier tube, the main switch tube is off, and the rectifier tube is always on; when the inductive current freewheels to zero, the comparison signal VC1 becomes a low level signal, the NAND gate 4012a outputs a high level signal, the control signal Ls has the same state as the clock signal clk, the state of the control signal Ls is determined by the clock signal clk1, and when the clock signal clk1 changes from low to high, the control signal Ls also changes from low to high, and the rectifier tube is off; when the load is stable, the compensation signal Vea is greater than the sampling signal Vcs2, the comparison signal VC1 is low and invalid, the first enable signal EN1 is low and invalid, the NAND gate 4012a always outputs a high level signal, the state of the control signal Ls is determined by the clock signal clk1, the rectifier tube is normally off, and the main switch tube is normally on. The clock signal clk1 can be a directly given pulse signal or a pulse signal obtained by other control logic; similarly, the clock signal clk1 can be replaced by other control signals for controlling the rectifier tube to be normally off. When the load decreases, the first control unit of the application controls the rectifier tube to be always on in the overshoot state, so that the inductive current decreases at the fastest speed, thereby reducing the output overshoot and enabling the system to be quickly stable.

[0039] The second control unit 402 receives the second enable signal EN2, the compensation signal Vea and the current sampling signal Vcs1 during inductance charging to obtain the control signal Hs; further, when the load increases, the second enable signal is effective, the maximum on-time of the main switch tube is adjusted through the second enable signal, so that the on-time of the main switch tube is not limited by the maximum on-time set by the system, when the current sampling signal Vcs1 reaches the compensation signal Vea, the main switch tube is controlled to be turned off, when the load is stable, the second enable signal is ineffective, within the maximum on-time, if the current sampling signal Vcs1 reaches the compensation signal Vea, the main switch tube is controlled to be turned off, if the current sampling signal Vcs1 does not reach the compensation signal Vea, the main switch tube is turned off when the on-time of the main switch tube reaches the maximum on-time. Specifically, the second control unit 402 includes a comparator 4023, an on-time limiting circuit 4021 and a second logic processing unit 4022, the comparator 4023 compares the compensation signal Vea and the current sampling signal Vcs1 to obtain the comparison signal VC2; the on-time limiting circuit 4021 receives the clock signal clk2 and outputs the on-time limiting signal Ton_max, which is used to control the maximum on-time of the main switch tube when the load is stable; the second logic processing unit 4022 receives the second enable signal EN2, the comparison signal VC2 and the on-time limiting signal Ton_max to generate the control signal Hs for turning off the main switch tube; when the load increases, the second enable signal EN2 is effective, the turning-off time of the main switch tube is controlled by the comparison signal VC2, when the load is stable, the second enable signal EN2 is ineffective, the turning-off time of the main switch tube is controlled by the comparison signal VC2 and the signal Ton_max, and the main switch tube is turned off when any one of the comparison signal VC2 and the signal Ton_max changes from effective to ineffective. The second logic processing unit 4022 includes an inverter 4022a, an NOR gate 4022b and an OR gate 4022c, the inverter 4022a receives the signal Ton_max, the NOR gate 4022b receives the output signal of the inverter 4022a and the second enable signal EN2, and the OR gate 4022c receives the comparison signal VC2 and the output signal of the NOR gate 4022b to obtain the control signal Hs; when the load increases, the second enable signal EN2 is high and effective, the NOR gate 4022b always outputs a low signal regardless of the state of the on-time limiting signal Ton_max, which is equivalent to that the on-time limiting signal Ton_max is shielded, and the state of the output signal of the OR gate 4022c is consistent with that of the comparison signal VC2, that is, the control signal Hs is generated by the comparison signal VC2; when the load is stable, the second enable signal EN2 is low and ineffective, the state of the output signal of the NOR gate 4022b is consistent with that of the signal Ton_max, and the turning-off time of the main switch tube is determined by the signal Ton_max and the comparison signal VC2.When the load increases, the second control unit of the application adjusts the maximum on-time of the main switch according to the second enable signal EN2, so that the on-time of the main switch in the undershoot state is not limited by the maximum on-time of the system, and the inductor current can rise at the fastest speed, thereby reducing the output undershoot and enabling the system to stabilize quickly.

[0040] Figure 4 The implementation of the first logic processing unit and the second logic processing unit is not limited to the mode described in the figure, and other types of flip-flops can be used to generate corresponding control signals. The driving unit 403 receives the control signals Hs and Ls to generate the driving signal Drv1 of the main switch and the driving signal Drv2 of the rectifier, and if the rectifier is a diode, only the driving signal Drv1 is generated. The application does not change the system loop, reduces the design difficulty, and can determine whether the load changes through the signal on the compensator, and timely adjusts the switching state to reduce the overshoot or undershoot of the output when the load changes, while avoiding misjudgment of the load jump.

[0041] Although the above embodiments are described and explained separately, the technologies involved in part are common, and in the opinion of those skilled in the art, can be replaced and integrated between embodiments, and the content not explicitly recorded in one of the embodiments can be referred to another recorded embodiment.

[0042] The above-described embodiments do not constitute a limitation on the protection scope of the technical solutions. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the above-described embodiments shall be included in the protection scope of the technical solutions.

Claims

1. A control circuit for a switching power supply, characterized by: The compensation signal is generated by the output signal of the operational amplifier after compensation by the compensator; Further comprising, a comparison circuit receiving the compensation signal and a node voltage of the compensator to generate an enable signal; a control unit receiving the enable signal and the compensation signal to generate a switching control signal for controlling a main switch of the switching power supply; When the load of the switching power supply changes, the enable signal is valid, and the enable signal and the compensation signal control the switching state of the main switch; when the load of the switching power supply is stable, the enable signal is invalid, and the compensation signal controls the switching state of the main switch.

2. The control circuit of claim 1, wherein: The comparison circuit compares the compensation signal and the node voltage to obtain the enable signal.

3. The control circuit of claim 1, wherein: The comparison circuit compares the difference between the compensation signal and the node voltage with a set threshold to obtain the enable signal.

4. The control circuit of claim 1, wherein: The difference between the compensation signal and the node voltage represents the voltage of the compensation resistor in the compensator.

5. The control circuit of claim 3, wherein: The enable signal includes a first enable signal and a second enable signal, when the difference between the node voltage and the compensation signal is greater than a first set threshold, the first enable signal is valid, representing that the load decreases; When the difference between the compensation signal and the node voltage is greater than a second set threshold, the second enable signal is valid, representing that the load increases.

6. The control circuit of claim 5, wherein: When the first enable signal is valid, the first enable signal controls the main switch to be turned off, and the rectifier of the switching power supply is always on.

7. The control circuit of claim 6, wherein: When the inductor current of the switching power supply drops to zero or the turn-on time of the rectifier of the switching power supply reaches a certain time, the rectifier is turned off, and the main switch is turned on.

8. The control circuit of claim 5, wherein: When the second enable signal is valid, the compensation signal controls the turn-on time of the main switch, and the second enable signal is used to adjust the maximum turn-on time of the main switch.

9. The control circuit of claim 1, wherein: The compensator includes a first capacitor and a compensation resistor, which are connected in series between the output terminal of the operational amplifier and the ground terminal, and the connection terminal of the first capacitor and the compensation resistor generates the node voltage.

10. The control circuit of claim 9, wherein: The compensator further includes a second capacitor connected in parallel with the series circuit composed of the first capacitor and the first resistor.

11. The control circuit of claim 5, wherein: The comparison circuit includes a first comparator and a second comparator, the first comparator compares the difference between the node voltage and the compensation signal with a first set threshold to generate the first enable signal; and the second comparator compares the difference between the compensation signal and the node voltage with a second set threshold to generate the second enable signal.

12. The control circuit of claim 5, wherein: The control unit comprises a first current comparator, a conduction time limiting circuit and a first logic processing unit, the first current comparator compares the compensation signal with a sampling signal of the inductor charging current to generate a first comparison signal; the conduction time limiting circuit generates a conduction limiting signal for controlling the maximum conduction time of the main switch tube when the load is stable; The first logic processing unit receives the second enable signal, the first comparison signal and the conduction time limiting signal to generate a first switch control signal for controlling the conduction time of the main switch tube.

13. The control circuit of claim 5, wherein: The control unit comprises a second current comparator and a second logic processing circuit, the second current comparator compares a second current sampling signal representing the inductor freewheeling current with the compensation signal to generate a second comparison signal; The second logic processing circuit receives the first enable signal, the second comparison signal and a clock signal to generate a second switch control signal for controlling the conduction time of the rectifier tube.

14. A switching power supply comprising a main switch, a rectifier and an inductor, characterized in that: The control circuit as claimed in any one of claims 1-13 is further used for controlling the switching state of the main switch tube and the rectifier tube.

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