Circularly polarized photoelectric logic gate and preparation method thereof
By combining PbS quantum dots with chiral liquid crystals, circularly polarized optoelectronic logic gates were fabricated, solving the problem of achieving compactness and multifunctionality in existing technologies. This enabled the performance of multiple logic operations at a single wavelength and energy savings.
Patent Information
- Application Number
- CN202511862013.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-11
- Publication Date
- 2026-02-03
AI Technical Summary
Existing technologies make it difficult to construct circularly polarized optoelectronic logic gates that are both compact and multifunctional, and existing CPL photodetectors cannot achieve ultra-wide wavelength tunability and high asymmetry, resulting in energy loss and manufacturing complexity.
By combining PbS quantum dots with chiral liquid crystals, circularly polarized optoelectronic logic gates are fabricated through spin coating and magnetron sputtering. These gates include a chiral liquid crystal layer, a conductive substrate, an electron transport layer, a quantum dot light-absorbing layer, a hole transport layer, and electrodes, enabling selective processing of circularly polarized light signals.
It enables multiple logic operations to be performed under a single wavelength, saving energy, requiring no complex control, and possessing strong chirality resolution and multifunctionality, making it suitable for the construction of high-performance optoelectronic logic gates.
Smart Images
Figure CN121454844A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circularly polarized optoelectronic device technology, and in particular to a circularly polarized optoelectronic logic gate and its fabrication method. Background Technology
[0002] Light possesses inherent multidimensional optical properties (such as intensity, wavelength, and polarization), providing a powerful platform for driving the development of computing and communication systems and thus meeting the ever-increasing computing demands. By using light as an input signal and integrating photoelectric conversion with logical operations, optoelectronic logic gates can be constructed to meet the needs of next-generation optical computing and machine vision. However, multifunctional optoelectronic logic gates typically rely on complex control mechanisms, making it difficult to meet the practical application requirements of multifunctionality and miniaturization: one method achieves different logic functions by switching the incident light wavelength, requiring a multi-band light source array, leading to an increase in module size; another method modulates the response of devices by applying different bias voltages, increasing the complexity of the driving circuit and increasing device power consumption. Therefore, there is an urgent need for an optoelectronic logic gate that requires no complex control and combines compactness and multifunctionality.
[0003] Circularly polarized light (CPL) possesses inherent spin angular momentum, and its left-handed and right-handed polarization states are analogous to "0" and "1" in a binary system, making it an ideal information carrier for constructing multifunctional optoelectronic logic gates. However, efficiently distinguishing the spin direction of CPL typically requires integrating photodetectors with optical components (such as quarter-wave plates and linear polarizers), resulting in significant energy loss and manufacturing complexity. Furthermore, CPL photodetectors constructed using chiral perovskites, chiral organic molecules, or chiral polymers cannot simultaneously achieve ultrawide wavelength tunability and high asymmetry, hindering the practical application of circularly polarized optoelectronic logic gates.
[0004] Chiral liquid crystals can form a periodic structure with a helical arrangement through molecular self-assembly. The helical period can be precisely controlled by adjusting the chiral dopant content. When the incident light wavelength matches the helical period, "selective transmission" of a specific helical CPL can be achieved, exhibiting strong and controllable chirality.
[0005] PbS quantum dots possess a broad photoelectric response wavelength range, naturally covering the ultraviolet to near-infrared band (300–1600 nm). Furthermore, by controlling the size of PbS quantum dots, the response wavelength can be precisely tunable, converting optical signals into electrical signals. In addition, PbS quantum dots can be prepared at low cost using solution methods, making them ideal near-infrared responsive semiconductor materials.
[0006] While some literature emphasizes the fabrication of circularly polarized photodetectors, attention to the application of circularly polarized light in logic gates is quite limited. Achieving chiral modulation through circularly polarized photodetectors, i.e., realizing a direct mapping between polarization and logic, allows for the direct conversion of polarization information into the output of logic operations, enabling the execution of various logic functions. Combining PbS quantum dots with chiral liquid crystals to achieve efficient selective modulation and response of near-infrared circularly polarized light is beneficial for constructing high-performance optoelectronic logic gate devices. Summary of the Invention
[0007] To overcome the shortcomings of existing technologies, this application proposes a circularly polarized optoelectronic logic gate and its fabrication method. The circularly polarized optoelectronic logic gate provided by this invention possesses strong chirality resolution and various logic operations, realizing the construction of high-performance optoelectronic logic gates.
[0008] To solve the above-mentioned technical problems, the present invention provides the following technical solution:
[0009] A circularly polarized optoelectronic logic gate can process circularly polarized light signals, using the direction of the light signal as the standard for the logic values "0" and "1" of the light input, and outputting a photocurrent that conforms to the logic rules.
[0010] This invention proposes a circularly polarized optoelectronic logic gate, comprising a chiral liquid crystal layer, a conductive substrate, an electron transport layer, a quantum dot light-absorbing layer, a hole transport layer, and electrodes;
[0011] The chiral liquid crystal layer is a thin film obtained by copolymerization of organic molecules, organic chiral dopants, and photoinitiators with macroscopic co-assembly capabilities;
[0012] in:
[0013] The organic molecules with macroscopic co-assembly capability are one or more of RM82 and LC242;
[0014] The organic chiral dopant is one or more of S-811, R-811, S-1011, R-1011, S-5011, and R-5011.
[0015] The photoinitiator is one or more of azobisisobutyronitrile, Irgacure 651, and Irgacure 184;
[0016] Preferably, the conductive substrate is ITO glass.
[0017] Preferably, the electron transport layer is a ZnO thin film or a SnO2 thin film with a thickness of 20 to 100 nanometers.
[0018] Preferably, the quantum dot light-absorbing layer is a PbS quantum dot film with a thickness of 100–500 nanometers; the size of the PbS quantum dots is 3–10 nanometers.
[0019] Preferably, the hole transport layer is a PbS quantum dot film treated with EDT or MPA, with a thickness of 10–100 nanometers.
[0020] The technical solution of this invention also includes a method for preparing a circularly polarized optoelectronic logic gate, the steps of which are as follows:
[0021] (1) Electron transport layer solution is spin-coated onto a conductive substrate to obtain an electron transport layer;
[0022] (2) Spin-coating a lead sulfide quantum dot light-absorbing layer onto the electron transport layer;
[0023] (3) Spin-coating an oleic acid-coated lead sulfide quantum dot solution onto the quantum dot active layer and performing ligand exchange to obtain a hole transport layer;
[0024] (4) Magnetron sputtering is performed on the hole transport layer to cover the gold electrodes, and photoelectric logic gates are obtained;
[0025] (5) Dissolve the organic molecules with macroscopic co-assembly capability, organic chiral dopants, and photoinitiators in an organic solvent to obtain a mixed solution;
[0026] (6) After drying the mixed solution, irradiate it with 365nm ultraviolet light at 80-90 degrees for 10 minutes to obtain a chiral liquid crystal layer;
[0027] (7) The chiral liquid crystal layer is attached to the bottom side of the optoelectronic logic gate to obtain the circularly polarized optoelectronic logic gate.
[0028] Preferably, in the lead sulfide quantum dot solution described in step (3), the solvent is selected from either n-hexane or n-octane;
[0029] Preferably, the molecule used for ligand exchange in step (3) is a thiol molecule with a concentration of 0.02wt% to 5wt%, wherein the thiol molecule is selected from EDT or MPA, and the solvent is selected from acetonitrile or methanol.
[0030] Preferably, the mixed solution in step (5) includes:
[0031] 0.1–1 wt% photoinitiator;
[0032] 2–27 wt% organic chiral dopants;
[0033] 70–98 wt% of organic molecules with macroscopic co-assembly capability;
[0034] Preferably, the organic solvent in step (5) is selected from one or more of methane, n-hexane, dimethyl methane and chloroform.
[0035] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages: When light of a certain rotation direction irradiates a circularly polarized optoelectronic logic gate device, due to the strong chirality of the chiral liquid crystal layer, it can selectively reflect circularly polarized light of a single rotation direction. Therefore, the photocurrent obtained by circularly polarized light of different rotation directions is different. By controlling the polarization of light, "OR", "NOR", "AND", "NAND", "YES", "NOT" and "XOR" logic gates can be realized, with comprehensive logic functions. Related logic operations can be performed at a single wavelength and 0V, saving energy, requiring no complex control, and combining compactness and multifunctionality. This is of great significance for the preparation and practical application of optoelectronic logic gates. Attached Figure Description
[0036] Figure 1 This is a schematic diagram of the structure of the circularly polarized optoelectronic logic gate prepared by the present invention;
[0037] Figure 1 In the diagram, 1 is the chiral liquid crystal layer; 2 is the conductive glass substrate; 3 is the electron transport layer; 4 is the light-absorbing layer; 5 is the hole transport layer; and 6 is the gold electrode.
[0038] Figure 2 Figure (a) is a scanning electron microscope image of the optoelectronic logic gate prepared by the present invention, and Figure (b) is a polarizing microscope image of the chiral liquid crystal layer.
[0039] Figure 3 The graph shows the dark current / photocurrent-time response signals of the circularly polarized optoelectronic logic gate prepared in Example 1 of this invention under different directions of circularly polarized light and linearly polarized light irradiation at 0V; where RCP refers to right-hand circularly polarized light, LP refers to linearly polarized light, and LCP refers to left-hand circularly polarized light; the dashed line is the photocurrent threshold, the photocurrent output exceeding the value is defined as 1, and the photocurrent output below the threshold is defined as 0.
[0040] Figure 4 This diagram illustrates the implementation of a NOT logic gate by a circularly polarized optoelectronic logic gate prepared in Example 1 of the present invention under illumination by circularly polarized light in different directions. In this diagram, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0.
[0041] Figure 5 This is a schematic diagram illustrating the NAND logic gate implemented by the circularly polarized optoelectronic logic gate prepared in Example 1 of the present invention under illumination by circularly polarized light and linearly polarized light in different directions. In this diagram, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0; the photocurrent threshold is 0.5 μA.
[0042] Figure 6This is a schematic diagram illustrating how the circularly polarized optoelectronic logic gate prepared in Example 1 of the present invention implements a NOR logic gate under illumination by circularly polarized light and linearly polarized light in different directions. In this diagram, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0; the photocurrent threshold is 0.9 μA.
[0043] Figure 7 The image shows the dark current / photocurrent-time response signal of the circularly polarized optoelectronic logic gate prepared in Example 2 of this invention under different directions of circularly polarized light and linearly polarized light irradiation at 0V; where RCP refers to right-hand circularly polarized light, LP refers to linearly polarized light, and LCP refers to left-hand circularly polarized light; the dashed line is the photocurrent threshold, the photocurrent output exceeding the value is defined as 1, and the photocurrent output below the threshold is defined as 0.
[0044] Figure 8 This is a schematic diagram illustrating the YES logic gate implemented by the circularly polarized optoelectronic logic gate prepared in Example 2 of the present invention under illumination by circularly polarized light in different directions. In this diagram, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0.
[0045] Figure 9 This is a schematic diagram illustrating how the circularly polarized optoelectronic logic gate prepared in Example 2 of the present invention implements an OR logic gate under illumination by circularly polarized light and linearly polarized light in different directions. In this diagram, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0; the photocurrent threshold is 0.5 μA.
[0046] Figure 10 This is a schematic diagram illustrating how the circularly polarized optoelectronic logic gate prepared in Example 2 of the present invention implements an AND logic gate under illumination by circularly polarized light and linearly polarized light in different directions. In this diagram, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0; the photocurrent threshold is 0.9 μA.
[0047] Figure 11 This is a schematic diagram illustrating the implementation of an XOR logic gate by a circularly polarized optoelectronic logic gate prepared in Example 3 of the present invention under illumination by circularly polarized light in different directions. Detailed Implementation
[0048] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.
[0049] like Figures 1-11 As shown, a circularly polarized optoelectronic logic gate can selectively identify circularly polarized light of different chiralities, wherein right-handed CPL (R-CPL) is defined as 1 and left-handed CPL is defined as 0.
[0050] The circularly polarized optoelectronic logic gate prepared by this invention can output high or low photocurrent (HPC or LPC) under illumination by left-handed and right-handed circularly polarized light, which is equivalent to "1" and "0" in logic calculation.
[0051] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.
[0052] Example 1:
[0053] Figure 1 This is a schematic diagram of the structure of the circularly polarized optoelectronic logic gate prepared according to the present invention. The circularly polarized optoelectronic logic gate proposed in this invention includes a chiral liquid crystal layer, a conductive substrate, an electron transport layer, a quantum dot light-absorbing layer, a hole transport layer, and electrodes.
[0054] The present invention proposes a method for fabricating a circularly polarized optoelectronic logic gate, the steps of which are as follows:
[0055] (1) Electron transport layer solution is spin-coated onto a conductive substrate to obtain an electron transport layer;
[0056] The electron transport layer solution is a ZnO solution, and the spin-coating thickness is 20–100 nanometers; the conductive substrate is ITO glass.
[0057] (2) Spin-coating a lead sulfide quantum dot light-absorbing layer onto the electron transport layer;
[0058] The quantum dot light-absorbing layer is a PbS quantum dot film with a thickness of 100–500 nanometers; the size of the PbS quantum dots is 3–10 nanometers.
[0059] (3) Spin-coating an oleic acid-coated lead sulfide quantum dot solution onto the quantum dot active layer and performing ligand exchange to obtain a hole transport layer;
[0060] The hole transport layer is a PbS quantum dot film treated with EDT, with a thickness of 10–100 nanometers.
[0061] (4) Magnetron sputtering is performed on the hole transport layer to cover the gold electrodes, and photoelectric logic gates are obtained;
[0062] (5) Dissolve the organic molecules with macroscopic co-assembly capability, organic chiral dopants, and photoinitiators in an organic solvent to obtain a mixed solution;
[0063] The mixed solution includes:
[0064] 0.1–1 wt% photoinitiator;
[0065] 2–27 wt% organic chiral dopants;
[0066] 70–98 wt% of organic molecules with macroscopic co-assembly capability;
[0067] in:
[0068] The organic molecule with macroscopic co-assembly capability is RM82;
[0069] The organic chiral dopant is R-811;
[0070] The photoinitiator is one or more of azobisisobutyronitrile, Irgacure 651, and Irgacure 184;
[0071] (6) After drying the mixed solution, irradiate it with 365nm ultraviolet light at 80-90 degrees for 10 minutes to obtain a chiral liquid crystal layer;
[0072] (7) The chiral liquid crystal layer is attached to the bottom side of the optoelectronic logic gate to obtain the circularly polarized optoelectronic logic gate.
[0073] In the circularly polarized optoelectronic logic gate obtained in this embodiment, the wavelength of the irradiated circularly polarized light is 940nm.
[0074] Appendix Figure 2 This is a schematic diagram of the lead sulfide quantum dot photodetector structure provided in this embodiment; Figure 2 The device structure shown in a is as follows: an electron transport layer 3, a lead sulfide quantum dot active layer 4, a hole transport modification layer 5, and a gold electrode 6 are sequentially fabricated on a conductive glass substrate 2. Figure 2 The structure shown in b is a helical structure of a chiral liquid crystal.
[0075] Appendix Figure 3 This reflects the photocurrent-time images of the circularly polarized optoelectronic logic gate obtained in this embodiment under illumination by left-handed circularly polarized light, right-handed circularly polarized light, and linearly polarized light (which can be considered a combination of left-handed and right-handed circularly polarized light). Different logic gates can be implemented according to different photocurrent thresholds.
[0076] Appendix Figure 4 This diagram illustrates how the circularly polarized photoelectric logic gate obtained in this embodiment generates a NOT logic gate under illumination by left-handed and right-handed circularly polarized light; the left-handed CPL input generates a high photocurrent ("1"), while the right-handed CPL input outputs a low photocurrent ("0").
[0077] Appendix Figure 5 This diagram illustrates how the circularly polarized optoelectronic logic gate obtained in this embodiment is used to generate NAND logic gates under illumination by left-handed circularly polarized light, right-handed circularly polarized light, and linearly polarized light. The photocurrent threshold is set to 0.5 microamps; values higher than this are defined as "1", and values lower than this are defined as "0".
[0078] Appendix Figure 6This diagram illustrates how the circularly polarized photoelectric logic gate obtained in this embodiment is transformed into a NOR logic gate under illumination by left-handed circularly polarized light, right-handed circularly polarized light, and linearly polarized light. The photocurrent threshold is set to 0.9 microamps; values higher than this are defined as "1", and values lower than this are defined as "0".
[0079] Example 2:
[0080] The circularly polarized optoelectronic logic gate in Example 2 is prepared in a basically the same way as in Example 1, except that:
[0081] In the circularly polarized optoelectronic logic gate obtained in this embodiment, the organic chiral dopant used is R-811, with a proportion of 13%.
[0082] Appendix Figure 7 This reflects the photocurrent-time image of the circularly polarized optoelectronic logic gate obtained in this embodiment under illumination by left-handed circularly polarized light, right-handed circularly polarized light, and linearly polarized light (which can be considered as a combination of left-handed and right-handed circularly polarized light).
[0083] Appendix Figure 8 This diagram illustrates how the circularly polarized photoelectric logic gate obtained in this embodiment generates a NOT logic gate under illumination by left-handed and right-handed circularly polarized light. A left-handed CPL input generates a high photocurrent ("1"); a right-handed CPL input outputs a low photocurrent ("0").
[0084] Appendix Figure 9 This diagram illustrates how the circularly polarized photoelectric logic gate obtained in this embodiment is transformed into an OR logic gate under illumination by left-handed, right-handed, and linearly polarized light. The photocurrent threshold is set to 0.5 microamps; values higher than this are defined as "1", and values lower than this are defined as "0".
[0085] Appendix Figure 10 This diagram illustrates how the circularly polarized photoelectric logic gate obtained in this embodiment generates an AND logic gate under illumination by left-handed, right-handed, and linearly polarized light. The photocurrent threshold is set to 0.9 microamps; values higher than this are defined as "1", and values lower than this are defined as "0".
[0086] Example 3:
[0087] The fabrication method of the circularly polarized optoelectronic logic gate in Example 3 is the same as that in Example 1, except that:
[0088] This embodiment requires obtaining the two circularly polarized optoelectronic logic gates prepared in Examples 1 and 2, that is, using organic chiral dopants R-811 and S-811 respectively, with a ratio of 13%;
[0089] Appendix Figure 11This document presents a schematic diagram (truth table) illustrating the XOR logic gate obtained from the circularly polarized optoelectronic logic gate in this embodiment under illumination by left-handed and right-handed circularly polarized light. Specifically, for input 1, devices fabricated using R-811 are defined as 0, and devices fabricated using S-811 are defined as 1; for input 2, right-handed CPL (R-CPL) is defined as 1, and left-handed CPL is defined as 0.
[0090] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within the present invention.
[0091] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment have been appropriately combined to form other embodiments that are easy for those skilled in the art to understand.
Claims
1. A circularly polarized optoelectronic logic gate, characterized in that, The structure, from bottom to top, includes a chiral liquid crystal layer, a conductive substrate, an electron transport layer, a quantum dot light-absorbing layer, a hole transport layer, and electrodes. Under zero bias voltage, different electrical signals are generated when irradiated with circularly polarized light of different directions.
2. The circularly polarized optoelectronic logic gate according to claim 1, characterized in that, The chiral liquid crystal layer is a thin film obtained by copolymerization of organic molecules, organic chiral dopants, and photoinitiators with macroscopic co-assembly capabilities; The organic molecules with macroscopic co-assembly capability are one or more of RM82 and LC242; The organic chiral dopant is one or more of S-811, R-811, S-1011, R-1011, S-5011, and R-5011. The photoinitiator is one or more of azobisisobutyronitrile, Irgacure 651, and Irgacure 184.
3. The circularly polarized optoelectronic logic gate according to claim 1, characterized in that, The conductive substrate is ITO glass, and the electrode is a gold electrode.
4. The circularly polarized optoelectronic logic gate according to claim 1, characterized in that, The electron transport layer is a ZnO thin film or SnO2 thin film with a thickness of 20-100 nanometers.
5. The circularly polarized optoelectronic logic gate according to claim 1, characterized in that, The quantum dot light-absorbing layer is a PbS quantum dot film with a thickness of 100–500 nanometers; the size of the PbS quantum dots is 3–10 nanometers; and the hole transport layer is a PbS quantum dot film treated with EDT or MPA with a thickness of 10–100 nanometers.
6. A method for fabricating a circularly polarized optoelectronic logic gate as described in any one of claims 1-5, characterized in that, Includes the following steps: Step 1: Spin-coat an electron transport layer solution onto a conductive substrate to obtain an electron transport layer; Step 2: Spin-coat a lead sulfide quantum dot light-absorbing layer onto the electron transport layer; Step 3: Spin-coat a lead sulfide quantum dot solution coated with oleic acid onto the quantum dot active layer and perform ligand exchange to obtain the hole transport layer; Step 4: Perform magnetron sputtering to cover the electrodes on the hole transport layer to obtain the optoelectronic logic gate; Step 5: Dissolve the macroscopically co-assembled organic molecules, organic chiral dopants, and photoinitiators in an organic solvent to obtain a mixed solution; Step 6: After drying the mixed solution, irradiate it with 365nm ultraviolet light at 80-90 degrees Celsius for 10 minutes to obtain a chiral liquid crystal layer; Step 7: Attach the chiral liquid crystal layer to the bottom side of the optoelectronic logic gate to obtain the circularly polarized optoelectronic logic gate.
7. The preparation method according to claim 6, characterized in that, In the lead sulfide quantum dot solution described in step 3, the solvent is selected from either n-hexane or n-octane.
8. The preparation method according to claim 6, characterized in that, In step 3, the ligand exchange molecules used are thiols with a concentration of 0.02wt% to 5wt%, wherein the thiols are selected from either EDT or MPA, and the solvent is selected from either acetonitrile or methanol.
9. The preparation method according to claim 6, characterized in that, The mixed solution in step 5 comprises 0.1–1 wt% photoinitiator, 2–27 wt% organic chiral dopant, and 70–98 wt% organic molecules with macroscopic co-assembly capability.
10. The preparation method according to claim 6, characterized in that, The solvent in step 5 is selected from one or more of methane, n-hexane, dichloromethane, and chloroform.