Test method, equipment and computer program product

Abstract

The invention provides a testing method, equipment and a computer program product, and the method comprises the steps: testing a first semiconductor device, the testing comprises a first testing item, in the testing process of the first testing item, carrying out first monitoring on a first monitoring parameter of the first semiconductor device, and carrying out second monitoring on a second monitoring parameter of the first semiconductor device based on the first monitoring; and determining a test result of the first test item. By adopting the method, based on the first monitoring of the first monitoring parameter, the test result of the semiconductor device can reflect the condition of the monitoring parameter.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor testing, and in particular, to a testing method, device and computer program product. BACKGROUND

[0002] After semiconductor device manufacturing (e.g., tape-out), it is usually necessary to test the semiconductor device in terms of electrical characteristics, structure, function, reliability, etc. SUMMARY

[0003] The present application provides a testing method, device and computer program product, which can make the test result of the semiconductor device reflect the situation of the monitoring parameter.

[0004] In a first aspect, a testing method for testing a semiconductor device is provided, the testing method comprising: testing a first semiconductor device, the testing comprising a first test item; monitoring a first monitoring parameter of the first semiconductor device during testing of the first test item; and determining a test result of the first test item based on the monitoring.

[0005] Based on the above technical solution, the monitoring parameter can be monitored during testing of the test item and the test result of the test item can be determined based on the monitoring, so that the test result can reflect the situation of the monitoring parameter. In addition, the monitoring of the monitoring parameter is performed during testing of the test item, and compared with the test item that only tests the monitoring parameter, the monitoring parameter can be obtained in a situation closer to the actual working condition of the semiconductor device, and the situation of the monitoring parameter of the semiconductor device can be better acquired.

[0006] With reference to the first aspect, in some implementations of the first aspect, determining the test result of the first test item based on the monitoring comprises: in response to the first monitoring parameter in the monitoring satisfying a first alarm condition, classifying the test result of the first semiconductor device into a first monitoring classification.

[0007] With reference to the first aspect, in some implementations of the first aspect, the testing process of the first test item comprises: monitoring a first test index of the first test item.

[0008] With reference to the first aspect, in some implementations of the first aspect, determining the test result of the first test item based on the monitoring comprises: determining the test result of the first test item based on the first monitoring parameter and the first test index in the monitoring.

[0009] With reference to the first aspect, in some implementations of the first aspect, during the testing process of the first test item, in response to the first monitoring parameter in the monitoring satisfying a first alarm condition, the testing process of the first test item is stopped or the testing of the first semiconductor device is stopped.

[0010] With reference to the first aspect, in some implementations of the first aspect, during the testing of the first test item, the first monitoring parameter in the first monitoring does not satisfy the first alarm condition, the testing further includes a second test item, and the testing method further includes: during the testing of the second test item, performing second monitoring on the first monitoring parameter of the first semiconductor device; and based on the second monitoring, determining a test result of the second test item.

[0011] With reference to the first aspect, in some implementations of the first aspect, based on the second monitoring, determining the test result of the second test item includes: in response to the first monitoring parameter in the second monitoring satisfying a second alarm condition, classifying the test result of the first semiconductor device into a first monitoring classification.

[0012] With reference to the first aspect, in some implementations of the first aspect, the first alarm condition is the same as or different from the second alarm condition.

[0013] With reference to the first aspect, in some implementations of the first aspect, the first monitoring parameter includes one of a current parameter of a terminal of the semiconductor device, a voltage parameter of the terminal of the semiconductor device, and a junction temperature parameter of the semiconductor device.

[0014] With reference to the first aspect, in some implementations of the first aspect, the testing method further includes: during the testing of the first test item, performing third monitoring on a second monitoring parameter of the first semiconductor device.

[0015] With reference to the first aspect, in some implementations of the first aspect, the testing of the first semiconductor device belongs to a first test event, the first test event is used for testing a plurality of semiconductor devices, the plurality of semiconductor devices includes the first semiconductor device, and the testing method includes: based on a start instruction of the first test event, testing the plurality of semiconductor devices; and based on an end instruction of the first test event, generating a test result file of the plurality of semiconductor devices.

[0016] With reference to the first aspect, in some implementations of the first aspect, the plurality of semiconductor devices belongs to a first wafer, and the testing method includes: based on a test start instruction of the first wafer and a test end instruction of the first wafer, determining a test result of the first wafer.

[0017] The second aspect provides a testing device, including a memory and a processor, the memory is used for storing instructions, and the processor is used for executing the instructions to execute any one of the testing methods in the first aspect.

[0018] The third aspect provides a computer program product, the computer program product includes instructions, when the instructions are executed by a processor, any one of the testing methods in the first aspect is executed. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 A schematic flow chart of a test method according to an example embodiment of the application is shown; Figure 2 A schematic flow chart of another test method according to an example embodiment of the application is shown; Figure 3 A flow chart of yet another test method according to an example embodiment of the application is shown; Figure 4 A flow chart of yet another test method according to an example embodiment of the application is shown; Figure 5 A schematic diagram of yet another test method according to an example embodiment of the application is shown; Figure 6 A schematic diagram of a test event according to an example embodiment of the application is shown; Figure 7 A schematic diagram of another test event according to an example embodiment of the application is shown; Figure 8 A schematic diagram of a test apparatus according to an example embodiment of the application is shown; Figure 9 A schematic diagram of yet another test apparatus according to an example embodiment of the application is shown. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the present application will be described below with reference to the drawings.

[0021] In order to make the drawing simple, only the parts related to the corresponding embodiments are shown in the drawings in the embodiments of the present application, which do not represent the actual structure of the products. In addition, in order to make the drawing simple and easy to understand, only some structures or components are shown in some drawings, and there can be more or less the same or similar structures or components.

[0022] The business scenarios described in the embodiments of the present application are used to illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. It can be known by those skilled in the art that, with the evolution of technology and the appearance of new business scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0023] In this application, unless otherwise explicitly specified and limited, "connection" includes direct connection or indirect connection between objects: connection between objects can be directly connected through a medium (for example, wire, wire, etc.), or can be indirectly connected through other elements, or can be internal communication. "Coupling" includes signal connection between objects, which can be directly connected through a medium (for example, wire, wire, etc.), or can be connected through other elements, etc. "Ground" includes direct grounding or indirect grounding, and indirect grounding includes grounding through other elements, for example.

[0024] In this application, unless otherwise explicitly specified and limited, ordinal numbers such as "first", "second" and the like are only used to distinguish the described objects, and cannot be understood as indicating or implying the relative importance or order between the described objects. In addition, ordinal numbers do not represent the number of described objects. "Multiple" includes two or more, and other quantifiers are similar. "Or", "and / or" are used to describe the relationship between objects, which means non-exclusive inclusion. For example, "A and / or B", "A or B" can include: "A alone", "B alone", or "A and B". For example, "A, B and / or C", "A, B or C" can include: "A alone", "B alone", "C alone", "A and B", "A and C", "B and C", or "A, B and C". In addition, " / " in this application is used to represent the relationship between the objects before and after "or". In this application, "one or more of A and B" or "at least one of A and B" has the same meaning as "A and / or B", "A or B". "One or more of A, B and C" or "at least one of A, B and C" has the same meaning as "A, B and / or C", "A, B or C".

[0025] The test of the semiconductor device can include a plurality of different test items. The test item can include testing whether the function of the semiconductor device meets the expectation. For example, the test item can include testing the data transmission function of the interface of the semiconductor device; can include testing the logic calculation function of the semiconductor device. The test result of the test item can be used for classification and / or grading of the semiconductor device. For example, if a certain test item of the semiconductor device fails, the test result of the test item can be determined as failed, and the semiconductor device can be classified into the classification corresponding to the test item. However, such determination of the test result and classification based on the test result cannot reflect the reason for the test failure, and is not convenient for problem analysis of the semiconductor device.

[0026] Based on this, the embodiments of the present application provide a test method, which can facilitate the problem analysis of the semiconductor device.

[0027] For example, Figure 1A schematic flow chart of a testing method according to an example embodiment of the present application is shown. The method 100 can be used for testing a semiconductor device. As shown, the method 100 can comprise the following steps: Figure 1 Step 101, testing the first semiconductor device.

[0028] Step 102, monitoring a first monitoring parameter of the first semiconductor device during testing of a first test item of the testing.

[0029] Step 103, determining a test result of the first test item based on the first monitoring.

[0030] With the testing method provided by the above embodiments, the monitoring parameter can be monitored during testing of the test item and the test result of the test item can be determined based on the monitoring, so that the test result can reflect the situation of the monitoring parameter. In addition, the monitoring of the monitoring parameter is performed during testing of the test item, and compared with the test item for testing the monitoring parameter, the monitoring parameter can be obtained in a situation closer to the actual working condition of the semiconductor device, and the situation of the monitoring parameter of the semiconductor device can be better obtained.

[0031] Exemplarily, the semiconductor device can include an unpackaged integrated circuit or a packaged integrated circuit, such as a chip. The unpackaged integrated circuit can include a die, which can include a die not yet separated from a wafer or a die already separated from a wafer. The testing of the semiconductor device can include at least one test item. The first test item can include a test item of the at least one test item in the testing of the first semiconductor device.

[0032] In some embodiments, the testing process of the test item can include monitoring a test index of the test item. For example, the testing process of the first test item includes monitoring a first test index of the first test item. The test index can be set for a test target of the test item, such as for electrical characteristics, structure, function, reliability, etc. of the semiconductor device. Monitoring the test index can be used to determine whether the test target is completed, and thus can be used to determine whether the test item is passed.

[0033] Exemplarily, the test item can include a scan or scan chain test for detecting a structure in a circuit (such as a digital circuit, a logic circuit, etc.) of the semiconductor device, which can detect a fault in the circuit, and the test index can include a comparison result of a test output of the semiconductor device and an expected output.

[0034] ​Exemplarily, the test item can include a memory built-in self-test (Mbist) which can be used to detect faults of a memory circuit based on a circuit inside the semiconductor device, and the test index can include a test result output by the semiconductor device, such as whether a fault is included, a fault type, a fault location, and the like.

[0035] In some embodiments, the monitoring parameter is different from the test index. The monitoring parameter can include a parameter reflecting an operating condition of the semiconductor device during the test of the test item. The monitoring parameter can include a current parameter, a voltage parameter, a temperature parameter, and the like. By monitoring the monitoring parameter during the test of the test item, the condition of the monitoring parameter of the semiconductor device under the operating condition or close to the operating condition can be obtained, and the first monitoring parameter of the first semiconductor device is monitored without increasing additional test content and test time, so that the test result can reflect the condition of the monitoring parameter, thereby facilitating analysis of the problem of the semiconductor device based on the test result. In addition, the monitoring of the monitoring parameter is performed during the test of the test item, and compared with the test item for testing the monitoring parameter, the condition of the monitoring parameter can be obtained under a condition closer to the actual use of the semiconductor device, and the test result can better reflect the condition of the monitoring parameter of the semiconductor device. For example, the current parameter can include a current parameter of a terminal of the semiconductor device. For another example, the voltage parameter can include a voltage parameter of a terminal of the semiconductor device. For another example, the temperature parameter can include a junction temperature parameter of the semiconductor device.

[0036] In some embodiments, an alarm condition can be set for the monitoring parameter. The alarm condition can be used to warn of risks such as damage to the semiconductor device. The monitoring parameter can include, for example, current, voltage, temperature, and the like, and the alarm condition can include that the monitoring parameter reaches or exceeds a set threshold. By setting the alarm condition, the safety risk when the monitoring parameter reaches or exceeds the set threshold can be warned.

[0037] In some embodiments, in response to the monitoring parameter satisfying the alarm condition, the test result of the semiconductor device can be classified into a classification corresponding to the monitoring parameter. Exemplarily, step 103 can include classifying the test result of the first semiconductor device into a first monitoring classification in response to the first monitoring parameter in the first monitoring satisfying a first alarm condition. The first monitoring classification can include a classification corresponding to the first monitoring parameter. In the first test item, the alarm condition corresponding to the first monitoring parameter can be referred to as the first alarm condition. When the monitoring parameter satisfies the alarm condition, the test result is classified according to the monitoring parameter rather than the currently performed test item, which can reflect that the semiconductor device has a problem in terms of the monitoring parameter, and is helpful for accurate analysis of the problem of the semiconductor device.

[0038] In some embodiments, the test result of the test item can be determined based on the monitoring parameter and the test index. Illustratively, step 103 can include determining the test result of the first test item based on the first monitoring parameter in the first monitoring and the first test index. The test result of the test item is determined based on both the monitoring parameter and the test index, which can reflect the condition of the semiconductor device in the test and the performance of the semiconductor device in the test item itself, and can more comprehensively reflect the performance of the semiconductor device in the test item. For example, when the monitoring parameter meets the alarm condition, the test result of the test item can be determined as failed. For another example, when the monitoring parameter is normal and does not meet the alarm condition, the test result of the test item can be determined based on the test index; the test index indicates that the test item passes, and the test result of the test item is pass; the test index indicates that the test item fails, and the test result of the test item is fail.

[0039] In some embodiments, the test can be stopped in response to the monitoring parameter meeting the alarm condition. Illustratively, step 103 can include, during the test process of the first test item, in response to the first monitoring parameter in the first monitoring meeting the first alarm condition, stopping the test process of the first test item or stopping the test of the first semiconductor device. The alarm condition is used to warn the risk, and the test is stopped when the monitoring parameter meets the alarm condition, which can prevent the risk from causing damage or deepening of damage to the semiconductor device or even the test equipment. Therefore, whether the test item is completed or not, the test of the current test item can be directly stopped, or the test of the semiconductor device can be directly stopped. For example, the test item is not completed, but the monitoring parameter meets the alarm condition, the test can be stopped, and the test result of the test item can be determined as failed, and / or the test result of the semiconductor device can be classified into the classification corresponding to the monitoring parameter. For another example, the test item is completed when the monitoring parameter meets the alarm condition, the test can be stopped, and whether the test index indicates that the test item passes or not, the test result of the semiconductor device can be classified into the classification corresponding to the monitoring parameter based on the monitoring parameter. That is, compared with the test index, the priority of the classification of the test result of the semiconductor device based on the monitoring parameter is higher.

[0040] The test of the semiconductor device can include a plurality of test items, and the same monitoring parameter can be monitored in the processes of two or more test items in the plurality of test items, and the test result of each test item in which the same monitoring parameter is monitored in the process can be determined based on the monitoring of the monitoring parameter. Illustratively, Figure 2 A schematic flowchart of another test method according to an exemplary embodiment of the present application is shown, which can be used to test a semiconductor device. As shown in the figure, the method 200 can include steps 101, 102, and 103, and can further include the following steps: Figure 2 as shown in the figure, the method 200 can include steps 101, 102, and 103, and can further include the following steps: Step 204, performing second monitoring on the first monitoring parameter of the first semiconductor device in a test process of a second test item of the test.

[0041] Step 205, determining a test result of the second test item based on the second monitoring.

[0042] By the test method provided in the above embodiments, the same monitoring parameter can be monitored in the test processes of multiple test items, and the test results of the multiple test items can be respectively determined based on the corresponding monitoring, so that the situation of the monitoring parameter in the test can be more comprehensively reflected.

[0043] The second test item can be tested after the first test item. The second test index can be set for a test target of the second test item.

[0044] In some embodiments, step 205 can include, in response to the first monitoring parameter in the second monitoring satisfying a second alarm condition, classifying the test result of the first semiconductor device into a first monitoring classification. In the second test item, the alarm condition corresponding to the first monitoring parameter can be referred to as a second alarm condition. Whether the first monitoring parameter satisfies the first alarm condition in the first test item or the first monitoring parameter satisfies the second alarm condition in the second test item, the test result of the first semiconductor device can be classified into the first monitoring classification, so that the test result of the semiconductor device can be preferentially classified into a classification corresponding to the monitoring parameter in the case of monitoring parameter alarm, and the situation of the monitoring parameter in the test can be more comprehensively reflected. The same monitoring parameter can be monitored in the test processes of multiple test items, and the test results of the multiple test items can be respectively determined based on the corresponding monitoring, so that the problem of the semiconductor device can be facilitated to be analyzed.

[0045] In some embodiments, the classification corresponding to the monitoring parameter can include a sub-classification, and the sub-classification can correspond to a test item in which the monitoring parameter satisfies the alarm condition. For example, in step 103, the test result of the first semiconductor device is classified into the first monitoring classification, and the sub-classification of the first monitoring classification includes the first test item. For another example, in step 205, the test result of the first semiconductor device is classified into the first monitoring classification, and the sub-classification of the first monitoring classification includes the second test item. By setting the sub-classification, the classification information can be refined, and the problem of the semiconductor device can be facilitated to be deeply analyzed.

[0046] In some embodiments, the alarm conditions set for the monitoring parameters corresponding to different test items can be the same. For example, the first alarm condition and the second alarm condition can be the same. For example, the first monitoring parameter is a current parameter of a terminal of the first semiconductor device, the first alarm condition can be that the first monitoring parameter reaches or exceeds a current threshold value 80 mA in the first test item, and the second alarm condition can be that the first monitoring parameter reaches or exceeds the current threshold value 80 mA in the second test item. The first alarm condition and the second alarm condition are the same, which can simplify the setting of the alarm condition and can be suitable for the case where the monitoring parameter has the same or similar reasonable range for different test items.

[0047] In some embodiments, the alarm conditions set for the monitoring parameters corresponding to different test items can be different. For example, the first alarm condition and the second alarm condition can be different. For example, the first monitoring parameter is a junction temperature of the first semiconductor device, and the temperature threshold value of the junction temperature of the logic part in the semiconductor device can be higher than the temperature threshold value of the junction temperature of the storage part. The first test item is related to the logic part, and the first alarm condition can be that the first monitoring parameter reaches or exceeds the temperature threshold value 125℃ in the first test item. The second test item is related to the storage part, and the second alarm condition can be that the first monitoring parameter reaches or exceeds the temperature threshold value 85℃ in the second test item. The first alarm condition and the second alarm condition are different, which can make the monitoring of the first monitoring parameter more flexible and more in line with the requirements of the first monitoring parameter for each test item.

[0048] In some embodiments, during the test process, two or more monitoring parameters can be monitored. For example, during the test process of the first test item, in addition to the first monitoring of the first monitoring parameter, a third monitoring of a second monitoring parameter can also be performed. In addition, the test result of the first test item can be determined based on the first monitoring and the third monitoring. Monitoring multiple monitoring parameters during the test process of the test item and determining the test result of the test item based on the monitoring can make the test result more comprehensively reflect the conditions of multiple monitoring parameters of the first semiconductor device, and can more comprehensively and accurately analyze the test data of the first semiconductor device. In addition, monitoring multiple monitoring parameters during the test process of the test item can improve the monitoring efficiency of the monitoring parameters.

[0049] The first monitoring parameter can include one of a current parameter of a terminal of the semiconductor device, a voltage parameter of a terminal of the semiconductor device, and a junction temperature parameter of the semiconductor device, and the second monitoring parameter can include another one of the current parameter of the terminal of the semiconductor device, the voltage parameter of the terminal of the semiconductor device, and the junction temperature parameter of the semiconductor device.

[0050] The alarm condition of the second monitoring parameter in the first test item can be referred to as a third alarm condition. The test result of the first semiconductor device can be classified into a second monitoring classification in response to the second monitoring parameter satisfying the third alarm condition, and the second monitoring classification can include a classification corresponding to the second monitoring parameter.

[0051] Exemplarily, if the first monitoring parameter is a junction temperature parameter of the semiconductor device, the second monitoring parameter can be a current parameter of a terminal of the semiconductor device. The first monitoring parameter and the second monitoring parameter can be monitored simultaneously in the test process of the first test item. When it is monitored that the first monitoring parameter satisfies the first alarm condition, the test result of the first semiconductor device is classified into a first monitoring classification. When it is monitored that the second monitoring parameter satisfies the third alarm condition, the test result of the first semiconductor device is classified into a second monitoring classification.

[0052] When it is monitored that the first monitoring parameter satisfies the first alarm condition and the second monitoring parameter satisfies the third alarm condition simultaneously, the test result of the first semiconductor device can be classified into the first monitoring classification or the second monitoring classification. For example, the test result of the first semiconductor device can be classified into the first monitoring classification or the second monitoring classification according to the importance levels of the first monitoring parameter and the second monitoring parameter. If the importance level of the first monitoring parameter is higher than that of the second monitoring parameter, the test result of the first semiconductor device is classified into the first monitoring classification. If the importance level of the second monitoring parameter is higher than that of the first monitoring parameter, the test result of the first semiconductor device is classified into the second monitoring classification. In a possible implementation, the classification corresponding to a monitoring parameter can include a sub-classification, and the sub-classification can correspond to another monitoring parameter. In the case that the first monitoring parameter satisfies the first alarm condition and the second monitoring parameter satisfies the third alarm condition simultaneously, and the first semiconductor device is classified into the first monitoring classification, the sub-classification can include the second monitoring classification. In the case that the first monitoring parameter satisfies the first alarm condition and the second monitoring parameter satisfies the third alarm condition simultaneously, and the first semiconductor device is classified into the second monitoring classification, the sub-classification can include the first monitoring classification.

[0053] In addition, the second monitoring parameter can be described with reference to the description of the first monitoring parameter in the above embodiments, which will not be repeated here.

[0054] In some embodiments, an alarm identifier can be set for a monitoring parameter, and the alarm identifier can include a digital code. Different values of the digital code can represent different states. For example, the digital code of the alarm identifier is 101, which represents a non-alarm state, and the digital code of the alarm identifier is 111, which represents an alarm state. In response to the monitoring parameter satisfying the alarm condition, the alarm identifier can be set to 111 from 101. The alarm identifier in the alarm state can be used to know that the monitoring parameter satisfies the alarm condition.

[0055] Testing semiconductor devices can include multiple test items. If the test performance of one of the test items fails to meet the test objectives, the testing of other test items can be discontinued. For example, Figure 3 A flowchart of yet another testing method according to an exemplary embodiment of this application is shown. In testing method 300, testing of other test items is stopped when the test indicators of a test item do not meet the test objectives. This testing method may be referred to as a Stop-on-Fail (SOF) testing method.

[0056] like Figure 3 As shown, the testing of semiconductor devices includes four test items; however, this embodiment is not limited to this, and the test may include more or fewer than four test items. During the testing process of each test item, the corresponding test indicators are monitored, and the monitoring parameters are also monitored.

[0057] like Figure 3 As shown, if the monitored parameters meet the alarm conditions and / or the test indicators do not meet the test objectives, the test item fails, and further testing of other test items will not continue. Furthermore, the semiconductor devices are categorized based on the reasons for test failure. If the monitored parameters meet the alarm conditions, the semiconductor device is categorized into the monitoring category corresponding to the monitored parameters. If the monitored parameters do not meet the alarm conditions and the test indicators do not meet the test objectives, the semiconductor device is categorized into the category corresponding to the current test item.

[0058] For example, in the test of test item #31, if test indicator #31 of test item #31 does not meet the test objective and monitoring parameter #3 does not meet the alarm condition, the test of test item #32 will not be performed. Furthermore, the semiconductor device will be classified as test category #31. As another example, in the test of test item #31, if monitoring parameter #3 meets the alarm condition, the test of test item #32 will not be performed. Furthermore, the semiconductor device will be classified as monitoring category #3. As another example, in the test of test item #31, if test indicator #31 of test item #31 meets the test objective and monitoring parameter #3 does not meet the alarm condition, then test item #32 passes, and the test of test item #32 can continue. Test items #32, #33, and #34 can be described with reference to the description of test item #31, and will not be repeated here. Furthermore, if test item #34 passes, the semiconductor device can be classified as passed.

[0059] Testing semiconductor devices can include multiple test items. If the test performance of one test item fails to meet the test objective, other test items can be tested. For example, Figure 4A flow chart of yet another test method according to an exemplary embodiment of the present application is shown. In the test method 400, the test of other test items can be continued when the test indicator of a test item does not meet the test target. The test method can be referred to as Continue on Fail (COF) test method. As shown in Figure 4 The test of the semiconductor device includes four test items, however, the embodiments are not limited thereto, and the test can include more or less than four test items. During the test of the test items, the corresponding test indicators are monitored, and the monitoring parameters are monitored.

[0060] As shown in Figure 4 When the monitoring parameter meets the alarm condition, the test of other test items is no longer continued. In addition, the semiconductor device is classified into the monitoring classification corresponding to the monitoring parameter. In addition, the test can further include a classification item. When the monitoring parameter of the test item does not meet the alarm condition, after the completion of the multiple test items of the test, the classification item can be performed, and the semiconductor device is classified into the corresponding test classification or pass based on the test indicator of the test item. For example, when the multiple test items all pass, the semiconductor device is classified into pass. For another example, when the multiple test items include one failed test item, the semiconductor device is classified into the test classification corresponding to the failed test item. For another example, when the multiple test items include two or more failed test items, the semiconductor device is classified into the test classification corresponding to the test item with the largest deviation from the test target among the failed test items. The deviation can include relative deviation. For another example, the test items can include priority ranking, and when the multiple test items include two or more failed test items, the semiconductor device can be classified into the test classification corresponding to the test item with the lowest or highest priority among the failed test items.

[0061] For example, in the test of the test item #41, the monitoring parameter #4 meets the alarm condition, and the test of the test item #42 is no longer performed. In addition, the semiconductor device is classified into the monitoring classification #4. For another example, in the test item #41, the test item #42, the test item #43 and the test item #44, the monitoring parameter #4 does not meet the alarm condition, and the classification is performed in the classification item. The classification can be performed in the manner as described in the above embodiments, which will not be repeated here.

[0062] Figure 5A schematic diagram of yet another test method according to an example embodiment of the present application is shown. The test method 500 can be used to test a plurality of semiconductor devices. Test events can be used to test the plurality of semiconductor devices. For example, the plurality of semiconductor devices can be tested by a first test event, the plurality of semiconductor devices can include the first semiconductor device of the above embodiments, and the first test event can include testing of the first semiconductor device. The test method 500 can include the following steps: At step 501, the plurality of semiconductor devices are tested based on a start instruction of the first test event.

[0063] At step 503, a test result file of the plurality of semiconductor devices is generated based on an end instruction of the first test event.

[0064] Test equipment generates a test result file for each manual test, and when multiple manual tests are performed, multiple test result files are generated. However, the multiple test result files are not conducive to analysis and management of the plurality of semiconductor devices. The test method 500 can be used for non-automatic testing (e.g., small batch manual testing in the engineering stage), and the plurality of semiconductor devices are tested based on the test event. After testing the plurality of semiconductor devices, a test result file of the plurality of semiconductor devices is generated based on the test event. Compared with generating a test result file for each test of the semiconductor device, the test result of the plurality of semiconductor devices is more conducive to analysis and management. In addition, the test result of the plurality of semiconductor devices is generated into a test result file, and there is no need to combine multiple test result files, which can simplify the operation and reduce the error probability of the file.

[0065] For example, the test method 500 can be performed by an automatic test equipment (ATE). The automatic test equipment can include an automated test system integrated with hardware and software, and can send test signals to the semiconductor device according to a program, collect feedback data and automatically determine whether to pass. The automatic test equipment can simulate interaction with a prober or handler, call an automatic test program related to the prober or handler, so as to generate a test result file of the plurality of semiconductor devices through the automatic test program in a non-automatic testing scenario. Compared with generating a test result file of the plurality of semiconductor devices in a complete design of non-automatic testing, the existing automatic test program can be partially reused, and the implementation manner is simplified.

[0066] In some embodiments, the plurality of semiconductor devices belong to the same wafer, e.g., a first wafer. The test method 500 can further include a step 502 of determining test results of the first wafer based on the test start instruction of the first wafer and the test end instruction of the first wafer. The test result file corresponding to the plurality of semiconductor devices can include, in addition to the test results of the respective semiconductor devices, other information such as the position information of the semiconductor devices in the wafer, and can organize the test results of the plurality of semiconductor devices simply but orderly (e.g., based on the position information of the semiconductor devices in the wafer), facilitating analysis and management of the test results of the plurality of semiconductor devices. For example, the semiconductor devices can be directly located according to the test result file, the defects of the semiconductor devices can be quickly located, and the defect rules of the semiconductor devices can be obtained.

[0067] Figure 6 A schematic diagram of a test event according to an example embodiment of the present application is shown. The test event 600 can be used for circuit probing or chip probing (CP) test or wafer test. Referring to Figure 6 , the batch start instruction, the batch end instruction, the wafer start instruction, the wafer end instruction, the device n start instruction, and the device n end instruction of the test event 600 can correspond to an automatic test program, where n is a positive integer, and n ∈ [1, N], N is the number of test devices corresponding to a wafer. The batch start instruction and the batch end instruction can serve as the start instruction and the end instruction of the event 600. In addition, Figure 6 , the test event 600 includes a wafer instruction group, and the wafer instruction group includes the wafer start instruction and the wafer end instruction corresponding to each other. However, the embodiments are not limited thereto, and the test event 600 can include a plurality of wafer instruction groups and a plurality of device start instructions and device end instructions corresponding to the wafer instruction groups, and each wafer instruction group can correspond to a plurality of device start instructions and device end instructions.

[0068] The test method according to the embodiments of the present application can simulate the interaction between the automatic test machine and the probe station, and perform the test of the plurality of semiconductor devices through the test event 600. For example, the interaction between the automatic test machine and the probe station can be simulated through a general-purpose interface bus (GPIB) driver of a virtual probe station, so as to perform the test of the plurality of semiconductor devices based on the test event 600.

[0069] Figure 7 A schematic diagram of another test event according to an example embodiment of the present application is shown. The test event 700 can be used for final test (FT) or product test, which is the test of a chip after cutting and packaging. Referring to Figure 7The batch start instruction, the batch end instruction, the device m start instruction, and the device m end instruction of the test event 700 can correspond to an automatic test program, where m is a positive integer, and m∈[1, M], and M is the number of test devices corresponding to the batch. The batch start instruction and the batch end instruction can be used as the start instruction and the end instruction of the event 700.

[0070] The test method according to the embodiments of the present application can simulate the interaction between the automatic test machine and the handler, and perform the test of the plurality of semiconductor devices through the test event 700. For example, the interaction between the automatic test machine and the probe station can be simulated through a general-purpose interface bus (GPIB) driver of a virtual handler, so as to perform the test of the plurality of semiconductor devices based on the test event 700.

[0071] The embodiments of the above test method can be combined with each other. For example, the test result of the test item of the semiconductor device can be determined based on the monitoring parameter, and the test results of the plurality of semiconductor devices can generate one test result file.

[0072] Figure 8 A schematic diagram of a test device according to an exemplary embodiment of the present application is shown as follows. Figure 8 As shown in the figure, the test device includes a processing unit 801, a determination unit 802, The processing unit 801 is configured to test the first semiconductor device, and the test includes a first test item; and perform first monitoring on a first monitoring parameter of the first semiconductor device during the test of the first test item. The determination unit 802 is configured to determine the test result of the first test item based on the first monitoring.

[0073] In a possible implementation, the determination unit 802 is specifically configured to, in response to the first monitoring parameter in the first monitoring satisfying a first alarm condition, classify the test result of the first semiconductor device into a first monitoring classification.

[0074] In a possible implementation, the processing unit 801 is specifically configured to monitor a first test index of the first test item.

[0075] In a possible implementation, the determination unit 802 is specifically configured to determine the test result of the first test item based on the first monitoring parameter in the first monitoring and the first test index.

[0076] In a possible implementation, the processing unit 801 is further configured to, during the test of the first test item, in response to the first monitoring parameter in the first monitoring satisfying a first alarm condition, stop the test process of the first test item or stop the test of the first semiconductor device.

[0077] In a possible implementation, during the test of the first test item, the first monitoring parameter in the first monitoring does not satisfy the first alarm condition, the test further includes a second test item, and the processing unit 801 is further configured to perform second monitoring on the first monitoring parameter of the first semiconductor device during the test of the second test item; and the determining unit 802 is further configured to determine a test result of the second test item based on the second monitoring.

[0078] In a possible implementation, the determining unit 802 is specifically configured to, in response to the first monitoring parameter in the second monitoring satisfying a second alarm condition, classify the test result of the first semiconductor device as a first monitoring classification.

[0079] In a possible implementation, the first alarm condition is the same as or different from the second alarm condition.

[0080] In a possible implementation, the first monitoring parameter includes one of a current parameter of a terminal of the semiconductor device, a voltage parameter of the terminal of the semiconductor device, and a junction temperature parameter of the semiconductor device.

[0081] In a possible implementation, the processing unit 801 is further configured to perform third monitoring on a second monitoring parameter of the first semiconductor device during the test of the first test item.

[0082] In a possible implementation, the test of the first semiconductor device belongs to a first test event, the first test event is used for testing a plurality of semiconductor devices, and the plurality of semiconductor devices includes the first semiconductor device; the processing unit 801 is further configured to perform the test on the plurality of semiconductor devices based on a start instruction of the first test event; and generate a test result file of the plurality of semiconductor devices based on an end instruction of the first test event.

[0083] In a possible implementation, the plurality of semiconductor devices belongs to a first wafer, and the determining unit 802 is further configured to determine a test result of the first wafer based on a test start instruction of the first wafer and a test end instruction of the first wafer.

[0084] It should be understood that the division of the above units is only a logical functional division, and all or part of them can be integrated into one physical entity, or can be physically separated.

[0085] The embodiment of the present application further provides a test device, Figure 9 A schematic diagram of yet another test device according to an exemplary embodiment of the present application is shown, as Figure 9As shown, the test apparatus 900 includes a memory 902 configured to store instructions, and at least one processor 901 configured to execute the instructions stored in the memory 902 to perform any of the test methods in the above embodiments. In some possible embodiments, the processor or processing circuitry is a circuit with signal processing capability, for example, the processor can be a circuit with instruction reading and running capability; in some other possible embodiments, the processor can implement its functions through a logic relationship of a hardware circuit, which is fixed or can be reconfigured, for example, the processor is an ASIC or a PLD implemented hardware circuit, for example, a field programmable gate array (FPGA). In the reconfigurable hardware circuit, the processor loads a configuration document to implement the process of configuring the hardware circuit, which can be understood as the process of the processor loading instructions to implement the functions of part or all of the units above. The present application does not limit the type of processor, for example, including a central processing unit (CPU), a microcontroller unit (MCU), a graphics processing unit (GPU), or a digital signal processor (DSP), etc. Or it can be a hardware circuit designed for artificial intelligence, which can be understood as an ASIC, for example, a neural network processing unit (NPU), a tensor processing unit (TPU), a deep learning processing unit (DPU), etc.

[0086] The present application does not limit the type of test apparatus. For example, according to some embodiments, the test apparatus can include an ATE, a system level test (SLT) apparatus, etc.

[0087] The embodiments of the present application also provide a computer program product, which includes instructions, when the instructions are executed by a processor, any of the test methods in the above embodiments are performed.

[0088] The embodiments of the present application also provide a computer readable medium, which stores instructions, when the instructions are executed by a processor, any of the test methods in the above embodiments are performed.

[0089] In the above embodiments, the description of different embodiments focuses on different aspects, and the parts not described or recorded in detail in a certain embodiment can be referred to the related description of other embodiments. And the above different embodiments can be freely combined according to the needs. And with the evolution of technology, the elements described in the present application can be replaced by equivalent elements appearing after the present application.

Claims

1. A testing method, characterized in that, Used for testing semiconductor devices, including: The first semiconductor device is tested, and the test includes a first test item; During the testing process of the first test item, the first monitoring parameter of the first semiconductor device is monitored. Based on the first monitoring, the test results of the first test item are determined.

2. The test method according to claim 1, characterized in that, The determination of the test results of the first test item based on the first monitoring includes: In response to the first monitoring parameter in the first monitoring meeting the first alarm condition, the test result of the first semiconductor device is classified into the first monitoring category.

3. The test method according to claim 1 or 2, characterized in that, The testing process for the first test item includes: Monitor the first test index of the first test item.

4. The test method according to claim 3, characterized in that, The determination of the test results of the first test item based on the first monitoring includes: Based on the first monitoring parameter and the first test index in the first monitoring, the test result of the first test item is determined.

5. The test method according to claim 3, characterized in that, Also includes: During the testing process of the first test item, in response to the first monitoring parameter in the first monitoring meeting the first alarm condition, the testing process of the first test item is stopped or the testing of the first semiconductor device is stopped.

6. The test method according to claim 1, characterized in that, During the testing of the first test item, if the first monitoring parameter in the first monitoring does not meet the first alarm condition, the test also includes a second test item, and the test method further includes: During the testing process of the second test item, the first monitoring parameter of the first semiconductor device is monitored in a second manner; Based on the second monitoring, the test results of the second test item are determined.

7. The test method according to claim 6, characterized in that, The determination of the test results for the second test item based on the second monitoring includes: In response to the first monitoring parameter in the second monitoring meeting the second alarm condition, the test result of the first semiconductor device is classified into the first monitoring category.

8. The test method according to claim 7, characterized in that, The first alarm condition may be the same as or different from the second alarm condition.

9. The test method according to any one of claims 1 to 8, characterized in that, The first monitoring parameter includes one of the following: the current parameter of the semiconductor device terminal, the voltage parameter of the semiconductor device terminal, and the junction temperature parameter of the semiconductor device.

10. The test method according to any one of claims 1 to 9, characterized in that, Also includes: During the testing process of the first test item, the second monitoring parameter of the first semiconductor device is monitored in a third way.

11. The test method according to any one of claims 1 to 10, characterized in that, The testing of the first semiconductor device belongs to a first test event, which is used to test multiple semiconductor devices, including the first semiconductor device. The test method includes: Based on the start command of the first test event, the plurality of semiconductor devices are tested; Based on the end command of the first test event, a test result file is generated from the test results of the multiple semiconductor devices.

12. The test method according to claim 11, characterized in that, The plurality of semiconductor devices belong to the first wafer, and the testing method includes: Based on the test start command and the test end command of the first wafer, the test result of the first wafer is determined.

13. A testing device, characterized in that, include: Memory, used to store instructions; A processor for executing the instructions to perform the test method as described in any one of claims 1 to 12.

14. A computer program product, characterized in that, The computer program product includes instructions that, when executed by a processor, cause the test method as described in any one of claims 1 to 12 to be performed.

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