A laser chip packaging structure, a packaging method and a laser array

Abstract

The application relates to the technical field of laser chip packaging, and provides a laser chip packaging structure, a packaging method and a laser array, wherein the laser chip packaging structure mainly comprises an upper cover plate, a middle layer with a cavity and a lower cover plate, which jointly form a base structure; the laser chip is fixed to the lower cover plate and accommodated in the cavity of the middle layer. The base is internally provided with through holes for filling electrode materials, the positive electrode and the negative electrode of the laser chip are electrically connected to the corresponding through holes through surface metallization of the base, so that the heat generated by the laser chip can be simultaneously and efficiently conducted to the outside through the upper and lower surfaces of the laser chip. The application improves the heat dissipation effect of the laser junction temperature zone by increasing the heat conduction channel, and further improves the performance and service life of the laser.

Description

Technical Field

[0001] This application relates to the field of laser chip packaging technology, and in particular to a laser chip packaging structure, packaging method and laser array. Background Technology

[0002] High-power semiconductor laser single-tube laser chip packaging forms include COS (Chip on Submount), C-mount, F-mount, etc. For example... Figure 1 As shown, traditional COC / COS structures typically employ a single-layer stacked packaging method, including a chip 11, gold wires 12, and a ceramic heat sink 13. To achieve electrical connection, the electrodes on the upper surface (usually the P-side) of the chip 11 are connected to corresponding pads on the ceramic heat sink 13 via a gold wire bonding process (12). The lower surface (usually the N-side) of the chip 11 is electrically connected via conductive ceramic or circuitry on a substrate. Finally, by energizing the positive and negative electrode pads on the ceramic heat sink 13, the laser chip is driven to emit light.

[0003] With the urgent need for miniaturized, high-brightness pump sources in downstream applications (such as fiber laser pumping and industrial processing), it is usually necessary to integrate multiple COC (Chip on Carrier) units in a limited space to build multi-channel, high-power output light sources.

[0004] However, this multi-channel integration scheme makes the inherent thermal management bottlenecks of traditional COC packaging structures more prominent, including: the junction temperature of the device is much higher than the measurable temperature of the ceramic substrate; when multiple COC units are closely integrated, the heat generated by each unit will be superimposed inside the module, resulting in a sharp increase in local heat flux density; and the laser performance is reduced due to excessively high junction temperature.

[0005] Therefore, there is an urgent need to develop a laser chip packaging structure, packaging method, and laser array that can achieve efficient and low thermal resistance heat dissipation. Summary of the Invention

[0006] The purpose of this application is to provide a laser chip packaging structure, packaging method, and laser array to improve the technical problems mentioned in the background section.

[0007] For the purposes mentioned above, this application provides the following technical solution:

[0008] The first aspect of this application provides a laser chip packaging structure, the laser chip packaging structure comprising:

[0009] The base includes an upper cover plate, an intermediate layer, and a lower cover plate arranged vertically from top to bottom. The intermediate layer is disposed between the upper cover plate and the lower cover plate. The upper cover plate, the intermediate layer, and the lower cover plate define a cavity structure. A through hole is provided inside the base for filling electrode material.

[0010] A laser chip is disposed inside the cavity structure, and the positive and negative electrodes of the laser chip are electrically connected to the electrode material inside the through hole, respectively.

[0011] Furthermore, the upper cover plate and / or the lower cover plate are provided with through holes; the through holes include a first through hole and a second through hole, the electrode material in the first through hole is electrically connected to the positive electrode of the laser chip, and the electrode material in the second through hole is electrically connected to the negative electrode of the laser chip.

[0012] Furthermore, the through hole is formed in the upper cover plate and the lower cover plate; the first through hole is formed in the upper cover plate, and the projection of the first through hole on the top surface of the lower cover plate at least coincides with a portion of the projection of the laser chip on the top surface of the lower cover plate; the second through hole is formed in the lower cover plate.

[0013] Furthermore, the through hole is formed in the upper cover plate, the first through hole is formed at a first position in the horizontal direction of the upper cover plate, and the second through hole is formed at a second position in the horizontal direction of the upper cover plate, the first through hole or the second through hole penetrates the upper cover plate and the intermediate layer; or, the through hole is formed in the lower cover plate, the first through hole is formed at a third position in the horizontal direction of the lower cover plate, and the second through hole may be formed at a fourth position in the horizontal direction of the lower cover plate, the first through hole or the second through hole penetrates the lower cover plate and the intermediate layer.

[0014] Furthermore, a metal layer is provided at the connection position between the laser chip and the through hole; the electrode material inside the through hole is electrically connected to the laser chip through the metal layer.

[0015] Furthermore, the inner wall of the intermediate layer is a sloping wall, and the sloping wall of the intermediate layer, the bottom surface of the lower cover plate, and the top surface of the upper cover plate define the cavity structure.

[0016] Furthermore, the intermediate layer is an insulating layer; and / or, the wall of the through hole is provided with an insulating layer.

[0017] Furthermore, the metal layer includes a first metal layer and a second metal layer located on the same side of the same cover plate, the first metal layer being located between the intermediate layer and the cover plate, the cover plate including the upper cover plate or the lower cover plate; the projection area of ​​the first metal layer on the top surface of the cover plate is connected to or spaced from the projection area of ​​the second metal layer on the top surface of the cover plate, and the thickness of the first metal layer and the second metal layer are equal.

[0018] A second aspect of this application provides a laser chip packaging method, the method being used to package a laser chip packaging structure as described above, the laser chip packaging structure comprising an upper cover plate, a lower cover plate, an intermediate layer, and a laser chip, the method comprising:

[0019] Provide the upper cover plate and the lower cover plate;

[0020] The intermediate layer is bonded to the bottom surface of the upper cover plate to form the intermediate layer, and a target structure with openings is formed on the intermediate layer based on a wet etching process;

[0021] Through holes are made in the upper cover plate and / or the lower cover plate and electrode material is filled into the through holes. A metal layer is provided on the upper cover plate and / or the lower cover plate and connected to the electrode material.

[0022] A laser chip is disposed on the target structure, and a lower cover plate is disposed at the bottom of the intermediate layer. The lower cover plate and the target structure define a cavity structure. The positive and negative electrodes of the laser chip are electrically connected to the electrode material through metal layers to form the laser chip packaging structure.

[0023] A third aspect of this application provides a laser array, including a horizontal array and / or a vertical array, wherein the horizontal array and the vertical array are respectively formed by superimposing a laser chip packaging structure described in the first aspect of this application along the horizontal direction and along the vertical direction.

[0024] The laser chip packaging structure described above, provided in this application, can achieve at least the following technical effects:

[0025] The laser chip packaging structure proposed in this application sandwiches the laser chip within the space defined by an upper cover plate and a lower cover plate, forming a "upper cover plate – laser chip – lower cover plate" layout. Simultaneously, conductive vias are integrated inside the base to achieve vertical electrical connection to the laser chip, avoiding the parasitic inductance and space limitations associated with traditional wire bonding. More importantly, this structure provides a bidirectional heat conduction channel—heat generated during laser chip operation can be efficiently dissipated simultaneously through the upper and lower cover plates, significantly improving the heat dissipation efficiency of the junction region.

[0026] This not only effectively reduces thermal resistance and operating junction temperature, but also enhances the electro-thermal synergistic management capability, thereby significantly extending the lifespan of the laser while improving its output performance. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of a conventional chip packaging structure, as shown in the background section of this application.

[0029] Figure 2 This is a cross-sectional view of a laser chip packaging structure provided in the embodiments of this application;

[0030] Figure 3 This is a schematic diagram of the overall structure of a laser chip packaging structure provided in the embodiments of this application;

[0031] Figure 4 This is a schematic diagram of the structure of the top cover plate provided in the embodiments of this application;

[0032] Figure 5 This is a structural schematic diagram of the lower cover plate provided in the embodiments of this application;

[0033] Figure 6 This is a schematic diagram of the first through-hole setting scheme provided in the embodiments of this application;

[0034] Figure 7 This is a schematic diagram of the second through-hole setting scheme provided in the embodiments of this application;

[0035] Figure 8 This is a schematic diagram of the horizontal array structure of the laser array provided in the embodiments of this application;

[0036] Figure 9 This is a schematic diagram of the vertical array structure of the laser array provided in the embodiments of this application.

[0037] Reference numerals: 11. Chip; 12. Gold wire; 13. Ceramic heat sink; 100. Laser chip packaging structure; 101. Lower cover plate; 102. Intermediate layer; 103. Laser chip; 104. Upper cover plate; 105. Through hole; 106. Electrode material; 107. Metal layer; 108. First through hole; 109. Second through hole; 200. Horizontal array; 300. Vertical array; 112. Strip cover plate. Detailed Implementation

[0038] The technical solutions of this application will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0039] like Figure 2 and Figure 3 As shown, this application embodiment provides a laser chip packaging structure 100, including: a base, including an upper cover plate 104, an intermediate layer 102 and a lower cover plate 101 arranged vertically from top to bottom, the intermediate layer 102 being disposed between the upper cover plate 104 and the lower cover plate 101, the upper cover plate 104, the intermediate layer 102 and the lower cover plate 101 defining a cavity structure, and a through hole 105 being provided inside the base for filling electrode material;

[0040] A laser chip 103 is disposed inside the cavity structure, and the positive electrode and the negative electrode of the laser chip 103 are electrically connected to the electrode material in the through hole 105, respectively.

[0041] Specifically, the laser chip packaging structure 100 formed in this embodiment is preferably a rectangular structure. This structure, from top to bottom along the vertical direction, mainly includes: an upper cover plate 104, a middle layer 102, and a lower cover plate 101. The laser chip 103 is sealed within the cavity structure formed by these three components. The standardized rectangular structure and flexible electrical lead-out method allow the COC (laser chip packaging structure 100) to be compactly stacked in both the horizontal (i.e., horizontal direction) and vertical (i.e., vertical direction) directions.

[0042] In some embodiments, the materials of the upper cover plate 104 and the lower cover plate 101 are different from the material of the intermediate layer 102. Specifically, the upper cover plate 104 and the lower cover plate 101 described in this application can be made of non-conductive materials such as ceramics.

[0043] Preferably, the upper cover plate 104 and the lower cover plate 101 are made of insulating materials with high thermal conductivity; in this embodiment, they are preferably made of ceramic materials (such as aluminum nitride). Figure 2 and Figure 4As shown, the intermediate layer 102 is bonded to the bottom surface of the upper cover plate 104 (i.e., the side facing the laser chip 103). An opening structure (or "target structure with opening") is formed in the intermediate layer 102 using a wet etching process. The opening structure has sidewalls with an inclined angle, and the opening of the formed cavity structure faces the lower cover plate 101. The intermediate layer 102 is an insulating layer, and electrical isolation between the upper cover plate 104 and the lower cover plate 101 is achieved through the intermediate layer 102.

[0044] Preferably, the intermediate layer 102 is made of silicon, making it compatible with semiconductor processes and enabling high-precision micromachining. The intermediate layer 102 is bonded to the bottom surface of the upper cover plate 104 to form the intermediate layer 102, as shown in the image. Figures 2-7 Taking the cross-sectional view of the laser chip packaging structure shown as an example, the intermediate layer 102 includes a first intermediate layer and a second intermediate layer. The first intermediate layer is formed in a first region on the surface of the upper cover plate 104, and the second intermediate layer is formed in a second region on the bottom surface of the upper cover plate 104. The first region and the second region are spaced apart. The sidewalls opposite to the first intermediate layer and the second intermediate layer are both inclined walls. The inclined walls of the first intermediate layer, the inclined walls of the second intermediate layer, the bottom surface of the upper cover plate 104, and the top surface of the lower cover plate 101 together define the cavity structure.

[0045] Preferably, such as Figure 2 , Figure 4 and Figure 5 As shown, a metal layer 107 is provided at the connection position between the laser chip and the through hole 105 of 103. The metal layer 107 serves as solder to fix the laser chip 103 to the lower cover plate 101, the upper cover plate 104 to the lower cover plate 101, and to provide electrical connection between the electrode material 106 inside the through hole 105 and the laser chip 103. The metal layer 107 also serves as a heat conduction channel to conduct the heat generated by the laser chip 103 to the base and its exterior.

[0046] Preferably, the metal layer 107 is formed by depositing a metal seed layer using a sputtering process, and then thickening the metal layer 107 by an electroplating process.

[0047] In this embodiment, the metal layer 107 includes a first metal layer and a second metal layer located on the same side of the same cover plate. The first metal layer is located between the intermediate layer 102 and the cover plate. The cover plate includes the upper cover plate 104 or the lower cover plate 101. The projection area of ​​the first metal layer on the top surface of the cover plate is connected to, spaced apart from, or overlaps with the projection area of ​​the second metal layer on the top surface of the cover plate.

[0048] Preferably, the metal layer 107 includes a first metal layer and a second metal layer located on the same side (top or bottom surface) of the same cover plate (upper cover plate 104 or lower cover plate 101). The main function of the first metal layer is to achieve a fixed connection between the intermediate layer 102 and the cover plate, and the main function of the second metal layer is to achieve an electrical connection between the laser chip 103 and the electrode material in the through hole 105. The first metal layer is located between the intermediate layer 102 and the cover plate, and the cover plate includes the upper cover plate 104 or the lower cover plate 101. The projection area of ​​the first metal layer on the top surface of the cover plate is connected to or spaced from the projection area of ​​the second metal layer on the top surface of the cover plate, and the thicknesses of the first metal layer and the second metal layer are equal. Based on the metal layer 107 configuration described above (i.e., the projection area of ​​the first metal layer on the top surface of the cover plate is connected to or spaced from the projection area of ​​the second metal layer on the top surface of the cover plate), metal layer overflow can be effectively prevented, thereby improving the packaging effect of the laser chip 103 and ensuring packaging performance; setting the thickness of the first metal layer and the second metal layer to be equal ensures the strength of the soldering and the reliability of the electrical connection.

[0049] Furthermore, through-holes 105 are formed inside the upper cover plate 104 and / or the lower cover plate 101 through a drilling process. These through-holes 105 are used to fill electrode material 106, forming vertical electrical interconnect channels inside the laser, thereby replacing the traditional wire bonding method for laser chips. The through-holes 105 include a first through-hole 108 and a second through-hole 109. The electrode material in the first through-hole 108 is electrically connected to the positive electrode of the laser chip 103, and the electrode material in the second through-hole 109 is electrically connected to the negative electrode of the laser chip 103.

[0050] Preferably, the electrode material 106 is tungsten.

[0051] In one embodiment, to further avoid the risk of electrical leakage, the wall of the through hole 105 is provided with an insulating layer.

[0052] Preferably, the length of the laser chip 103 is 3mm-5mm. When fixing and electrically connecting the laser chip 103, it can effectively avoid the ridge waveguide and other structures (within a certain area on both sides of the ridge waveguide and base waveguide, such as ±50um, it cannot withstand wire bonding or other pressures). In this embodiment, the side of the laser chip 103 fixedly connected to the lower cover plate 101 can be either a P-pole or a N-pole. The positive (P-pole) and negative (N-pole) electrodes of the laser chip 103 are electrically connected to the electrode material 106 in the corresponding through-hole 105 through the metal layer 107 in contact with them.

[0053] Optionally, the number of through holes 105 includes at least two.

[0054] Furthermore, the connection configuration between the through hole 105 and the laser chip 103 can be configured in several preferred ways:

[0055] In one of the preferred methods, such as Figure 6 As shown, in the first preferred configuration, the through hole 105 is located on the same side of the base. When the through hole 105 is located inside the upper cover plate 104 or the lower cover plate 101, the through hole 105 includes a first through hole 108 and a second through hole 109. The electrode material 106 in the first through hole 108 is electrically connected to the positive electrode of the laser chip 103 based on a third metal layer, and the electrode material 106 in the second through hole 109 is electrically connected to the negative electrode of the laser chip 103 based on a fourth metal layer. If the through hole 105 is located inside the upper cover plate 104: the first through hole 108 is located at any first position along the horizontal direction of the upper cover plate 104, and the second through hole 109 is located at a second position along the horizontal direction of the upper cover plate 104. The first through hole 108 or the second through hole 109 penetrates the upper cover plate 104 and the intermediate layer 102. If the through hole 105 is located inside the lower cover plate 101: the first through hole 108 is located at any third position along the horizontal direction of the lower cover plate 101, and the second through hole 109 is located at a fourth position along the horizontal direction of the lower cover plate 101, with the first through hole 108 or the second through hole 109 penetrating through the lower cover plate 101 and the intermediate layer 102. It should be understood that the first, second, third, and fourth positions described in this application are merely intended to indicate the approximate installation positions of the through holes and to indicate that the first through hole 108 and the second through hole 109 are non-overlapping.

[0056] In one of the preferred methods, such as Figure 7 As shown, in the second preferred configuration, the through holes 105 are respectively disposed in the upper cover plate 104 and the lower cover plate 101 of the base. Each through hole 105 includes a first through hole 108 and a second through hole 109. The first through hole 108 is located in the upper cover plate 104, and its projection onto the top surface of the lower cover plate 101 at least partially coincides with the projection of the laser chip onto the top surface of the lower cover plate 101. The second through hole 109 is located at any position on the lower cover plate 101 along the horizontal direction. The electrode material 106 in the first through hole 108 is electrically connected to the positive electrode of the laser chip 103 based on a fifth metal layer, and the electrode material 106 in the second through hole 109 is electrically connected to the negative electrode of the laser chip 103 based on a sixth metal layer.

[0057] Optionally, the number of the first through hole 108 and the second through hole 109 is at least one.

[0058] This embodiment also provides a laser chip packaging method for preparing the laser chip packaging structure 100 described above. Since the principle behind the problem solved by the laser chip packaging method is similar to that of the laser chip packaging structure 100, the implementation of the laser chip packaging method can refer to the implementation of the laser chip packaging structure 100, and repeated details will not be elaborated further.

[0059] The laser chip packaging method provided in this embodiment includes:

[0060] The upper cover plate 104 and the lower cover plate 101 are provided;

[0061] The intermediate layer 102 is bonded to the bottom surface of the upper cover plate 104 or the top surface of the lower cover plate 101 to form the target structure with openings on the intermediate layer 102 based on a wet etching process.

[0062] Through holes are opened in the upper cover plate 104 and / or the lower cover plate 101 and electrode material 106 is filled in the through holes 105. A metal layer 107 is provided on the upper cover plate 104 and / or the lower cover plate 101 and connected to the electrode material 106.

[0063] A laser chip 103 is disposed on the target structure, and the positive and negative electrodes of the laser chip 103 are electrically connected to the electrode material 106 through a metal layer 107, respectively.

[0064] The upper cover plate 104 or the lower cover plate 101 is correspondingly disposed in the cavity structure to form the laser chip packaging structure 100.

[0065] It should be understood that the intermediate layer 102 proposed in this application can be bonded to the bottom surface of the upper cover plate 104 or the top surface of the lower cover plate 101. When the intermediate layer 102 is bonded to form the bottom surface of the upper cover plate 104, the lower cover plate 101 is set on the target structure (the target structure is formed by the upper cover plate 104 and the etched intermediate layer 102), and the lower cover plate 101 and the target structure define a cavity structure; conversely, the upper cover plate 104 is set on the target structure (the target structure is formed by the lower cover plate 101 and the etched intermediate layer 102), and the upper cover plate 104 and the target structure define a cavity structure.

[0066] In one embodiment, when the first through hole 108 is disposed on the upper cover plate 104 and the second through hole 109 is disposed on the lower cover plate 101, the laser chip packaging structure 100 is composed of the upper cover plate 104, the lower cover plate 101, the intermediate layer 102 and the laser chip 103. The laser chip packaging method specifically includes:

[0067] Step S1: A first through hole 108 is formed in the upper cover plate 104 and an electrode material is formed in the first through hole 108; and a second through hole 109 is formed in the lower cover plate 101 and an electrode material is formed in the second through hole 109.

[0068] Step S2: The intermediate layer is bonded to the bottom surface of the upper cover plate 104 to form the intermediate layer, and a target structure with an opening is formed on the intermediate layer 102 based on a wet etching process.

[0069] Step S3: Form a metal layer 107 corresponding to the first through hole 108 and the second through hole 109 to achieve electrical connection between the metal layer 107 and the electrode material 106; and deposit a metal layer on the side of the intermediate layer 102 away from the upper cover plate 104.

[0070] Step S4: Set the laser chip 103 to be electrically connected to the metal layer 107 within the target structure, so that the laser chip 103 is electrically connected to the electrode material in the first through hole 108 and the electrode material 106 in the second through hole 109 respectively.

[0071] Step S5: Fix the upper cover plate 104 and the intermediate layer 102 to the lower cover plate 101 through the metal layer to form the laser chip packaging structure 100.

[0072] This embodiment also provides a laser array, including a horizontal array 200 and / or a vertical array 300, wherein the horizontal array 200 and the vertical array 300 are respectively formed by superimposing a laser chip packaging structure 100 described in the first aspect of this application in the horizontal direction and in the vertical direction.

[0073] Furthermore, in the vertical array 300, each laser chip packaging structure 100 includes an upper cover plate 104, a lower cover plate 101, a through hole 105, and a laser chip 103.

[0074] Furthermore, such as Figure 8 As shown, in the horizontal array 200, multiple COCs (laser chip package structures 100) can be mounted side-by-side on the same heat sink to form a multi-channel linear array. Multiple laser chip package structures 100 are formed by placing multiple COC units on a strip cover plate 112, where the strip cover plate 112 and the intermediate layer 102 are mounted using a wafer-level mounting method, and then cutting them. First, laser chips 103 are sequentially mounted on the bottom strip cover plate 112, and then the top cover plate 104 is placed on top. After a single reflow, a row of strip COCs is formed.

[0075] Further, in the vertical array 300, the through-hole 105 is disposed inside the upper cover plate 104 and / or the lower cover plate 101, and the through-hole 105 is electrically connected to the positive and negative terminals of the laser chip 103, respectively; the laser chips 103 of two adjacent laser chip packaging structures 100 may be disposed in the same or different ways, and the through-holes 105 of two adjacent laser chip packaging structures 100 may be disposed in the same or different ways. When the through-hole 105 is disposed inside the upper cover plate 104 or the lower cover plate 101, the example of the disposal method is as follows: Figure 9 As shown.

[0076] In this embodiment, by forming a vertical stacking method different from the prior art, the output power density per unit projected area is greatly improved, and the module packaging density is increased by stacking multiple layers.

[0077] The embodiments of the present invention achieve the following technical effects:

[0078] 1. By setting up a "sandwich structure" of "upper cover plate - laser chip - lower cover plate", and by adding a through hole structure inside the base to achieve electrical connection with the laser chip, the heat generated by the laser chip can be efficiently dissipated from both the top and bottom directions at the same time. By increasing the heat conduction channels, the heat dissipation effect of the junction area is improved, thereby improving the performance and service life of the laser.

[0079] 2. By forming standardized rectangular COC units and setting different through-hole settings and electrical connection methods, COC units can be compactly stacked in both the horizontal and vertical directions, thereby adapting to the electrical layout requirements of different modules.

[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A laser chip packaging structure, characterized in that, The laser chip packaging structure includes: The base includes an upper cover plate, an intermediate layer, and a lower cover plate arranged vertically from top to bottom. The intermediate layer is bonded to the bottom surface of the upper cover plate and located between the upper cover plate and the lower cover plate. The upper cover plate, the intermediate layer, and the lower cover plate define a cavity structure. The inner sidewall of the intermediate layer is a sloped wall. The sloped wall of the intermediate layer, the bottom surface of the lower cover plate, and the top surface of the upper cover plate define the cavity structure. A through hole is provided inside the base for filling electrode material. A laser chip is disposed inside the cavity structure, and the positive and negative electrodes of the laser chip are electrically connected to the electrode material inside the through hole, respectively.

2. The laser chip packaging structure according to claim 1, characterized in that, The upper cover plate and / or the lower cover plate are provided with through holes; The through-hole includes a first through-hole and a second through-hole. The electrode material in the first through-hole is electrically connected to the positive electrode of the laser chip, and the electrode material in the second through-hole is electrically connected to the negative electrode of the laser chip.

3. The laser chip packaging structure according to claim 2, characterized in that, The through hole is formed in the upper cover plate and the lower cover plate; The first through hole is formed in the upper cover plate, and the projection of the first through hole on the top surface of the lower cover plate at least coincides with a portion of the projection of the laser chip on the top surface of the lower cover plate. The second through hole is formed in the lower cover plate.

4. The laser chip packaging structure according to claim 2, characterized in that, The through hole is formed in the upper cover plate. The first through hole is formed at a first position along the horizontal direction of the upper cover plate, and the second through hole is formed at a second position along the horizontal direction of the upper cover plate. The first through hole or the second through hole penetrates the upper cover plate and the intermediate layer. Alternatively, the through hole is formed in the lower cover plate, the first through hole is formed at the third position of the lower cover plate along the horizontal direction, and the second through hole is formed at the fourth position of the lower cover plate along the horizontal direction, and the first through hole or the second through hole penetrates the lower cover plate and the intermediate layer.

5. A laser chip packaging structure according to claim 1, characterized in that, A metal layer is provided at the connection position between the laser chip and the through hole; the electrode material inside the through hole is electrically connected to the laser chip through the metal layer.

6. The laser chip packaging structure according to claim 1, characterized in that, The intermediate layer is an insulating layer; and / or, the wall of the through hole is provided with an insulating layer.

7. A laser chip packaging structure according to claim 5, characterized in that, The metal layer includes a first metal layer and a second metal layer located on the same side of the same cover plate, the first metal layer being located between the intermediate layer and the cover plate, and the cover plate including the upper cover plate or the lower cover plate; The projection area of ​​the first metal layer on the top surface of the cover plate is connected to or spaced from the projection area of ​​the second metal layer on the top surface of the cover plate, and the thickness of the first metal layer and the second metal layer are equal.

8. A laser chip packaging method, characterized in that, The method is used to encapsulate and form a laser chip packaging structure according to any one of claims 1 to 7, wherein the laser chip packaging structure comprises an upper cover plate, a lower cover plate, an intermediate layer, and a laser chip, and the method includes: Provide the upper cover plate and the lower cover plate; The intermediate layer is bonded to the bottom surface of the upper cover plate to form the intermediate layer, and a target structure with openings is formed on the intermediate layer based on a wet etching process; Through holes are made in the upper cover plate and / or the lower cover plate and electrode material is filled into the through holes. A metal layer is provided on the upper cover plate and / or the lower cover plate and connected to the electrode material. A laser chip is disposed on the target structure, and a lower cover plate is disposed at the bottom of the intermediate layer. The lower cover plate and the target structure define a cavity structure. The positive and negative electrodes of the laser chip are electrically connected to the electrode material through metal layers to form the laser chip packaging structure.

9. A laser array, characterized in that, It includes a horizontal array and / or a vertical array, wherein the horizontal array and the vertical array are respectively formed by stacking a laser chip packaging structure according to any one of claims 1 to 7 in the horizontal direction and in the vertical direction.

10. A laser array, characterized in that, The system includes a horizontal array, which is formed by arranging the laser chip packaging structure of claim 3 in a horizontal direction. The laser array includes a strip cover plate, and the strip cover plate and the intermediate layer are mounted using a wafer-level mounting method. The laser chips are sequentially mounted on the bottom strip cover plate, and after placing the top cover plate, the laser array is formed by a single reflow.

Images