A method, device and system for intelligent circuit breaker leakage current test and line fault location
By using an intelligent circuit breaker leakage current testing and line fault location system, the problems of signal interference and insufficient location accuracy have been solved, achieving efficient and accurate fault identification and location. It is adaptable to different types of circuit breakers and lines, improving the operation and maintenance efficiency of the power system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING FEILING JIAJIE ELECTRONIC TECH CO LTD
- Filing Date
- 2026-01-06
- Publication Date
- 2026-05-05
AI Technical Summary
Existing intelligent circuit breaker leakage current testing and line fault location suffer from signal interference, insufficient location accuracy, poor test parameter adaptability, and high maintenance difficulty, which affects the stable operation of the power system.
An intelligent circuit breaker leakage current testing and line fault location system is adopted, including an intelligent main control and mode management module, a composite signal generation and injection module, a broadband signal acquisition and conditioning module, and a line fault location and impedance analysis module. This system enables interference-free isolated signal injection, multi-frequency point data analysis, and intelligent diagnosis, and integrates TDR and frequency domain impedance methods for fault identification.
It achieves high-precision leakage current testing and line fault location, significantly shortens the testing and troubleshooting cycle, reduces manual interpretation costs, improves the system's practicality and stability, and is compatible with different types of circuit breakers and lines.
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Figure CN121500086B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electrical safety testing technology, and in particular to a method, apparatus and system for testing leakage current of intelligent circuit breakers and locating line faults. Background Technology
[0002] In the field of electrical safety testing, intelligent circuit breakers, as core equipment for power system safety protection, directly affect the stable operation of the power system through the accuracy and efficiency of their leakage current testing and line fault location. Currently, circuit breaker leakage current testing and line fault location are mostly implemented using separate equipment, requiring manual intervention for switching between testing procedures. This is not only cumbersome and inefficient, but also suffers from poor compatibility of test parameters.
[0003] Existing testing systems still suffer from technical bottlenecks in signal processing and positioning accuracy:
[0004] On the one hand, the leakage current signal used for testing and the high-frequency signal used for positioning lack an effective isolation injection mechanism. The two signals crosstalk each other, resulting in insufficient stability of the leakage current signal and distortion of the high-frequency positioning signal, which cannot meet the requirements of high-precision testing.
[0005] On the other hand, fault location often relies on a single time-domain reflection method (TDR), which is greatly affected by line attenuation and noise interference. Not only is the location error large, but it is also difficult to distinguish different fault types such as centralized / distributed faults and high impedance / low impedance faults.
[0006] In addition, the test data is mostly stored in a scattered manner, lacking multi-dimensional correlation analysis and intelligent diagnostic capabilities. Maintenance personnel need to manually interpret the data and determine the cause of the fault, which increases the difficulty of maintenance and prolongs the troubleshooting time, failing to meet the actual needs of efficient operation and maintenance of the power system.
[0007] Therefore, a method, device, and system for testing leakage current of intelligent circuit breakers and locating line faults are proposed to address the aforementioned problems. Summary of the Invention
[0008] The purpose of this invention is to provide a method, apparatus, and system for testing leakage current of intelligent circuit breakers and locating line faults in order to solve the above-mentioned problems.
[0009] To achieve the above objectives, the present invention adopts the following technical solution:
[0010] A smart circuit breaker leakage current testing and line fault location system includes:
[0011] The intelligent main control and mode management module is configured to automatically schedule the test process, identify trip status using dual criteria, quickly switch modes, store data associations, and perform intelligent diagnostic reasoning based on a rule base.
[0012] The composite signal generation and injection module is configured to generate a programmable leakage current signal for circuit breaker testing and a high-frequency pulse / sweep signal for line positioning according to the main control instructions, and to perform interference-free isolated signal injection.
[0013] The wideband signal acquisition and conditioning module is configured to acquire power frequency leakage current, circuit breaker breaking voltage, high-frequency positioning reflection signal and impedance response signal. Through adaptive filtering, amplification and noise reduction processing, it provides high-fidelity raw data for subsequent analysis and adapts to the characteristics of different frequency signals.
[0014] The line fault location and impedance analysis module is configured to integrate the TDR time-domain reflection method and the frequency-domain impedance method, and combine the line topology model with GIS association technology. It matches the distance to the corresponding fault point through the distance matching coefficient, identifies the fault type, and converts it into physical location.
[0015] Preferably, the intelligent main control and mode management module specifically includes:
[0016] The process controller uses an MCU or FPGA to receive digital signals from the signal acquisition module in real time;
[0017] The circuit breaker tripping status is identified using both voltage and current criteria:
[0018] Voltage criterion: By collecting the voltage across the circuit breaker, when the detected voltage change exceeds the preset allowable fluctuation range and the duration exceeds the preset duration, it is determined to trip.
[0019] Current criterion: Collect leakage current signal. When the current is detected to drop from the test set value to below the preset threshold within a preset time period and the duration is greater than the preset time period, it assists in verifying the tripping status.
[0020] Dual-criteria logic: Uses AND logic to confirm tripping;
[0021] The timing logic is as follows: disconnect the leakage current source output, wait for 10ms discharge time, turn off the leakage current source power supply, start the positioning signal generator preheating, adjust the coupling network switch status, start the signal acquisition module parameter configuration, and the positioning mode is ready.
[0022] Preferably, the composite signal generation and injection module specifically includes:
[0023] Signal generation unit: Uses a 16-bit DAC to generate an analog signal of 0-2.5V, which is then buffered and amplified by a low-noise operational amplifier before being sent to the power amplifier unit;
[0024] Power amplifier unit: adopts a push-pull power amplifier circuit;
[0025] Transformer matching unit: Employs a multi-stage isolation transformer;
[0026] Feedback adjustment unit: The output current is collected by the sampling resistor, converted into a digital signal by a 16-bit ADC, and fed back to the main control unit;
[0027] A dedicated test circuit connected to the lower terminal of the circuit breaker via an electromagnetic relay array, the circuit having a built-in fast-acting fuse and surge absorber;
[0028] Time-domain reflectometry unit: Employs a high-voltage narrow pulse generator circuit, combined with an LC resonant circuit, to generate narrow pulses;
[0029] Frequency domain impedance method unit: It uses a DDS signal generator as the core and a broadband power amplifier to amplify the power of the swept frequency signal.
[0030] Preferably, the method further includes an intelligent injection switching and coupling network:
[0031] The switching unit uses a dual-channel single-pole double-throw high-voltage relay, driven by the main control module through optocoupler isolation.
[0032] Signal isolation unit:
[0033] A power frequency filter inductor and a DC blocking capacitor are connected in series on the leakage current signal side to block the high-frequency positioning signal from entering the leakage current source.
[0034] The positioning signal side uses a high-frequency capacitive coupling circuit to block the power frequency signal and only allow the high-frequency positioning signal to pass through; at the same time, a discharge resistor is connected in parallel.
[0035] Impedance matching unit: An adjustable matching resistor is connected in series at the positioning signal injection end. The main control module automatically adjusts the impedance matching resistor according to the line characteristics to make the reflection coefficient of the injected signal less than the preset threshold.
[0036] Preferably, the broadband signal acquisition and conditioning module specifically includes:
[0037] Synchronous acquisition unit: Employs an ADC chip;
[0038] Use FPGA for high-speed data caching and preprocessing;
[0039] The acquisition channel is configured with 4 channels to acquire leakage current, circuit breaker voltage, positioning signal reflection, and impedance response signal respectively.
[0040] Circuit breaker test mode conditioning:
[0041] Filtering circuit: A second-order active low-pass filter is used; a 50Hz notch filter is connected in series.
[0042] Amplification circuit: A programmable gain instrumentation amplifier is used, which automatically adjusts the gain according to the amplitude of the input signal;
[0043] Line positioning mode adjustment:
[0044] High-frequency amplifier circuit: Employs a broadband low-noise amplifier to amplify the reflected pulse signal;
[0045] Time-domain gain compensation circuit: It has a built-in programmable time-domain gain curve, which dynamically adjusts the gain according to the signal propagation time to compensate for the amplitude reduction caused by signal attenuation;
[0046] The timing starts at the moment the leakage current signal is applied and ends at the moment the circuit breaker voltage suddenly changes.
[0047] Preferably, the line fault location and impedance analysis module specifically includes:
[0048] Time-domain reflectometry analysis unit:
[0049] Based on the principle of electromagnetic wave propagation, the distance to the fault point is calculated; low impedance faults, high impedance faults, open circuit faults, and distributed faults are identified by the polarity and amplitude characteristics of the reflected pulse.
[0050] Preferably, the method further includes:
[0051] The line fault location and impedance analysis module calculates the line input impedance spectrum based on the frequency domain data of the acquired voltage and current signals.
[0052] Identify the resonant peak frequency in the impedance spectrum, and verify the TDR location results by analyzing the relationship between the resonant frequency and the line length; at the same time, calculate the standard deviation σ of the impedance spectrum to determine the fault type.
[0053] Selecting characteristic frequency points , , Calculate the fault distance respectively , , Preset fault distances respectively , , After determining the weighting factors, a weighted average algorithm is used to obtain the first positioning coefficient.
[0054] in, , , .
[0055] Preferably, the method further includes:
[0056] right : The value range is 2 to 5, with a step size of 1; 4 groups are generated. , The values are used to calculate the fault distance for each group. , ,constitute{ , };
[0057] right : The value range is 20~50, with a step size of 10; a total of 4 sets were obtained. , The values are used to calculate the fault distance for each group. , ,constitute{ , };
[0058] right : The value range is 50~80, with a step size of 10; a total of 4 sets were obtained. , The values are used to calculate the fault distance for each group. , ,constitute{ , };
[0059] From { , }、{ , }、{ , Extract a value from the set value, pre-determine the weighting factor of the extracted value, and then use a weighted average algorithm to obtain the initial coefficients.
[0060] Using the first positioning coefficient as a reference, calculate the difference between each initial coefficient and the first positioning coefficient in turn, and obtain the deviation value by taking the absolute value. Extract the maximum deviation value and the minimum deviation value from each deviation value, and calculate the difference between the maximum deviation value and the minimum deviation value, which is recorded as the second positioning coefficient.
[0061] After normalizing the first and second positioning coefficients, a weighted summation is performed to obtain the distance matching coefficient.
[0062] The fault distance is matched based on the distance matching coefficient.
[0063] Preferably, the method further includes a topological reasoning and GIS association unit:
[0064] Built-in building circuit topology model;
[0065] The topology is stored using an adjacency list, where each node contains a number, location coordinates, connection line ID, and line parameters.
[0066] The fault distance matched by the distance matching coefficient is matched with the line length in the topology model to find the corresponding line segment and branch point;
[0067] Based on the branch point coordinates and remaining distance, a linear interpolation algorithm is used to calculate the physical coordinates of the fault point.
[0068] A method for testing leakage current and locating line faults in an intelligent circuit breaker includes:
[0069] Preset test parameters and procedures that comply with national standards and custom requirements, and clarify the collaborative logic of circuit breaker testing and line positioning, as well as the tripping dual-criteria identification rules;
[0070] Programmable leakage current signals and high-frequency positioning signals are generated and injected without interference through a dedicated coupling network;
[0071] Simultaneously acquire leakage current, breaking voltage and high-frequency reflection signals, and output high-fidelity data after adaptive filtering and amplification;
[0072] By integrating TDR and frequency domain impedance methods, and through multi-frequency point calculation, deviation correction and topology-GIS association, the distance to the fault point is matched and the fault type is identified.
[0073] Based on test data and diagnostic rule base, the system intelligently infers the cause of the fault and provides maintenance suggestions, while also storing the entire process of test data to ensure traceability.
[0074] A computer-readable storage medium, wherein the computer program, when executed by a processor, implements a method for testing leakage current of a smart circuit breaker.
[0075] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:
[0076] 1. This invention achieves interference-free isolated injection of leakage current signals and high-frequency positioning signals through a composite signal generation module. Adaptive filtering, multi-channel synchronous sampling, and high-precision timing ensure high-fidelity data. The line positioning module integrates TDR and frequency domain impedance methods, and through multi-frequency point deviation correction and topology-GIS association, accurately identifies fault types, significantly shortening the testing and troubleshooting cycle.
[0077] 2. This invention employs a forward reasoning algorithm, supports online rule base updates, and is adaptable to various circuit breakers such as Type A and Type AC, as well as different lines such as BV wires and cables. It automatically outputs fault causes and maintenance suggestions, reducing manual interpretation costs. The system incorporates overvoltage / overcurrent protection, a discharge circuit, and a disconnect-before-connect mode switching sequence, along with manual switching and timeout alarm mechanisms, to mitigate equipment damage and personnel safety risks. Multi-level signal output and adjustable impedance matching further adapt to different testing distances and fault scenarios, enhancing the system's practicality and stability. Attached Figure Description
[0078] Further details, features, and advantages of this application are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:
[0079] Figure 1 This is a system structure diagram of the present invention;
[0080] Figure 2 This is a flowchart of the method of the present invention. Detailed Implementation
[0081] Several embodiments of this application will now be described in more detail with reference to the accompanying drawings to enable those skilled in the art to implement this application. This application may be embodied in many different forms and for various purposes and should not be limited to the embodiments set forth herein. These embodiments are provided to make this application thorough and complete, and to fully convey the scope of this application to those skilled in the art. The embodiments described do not limit this application.
[0082] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having a meaning consistent with their meaning in the relevant field and / or the context of this specification, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.
[0083] Example 1
[0084] Its specific implementation method is combined with the appendix Figure 1 and attached Figure 2 Please provide a detailed explanation.
[0085] Appendix Figure 1 This invention provides a structural block diagram of an intelligent circuit breaker leakage current testing and line fault location system, which shows the connection relationship between the intelligent main control and mode management module and the line fault location and impedance analysis module, and marks the main functional interaction flow of each module.
[0086] Appendix Figure 2 The flowchart of a method for testing leakage current of an intelligent circuit breaker and locating line faults provided in this embodiment of the invention shows the complete steps from setting test parameters and procedures that comply with national standards and custom settings to matching the distance to the fault point and identifying the fault type.
[0087] In this embodiment, it includes:
[0088] The intelligent main control and mode management module is configured to automatically schedule the test process, identify trip status using dual criteria, quickly switch modes, associate and store data, and perform intelligent diagnostic reasoning based on a rule base, ensuring the continuity and accuracy of testing.
[0089] Specifically, it includes:
[0090] As the nerve center of the system, it is responsible for the fully automated scheduling of the testing process, multi-module collaborative control, intelligent identification of fault status, logical decision-making for mode switching, associated storage of test data, and reasoning of diagnostic rules, ensuring the continuity, safety, and accuracy of the entire testing process.
[0091] It addresses three key issues: when to switch modes, how to connect data, and how to make decisions about processes.
[0092] The process controller uses a high-performance MCU or FPGA as the core control unit and has multiple peripheral interfaces (CAN, SPI, Ethernet) and high-speed interrupt response capability;
[0093] It has a built-in state machine model and a pre-set test procedure library that conforms to national standards such as GB16917.1 and IEC61008. It also supports user-defined test parameters (such as leakage current level, application duration, and action time threshold).
[0094] For example:
[0095] Standard test procedure: Apply 0.5 times the rated residual operating current sequentially (hold for 1 second, the circuit breaker should not operate), 1.0 times the rated residual operating current (hold for 0.2 seconds, the circuit breaker should operate), and 5.0 times the rated residual operating current sequentially (hold for 0.02 seconds, the circuit breaker should operate).
[0096] Process triggering mechanism: The actual value of leakage current is collected by ADC and compared with the preset value. The output of the signal generation module is dynamically adjusted by using PID algorithm.
[0097] The system receives digital signals from the signal acquisition module in real time (circuit breaker operating status, actual leakage current waveform, voltage breaking time), and configures the interrupt priority (trip signal interrupt has the highest priority).
[0098] Trip identification mechanism: The tripping status of the circuit breaker is identified using both voltage and current criteria.
[0099] Voltage criterion: By collecting the voltage across the circuit breaker (channel 2 signal), when the detected voltage change exceeds the preset allowable fluctuation range (from near short circuit (≤10V) to open circuit (≥220VAC)) and the duration exceeds the preset duration (≥5ms), it is determined to trip.
[0100] Current criterion: Collect leakage current signal. When the current drops from the test set value to below the preset threshold (≤10mA) within a preset time period and the duration is greater than the preset time period (≥5ms), assist in verifying the tripping status.
[0101] Dual-criteria logic: The tripping is confirmed by AND logic to avoid false triggering by a single criterion (such as sudden current changes caused by momentary power outages on the line).
[0102] After confirming the trip, the controller sends a command to the switching drive circuit via the SPI interface, and simultaneously notifies the signal generation module and signal acquisition module to adjust the operating parameters via the CAN bus.
[0103] Switching timing specifications: Strictly follow the principle of disconnecting before connecting. The timing logic is as follows: disconnect the leakage current source output, wait for 10ms discharge time, turn off the leakage current source power supply, start the positioning signal generator preheating, adjust the coupling network switch status, start the signal acquisition module parameter configuration, and the positioning mode is ready, ensuring that there is no residual voltage on the line and that the operation is safe.
[0104] It has a built-in manual switching button and an emergency stop interface. When automatic switching fails (such as sensor failure), the switching can be triggered manually. It also has a switching timeout detection function (an alarm will be triggered if the timeout is ≥100ms) to avoid equipment damage or personnel safety risks caused by module malfunction.
[0105] Generate a unique identifier (session ID) for each test session, using a combination of timestamp, device number, and random number encoding (e.g., 20240520_001_123456) to ensure data uniqueness;
[0106] A three-dimensional data table is created using the SQLite embedded database:
[0107] Dimension 1: Basic test information (session ID, test time, operator, circuit breaker model under test, line type);
[0108] Dimension 2: Circuit breaker characteristic data (leakage current test level, actual operating current value, operating time, breaking voltage waveform, and whether it is qualified);
[0109] Dimension 3: Fault location data (location algorithm type, distance to fault point, fault impedance value, fault type, location accuracy);
[0110] Data synchronization method: Data collected by each module is transmitted to the SD card of the main control unit in real time through DMA (Direct Memory Access) technology to avoid data loss;
[0111] Based on national standards GB16917.1, IEC61008-1, and power industry operation and maintenance standards, pre-defined correlation analysis rules are established, such as:
[0112] Rule 1: If the circuit breaker operates for more than 0.2 seconds under 1.0 times the rated residual operating current (unqualified), and a low impedance grounding fault is located in the line (distance ≤ 50m), the conclusion is that the circuit breaker operates slowly, possibly due to mechanical jamming. The leakage at the fault point poses a high threat to the line insulation, and the circuit breaker should be repaired and the fault point should be dealt with first.
[0113] Rule 2: If the circuit breaker malfunctions (failure) at 0.5 times the rated residual operating current and no line fault is found during locating, the conclusion is that the circuit breaker sensitivity is too high, which may be caused by the error of the zero-sequence current transformer or the failure of the electronic trip unit. It is recommended to check the internal components of the circuit breaker.
[0114] Inference Engine: Employs a forward inference algorithm based on production rules, supports online rule base updates (importing new rule files via Ethernet interface), and adapts to the testing needs of different types of circuit breakers (Type A, Type AC, Type B, Type F, Type S) and line types (BV line, RVV line, cable).
[0115] The composite signal generation and injection module is configured to accurately generate programmable leakage current signals for circuit breaker testing and high-frequency pulse / sweep signals for line positioning according to the main control instructions. The two signals are injected without interference through a dedicated coupling network to meet the national standard accuracy requirements.
[0116] Specifically, it includes:
[0117] According to the instructions of the main control module, two completely different test signals (leakage current signal for circuit breaker testing and high-frequency signal for line location) are accurately generated and injected into the line / circuit breaker under test through a dedicated coupling network without interference. The core solution is to solve three major technical problems: what signal to generate, how to accurately inject it, and how to isolate the two signals.
[0118] Programmable precision leakage current source (for circuit breaker characteristic testing):
[0119] Design goal: To generate high-precision, wide-range, multi-waveform leakage current signals to meet the testing requirements of different types of residual current circuit breakers (RCCB) and residual current circuit breakers with overcurrent protection (RCBO), with accuracy conforming to IEC61008-1 Class 1 standard.
[0120] Signal generation unit: A 16-bit high-precision DAC (such as AD5696R, 16-bit resolution, settling time ≤1μs) is used to generate an analog signal of 0 to 2.5V. After being buffered and amplified by a low-noise operational amplifier (such as OPA2111, input offset voltage ≤10μV), the signal is sent to the power amplifier unit.
[0121] Power Amplification Unit: It adopts a push-pull power amplifier circuit, and the core component is a high-voltage high-power MOSFET. With the help of an adjustable gain feedback network, the output current can be precisely adjusted.
[0122] Transformer matching unit: A multi-stage isolation transformer (with selectable turns ratio of 1:10, 1:20, or 1:50) is used to convert low-voltage, low-current signals to high-voltage, high-current signals. A sampling resistor (accuracy ≤ 0.1%) is connected in series at the output for current feedback.
[0123] Feedback adjustment unit: The output current is collected through the sampling resistor, converted into a digital signal by a 16-bit ADC (such as ADS1256, sampling rate ≥100kSps), and fed back to the main control unit;
[0124] Performance parameters:
[0125] Output current range: 0.1mA~50A (adjustable in several ranges: 0.1mA~1A, 1A~10A, 10A~50A);
[0126] Waveform types: sine wave (50Hz / 60Hz), pulsating DC (duty cycle adjustable from 10% to 90%), composite harmonics (2nd to 7th harmonics, harmonic content adjustable from 0% to 30%).
[0127] Current stability: ≤±0.05% / h (ambient temperature 23℃±2℃);
[0128] Output impedance: ≥1kΩ (ensuring load capacity and adapting to different line impedances).
[0129] Connection method: Connect to the test circuit at the lower terminal of the circuit breaker via a high-reliability electromagnetic relay array (such as Omron G6K series, contact capacity ≥10A / 250VAC). The circuit has a built-in fast fuse (rated current is 1.2 times the test current) and surge absorber (TVS tube, breakdown voltage ≥270VAC) to prevent overload or surge damage to the equipment.
[0130] High-frequency positioning signal generator (for line positioning):
[0131] Design goal: To generate two complementary positioning signals (time-domain pulse signal + frequency-domain sweep signal) to adapt to the leakage point positioning needs of lines of different lengths and types, and to solve the problems of insufficient positioning accuracy and difficulty in fault type identification by a single signal.
[0132] Time Domain Reflectometry (TDR) Unit:
[0133] A high-voltage narrow pulse generation circuit is adopted, with the core components being avalanche transistors (such as 2N2369, breakdown voltage ≥400V) or high-voltage MOSFETs. This is combined with an LC resonant circuit (inductor 1μH~10μH, capacitor 10pF~100pF) to generate narrow pulses.
[0134] The pulse amplitude is adjustable from 50V to 500V (step 10V), the pulse width is adjustable from 10ns to 1μs (step 1ns), the pulse rise time is ≤5ns, and the repetition frequency is adjustable from 1kHz to 10kHz.
[0135] Output matching: A 50Ω impedance matching resistor is connected in series to ensure that the signal is not distorted by reflection in the transmission line;
[0136] Frequency domain impedance method unit:
[0137] A DDS signal generator (such as AD9854, with an output frequency of 0 to 180 MHz) is used as the core, and a broadband power amplifier (such as ADL5601, with an output power of ≥1W and a bandwidth of 1MHz to 1GHz) is used to amplify the power of the swept frequency signal.
[0138] The sweep frequency range is 1kHz to 1MHz (adjustable in 100Hz steps), the output signal amplitude is adjustable from 0.1V to 10Vrms, the frequency stability is ≤±1ppm, and the total harmonic distortion (THD) is ≤-60dB.
[0139] It supports both linear and logarithmic frequency sweep modes, with the sweep time adjustable from 10ms to 1s.
[0140] It also includes intelligent injection switching and coupling networks:
[0141] Design goal: To achieve interference-free switching and safe injection of leakage current signal and positioning signal, ensuring complete electrical isolation between the two signals to avoid crosstalk that could lead to decreased test accuracy or equipment damage, while also meeting high-voltage safety requirements.
[0142] Circuit configuration:
[0143] The switching unit adopts a dual-channel single-pole double-throw (SPDT) high-voltage relay (such as the COTO9000 series, with a withstand voltage ≥2.5kVAC and a contact switching time ≤1ms), which is driven by the main control module through an optocoupler (such as TLP521-4) to avoid crosstalk between the control circuit and the high-voltage circuit.
[0144] Signal isolation unit:
[0145] A power frequency filter inductor (1mH~10mH) and a DC blocking capacitor (1μF / 400V) are connected in series on the leakage current signal side to block the high-frequency positioning signal from entering the leakage current source;
[0146] The positioning signal side uses a high-frequency capacitive coupling circuit (using CBB capacitors, capacitance 1nF~100nF, withstand voltage ≥1kV) to block the power frequency signal and only allow the high-frequency positioning signal to pass through; at the same time, a discharge resistor (100kΩ~1MΩ) is connected in parallel to ensure that the residual charge is quickly released after the line is de-energized, ensuring operational safety.
[0147] Impedance matching unit: An adjustable matching resistor (50Ω~1kΩ) is connected in series at the positioning signal injection end. The main control module automatically adjusts the impedance matching unit according to the line characteristics to ensure that the reflection coefficient of the injected signal is less than a preset threshold (≤0.1). When the reflection coefficient is ≤0.1, the standing wave ratio (VSWR) of the signal in the transmission line is about 1.22. This ensures that most of the energy of the incident signal is effectively transmitted to the line (reducing energy loss) and that the amplitude of the reflected signal is low enough (the amplitude of multiple reflections will be greatly weakened, such as the amplitude of the second reflection being only 0.01 times that of the original signal). This avoids the reflected waveform interfering with the positioning algorithm's accurate identification of the incident-reflection time difference and peak value. Ultimately, this matches the system's positioning accuracy to the performance requirement of ≤±1%×test distance+0.1m. At the same time, the adjustable resistor (50Ω~1kΩ) corresponding to this threshold is easy to implement in engineering and will not excessively increase hardware costs and debugging complexity, thus improving positioning accuracy.
[0148] Built-in overvoltage protection (automatically disconnects the switching switch when the line voltage is ≥300VAC), overcurrent protection (triggers the fuse to blow when the injected current is ≥5A), and discharge circuit (automatically discharges the line to a safe voltage of ≤36V before switching), in compliance with IEC61010-1 safety standards.
[0149] The wideband signal acquisition and conditioning module is configured to acquire power frequency leakage current, circuit breaker breaking voltage, high-frequency positioning reflection signal and impedance response signal. Through adaptive filtering, amplification and noise reduction processing, it provides high-fidelity raw data for subsequent analysis and adapts to the characteristics of different frequency signals.
[0150] Specifically, it includes:
[0151] It is responsible for collecting transient electrical signals (leakage current, breaking voltage) during the circuit breaker testing phase and high-frequency signals (reflected pulse, impedance response) during the line positioning phase. It also uses an adaptive conditioning circuit to filter, amplify, and reduce noise in the signals, ensuring the integrity and accuracy of the collected data and providing high-quality raw data for subsequent analysis.
[0152] The core issues to be addressed are: what signals to collect, how to adapt to different frequency signals, and how to suppress interference.
[0153] High-speed synchronous acquisition unit: adopts a multi-channel high-speed high-resolution ADC chip (such as ADIAD7606-8, 8-channel synchronous sampling, sampling rate ≥200kSps, resolution 16-bit; or TIADS54J60, sampling rate ≥1GSps, resolution 14-bit, adapted to high-frequency positioning signals), in conjunction with FPGA for high-speed data caching and preprocessing;
[0154] The data acquisition channel is configured with 4 channels to acquire leakage current, circuit breaker voltage, positioning signal reflection, and impedance response, respectively.
[0155] Channel 1 (Leakage Current Acquisition): The voltage across the sampling resistor connected to the output of the leakage current source is amplified differentially and then sent to the ADC. The acquisition range is ±10V (corresponding to the current range of 0~50A), and the sampling rate is adjustable from 100kSps to 1MSps.
[0156] Channel 2 (Circuit Breaker Voltage Acquisition): Acquires the voltage across the circuit breaker via a high-voltage dividing resistor (voltage dividing ratio 1000:1, accuracy ≤0.1%). Acquisition range 0~300VAC, sampling rate adjustable from 100kSps to 1MSps.
[0157] Channel 3 (Location Signal Reflection Acquisition): Acquires the reflected voltage signal at the beginning of the line using a high-frequency probe (bandwidth ≥ 1 GHz, input impedance 50 Ω), with an acquisition range of ±500 V and an adjustable sampling rate of 100 MSps to 1 GSps (adapted to ns-level narrow pulses).
[0158] Channel 4 (Impedance Response Acquisition): The line input current is acquired through a current transformer (ratio 1:1000, bandwidth 1kHz~1MHz), and the line impedance is calculated by combining it with the voltage signal from Channel 3. The sampling rate is adjustable from 10kSps to 100kSps.
[0159] Data preprocessing: The FPGA has built-in digital filtering (FIR low-pass filter, cutoff frequency configurable), peak detection, and data compression (using lossless compression algorithm, compression ratio ≥2:1) functions to reduce data transmission bandwidth and storage capacity, while ensuring that key signal features are not lost.
[0160] Adaptive conditioning circuit:
[0161] The conditioning parameters are automatically switched according to the working mode to adapt to the different characteristics of power frequency signals (circuit breaker testing) and high frequency signals (line positioning), so as to achieve targeted signal processing, suppress interference signals, and amplify useful signals.
[0162] Circuit breaker test mode conditioning:
[0163] Filtering circuit: A second-order active low-pass filter with a cutoff frequency of 1kHz is used to suppress high-frequency interference (such as electromagnetic radiation and switching noise); at the same time, a 50Hz notch filter is connected in series to suppress power frequency harmonic interference.
[0164] Amplification circuit: A programmable gain instrumentation amplifier (such as AD8253, with a gain range of 1 to 1000 times adjustable) is used to automatically adjust the gain according to the input signal amplitude (1000 times gain when the signal amplitude is <10mV, 10 times gain when the signal amplitude is 10mV to 1V, and 1 times gain when the signal amplitude is >1V) to ensure that the ADC works in the optimal input range;
[0165] Line positioning mode adjustment:
[0166] High-frequency amplifier circuit: Uses a broadband low-noise amplifier (such as AD8001, bandwidth ≥1GHz, noise figure ≤3dB), with a fixed gain of 20 times, to amplify weak reflected pulse signals;
[0167] Time-domain gain compensation circuit: To address the signal attenuation problem in long lines, it has a built-in programmable time-domain gain curve that dynamically adjusts the gain according to the signal propagation time (when the propagation time is >10μs, the gain increases linearly to 40 times) to compensate for the amplitude reduction caused by signal attenuation.
[0168] Anti-interference design: Shielded twisted pair cable is used for signal transmission, and the grounding terminal of the conditioning circuit adopts single-point grounding with a grounding distance of ≥10cm from the power circuit to suppress ground loop interference;
[0169] High-precision timer:
[0170] A high-stability crystal oscillator (such as a TCXO, with a frequency of 10MHz and a stability of ≤±0.1ppm / ℃) is used as the clock source, and in conjunction with the FPGA's counter module, high-precision timing is achieved.
[0171] Timing principle: The timing starts at the moment the leakage current signal is applied (timing is triggered when the current reaches 90% of the set value through ADC acquisition), and ends at the moment of sudden change in circuit breaker voltage (timing stops when the voltage is detected by channel 2 signal to be ≥220VAC and lasts for 5ms). The timing resolution is ≤10ns.
[0172] Calibration mechanism: Supports periodic calibration via GPS timing module or external standard clock signal (such as 1PPS signal) to ensure timing accuracy ≤ ±0.1μs.
[0173] The line fault location and impedance analysis module is configured to integrate the TDR time-domain reflection method and the frequency-domain impedance method, and combine the line topology model and GIS association technology to match the distance of the corresponding fault point through the distance matching coefficient, identify the fault type and convert it into physical location.
[0174] Specifically, it includes:
[0175] The system receives positioning signal data transmitted by the signal acquisition module and performs time-domain and frequency-domain multi-algorithm fusion processing to achieve accurate distance calculation of leakage fault points, fault type identification (centralized fault / distributed fault, high impedance / low impedance fault), and calculates the physical location by combining line topology information. It essentially solves three major technical problems: how to accurately locate, how to identify fault types, and how to correlate physical locations.
[0176] Time Domain Reflectometry (TDR) Analysis Unit:
[0177] Data preprocessing:
[0178] Denoising: A wavelet thresholding algorithm (using the db4 wavelet basis, decomposing into 5 layers, and using heuristic threshold calculation) is employed to suppress the interference of environmental noise and measurement noise on the reflected signal.
[0179] Baseline correction: Eliminates DC drift of the signal through a linear fitting algorithm to ensure a stable baseline;
[0180] Peak detection: A sliding window peak detection algorithm (window width 50ns) is used, combined with a gradient threshold (≥0.5V / ns) to identify the start point and peak point of the reflected pulse, avoiding false detection;
[0181] Based on the principle of electromagnetic wave propagation, the distance to the fault point is calculated: ;
[0182] in,
[0183] The distance (m) from the fault point to the test end;
[0184] The round-trip propagation time of the pulse wave (s) is the time difference from the starting point of the injected pulse to the starting point of the reflected pulse. The time measurement accuracy is optimized by an interpolation algorithm (cubic spline interpolation).
[0185] The speed at which a signal propagates in a cable (the formula is: ; The speed of light in a vacuum; (Relative permittivity of the cable) can be manually entered by the user or automatically corrected via the calibration function;
[0186] Determining the polarity and amplitude characteristics of the reflected pulse:
[0187] Low impedance fault (such as metallic grounding): The polarity of the reflected pulse is opposite to that of the incident pulse, and the amplitude is ≥80% of the incident pulse;
[0188] High impedance faults (such as grounding due to insulation aging): the polarity of the reflected pulse is opposite to that of the incident pulse, and the amplitude is 20% to 80%;
[0189] Open circuit fault (such as line breakage): The polarity of the reflected pulse is the same as that of the incident pulse, and the amplitude is ≥ 90% of that of the incident pulse;
[0190] Distributed faults (such as aging of the insulation of an entire cable): There are no obvious sharp reflection peaks, and the reflected signal shows a gradual attenuation trend.
[0191] Voltage signals obtained from the positioning signal reflection and impedance response based on the configured synchronization channel. and current signal Calculate the line input impedance spectrum using frequency domain data. : Frequency step size 100Hz;
[0192] Peak detection algorithm is used to identify the resonant peak frequency in the impedance spectrum. The relationship between resonant frequency and line length: (Fundamental resonance). The speed of signal propagation in the cable; verify the TDR positioning results;
[0193] Simultaneously, the standard deviation σ of the impedance spectrum is calculated to determine the fault type;
[0194] A fault with σ > 50Ω is considered a centralized fault, and a fault with σ ≤ 50Ω is considered a distributed fault.
[0195] Select 3 characteristic frequency points , , Calculate the fault distance respectively , , Preset fault distances respectively , , After determining the weighting factors, a weighted average algorithm is used to obtain the first positioning coefficient.
[0196] in, , , ;
[0197] Weighted average algorithm: respectively , , The product of the corresponding weight factors is summed and then divided by 1. , , The sum of the weighting factors is 1), thus obtaining the first positioning coefficient.
[0198] By introducing a collaborative verification mechanism combining frequency domain impedance analysis and time domain reflection analysis (TDR), the reliability of fault location is significantly improved. It calculates the line input impedance spectrum based on voltage and current frequency domain data, and uses the correlation between the resonant peak frequency and line length to perform a secondary verification of the TDR location results, effectively offsetting the biases caused by line attenuation and noise interference that are easily affected by a single algorithm.
[0199] Meanwhile, by calculating the standard deviation of the impedance spectrum, the system can accurately distinguish between centralized and distributed faults, solving the pain points of ambiguous fault types and difficulty in targeted maintenance in existing technologies, and providing key fault attribute basis for subsequent operation and maintenance.
[0200] right : The value range is 2 to 5, with a step size of 1; 4 groups are generated. , The values are used to calculate the fault distance for each group. , ,constitute{ , };
[0201] right : The value range is 20~50, with a step size of 10; a total of 4 sets were obtained. , The values are used to calculate the fault distance for each group. , ,constitute{ , };
[0202] right : The value range is 50~80, with a step size of 10; a total of 4 sets were obtained. , The values are used to calculate the fault distance for each group. , ,constitute{ , };
[0203] Detailed explanation:
[0204] Obtain each , The value, The value range is 2~5, with a step size of 1; a total of 4 groups were obtained. , Calculate the value for each group separately. , Corresponding fault distance , ,constitute{ ,};
[0205] Obtain each , The value, The value range is 20~50, with a step size of 10; a total of 4 sets were obtained. , Calculate the value for each group separately. , Corresponding fault distance , ,constitute{ , };
[0206] Obtain each , The value, The value range is 50~80, with a step size of 10; a total of 4 sets were obtained. , Calculate the value for each group separately. , Corresponding fault distance , ,constitute{ , }
[0207] From { , }、{ , }、{ , Extract a value from the set value, pre-determine the weighting factor of the extracted value, and then use a weighted average algorithm to obtain the initial coefficients.
[0208] Using the first positioning coefficient as a reference, calculate the difference between each initial coefficient and the first positioning coefficient in turn, and obtain the deviation value by taking the absolute value. Extract the maximum deviation value and the minimum deviation value from each deviation value, and calculate the difference between the maximum deviation value and the minimum deviation value, which is recorded as the second positioning coefficient.
[0209] After normalizing the first and second positioning coefficients, a weighted summation is performed to obtain the distance matching coefficient.
[0210] After setting the weight factors for the first and second positioning coefficients, the first and second positioning coefficients are multiplied by their corresponding weight factors to obtain the distance matching coefficient.
[0211] Based on the distance matching coefficient, the corresponding fault distance is matched:
[0212] Multiple ranges of distance matching coefficients are preset, and each range of distance matching coefficients corresponds to a fault distance. The distance matching coefficients are matched with the ranges of multiple ranges of distance matching coefficients to obtain the fault distance corresponding to the distance matching coefficients.
[0213] By performing a stepped offset expansion on three core characteristic frequency points of 10kHz, 100kHz, and 500kHz, multiple sets of differentiated frequency values are generated and the corresponding fault distances are calculated. Then, by combining the deviation analysis between the initial coefficient and the first positioning coefficient, fluctuation characteristics are extracted, and a second positioning coefficient is constructed. This effectively covers the defects of a single frequency point being susceptible to line impedance fluctuations and frequency drift.
[0214] This multi-dimensional data fusion and deviation correction logic significantly reduces the interference of environmental noise and line attenuation on the positioning results, making the fault distance calculation more robust. It directly supports the core indicator of system positioning accuracy ≤ ±1% × test distance + 0.1m, and solves the key pain points of existing technologies such as single-frequency positioning being prone to deviation and weak anti-interference ability.
[0215] Multiple frequency offset combinations (with different k-value ranges and step sizes) and flexible weight configurations enable it to adapt to short- to long-distance lines, lines with different insulation materials, and various fault scenarios (centralized / distributed, high impedance / low impedance). It can stably output reliable distance matching coefficients without manual parameter adjustment, significantly improving the system's scenario adaptability and engineering feasibility. It provides high-precision and high-reliability core data support for subsequent topology reasoning and GIS association to achieve accurate mapping of physical locations.
[0216] It also includes topological reasoning and GIS association units:
[0217] Line topology model library: Built-in common building line topology models (such as star topology, tree topology, ring topology), supporting users to import custom single-line diagrams through a visual interface (formats include DXF and SVG), and annotate the location coordinates and line parameters (length, cross-sectional area, insulation material) of key nodes (such as distribution boxes and branch points).
[0218] Model storage structure: Adjacency list is used to store topology relationships. Each node contains information such as number, location coordinates (X / Y / Z axis), connection line ID, and line parameters, supporting up to 10 levels of branch line management.
[0219] The fault distance matched by the distance matching coefficient is matched with the line length in the topology model to find the corresponding line segment and branch point;
[0220] Based on the branch point coordinates and the remaining distance (fault distance - the total length of the line from the test terminal to the branch point, which is the distance of the fault point relative to the branch point), the physical coordinates of the fault point are calculated using a linear interpolation algorithm;
[0221] By combining GIS geographic information (such as building floor plans and railway line layout drawings), coordinates are converted into intuitive descriptions of physical locations.
[0222] Example 2
[0223] Please see Figure 2 A method for testing leakage current and locating line faults in intelligent circuit breakers, comprising the following parts:
[0224] Preset test parameters and procedures that comply with national standards and custom requirements, and clarify the collaborative logic of circuit breaker testing and line positioning, as well as the tripping dual-criteria identification rules;
[0225] Programmable leakage current signals and high-frequency positioning signals are generated and injected without interference through a dedicated coupling network;
[0226] Simultaneously acquire leakage current, breaking voltage and high-frequency reflection signals, and output high-fidelity data after adaptive filtering, amplification and other processing.
[0227] By integrating TDR and frequency domain impedance method, and through multi-frequency point calculation, deviation correction and topology-GIS association, the distance to the fault point is accurately matched and the fault type is identified;
[0228] Based on test data and diagnostic rule base, the system intelligently infers the cause of the fault and provides maintenance suggestions, while also storing the entire process of test data to ensure traceability.
[0229] The system relies on the preset national standard GB16917.1, IEC61008-1 and the power industry operation and maintenance rule library to conduct correlation analysis on the full process test data (such as circuit breaker operating current, operating time, line fault distance, impedance value, etc.) and achieve accurate fault location through a forward reasoning algorithm based on production rules.
[0230] For different combinations of test results and fault characteristics (such as slow operation and low impedance fault at 1.0 times the rated residual operating current, false operation and no line fault at 0.5 times the rated residual operating current, etc.), it automatically outputs targeted maintenance suggestions and clarifies the priority of handling (such as inspecting the mechanical structure of the circuit breaker and verifying the internal electronic components). At the same time, it supports online updates of the rule base through the Ethernet interface, adapting to the test and diagnosis needs of different types of circuit breakers such as Type A and Type AC and various lines, which greatly improves the efficiency of fault diagnosis and the targeted nature of operation and maintenance.
[0231] During the test, the system generates a unique session ID for each test session, consisting of a timestamp, device number, and random number. It also establishes a three-dimensional data table containing basic test information, circuit breaker characteristic data, and fault location data through an embedded SQLite database. The system uses DMA direct memory access technology to transfer all data to the SD card in real time, ensuring no data loss.
[0232] All stored data is linked to the testing process and fault reasoning results, and key information such as operators, test parameters, signal waveforms, and location results are fully preserved. This not only meets the needs of subsequent test verification and fault tracing, but also provides complete data support for operation and maintenance review and system optimization, and fully ensures the traceability and data reliability of the testing process.
[0233] Example 3
[0234] A computer-readable storage medium, wherein a computer program, when executed by a processor, implements a method for testing leakage current of an intelligent circuit breaker and locating line faults.
[0235] The above formulas are all dimensionless calculations. The formulas are derived from software simulations based on a large amount of collected data to obtain the most recent real-world results. The preset parameters in the formulas are set by those skilled in the art according to the actual situation.
[0236] The foregoing has only described certain exemplary embodiments of the present invention by way of illustration. Undoubtedly, those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the foregoing drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.
[0237] It should be noted that, in this document, the use of relational terms such as "first" and "second" is merely for distinguishing one entity or operation from another, and does not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.
[0238] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0239] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0240] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0241] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0242] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0243] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
[0244] The foregoing has only described certain exemplary embodiments of the present invention by way of illustration. Undoubtedly, those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the foregoing drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.
Claims
1. A smart circuit breaker leakage current testing and line fault location system, characterized in that, include: The intelligent main control and mode management module is configured to automatically schedule the test process, identify trip status using dual criteria, quickly switch modes, store data associations, and perform intelligent diagnostic reasoning based on a rule base. The composite signal generation and injection module is configured to generate a programmable leakage current signal for circuit breaker testing and a high-frequency pulse / sweep signal for line positioning according to the main control instructions, and to perform interference-free isolated signal injection. The wideband signal acquisition and conditioning module is configured to acquire power frequency leakage current, circuit breaker breaking voltage, high-frequency positioning reflection signal and impedance response signal. Through adaptive filtering, amplification and noise reduction processing, it provides high-fidelity raw data for subsequent analysis and adapts to the characteristics of different frequency signals. The line fault location and impedance analysis module is configured to integrate the TDR time-domain reflection method and the frequency-domain impedance method, and combine the line topology model and GIS association technology. It matches the distance of the corresponding fault point through the distance matching coefficient, identifies the fault type and converts it into physical location. The line fault location and impedance analysis module calculates the line input impedance spectrum based on the frequency domain data of the acquired voltage and current signals. Identify the resonant peak frequency in the impedance spectrum, and verify the TDR location results by analyzing the relationship between the resonant frequency and the line length; at the same time, calculate the standard deviation σ of the impedance spectrum to determine the fault type. Selecting characteristic frequency points , , Calculate the fault distance respectively , , Preset fault distances respectively , , After determining the weighting factors, a weighted average algorithm is used to obtain the first positioning coefficient. in, , , ; Also includes: right : The value range is 2 to 5, with a step size of 1; 4 groups are generated. , The values are used to calculate the fault distance for each group. , ,constitute{ , }; right : The value range is 20~50, with a step size of 10; a total of 4 sets were obtained. , The values are used to calculate the fault distance for each group. , ,constitute{ , }; right : The value range is 50~80, with a step size of 10; a total of 4 sets were obtained. , The values are used to calculate the fault distance for each group. , ,constitute{ , }; From { , }、{ , }、{ , Extract a value from the set value, pre-determine the weighting factor of the extracted value, and then use a weighted average algorithm to obtain the initial coefficients. Using the first positioning coefficient as a reference, calculate the difference between each initial coefficient and the first positioning coefficient in turn, and obtain the deviation value by taking the absolute value. Extract the maximum deviation value and the minimum deviation value from each deviation value, and calculate the difference between the maximum deviation value and the minimum deviation value, which is recorded as the second positioning coefficient. After normalizing the first and second positioning coefficients, a weighted sum is calculated to obtain the distance matching coefficient; the corresponding fault distance is then matched based on the distance matching coefficient.
2. The intelligent circuit breaker leakage current testing and line fault location system according to claim 1, characterized in that, The intelligent main control and mode management module specifically includes: The process controller uses an MCU or FPGA to receive digital signals from the signal acquisition module in real time; The circuit breaker tripping status is identified using both voltage and current criteria: Voltage criterion: By collecting the voltage across the circuit breaker, when the detected voltage change exceeds the preset allowable fluctuation range and the duration exceeds the preset duration, it is determined to trip. Current criterion: Collect leakage current signal. When the current is detected to drop from the test set value to below the preset threshold within a preset time period and the duration is greater than the preset time period, it assists in verifying the tripping status. Dual-criteria logic: Uses AND logic to confirm tripping; The timing logic is as follows: disconnect the leakage current source output, wait for 10ms discharge time, turn off the leakage current source power supply, start the positioning signal generator preheating, adjust the coupling network switch status, start the signal acquisition module parameter configuration, and the positioning mode is ready.
3. The intelligent circuit breaker leakage current testing and line fault location system according to claim 1, characterized in that, The composite signal generation and injection module specifically includes: Signal generation unit: Uses a 16-bit DAC to generate an analog signal of 0-2.5V, which is then buffered and amplified by a low-noise operational amplifier before being sent to the power amplifier unit; Power amplifier unit: adopts a push-pull power amplifier circuit; Transformer matching unit: Employs a multi-stage isolation transformer; Feedback adjustment unit: The output current is collected by the sampling resistor, converted into a digital signal by a 16-bit ADC, and fed back to the main control unit; A dedicated test circuit connected to the lower terminal of the circuit breaker via an electromagnetic relay array, the circuit having a built-in fast-acting fuse and surge absorber; Time-domain reflectometry unit: Employs a high-voltage narrow pulse generator circuit, combined with an LC resonant circuit, to generate narrow pulses; Frequency domain impedance method unit: It uses a DDS signal generator as the core and a broadband power amplifier to amplify the power of the swept frequency signal.
4. The intelligent circuit breaker leakage current testing and line fault location system according to claim 3, characterized in that, It also includes intelligent injection switching and coupling networks: The switching unit uses a dual-channel single-pole double-throw high-voltage relay, driven by the main control module through optocoupler isolation. Signal isolation unit: On the leakage current signal side, a power frequency filter inductor and a DC blocking capacitor are connected in series to block the high-frequency positioning signal from entering the leakage current source; on the positioning signal side, a high-frequency capacitive coupling circuit is used to block the power frequency signal and only allow the high-frequency positioning signal to pass through; a discharge resistor is connected in parallel at the same time. Impedance matching unit: An adjustable matching resistor is connected in series at the positioning signal injection end. The main control module automatically adjusts the impedance matching resistor according to the line characteristics to make the reflection coefficient of the injected signal less than the preset threshold.
5. The intelligent circuit breaker leakage current testing and line fault location system according to claim 1, characterized in that, The wideband signal acquisition and conditioning module specifically includes: Synchronous acquisition unit: Employs an ADC chip; works in conjunction with an FPGA for high-speed data caching and preprocessing; The acquisition channel is configured with 4 channels to acquire leakage current, circuit breaker voltage, positioning signal reflection, and impedance response signal respectively. Circuit breaker test mode conditioning: Filtering circuit: A second-order active low-pass filter is used; a 50Hz notch filter is connected in series. Amplification circuit: A programmable gain instrumentation amplifier is used, which automatically adjusts the gain according to the amplitude of the input signal; Line positioning mode adjustment: High-frequency amplifier circuit: Employs a broadband low-noise amplifier to amplify the reflected pulse signal; Time-domain gain compensation circuit: It has a built-in programmable time-domain gain curve, which dynamically adjusts the gain according to the signal propagation time to compensate for the amplitude reduction caused by signal attenuation; The timing starts at the moment the leakage current signal is applied and ends at the moment the circuit breaker voltage suddenly changes.
6. The intelligent circuit breaker leakage current testing and line fault location system according to claim 1, characterized in that, The line fault location and impedance analysis module specifically includes: Time-domain reflectometry analysis unit: Based on the principle of electromagnetic wave propagation, the distance to the fault point is calculated; low impedance faults, high impedance faults, open circuit faults, and distributed faults are identified by the polarity and amplitude characteristics of the reflected pulse.
7. The intelligent circuit breaker leakage current testing and line fault location system according to claim 1, characterized in that, It also includes topological reasoning and GIS association units: Built-in building route topology model; uses adjacency list to store topology relationships, each node contains number, location coordinates, connecting route ID, and route parameters; The fault distance matched by the distance matching coefficient is matched with the line length in the topology model to find the corresponding line segment and branch point; based on the branch point coordinates and the remaining distance, the physical coordinates of the fault point are calculated using a linear interpolation algorithm.
8. A method for testing leakage current of an intelligent circuit breaker and locating line faults, and a system for testing leakage current of an intelligent circuit breaker and locating line faults according to any one of claims 1-7, characterized in that, include: Preset test parameters and procedures that comply with national standards and custom requirements, and clarify the collaborative logic of circuit breaker testing and line positioning, as well as the tripping dual-criteria identification rules; Programmable leakage current signals and high-frequency positioning signals are generated and injected without interference through a dedicated coupling network; The system collects leakage current, breaking voltage, high-frequency reflection signal, and impedance response signal, and outputs high-fidelity data after adaptive filtering, amplification, and post-processing. By integrating TDR and frequency domain impedance methods, and through multi-frequency point calculation, deviation correction and topology-GIS association, the distance to the fault point is matched and the fault type is identified. Based on test data and diagnostic rule base, the system intelligently infers the cause of the fault and provides maintenance suggestions, while also storing the entire process of test data to ensure traceability.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the method for testing leakage current of intelligent circuit breakers and locating line faults as described in claim 8.
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