Ultrathin printed circuit board defect detection method and system based on AI vision

Abstract

The invention relates to the technical field of artificial intelligence and electronic manufacturing detection, and discloses an ultra-thin printed circuit board defect detection method and system based on AI vision. The objective of the invention is to solve the technical problems of poor imaging quality, high missed detection and false detection rate, weak generalization ability and difficulty in consideration of efficiency and precision caused by buckling deformation, surface reflection and tiny and diverse defects of an ultrathin printed circuit board in the existing detection technology. The method comprises the following steps: performing multi-angle image acquisition through a composite illumination module and a high-resolution linear array camera; geometric correction is carried out on the image by using an SIFT algorithm and affine transformation, and the image contrast is enhanced by using a CLAHE algorithm; generating a defect candidate region through the lightweight full convolutional network; and carrying out accurate classification and identification on the candidate region by using a deep residual network. According to the technical scheme, high-precision, high-efficiency and low-false-alarm detection of the tiny defects of the ultrathin printed circuit board can be achieved, and the automation level and adaptability of detection are remarkably improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of artificial intelligence and electronic manufacturing detection technology, and particularly relates to a defect detection method and system for ultra-thin printed circuit boards based on AI vision. BACKGROUND

[0002] In the modern electronic information industry, printed circuit boards serve as the carrier of electronic components and the hub of circuit signal transmission, and their quality directly determines the performance and reliability of terminal electronic products. With the continuous evolution of consumer electronic products towards thinness and high integration, ultra-thin printed circuit boards are increasingly widely used in wearable devices, high-end communications and precision medical equipment due to their flexibility, high-density wiring and other advantages.

[0003] Among them, defect detection of ultra-thin printed circuit boards in the production process is a key link to ensure their electrical performance and long-term stability. Due to thinner substrates, finer lines and more complex structures, higher requirements are placed on production processes, and any minor defect can cause the entire circuit to fail.

[0004] The existing defect detection technology for printed circuit boards mainly has the following shortcomings: first, the traditional manual visual inspection method is inefficient and highly subjective, making it difficult to meet the high-throughput requirements of mass production lines, and the detection rate of minor defects is extremely unstable; second, the automatic optical detection system based on fixed rule algorithm has limited template matching and feature extraction capabilities, and when faced with defects of various shapes and small sizes on ultra-thin circuit boards, it is prone to missed detection, and is extremely sensitive to normal textures or slight reflections on the substrate, resulting in a high false positive rate; third, the existing detection methods have poor generalization ability, and lack the ability to learn and adapt quickly to new defect types introduced by new production lines or process changes; finally, the detection accuracy and efficiency are difficult to balance, and improving detection accuracy often sacrifices processing speed, making it difficult to meet the dual pursuit of high quality and high efficiency in modern electronic manufacturing. These problems collectively make it difficult to improve the production yield of ultra-thin printed circuit boards and significantly increase the cost of quality control. SUMMARY

[0005] The purpose of the present application is to make up for the shortcomings of the prior art, and provide an AI vision-based ultra-thin printed circuit board defect detection method and system, which can effectively solve the problems in the background art. The prior art faces severe challenges when detecting defects in ultra-thin printed circuit boards. Due to the extremely small thickness of the substrate of the ultra-thin printed circuit board, it is prone to non-planar deformation such as warping and wrinkling during production and transportation, making it difficult for traditional 2D vision detection systems to obtain clear and consistently focused images in the global range, resulting in a large number of false positives and false negatives. In addition, the reflective properties of the fine lines on its surface and the complex texture of the substrate material will produce serious glare and shadows under traditional fixed lighting conditions, interfering with the stable extraction of defect features. Traditional algorithms based on fixed thresholds or template matching have poor adaptability to defects with diverse shapes, small sizes, and random locations, especially for non-structured defects such as micro-cracks, pinholes, and residual copper, with low recognition rates. They cannot meet the stringent requirements of high-density and high-reliability electronic products for circuit board quality.

[0006] To achieve the above purpose, the present application provides the following technical solutions: on the one hand, an AI vision-based ultra-thin printed circuit board defect detection system, which includes the following components: an image acquisition unit for high-resolution image data acquisition of the ultra-thin printed circuit board to be detected conveyed to the detection station at a predetermined detection station; an image preprocessing unit connected to the output end of the image acquisition unit, for receiving raw image data and performing image correction and enhancement processing to eliminate image distortion caused by circuit board deformation and uneven illumination; a defect candidate region generation unit connected to the output end of the image preprocessing unit, for fast analysis of the preprocessed image to locate and segment the candidate region containing potential defects; a defect intelligent classification unit connected to the output end of the defect candidate region generation unit, for receiving candidate region image data and using a deep learning model to accurately identify and classify the defects in the candidate region; and a result output unit connected to the output end of the defect intelligent classification unit, for integrating the classification results, position coordinates and size information of the defects, and generating a structured detection report.

[0007] In another aspect, an AI vision-based defect detection method for ultra-thin printed circuit boards is provided, which includes the following steps: S110, acquiring multi-angle and high-resolution image data of the ultra-thin printed circuit board to be detected by an image acquisition unit, to obtain original image data; S120, performing geometric correction and image enhancement processing on the original image data by an image preprocessing unit, to generate a standardized image to be detected; S130, performing fast scanning and analysis on the standardized image to be detected by a defect candidate region generation unit, to extract a candidate region containing potential defect features; S140, inputting image data of the candidate region into a defect intelligent classification unit, identifying defects in the candidate region by a pre-trained deep convolutional neural network model, and determining the specific defect type; and S150, collecting detailed information such as the position, type, and size of all identified defects by a result output unit, and generating a visual detection report or feeding back control instructions to an upstream production execution system.

[0008] Preferably, the image acquisition unit includes a high-resolution linear array industrial camera, a telecentric lens, and a composite illumination module composed of a coaxial light source and at least three low-angle linear light sources arranged in a ring array. The high-resolution linear array industrial camera is triggered synchronously with the transmission mechanism of the ultra-thin printed circuit board to be detected, to realize continuous scanning imaging of the surface of the circuit board. The coaxial light source is used to provide uniform vertical illumination, highlighting the flat area features of the circuit board surface, while the multiple low-angle linear light sources provide grazing illumination from different directions, enhancing the three-dimensional profile features of micro scratches, pits, and foreign matter by producing specific shadows, effectively suppressing overexposure and information loss caused by unevenness of the circuit board surface and mirror reflection of the metal lines.

[0009] Further, when performing geometric correction, the image preprocessing unit first calculates an affine transformation matrix describing the warping and deformation of the circuit board by a feature point matching algorithm (such as the scale-invariant feature transform (SIFT) algorithm) between the standard template image and the image to be detected, and then applies the matrix to inversely transform the image to be detected to correct it to a planar state aligned with the standard template image. The image enhancement processing includes using a contrast-limited adaptive histogram equalization (CLAHE) algorithm, which processes the image in blocks, independently calculates the histogram in each sub-region, and performs equalization, thereby improving the local contrast of the image while avoiding the problem of excessive amplification of noise caused by global equalization, significantly improving the recognizability of weak defect features.

[0010] Preferably, the defect candidate region generation unit incorporates a lightweight fully convolutional network (FCN). This network rapidly generates a defect probability map by performing pixel-level segmentation on the entire preprocessed input image. In the defect probability map, regions with pixel values ​​higher than a preset threshold are identified as defect candidate regions. Compared to directly inputting the entire high-resolution image into a complex classification network, this method can complete the localization of all candidate regions with a single forward propagation, significantly reducing the computational load of subsequent processing and improving the overall operating efficiency of the detection system. The lightweight FCN is specially designed with fewer convolutional layers and channels, ensuring a sufficiently high recall rate for potential defect regions while meeting real-time requirements.

[0011] Furthermore, the core of the defect intelligent classification unit is a deep residual network (ResNet) classification model. This model, by introducing a residual learning module, solves the gradient vanishing problem during deep network training, enabling the network to reach deeper layers and learn more abstract and discriminative defect features. The model is pre-trained in a supervised manner using a labeled dataset containing massive amounts of standard circuit board images and various defect samples (including open circuits, short circuits, pinholes, dents, scratches, foreign matter contamination, copper slag residue, etc.). During training, online data augmentation techniques are employed to randomly rotate, scale, crop, and change the brightness of the training samples, thereby improving the model's generalization ability and robustness to changes in defect size, orientation, and illumination.

[0012] Furthermore, the defect type output by the intelligent defect classification unit is one of a predefined set of categories, which includes at least: open circuit, short circuit, notch, bump, pinhole, copper slag residue, substrate scratch, abnormal solder mask coverage, and character printing defects. For each identified defect, the intelligent defect classification unit also simultaneously calculates the coordinates of its bounding rectangle, the pixel area of ​​the defect region, and the maximum length dimension, and transmits this quantitative data along with the defect type to the result output unit.

[0013] Optionally, the result output unit processes the received structured defect data and can output it in two ways. The first way is to generate a visual inspection report containing a global defect distribution map, magnified images of each defect area, defect type labels, and a list of quantified parameters, for quality management personnel to review and analyze. The second way is to encode the defect data into a message in a specific format and send it in real-time to the production line's process control computer or manufacturing execution system (MES) via the industrial Ethernet protocol. This triggers automated defect rejection actions or provides early warning adjustments to upstream process parameters.

[0014] Compared with the prior art, the present invention has the following beneficial effects: By employing a composite illumination module consisting of a coaxial light source and multi-angle low-angle light sources, combined with a high-resolution line scan camera, the imaging quality problems caused by warping and high surface reflectivity of ultra-thin printed circuit boards can be effectively overcome. This provides high-quality and highly stable raw image data for subsequent intelligent analysis, ensuring the reliability of the detection from the source.

[0015] Affine transformation was introduced for geometric correction, and contrast-limited adaptive histogram equalization was used for image enhancement. This can accurately eliminate image distortion caused by physical deformation of the circuit board and significantly improve the visibility of small, low-contrast defects, laying a solid foundation for the accurate extraction of defect features.

[0016] The two-stage detection strategy of "lightweight network for rapid candidate region localization" and "deep residual network for accurate classification" is adopted. While ensuring a high detection rate and low false alarm rate for various complex defects, it significantly optimizes the allocation of computing resources, improves the running speed of the entire detection process, and meets the needs of industrial production lines for high-speed detection.

[0017] The deep learning-based intelligent defect classification unit, trained on a large-scale dataset, possesses powerful feature self-learning and generalization capabilities. It can accurately identify known defects of various forms and also shows good detection potential for unknown novel defects. Its detection performance far exceeds that of traditional machine vision algorithms that rely on manually designed features, and it is also more robust. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall technical solution architecture of the present invention. Detailed Implementation

[0019] Please refer to Figure 1 To further illustrate the technical means and effects of the present invention in order to achieve the intended purpose, the following detailed description of the specific implementation methods, structures, features and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.

[0020] Example 1 In an automated inspection production line for ultra-thin printed circuit boards (PCBs) used in the production of high-end smartphone motherboards, the inspection system of this invention is integrated after the PCB etching and solder mask printing processes and before the electrical testing processes. The ultra-thin PCB substrate to be inspected is 50 micrometers thick and has copper wires with a minimum linewidth of 20 micrometers. A conveyor mechanism transports the PCB to the inspection station at a speed of 0.5 meters per second. This embodiment will describe in detail how a complete AI vision-based defect detection method and system for ultra-thin PCBs operates in this scenario.

[0021] This embodiment presents an AI vision-based ultra-thin printed circuit board defect detection system, in which the physical structure and logical functional units are tightly coupled. The system includes an image acquisition unit, an image preprocessing unit, a defect candidate region generation unit, a defect intelligent classification unit, and a result output unit. These units work together to complete a fully automated process from acquiring circuit board images to generating defect reports.

[0022] First, the hardware configuration and working principle of the system are explained. The image acquisition unit is the data source of the entire inspection process, and its performance directly determines the accuracy and reliability of the inspection. The core of this unit is a high-speed linear scan industrial camera with a resolution of 16384 pixels and a pixel size of 3.5 micrometers, ensuring a sampling accuracy of more than 10 pixels for circuits with a linewidth of 20 micrometers. The camera is connected to the industrial control computer of the image preprocessing unit via a gigabit Ethernet interface, using the GigEVision protocol for high-speed data transmission. Matched to the camera is a telecentric lens with a magnification of 0.5x, designed to ensure a constant image magnification even with ±2 mm height warping on the circuit board, avoiding dimensional measurement errors caused by changes in object distance. To address the complex surface optical characteristics of ultra-thin circuit boards, this unit is equipped with a composite illumination module. At the center of this module is a 50-watt coaxial red light source with a wavelength of 630 nanometers. Through a beam splitter system, the light is directed perpendicularly to the circuit board surface along the lens optical axis. This lighting method maximizes illumination of the flat substrate and copper foil area, creating a high-contrast background. Three low-angle strip light sources, each 300 mm long and 30 watts in power, are evenly distributed at a 120-degree angle around the coaxial light source. Their mounting angle is 15 degrees to the circuit board plane. These three light sources employ a time-division strobe control strategy, managed by a precise synchronous controller. When the circuit board enters the detection area, the encoder of the conveyor mechanism provides real-time position information to the synchronous controller. The controller precisely triggers the line-scan camera to perform line-by-line exposure and simultaneously illuminates one of the low-angle light sources, thereby achieving continuous scanning imaging of the circuit board surface and obtaining multiple image data at different grazing angles.

[0023] Next, the specific steps of the system's detection method will be explained.

[0024] Step S110: The image acquisition unit acquires multi-angle, high-resolution image data of the ultra-thin printed circuit board to be inspected, obtaining raw image data. When a circuit board measuring 100 mm by 150 mm enters the inspection station, the photoelectric sensor located at the station entrance is triggered, sending a signal to the system main controller. The main controller then initiates the image acquisition process. The servo motor of the conveyor mechanism drives the circuit board through the field of view of the camera at a constant speed. The rotary encoder coaxial with the servo motor generates a pulse signal every 0.1 mm of displacement, which is used as an external trigger input to the synchronization controller. The synchronization controller precisely controls the exposure and data readout of the line scan camera according to the preset camera line frequency, such as 100 kHz. During the first full-frame scan, the synchronization controller only turns on the coaxial light source, and the line scan camera acquires data line by line. The data is then stitched into a complete raw grayscale image representing the vertical illumination conditions in memory through the frame capture card. The image bit depth is 12 bits, and the resolution is 16384 pixels by 30000 lines. Next, the system control mechanism retracts the circuit board to its starting position and performs a second, third, and fourth scan at the same speed. During these three scans, the coaxial light source remains off, while the three low-angle strip light sources are sequentially and independently illuminated. Thus, the system ultimately obtains one original image under coaxial illumination and three original images illuminated by low-angle light from different directions, for a total of four high-resolution image data. These four images together constitute a complete optical information description of the circuit board under inspection.

[0025] Step S120 involves using an image preprocessing unit to perform geometric correction and image enhancement on the original image data, generating a standardized image to be detected. This step is executed by an industrial control computer equipped with a high-performance graphics processing unit. Geometric correction is performed first. A coaxial light image of a standard circuit board, acquired through precision measurement equipment and free of any defects, is pre-loaded into the computer's memory as a standard template image. The preprocessing unit first processes the acquired coaxial light image. It employs the Scale Invariant Feature Transform (SIFT) algorithm to extract hundreds of stable feature points from both the image to be detected and the standard template image, such as the corners of pads and the intersections of circuits. Subsequently, by calculating the Euclidean distance between these feature point descriptors, dozens of the most reliable matching point pairs are found. To eliminate erroneous matches caused by minor local differences in the circuit board, the system uses the Random Sample Consensus (RANSAC) algorithm to iteratively filter the matching point pairs, ultimately obtaining an optimal set of matching points. Based on this set, the system calculates a 3x3 affine transformation matrix using the least squares method.

[0026] ;

[0027] This matrix precisely describes the translation, rotation, scaling, and shearing deformation of the circuit board under test relative to the standard template. Next, the preprocessing unit applies the inverse transformation of this matrix to resample the four original images, correcting them all to a coordinate system perfectly aligned with the standard template image, thus eliminating geometric distortion caused by overall warping and local wrinkles of the circuit board. The corrected image size is uniformly set to 16,000 pixels by 29,500 rows. After geometric correction, the image enhancement stage begins. Due to the inhomogeneity of the circuit board substrate material, copper foil finish, and solder resist thickness, the corrected image still suffers from insufficient local contrast. The preprocessing unit employs the contrast-limited adaptive histogram equalization (CLAHE) algorithm. It divides each image into 64 x 64 non-overlapping sub-blocks, each 250 x 460 pixels in size. Within each sub-block, its grayscale histogram is calculated independently, and a cropping threshold is set, for example, cropping and redistributing portions of the histogram exceeding three times the mean to limit noise amplification. Then, the histogram of each sub-block is equalized. Finally, to eliminate block artifacts, the final gray value of each pixel is obtained by bilinear interpolation of the equalization results of its own block and surrounding adjacent blocks. After CLAHE processing, defects in the image that originally had slight gray-level differences, such as fine scratches and residual copper, become exceptionally clear in outline and texture, providing high-quality input for subsequent recognition. Finally, the preprocessing unit fuses the four enhanced images into a multi-channel image, or extracts features from the low-angle image and superimposes them onto the coaxial light image to generate an information-rich, standardized image to be detected.

[0028] Step S130 involves a rapid scan and analysis of the standardized image to be detected by a defect candidate region generation unit to extract candidate regions containing potential defect features. Directly inputting the entire 470 million pixel image into a complex classification network for analysis would be computationally intensive and unacceptable for production line cycle time. Therefore, this step employs a rapid screening strategy. This unit incorporates a lightweight fully convolutional network (FCN). The network's structure has been deeply optimized, containing only 8 convolutional layers and 3 upsampling layers, with all convolutional kernels using a small 3x3 size and the number of channels limited to a maximum of 64. The network input is an image to be detected downsampled to one-quarter of its original size, i.e., 4000 x 7375 pixels. The network performs pixel-level semantic segmentation on the input image, and its output is a single-channel defect probability map of the same size as the input. In this probability map, the value of each pixel, ranging from 0 to 1, represents the probability that the point belongs to a defect region. The FCN model is trained on a dedicated dataset containing only two classes of annotations: defects and background. Therefore, the model focuses on distinguishing between "problematic regions" and "normal regions," regardless of the specific defect type. A single forward propagation process takes only about 50 milliseconds. After generating the defect probability map, the system sets a global probability threshold, for example, 0.7. All pixels with values ​​higher than 0.7 are labeled as foreground. Subsequently, the system performs connected component analysis on these foreground pixels, aggregating spatially connected pixels into independent regions. For each connected component, its bounding box is calculated. The regions enclosed by these bounding boxes are defined as candidate defect regions. In this way, the system reduces the focus of analysis from the entire image to dozens or hundreds of small patches, typically only tens by tens of pixels in size, reducing computational cost by several orders of magnitude.

[0029] Step S140: The image data of the candidate regions is input into the defect intelligent classification unit. A pre-trained deep convolutional neural network model identifies defects within the candidate regions and determines their specific defect types. This unit is the intelligent core of the entire system, deploying a ResNet-50 classification model containing 50 convolutional layers. This model was chosen because its unique residual learning structure effectively solves the gradient vanishing problem during deep network training, thus learning a rich hierarchical representation from low-level edge and texture features to high-level shape and semantic features, exhibiting strong discriminative ability for circuit board defects of various shapes. The model underwent rigorous pre-training. The training dataset contains over 1 million circuit board defect sample images, manually labeled by professional quality inspection engineers, covering 9 predefined defect categories: open circuit, short circuit, notch, bulge, pinhole, copper slag residue, substrate scratch, abnormal solder mask coverage, and character printing defects. During training, online data augmentation techniques were employed to improve the model's generalization ability and robustness. Each time a batch of images is taken from the dataset, it undergoes a series of random geometric and optical transformations, including random rotations within ±15 degrees, random scaling between 80% and 120%, random horizontal and vertical flips, and random perturbations to image brightness and contrast. These operations greatly expand the diversity of the training set, preventing the trained model from overfitting to defects under specific orientations, sizes, or lighting conditions. After the defect candidate region generation unit outputs the coordinates of candidate regions, the defect intelligent classification unit uses these coordinates to precisely crop corresponding image patches from the standardized images to be detected, and uniformly scales these image patches to 224 by 224 pixels, which is the standard input size of the ResNet-50 model. Subsequently, these image patches are fed into the model one by one for forward inference. The model outputs a vector containing 9 elements, each element representing the confidence score of the image patch belonging to the corresponding defect category. The system takes the category with the highest confidence score as the final classification result. For example, if a candidate region, after model analysis, scores 0.98 for the "line break" item in the output vector, significantly higher than other items, then that region is identified as a line break defect. In addition to classification, this unit also performs refined geometric parameter calculations on the identified defective regions. Using image processing algorithms, it precisely calculates the vertex coordinates of the minimum bounding rectangle of the defective region, the total pixel area occupied by the defective region in the image, and the length of its longest axis. This quantified data is crucial for assessing the severity of the defect.

[0030] In step S150, the result output unit summarizes detailed information such as the location, type, and size of all identified defects and generates a visualized inspection report or feeds back control instructions to the upstream production execution system. After the defect intelligent classification unit completes the analysis of all candidate areas, it packages each confirmed defect into a structured data object. This object contains fields: a unique defect ID, defect category (e.g., "short circuit"), confidence score (e.g., 0.99), bounding rectangle coordinates in the global coordinate system of the circuit board (e.g., x_min: 1024, y_min: 2048, x_max: 1080, y_max: 2100), pixel area (e.g., 512 pixels), and maximum length (e.g., 35 pixels). The result output unit is responsible for collecting all such data objects detected on the current circuit board and processing them according to a preset output mode. In this embodiment, the system is configured with two output methods. The first is to generate a visualized inspection report. The system generates an HTML format report file. The report's homepage features a thumbnail of the currently inspected circuit board. All detected defects are marked with rectangles of different colors, each color corresponding to a different defect type, accompanied by an illustration. Clicking on any rectangle takes you to the report's detailed page, which displays a magnified close-up image of the defect area, its detailed classification, and a list of quantitative parameters. This report is automatically saved on the quality traceability server, and a link is pushed to the production line quality control supervisor's workstation for manual review or archiving. The second method involves real-time integration with the Manufacturing Execution System (MES). The output unit encapsulates the defect data in a predefined JSON format, forming a message. This message includes the circuit board's unique serial number, inspection timestamp, inspection result (pass / fail), total number of defects, and a detailed list of all defects. This message is then sent to the designated port of the MES system via industrial Ethernet using the TCP / IP protocol. The MES system receives and parses the message. If the inspection result is unqualified, the MES system will immediately send a command to the rejection device located downstream of the inspection station. This device (e.g., a pneumatic pusher) will push the unqualified circuit board from the main conveyor belt into the defective product recycling bin when it reaches the designated position. Simultaneously, if the MES system analysis detects a certain type of defect, such as "copper slag residue," appearing on multiple consecutive circuit boards with a frequency exceeding a preset alarm threshold (e.g., more than 10 instances on 5 consecutive boards), the system will determine that there may be a drift in process parameters in the upstream etching process. It will then automatically send a warning message to the control system of that process, prompting the operator to check the etching solution concentration or spray pressure, thereby achieving closed-loop control of quality issues.

[0031] Example 2 This embodiment is applied to a production line for flexible printed circuit boards (FPCs). Compared to the rigid ultra-thin PCB in Embodiment 1, the substrate material of FPC is polyimide, which is thinner and more flexible. During transport, it is more prone to severe, non-planar wrinkles and curling, posing more stringent challenges to image acquisition and geometric correction. Furthermore, this embodiment employs a different technical approach in its defect detection algorithm compared to Embodiment 1, aiming to achieve a higher degree of end-to-end integrated inspection.

[0032] In this embodiment, the hardware configuration of the image acquisition unit has been adjusted. Although a high-resolution line-scan industrial camera and a telecentric lens are still used, an additional structured light projection module based on digital light processing (DLP) is added to the lighting system, in addition to the coaxial light source and the ring low-angle light source. This module can project a predetermined encoded stripe pattern, such as a Gray code pattern, onto the FPC surface. As the FPC passes through, the line-scan camera simultaneously acquires images of the deformed stripes under structured light illumination. By analyzing the deformation information of the stripes, the system can reconstruct a precise three-dimensional height map of the FPC surface in real time.

[0033] Correspondingly, the method steps have also changed significantly. In step S110, when acquiring raw image data, in addition to acquiring a conventional two-dimensional grayscale image, a structured light stripe image is also acquired simultaneously.

[0034] The image preprocessing unit in step S120 no longer relies on matching two-dimensional feature points with a standard template for geometric correction. Instead, it first uses the acquired structured light fringe image to calculate the three-dimensional spatial coordinates (X, Y, Z) of each pixel on the FPC surface using triangulation principles. This gives the system a depth map aligned with the pixels of the two-dimensional grayscale image. Subsequently, the preprocessing unit executes a "physical unfolding" algorithm. Based on this depth map, this algorithm simulates a process of "ironing out" the wrinkled FPC in virtual space, calculating a nonlinear mapping from a three-dimensional surface to a two-dimensional plane. Applying this mapping to the original two-dimensional grayscale image generates a standardized image to be detected that completely eliminates wrinkles and curling deformation. This correction method based on three-dimensional reconstruction is far superior to the affine transformation in Example 1 for handling severe deformation of FPCs. The image enhancement part still uses the CLAHE algorithm to improve local contrast.

[0035] The core technical difference in this embodiment lies in steps S130 and S140. Instead of the two-stage strategy of "FCN fast localization + ResNet accurate classification," these two steps are merged into a unified end-to-end defect detection step. This step employs a deeply customized YOLOv5 (YouOnlyLookOnce, version 5) object detection model. YOLOv5 is a single-stage object detector that completes defect localization (drawing bounding boxes) and defect classification in the same network in one step, resulting in extremely high detection speed.

[0036] The specific implementation is as follows: In the new step S135, the preprocessed, standardized image to be detected is directly fed into the YOLOv5 model as input. The model first segments the image into an SxS grid. If the center point of a defect falls into a grid cell, that cell is responsible for predicting the defect. Each grid cell predicts B bounding boxes and their confidence scores, as well as C class probabilities, where C is the predefined total number of defect classes. The model's network structure, including its backbone (CSPDarknet), neck (PANet), and head (YOLOHead), has been specifically optimized for small defects in FPCs. For example, an additional detection layer is added to the neck structure to improve the sensitivity to small targets. The model is also trained using an FPC defect dataset containing millions of labeled samples. The training objective function combines the bounding box localization loss (e.g., CIoULoss), confidence loss, and classification loss.

[0037] After an image is forward-propagated through the YOLOv5 network, its output is a tensor containing information about all detected defects. This tensor directly contains the bounding box coordinates of each defect, the confidence that a defect exists within that bounding box, and the probability that the defect belongs to each category. By setting a confidence threshold (e.g., 0.5) on the output tensor and performing non-maximum suppression (NMS) to eliminate duplicate detections of the same defect, the system can directly obtain the final defect list. Each item in this list contains the defect's location, size, and category information.

[0038] Therefore, the process in Example 2 eliminates the separate defect candidate region generation step, highly coupling the localization and classification tasks into a single, efficient neural network model. This end-to-end approach simplifies the processing flow, reduces data transfer overhead between modules, and improves the overall detection speed by approximately 30% compared to the two-stage method in Example 1 when processing images of the same resolution. This is particularly suitable for production scenarios with extremely demanding detection speed requirements. Subsequent steps S150 are essentially the same as in Example 1, and the result output unit is also responsible for compiling the defect list output by the YOLOv5 model into a visualization report or sending it to the MES system.

[0039] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A defect detection system for ultra-thin printed circuit boards based on AI vision, characterized in that, It includes the following components: The image acquisition unit is used to acquire high-resolution image data of the ultra-thin printed circuit board to be inspected at a preset inspection station. The image acquisition unit includes a high-resolution line array industrial camera, a telecentric lens, and a composite lighting module consisting of a coaxial light source and at least three low-angle strip light sources arranged in a ring array to acquire multiple original image data under different lighting conditions. An image preprocessing unit, connected to the output of the image acquisition unit, is used to receive the multiple raw image data and perform image correction and enhancement processing. A defect candidate region generation unit is connected to the output of the image preprocessing unit and is used for rapid analysis of the preprocessed image. The intelligent defect classification unit is connected to the output of the defect candidate region generation unit and is used to receive candidate region image data. The core of the intelligent defect classification unit is a deep residual network classification model. This deep residual network classification model accurately identifies and classifies defects in the candidate region by introducing a residual learning module. The model is pre-trained using a labeled dataset containing multiple defect types for supervised training, and online data augmentation technology is used during the training process to improve the model's generalization ability to defect variations. The result output unit is connected to the output of the defect intelligent classification unit. It is used to integrate the defect classification results, location coordinates and size information to generate a structured inspection report, or to encode the defect data into a message in a specific format and send it to the manufacturing execution system in real time via the industrial Ethernet protocol. This is used to trigger automated defective product rejection actions or to make early warning adjustments to upstream process parameters.

2. The AI ​​vision-based ultrathin printed circuit board defect detection system according to claim 1, characterized in that, In the image acquisition unit, the high-resolution linear industrial camera is synchronously triggered with the conveying mechanism of the ultra-thin printed circuit board to be inspected, realizing continuous scanning imaging of the circuit board surface. The coaxial light source and multiple low-angle strip light sources are illuminated in a time-division manner. The coaxial light source is used to provide uniform vertical illumination to highlight the flat area features of the circuit board surface. The multiple low-angle strip light sources provide grazing illumination from different directions, which enhances the three-dimensional contour features of small scratches, pits and foreign objects by generating specific shadows, and effectively suppresses overexposure and information loss caused by uneven circuit board surface and specular reflection of metal lines.

3. The AI ​​vision-based ultrathin printed circuit board defect detection system according to claim 1, characterized in that, The image preprocessing unit, during geometric correction, calculates the affine transformation matrix describing the warping and deformation of the circuit board using a feature point matching algorithm between the standard template image and the image to be detected. This matrix is ​​then applied to perform an inverse transformation on the image to be detected, correcting it to a planar state aligned with the standard template image. During image enhancement, a contrast-limited adaptive histogram equalization algorithm is used to segment the image and perform equalization independently within each sub-region to eliminate image distortion caused by circuit board deformation and uneven lighting. During geometric correction, a scale-invariant feature transformation algorithm is first used to extract feature points from both the image to be detected and the standard template image. Then, a random sampling consensus algorithm iteratively filters matching point pairs to obtain the optimal set of matching points. Based on this set, the affine transformation matrix is ​​calculated using the least squares method. The affine transformation matrix describes the translation, rotation, scaling, and shear deformation of the circuit board to be detected relative to the standard template.

4. The AI ​​vision-based ultrathin printed circuit board defect detection system according to claim 1, characterized in that, The image preprocessing unit employs a contrast-limited adaptive histogram equalization algorithm, which specifically processes the following steps: the image is divided into multiple non-overlapping sub-blocks, and the gray-level histogram is independently calculated within each sub-block. A cropping threshold is set, and the portion of the histogram exceeding the threshold is cropped and redistributed evenly. Then, the histogram of each sub-block is equalized. Finally, the final gray-level value of each pixel is obtained by bilinear interpolation of the equalization results of its block and surrounding adjacent blocks.

5. The AI ​​vision-based ultrathin printed circuit board defect detection system according to claim 1, characterized in that, The defect candidate region generation unit incorporates a lightweight fully convolutional network. This network rapidly generates a defect probability map by performing pixel-level segmentation on the entire preprocessed input image. In the defect probability map, regions with pixel values ​​higher than a preset threshold are identified as defect candidate regions to locate and segment candidate regions containing potential defects. When generating defect candidate regions, after obtaining the defect probability map, the defect candidate region generation unit sets a global probability threshold. All pixels with pixel values ​​higher than this global probability threshold are marked as foreground. Subsequently, connected component analysis is performed on the foreground pixels to aggregate spatially connected pixels into independent regions. The bounding rectangle of each connected component is calculated, and the regions enclosed by these bounding rectangles are defined as defect candidate regions.

6. The AI ​​vision-based ultrathin printed circuit board defect detection system according to claim 1, characterized in that, The defect type output by the intelligent defect classification unit is one of the predefined categories, which includes at least: open circuit, short circuit, notch, bump, pinhole, copper slag residue, substrate scratch, abnormal solder mask coverage, and character printing defects. For each identified defect, the intelligent defect classification unit also simultaneously calculates the coordinates of its bounding rectangle, the pixel area of ​​the defect region, and the maximum length dimension.

7. A defect detection method for ultrathin printed circuit boards based on AI vision, characterized in that, The method includes the following steps: Step S100: The image acquisition unit is used to acquire high-resolution image data of the ultra-thin printed circuit board to be inspected. The image acquisition unit is equipped with a high-resolution line array industrial camera, a telecentric lens and a composite lighting module. The composite lighting module includes a coaxial light source and at least three low-angle strip light sources distributed in a ring array. By synchronously triggering and time-division lighting the light sources with the conveying mechanism, multiple original image data under different lighting conditions are acquired. Step S200: The image preprocessing unit receives the multiple original image data and performs image correction and enhancement processing. The image is geometrically corrected by calculating and applying the affine transformation matrix to correct the warping and deformation of the circuit board. Then, the contrast-limited adaptive histogram equalization algorithm is used to enhance the image in blocks to improve local contrast and eliminate the influence of uneven lighting, generating a standardized image to be detected. Step S300: The standardized image to be detected is quickly scanned and analyzed by the defect candidate region generation unit. The image is segmented at the pixel level using the built-in lightweight fully convolutional network to generate a defect probability map. Candidate regions containing potential defect features are identified and extracted according to a preset probability threshold. Step S400: Input the image data of the candidate region into the defect intelligent classification unit, identify the defects in the candidate region through a pre-trained deep residual network classification model, and determine its specific defect type. The model is obtained by supervised training on a labeled dataset containing multiple defect types and combined with online data augmentation technology. In step S500, the result output unit summarizes the location, type, and size details of all identified defects and generates a visualized inspection report, or encodes the structured defect data into a message and sends it to the manufacturing execution system to execute subsequent automated control instructions.

8. The AI ​​vision-based defect detection method for ultra-thin printed circuit boards according to claim 7, characterized in that, In step S100, uniform vertical illumination is provided by the coaxial light source to highlight the flat area features of the circuit board surface, and grazing illumination from different directions is provided by the multiple low-angle strip light sources to enhance the features of small three-dimensional contour defects through shadows and suppress specular reflections on the surface and lines.

9. The AI ​​vision-based defect detection method for ultra-thin printed circuit boards according to claim 7, characterized in that, In step S200, when performing geometric correction, the scale-invariant feature transformation algorithm is first used to extract feature points from the image to be detected and the standard template image. The optimal matching point set is then selected by the random sampling consensus algorithm, and the affine transformation matrix is ​​calculated based on this set using the least squares method.

10. The AI ​​vision-based defect detection method for ultra-thin printed circuit boards according to claim 7, characterized in that, In step S300, after generating the defect probability map, the probability map is binarized by setting a global probability threshold to mark the foreground pixels. Then, connected component analysis is performed on the foreground pixels to aggregate connected pixels into independent regions. Finally, the bounding rectangle of each independent region is calculated, and the region defined by the bounding rectangle is output as a defect candidate region.

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