Temperature sensing circuit and chip

Abstract

The embodiment of the application provides a temperature sensing circuit and a chip, wherein the circuit comprises a temperature sensing module, a sampling amplification module and an analog-to-digital conversion module; the control end and the output end of the temperature sensing module are connected with the first control signal output end and the input end of the sampling amplification module respectively; the first control end of the sampling amplification module is connected with the second control signal; the two input ends of the analog-to-digital conversion module are connected with the output end of the sampling amplification module and the reference voltage signal respectively, and the control end is connected with the third control signal. The temperature sensing module controls the size of the bias current based on the first control signal, and outputs the temperature sensing signal based on the bias current; the sampling amplification module samples and amplifies the temperature sensing signal based on the second control signal, and outputs the sampling signal; the analog-to-digital conversion module samples and quantizes the sampling signal based on the third control signal and the reference voltage signal, and outputs the temperature quantization signal. Through the above circuit, the error caused by the parasitic resistance of the transistor of the temperature sensing module can be eliminated, and the measurement precision is improved.

Description

Technical Field

[0001] This application relates to the field of sensor technology, and in particular to a temperature sensing circuit and chip. Background Technology

[0002] As a fundamental sensing device, the accuracy of temperature sensing circuits directly affects the performance of temperature measurement and control systems. Currently, the core sensing circuit of a traditional temperature sensing circuit (hereinafter referred to as the temperature sensing circuit) generally includes five basic components: a temperature sensing module, a programmable gain amplifier (PGA), an analog-to-digital converter (ADC), an ADC reference generation circuit, and a bandgap reference circuit (BG). Each of these components can introduce varying degrees of error, affecting the accuracy of the temperature sensing circuit.

[0003] Current solutions improve the accuracy of temperature sensing circuits by modifying certain circuit designs to suppress or eliminate introduced errors. However, existing solutions still fail to effectively address the errors introduced by multiple stages in the temperature sensing process, making it difficult to meet the demands of high-precision applications.

[0004] Currently, there is no effective solution to the problem that the current error elimination methods for temperature sensing circuits are complex, ineffective, and have low measurement accuracy. Summary of the Invention

[0005] The purpose of this specification is to provide a temperature sensing circuit and chip to solve the problems that current temperature sensing circuits have complex error elimination methods that cannot effectively eliminate errors and have low measurement accuracy.

[0006] To solve the above-mentioned technical problems, this specification provides a temperature sensing circuit in a first aspect, comprising: a temperature sensing module, a sampling amplification module, and an analog-to-digital conversion module; wherein, the control terminal of the temperature sensing module is connected to a first control signal, the output terminal of the temperature sensing module is connected to the input terminal of the sampling amplification module, the output terminal of the sampling amplification module is connected to a first input terminal of the analog-to-digital conversion module, the first control terminal of the sampling amplification module is connected to a second control signal, the second input terminal of the analog-to-digital conversion module is connected to a reference voltage signal, and the control terminal of the analog-to-digital conversion module is connected to a third control signal;

[0007] The temperature sensing module is used to control the magnitude of the bias current in the temperature sensing module based on the first control signal, and output a temperature sensing signal based on the corresponding bias current.

[0008] The sampling amplification module is used to sample and amplify the output of the temperature sensing module based on the second control signal, and output a sampling signal;

[0009] The analog-to-digital conversion module is used to sample and quantize the sampled signal based on the third control signal and the reference voltage signal, and output a temperature quantization signal.

[0010] In some embodiments of this specification, the first control signal is used to control the temperature sensing module to adjust the magnitude of the bias current in different sampling periods of the temperature sensing circuit, and the bias current corresponding to different sampling periods is in a multiple relationship.

[0011] In some embodiments of this specification, the temperature sensing module includes two current mirrors and two transistors;

[0012] The first end of each of the two current mirrors is connected to a power supply, and the second end of each of the two current mirrors is connected to the first terminal of a transistor, and the second terminal and control terminal of the two transistors are grounded.

[0013] An output node is provided between the first electrode of the two transistors and the current mirror, and the two output nodes are respectively connected to the two input terminals of the sampling amplification module.

[0014] Two current mirrors are connected to the first control signal and are used to output corresponding bias currents under the control of the first control signal.

[0015] In some embodiments of this specification, the temperature sensing module includes a bias current generation module, a switching network, a first transistor, and a second transistor; the switching network includes a plurality of first switches and a plurality of second switches correspondingly arranged, as well as a third switch and a fourth switch corresponding to each transistor;

[0016] The first control signal is connected to the bias current generation module and is used to control the magnitude of the bias current generated by the bias current generation module.

[0017] The first terminal of each first switch and the first terminal of each second switch are connected to the output terminal of the bias current generation module. The second terminals of multiple first switches are connected in parallel to the first terminal of the third switch corresponding to the first transistor and the first terminal of the fourth switch corresponding to the second transistor. The second terminals of multiple second switches are connected in parallel to the first terminal of the third switch corresponding to the second transistor and the first terminal of the fourth switch corresponding to the first transistor.

[0018] The second terminals of the third and fourth switches corresponding to the first transistor are connected to the first electrode of the first transistor, and the second terminals of the third and fourth switches corresponding to the second transistor are connected to the first electrode of the second transistor.

[0019] The control electrode and the second electrode of the first transistor, as well as the control electrode and the second electrode of the second transistor, are grounded;

[0020] The second terminals of the plurality of first switches are connected in parallel and then connected to the first input terminal of the sampling amplification module. The second terminals of the plurality of second switches are connected in parallel and then connected to the second input terminal of the sampling amplification module.

[0021] In some embodiments of this specification, the bias current generation module includes a plurality of bias transistors, a power supply, a current mirror, a plurality of control transistors, and a bias switch. Each bias transistor is configured to correspond to a first switch and a second switch in the switch network. The bias switch is connected to the first control signal. The control transistor includes a first control transistor and three second control transistors. The plurality of bias transistors can mirror the current of the first control transistor, and each second control transistor is used to control the current flowing through the first control transistor under the control of the bias switch.

[0022] The first stage of the first control transistor and the first terminals of each bias transistor are connected in parallel and connected to the power supply, and the second terminal of the first control transistor is connected to the control terminal of the first control transistor.

[0023] The control terminals of each bias transistor are connected in parallel to the control terminal of the first control transistor, and the second terminals of each bias transistor are connected to the first terminals of the corresponding first and second switches.

[0024] The first end of the current mirror is connected to the power supply, and the second end of the current mirror is connected to the control electrode of each second control transistor. The second electrodes of each control transistor are connected in parallel and grounded.

[0025] The second terminal of one of the three second control transistors is connected to the second terminal of the current mirror, the second terminal of one of the three second control transistors is connected to the second terminal of the first control transistor, and the second terminal of one of the three second control transistors is connected to the second terminal of the first control transistor through a bias switch.

[0026] In some embodiments of this specification, the sampling amplification module further includes a second control terminal, which is connected to a fourth control signal;

[0027] During the process of sampling and amplifying the output of the temperature sensing module based on the second control signal, the sampling amplification module exchanges the first capacitor and the second capacitor of the sampling amplification module based on the fourth control signal and outputs a sampling signal.

[0028] In some embodiments of this specification, the sampling amplification module includes an operational amplifier, two sampling capacitors, and two feedback capacitors;

[0029] The first end of each sampling capacitor is connected to one input terminal of the operational amplifier, and the second end of each sampling capacitor is connected to the first terminal of a first switching switch and the first terminal of a second switching switch.

[0030] The second terminal of each first switching switch is connected to an output terminal of the temperature sensing module through a first control switch;

[0031] A first node is provided on the line connecting the first switching switch and the first control switch, and each first node is connected to both ends of a second control switch.

[0032] A second node is provided between each sampling capacitor and the input terminal of the operational amplifier. Each second node is connected to an output terminal of the operational amplifier through a first control switch. Each second node is also connected to the first terminal of a first switching switch and the first terminal of a second switching switch through a feedback capacitor.

[0033] The second end of the first switching switch connected to the feedback capacitor is connected to a reset signal via a reset switch, and a third node is provided on the line connecting the first switching switch and the reset switch;

[0034] The second terminal of the second switching switch connected to the sampling capacitor is connected to the third node of the corresponding sampling amplification circuit, and each third node is also connected to an output terminal of the operational amplifier through a second control switch;

[0035] The second terminal of the second switching switch, which is connected to the feedback capacitor, is connected to the first node on the sampling amplification loop corresponding to the operational amplifier.

[0036] In some embodiments of this specification, the second control signal includes a first sub-signal, a second sub-signal, and a third sub-signal, each sub-signal being connected to the control terminals of the first control switch, the second control switch, and the reset switch, respectively.

[0037] In some embodiments of this specification, the circuit further includes a fourth control signal, which includes sub-signals for controlling the first and second switching switches, each sub-signal being connected to the control terminals of the first and second switching switches respectively.

[0038] In some embodiments of this specification, the sub-signal of the fourth control signal is used to control the closing of the first switching switch and the opening of the second switching switch, or the sub-signal of the fourth control signal is used to control the opening of the first switching switch and the closing of the second switching switch.

[0039] The second aspect of this specification provides a chip, including: the temperature sensing circuit described in the first aspect above and a processing unit, wherein the processing unit is connected to the output terminal of the analog-to-digital conversion module of the temperature sensing circuit, the processing unit is used to receive the temperature quantization signal output by the analog-to-digital conversion module, and determine the temperature output result based on at least two consecutive received temperature quantization signals, the temperature output result being used to characterize the temperature signal sensed by the temperature sensing circuit.

[0040] In some embodiments of this specification, the processing unit is communicatively connected to the control terminal of at least one of the temperature sensing module, sampling amplification module, or analog-to-digital conversion module of the temperature sensing circuit, and the processing unit is used to output corresponding control signals to the control terminals of each module.

[0041] In some embodiments of this specification, when the processing unit detects a preset error elimination trigger event, it outputs a corresponding control signal to the control terminals of each module of the temperature sensing circuit; or,

[0042] When the processing unit detects a preset error elimination stop event, it stops outputting corresponding control signals to the control terminals of each module of the temperature sensing circuit.

[0043] In some embodiments of this specification, the processing unit is provided with at least one register, which corresponds to at least one of the temperature sensing module, sampling amplification module, or analog-to-digital conversion module of the temperature sensing circuit. The value of the register is used to control the on / off state of the control signal output by the processing unit to the corresponding module of the temperature sensing circuit.

[0044] The temperature sensing circuit and chip provided in this specification, through the configuration of a temperature sensing module, a sampling amplification module, and an analog-to-digital converter (ADC), are configured such that the control terminal of the temperature sensing module is connected to a first control signal, the output terminal of the temperature sensing module is connected to the input terminal of the sampling amplification module, the output terminal of the sampling amplification module is connected to the first input terminal of the ADC, the first control terminal of the sampling amplification module is connected to a second control signal, the second input terminal of the ADC is connected to a reference voltage signal, and the control terminal of the ADC is connected to a third control signal. Furthermore, the temperature sensing module can control the magnitude of the bias current in the temperature sensing module based on the first control signal and output a temperature sensing signal based on the corresponding bias current; the sampling amplification module can sample and amplify the output of the temperature sensing module based on the second control signal and output a sampled signal; the ADC can sample and quantize the sampled signal based on the third control signal and the reference voltage signal and output a quantized temperature signal. Through the above-described temperature sensing circuit, the magnitude of the bias current generated by the temperature sensing module can be controlled within different sampling periods, and the output of the temperature sensing circuit can be calculated at the digital end. This can eliminate errors caused by the parasitic resistance of the transistors in the temperature sensing module and improve the accuracy of the temperature sensing circuit. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 The diagram shown is a schematic of a temperature sensing circuit provided in an embodiment of this specification.

[0047] Figure 2 The diagram shown is a schematic of a temperature sensing circuit provided in an embodiment of this specification.

[0048] Figure 3 The diagram shown is a schematic of a temperature sensing module provided in an embodiment of this specification.

[0049] Figure 4 The diagram shown is a schematic of a sampling amplification module provided in an embodiment of this specification;

[0050] Figure 5 The diagram shown is a schematic of a sampling amplification module provided in an embodiment of this specification;

[0051] Figure 6 The diagram shown is a schematic of a sampling amplification module provided in an embodiment of this specification;

[0052] Figure 7 The diagram shown is a schematic of a temperature sensing circuit provided in an embodiment of this specification.

[0053] Figure 8 The diagram shown is a schematic of the operating timing of the temperature sensing circuit provided in the embodiment of this specification. Detailed Implementation

[0054] The technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this specification.

[0055] The core sensing circuit of a temperature sensor generally comprises five basic components: a temperature sensing module, a programmable gain amplifier (PGA), an analog-to-digital converter (ADC), an ADC reference generation circuit, and a bandgap reference circuit (BG). The accuracy of a temperature sensor is influenced by these five components. The error sources in the temperature sensing module mainly include the current mirror and the bipolar junction transistor (BJT). The error sources in the PGA mainly include capacitor mismatch, operational amplifier mismatch, and finite gain. The error sources in the ADC, ADC reference generation circuit, and BG are mainly mismatches in their respective components.

[0056] For details, please refer to Figure 1 As shown, a temperature sensing circuit includes a temperature sensing module, a PGA, an ADC, an ADC reference circuit, and a BG. The temperature sensing module includes current mirrors I1 and I2, BJT transistors Q1 and Q2. The emitters of the two BJT transistors in the temperature sensing module can each lead out an output terminal connected to the two input terminals of the PGA. The output terminal of the PGA is connected to the first input terminal of the ADC. The output terminal of the ADC reference generation circuit outputs a reference voltage Vref to the second input terminal of the ADC. The output terminal of the BG is connected to the input terminal of the ADC reference generation circuit. The output of the ADC can be used as the output of the temperature sensing circuit.

[0057] Combination Figure 1In the temperature sensing circuit, the error sources of the temperature sensing module are current mirrors I1 and I2, and BJT transistors Q1 and Q2. The error sources of the PGA are mainly capacitor mismatch, op-amp offset, and finite gain. Taking a CDAC SAR ADC as an example, its error sources are mainly the matching degree of the CDAC (this factor affects the linearity of the ADC) and the comparator offset (this factor will cause the ADC to produce offset error). The error source of the ADC reference generation circuit is mainly its offset, and the error source of the BG is also mainly its offset. Assuming the ADC reference generation circuit is a unity-gain buffer, the offset voltage of the BG is Vos2, and the offset voltage of the ADC reference generation circuit is Vos3, then the reference voltage Vref output by the ADC reference generation circuit is Vbg + Vos2 + Vos3. It can be seen that due to the offsets of the ADC reference generation circuit and the BG, the reference voltage Vref deviates from its ideal value Vbg, which will cause the ADC to produce gain error. Gain error in an ADC is a major problem for temperature sensing circuits, as it means that the slope of the curve relating the output of the temperature sensing circuit to the temperature has changed. Two-point calibration is required to correct the gain error, which increases the overhead and cost of calibration.

[0058] In some embodiments, the error caused by the mismatch of current mirror I1, current mirror I2, BJT Q1 and BJT Q2 can be reduced by performing dynamic element matching (DEM) on the temperature sensing module.

[0059] DEM (Device Modeling) can be used to eliminate or significantly reduce component mismatch errors caused by unavoidable process variations in integrated circuit manufacturing. DEM achieves spatial accuracy through time averaging. Specifically, the temperature sensing module can use a switching network to periodically switch between multiple physically mismatched current mirrors, ensuring that each current mirror is used with equal probability and duration over a sufficiently long period. Consequently, the signal sampled by the PGA (Programmable Gate Array) is actually the average of multiple current mirrors, thus converting the mismatch error into a high-frequency noise that can be easily filtered out.

[0060] While the above methods can reduce the errors caused by the mismatch of the current mirror and BJT in the temperature sensing module to some extent, they do not effectively address the errors caused by other components in the temperature sensing circuit, such as the PGA, ADC, ADC reference generation circuit and BG, as well as the errors caused by the PGA capacitor adaptation error and the parasitic resistance of the temperature sensing module transistor. This results in low accuracy of the temperature sensing circuit.

[0061] To address the aforementioned problems, some embodiments of this specification provide a temperature sensing circuit. By controlling the magnitude of the bias current generated by the temperature sensing module during different sampling periods, and then calculating the output of the temperature sensing circuit at the digital terminal, errors caused by the parasitic resistance of the transistors in the temperature sensing module can be eliminated, thereby improving the accuracy of the temperature sensing circuit. Other embodiments of this specification provide a temperature sensing circuit that, by exchanging the sampling capacitor and feedback capacitor in the PGA during different sampling periods, makes the error term caused by capacitor mismatch positive and negative. Then, by calculating the temperature sensing output at the digital terminal, the capacitor mismatch error term is shaped to a higher order, reducing capacitor mismatch and improving the accuracy of the temperature sensing circuit.

[0062] In other embodiments of this specification, the two embodiments described above can be combined. Specifically, the magnitude of the bias current generated by the temperature sensing module can be controlled within different sampling periods, and the sampling capacitor and feedback capacitor in the PGA can be swapped within different sampling periods. This allows sampling of the output of the temperature sensing circuit at the digital end, which can eliminate errors caused by the parasitic resistance of the temperature sensing module transistors while reducing errors caused by capacitor mismatch in the sampling amplification module, thereby improving the accuracy of the temperature sensing circuit.

[0063] The temperature sensing circuit in the embodiments of this specification will be described below with reference to the accompanying drawings. It is understood that the temperature sensing circuit in the embodiments of this specification can be a part of the circuit built into a chip, and can be applied to various application scenarios that require the conversion of temperature signals into electrical signals for further data processing. Specifically, this temperature sensing circuit can be applied to sensor chips, including but not limited to biosensor chips based on ultrasonic principles, capacitance principles, and optical principles. For example, it can be an ultrasonic fingerprint chip. The echo time of the ultrasonic fingerprint in the ultrasonic fingerprint chip is related to temperature. Temperature information can be obtained based on the temperature sensing circuit, and then the ultrasonic fingerprint chip can be subjected to more accurate background reduction based on the temperature information. This temperature sensing circuit can also be applied to memory chips (e.g., Flash), control chips (e.g., MCU), etc.

[0064] like Figure 2 As shown in the figure, this specification provides a temperature sensing circuit, including a temperature sensing module 201, a sampling amplification module 202, and an analog-to-digital conversion module 203.

[0065] The control terminal of the temperature sensing module 201 is connected to a first control signal, the output terminal of the temperature sensing module 201 is connected to the input terminal of the sampling amplification module 202, the output terminal of the sampling amplification module 202 is connected to the first input terminal of the analog-to-digital conversion module 203, the first control terminal of the sampling amplification module is connected to a second control signal, the second input terminal of the analog-to-digital conversion module 203 is connected to a reference voltage signal, and the control terminal of the analog-to-digital conversion module 203 is connected to a third control signal.

[0066] The temperature sensing module 201 is used to control the magnitude of the bias current in the temperature sensing module 201 based on the first control signal, and output a temperature sensing signal based on the corresponding bias current; the sampling amplification module 202 is used to sample and amplify the output of the temperature sensing module 201 based on the second control signal, and output a sampled signal; the analog-to-digital conversion module 203 is used to sample and quantize the sampled signal based on the third control signal and the reference voltage signal, and output a temperature quantization signal.

[0067] It is understood that the temperature sensing module may include a temperature sensing component for sensing temperature. The temperature sensing module can then convert the sensed signal into a temperature signal and output it to the sampling and amplification module. During the temperature sensing process, the temperature sensing module can adjust the magnitude of the bias current it generates based on a first control signal, thereby generating different temperature signals based on different bias currents.

[0068] In some embodiments of this specification, the first control signal can control the temperature sensing module to adjust the magnitude of the bias current during different sampling periods of the temperature sensing circuit. For example, Figure 1 Taking the temperature sensing module as an example, the ratio of the bias currents in the first sampling period is I1:PI1, and the ratio of the bias currents in the second sampling period is I2:PI2. Furthermore, the bias currents in adjacent sampling periods can be multiples of each other, for example, I2 can be twice 11, etc.

[0069] In the embodiments of this specification, the magnitude of the bias current generated by the temperature sensing module is controlled by the first control signal. Then, the output of the temperature sensing circuit can be calculated at the digital end. For example, the difference between the outputs corresponding to different sampling periods can be taken to obtain the error term caused by the parasitic resistance of the transistor of the temperature sensing module. Then, the error term can be eliminated by calculation to improve the accuracy of the temperature sensing circuit.

[0070] In some embodiments of this specification, the temperature sensing module may include multiple current mirrors and transistors. The multiple current mirrors can be used to generate the bias current of the transistors, and the first control signal can be a signal that controls the output current of each current mirror.

[0071] It can be understood that the sampling amplification module can sample and amplify the temperature signal output by the temperature sensing module based on the second control signal. This sampling can include conventional sampling, integral sampling, etc. Integral sampling can be understood as the sampling amplification module operating in an integral form. That is, the sampling amplification module can perform multiple sampling amplifications under the control of the corresponding control signal. Each sampling amplification result is not directly output, but is accumulated at the output of the sampling amplification module. After a preset number of integrations, the accumulated value of the multiple sampling values ​​can be output as the sampled signal.

[0072] It is understood that the second control signal can be set corresponding to the first control signal to achieve synchronization between the generation of the bias current and the sampling amplification of the sampling amplification module. The second control signal may include a first level and a second level. The sampling amplification module can sample and amplify the output of the temperature sensing module when the second control signal is at the first level, and can stop sampling when the second control signal is at the low level. For example, the first level can be a high level, which can be represented by the digit "1", and the second level can be a low level, which can be represented by the digit "0"; or, the first level can be a low level, which can be represented by the digit "0", and the second level can be a high level, which can be represented by the digit "1".

[0073] It can be understood that after the sampling amplification module outputs the sampling signal, the analog-to-digital conversion module can sample the sampling signal based on the third control signal, and quantize the sampled signal based on the reference voltage signal, outputting a quantized temperature signal as the output signal of the temperature sensing circuit. For example, the analog-to-digital conversion module may include a comparator, with the sampling signal and the reference voltage signal respectively connected to the two output terminals of the comparator. The third control signal can be connected to the control terminal of the comparator. Under the control of the third control signal, the comparator can sample the sampling signal at one input terminal, compare the sampling result with the reference voltage signal, and output the comparison result as the quantized temperature signal. The third control signal may include a first level and a second level, for example, a pulse signal. Therefore, the analog-to-digital conversion module can sample and quantize the sampling signal output by the sampling amplification module when the third control signal is at the first level. For example, the first level can be a high level, which can represent the digital "1", and the second level can be a low level, which can represent the digital "0"; or, the first level can be a low level, which can represent the digital "0", and the second level can be a high level, which can represent the digital "1".

[0074] In the embodiments described in this specification, the temperature sensing circuit continuously senses the temperature of the object to be sensed based on the temperature sensing module during operation. During this process, the bias current of the temperature sensing module can be adjusted based on the first control signal, and a corresponding temperature sensing signal is output. The sampling amplification module, under the control of the second control signal, samples and amplifies the temperature sensing signal output by the temperature sensing module, and outputs a sampled signal based on the amplification result. At this time, the analog-to-digital conversion module, under the control of the third control signal, samples the sampled signal and quantizes the sampled signal based on the reference voltage signal, outputting a quantized temperature signal.

[0075] In the embodiments of this specification, by controlling the magnitude of the bias current generated by the temperature sensing module within different sampling periods, and then calculating the output of the temperature sensing circuit at the digital end, the error caused by the parasitic resistance of the transistor in the temperature sensing module can be eliminated, thereby improving the accuracy of the temperature sensing circuit.

[0076] refer to Figure 3 As shown, in some embodiments of this specification, the temperature sensing module may include two current mirrors and two transistors (e.g., Figure 1 (Transistors Q1 and Q2 in the module). One end of each current mirror is connected to a power supply, and the other end is connected to the first terminal of one of the transistors, respectively. The second terminals and control terminals of both transistors are grounded. An output node can be provided between the first terminals of the two transistors and the current mirrors, and the two output nodes are respectively connected to the two input terminals of the sampling amplification module.

[0077] It can be understood that the two transistors can be temperature-sensing elements in a temperature-sensing module, used to sense temperature. These two transistors can be temperature-sensitive transistors, whose internal PN junctions have temperature characteristics. Therefore, based on different temperatures of the object being sensed, the voltage between the transistor's first electrode and control electrode will change accordingly. The temperature of the object being sensed can be calculated by detecting the voltage difference between the transistor's first electrode and control electrode. For example, the two transistors can be BJTs, MOSFETs, diodes, etc. Taking a BJT as an example, the first electrode of the transistor can be the emitter, the second electrode can be the collector, and the control electrode can be the base.

[0078] In other embodiments, the temperature sensing module may include more transistors and / or current mirrors as described in the above embodiments. The specific configuration can be based on application requirements, and this specification does not limit it.

[0079] It is understandable that the output currents of the two current mirrors can be proportional, for example, the ratio of the output currents of the two current mirrors is I:p·I. The current mirrors can be used to provide bias current for their corresponding transistors. When controlling the bias current of the temperature sensing module based on the first control signal, specifically, the current output of the current mirrors can be controlled based on the first control signal. For example, under the control of the first control signal, the output current of each current mirror can be a multiple of the output current within different output cycles of the temperature sensing circuit.

[0080] It can be understood that the voltage difference between the two output nodes of the temperature sensing module, i.e. Figure 3 In It can characterize the temperature sensing signal output by the temperature sensing module.

[0081] In some embodiments of this specification, the first control signal may include a first level and a second level. For example, the first level may be a high level, which can be represented by the digit "1", and the second level may be a low level, which can be represented by the digit "0"; or, the first level may be a low level, which can be represented by the digit "0", and the second level may be a high level, which can be represented by the digit "1".

[0082] Furthermore, when controlling the bias current of the temperature sensing module based on the first control signal, the control can specifically include: when the first control signal is at a first level, the bias currents output by the two current mirrors can be I and p·I, respectively; when the first control signal is at a second level, the bias currents output by the two current mirrors can be n·I and n·p·I, respectively, where n can be an integer greater than 1. Moreover, when n takes different values, different quantities of temperature quantization signals output by the temperature sensing circuit can be calculated at the digital terminal to eliminate the parasitic resistance of the transistor. For example, n can be 2, which allows for the calculation of two temperature quantization signals at different levels of the first control signal at the digital terminal, eliminating the error term caused by the parasitic resistance of the transistor.

[0083] To better understand the principle of eliminating error terms caused by the parasitic resistance of transistors in the embodiments of this specification, the following will be combined with... Figure 3 This process is described below. It is understood that this embodiment uses a BJT transistor as an example, and the temperature sensing module includes two transistors and two current mirrors. In other embodiments, other types of transistors may be used, and the temperature sensing module may include more transistors, current mirrors, and / or other components; this specification does not limit this.

[0084] refer to Figure 3As shown in the figure, considering the parasitic resistance of the BTJ transistors, the voltage between the base and emitter of each BJT transistor, and the voltage difference between the base and emitter of two BJT transistors, can be expressed by the following formula:

[0085] Formula (1)

[0086] Formula (2)

[0087] Formula (3)

[0088] Where R B1 R E1 R B2 and R E2 Let represent the base parasitic resistance of BJT transistor Q1, the emitter parasitic resistance of BJT transistor Q1, the base parasitic resistance of BJT transistor Q2, and the emitter parasitic resistance of BJT transistor Q2, respectively. Substituting formulas (2) and (3) into (1) yields:

[0089] Formula (4)

[0090] If BJT transistors Q1 and Q2 are identical transistors and there is only one of each, then β1 = β2, I S1 =I S2 Substituting into formula (4) above, we can obtain:

[0091] Formula (5)

[0092] Because of R B1 R E1 R B2 R E2 I, β1, and β2 all change with the temperature sensing process of the temperature sensing circuit, thus affecting the temperature measurement accuracy of the temperature sensing circuit. Therefore, the latter term in (5) above can be defined as the error term of the temperature sensing module. The error term can be expressed as:

[0093] Formula (6)

[0094] As can be seen from the above formula (6), under the same conditions, the error term increases with the increase of current. Therefore, the bias current of the BJT tube can be set to a proportional relationship under different sampling frequencies. Assuming that the sampling number is 2 times, the bias currents of BJT tubes Q1 and Q2 can be I and pI when the temperature sensing circuit samples for the first time, and 2I and 2pI when the temperature sensing circuit samples for the second time. Define the output of the analog-to-digital converter module of the temperature sensing circuit as D1 when the temperature is measured for the first time, and the output of the temperature sensing circuit as D2 when the temperature is measured for the second time. The output of the temperature sensing circuit after eliminating the error term can be obtained as D=D1-(D2-D1)=V T Therefore, by taking the difference between the two outputs at the digital terminal, the error term can be obtained. Subtracting the error term from any output can eliminate the influence of the parasitic resistance of the BJT on the accuracy of the temperature sensing circuit, thereby improving the accuracy of the temperature sensing circuit.

[0095] Continue to refer to Figure 2 As shown in the embodiments of this specification, a temperature sensing circuit is also provided, including: a temperature sensing module, a sampling amplification module, and an analog-to-digital conversion module.

[0096] The control terminal of the temperature sensing module is connected to a first control signal, the output terminal of the temperature sensing module is connected to the input terminal of the sampling amplification module, the output terminal of the sampling amplification module is connected to the first input terminal of the analog-to-digital conversion module, the first control terminal of the sampling amplification module is connected to a second control signal, the second control terminal of the sampling amplification module is connected to a fourth control signal, the second input terminal of the analog-to-digital conversion module is connected to a reference voltage signal, and the control terminal of the analog-to-digital conversion module is connected to a third control signal.

[0097] The temperature sensing module generates a bias current based on a first control signal and outputs a temperature sensing signal based on the bias current. The sampling amplification module samples and amplifies the output of the temperature sensing module based on a second control signal, and during the sampling amplification process, swaps the first and second capacitors of the sampling amplification module based on a fourth control signal to output a sampled signal. The analog-to-digital conversion module samples and quantizes the sampled signal based on the third control signal and the reference voltage signal to output a quantized temperature signal.

[0098] It is understood that the first capacitor and the second capacitor can be capacitors with different functions in the sampling amplification module. For example, the first capacitor can be a sampling capacitor, which can be located in the sampling branch at the input end of the sampling amplification module, and the second capacitor can be a feedback capacitor, which can be located in the feedback loop of the sampling amplification module. Furthermore, when the first capacitor and the second capacitor are swapped based on the fourth control signal, the positions of the sampling capacitor and the feedback capacitor in the sampling amplification module can be exchanged. The sampling amplification module can include multiple first capacitors and multiple second capacitors, for example, two first capacitors and two second capacitors. Each first capacitor corresponds to one second capacitor, and therefore, when exchanging capacitors, the corresponding first capacitors and second capacitors can be swapped.

[0099] For example, the fourth control signal may include a first level and a second level. When the fourth control signal is at the first level, the first capacitor and the second capacitor of the sampling amplification module based on the fourth control signal can be swapped. When the fourth control signal is at the second level, the first capacitor and the second capacitor of the sampling amplification module based on the fourth control signal do not swap.

[0100] It is understandable that the exchange of the first and second capacitors based on the fourth control signal can be implemented in different sampling periods of the temperature sensing circuit. For example, if the temperature sensing circuit samples twice, i.e., the analog-to-digital converter outputs two temperature quantization signals, then the original positions of the first and second capacitors can be maintained in the first sampling period based on the fourth control signal, and their positions can be exchanged in the second sampling period. When the temperature sensing circuit performs more sampling, the original capacitor positions can be maintained in some sampling periods, and the positions of the first and second capacitors can be exchanged in others.

[0101] In the embodiments of this specification, the specific composition and working principle of the other modules, circuits, etc. can be referred to the relevant descriptions above, and will not be repeated here.

[0102] In the embodiments described in this specification, the temperature sensing circuit, when operating, can continuously sense the temperature of the object to be sensed based on the temperature sensing module and output the corresponding temperature sensing signal. The sampling amplification module, under the control of the second control signal, samples and amplifies the temperature sensing signal output by the temperature sensing module. During the sampling process, the positions of the first and second capacitors in the module can be swapped based on the fourth control signal, and a sampled signal will be output based on the sampling amplification result. At this time, the analog-to-digital conversion module, under the control of the third control signal, samples the sampled signal and quantizes the sampled signal based on the reference voltage signal, outputting a quantized temperature signal.

[0103] In the embodiments described in this specification, by exchanging the sampling capacitor and the feedback capacitor in the PGA at different sampling periods, the error term caused by capacitor mismatch is made positive or negative. Then, the output of the temperature sensor is calculated at the digital end, and the capacitor mismatch error term is shaped to a higher order, thereby reducing capacitor mismatch and improving the accuracy of the temperature sensing circuit.

[0104] In some embodiments of this specification, the sampling amplification module may include an operational amplifier, two sampling capacitors, and two feedback capacitors. The first terminal of each sampling capacitor is connected to an input terminal of the operational amplifier, and the second terminal of each sampling capacitor is connected to the first terminal of a first switching switch and the first terminal of a second switching switch. The second terminal of each first switching switch is connected to an output terminal of the temperature sensing module via a first control switch. A first node is provided on the line connecting the first switching switch and the first control switch, and the two first nodes are respectively connected to the two ends of a second control switch. A second node is provided between each sampling capacitor and the input terminal of the operational amplifier, and each second node is connected to an output terminal of the operational amplifier via a first control switch. The second node can also be connected to the first terminal of a first switching switch and the first terminal of a second switching switch via a feedback capacitor. The second terminal of the first switching switch connected to the feedback capacitor is connected to a reset signal via a reset switch, and a third node is provided on the line connecting the first switching switch and the reset switch. The second terminal of the second switching switch connected to the sampling capacitor is connected to the third node of the corresponding sampling amplification loop, and each third node is connected to an output terminal of the operational amplifier via a second control switch. The second terminal of the second switching switch connected to the feedback capacitor is connected to the first node on the corresponding sampling amplification loop of the operational amplifier.

[0105] Accordingly, the second control signal may include a first sub-signal, a second sub-signal, and a third sub-signal. Each sub-signal controls the on / off state of the first control switch, the second control switch, and the reset switch, respectively. Each sub-signal may include a first level and a second level. When the sub-signal is at the first level, it can control the corresponding switch to close, and when the sub-signal is at the second level, it can control the corresponding switch to open. For example, the first level may be high and the second level may be low; or the first level may be low and the second level may be high.

[0106] Accordingly, the fourth control signal may include sub-signals for controlling the first and second switching switches. When the fourth control signal controls the first switching switch to close, it can control the second switching switch to open; conversely, when it controls the first switching switch to open, it can control the second switching switch to close. That is, the fourth control signal controls the first and second switching switches in opposite ways. For example, the fourth control signal may include two control signals: a fourth sub-signal for controlling the first switching switch and a fifth sub-signal for controlling the second switching switch. Based on the fourth and fifth sub-signals, opposite control of the first and second switching switches can be achieved. Alternatively, the fourth control signal may connect each switching switch via at least one NOT gate, and based on the NOT gates connected to each switch, opposite control of the first and second switching switches can be achieved.

[0107] In some embodiments of this specification, the structure of the sampling amplification module can be as follows: Figure 4 As shown, the operational amplifier can be pga_op, the sampling capacitor can be Cs, the feedback capacitor can be Cf, the first sub-signal corresponding to the first control switch can be clks, the second sub-signal corresponding to the second control switch can be clka, and the third sub-signal corresponding to the reset switch can be cap_rst. clks is the sampling clock of the sampling amplification module, clka is the amplification clock of the sampling amplification module, and cap_rst is the clock that clears capacitor Cf. The first switching switch can be switch s1, the second switching switch can be switch s2, the first node can be Vip1 and Vin1, and the third node can be Vop1 and Von1. The fourth control signal can be swap3.

[0108] Taking the fourth control signal, which includes both low and high levels, as an example, swap3=0 when low and swap3=1 when high. During the operation of the sampling amplification module, the fourth control signal swap3 can control the exchange of capacitors Cs and Cf within the module. When swap3=0, the connection of the sampling capacitor Cs and feedback capacitor Cf in the sampling amplification module can be as follows: Figure 5 As shown; when swap3=1, the positions of the sampling capacitor Cs and the feedback capacitor Cf of the sampling amplification module are interchanged, and the connection method can be as follows. Figure 6 As shown in the diagram, the capacitor position swapping operation can be accomplished by switching between switches s1 and s2. All switches in the diagram are high-level conductors.

[0109] by Figure 5 The sampling amplification module in the example, and taking integral sampling as an example, can be described as follows: The principle of eliminating capacitor mismatch in the sampling amplification module is as follows.

[0110] Figure 5The output Vout of the intermediate sampling amplification module can be expressed as:

[0111] Formula (7)

[0112] Where N represents the number of integrations performed on the sampling amplification module, A represents the gain of pga_op, and β represents the feedback coefficient of pga_op, we can obtain Since A is usually a very large value, such as 10000, the above formula (7) can be simplified to:

[0113] Formula (8)

[0114] Assuming the capacitor Cs=Cf in the sampling amplification module design, due to mismatch, Cs and Cf will not actually be equal. The actual relationship is as follows: , ,in, , If the temperature sensing circuit uses oversampling, then the positions of capacitors Cs and Cf can be set during the first temperature measurement. Figure 5 As shown in the image, the output of the sampling amplification module at this time is:

[0115] Formula (9)

[0116] During the first temperature measurement, the positions of capacitors Cs and Cf are interchanged, which is... Figure 6 As shown in the image, the output of the sampling amplification module at this time is:

[0117] Formula (10)

[0118] Let the outputs of the analog-to-digital converter module be D1 and D2 in the two tests, respectively. Add the two outputs digitally and divide by 2 to get:

[0119] Formula (11)

[0120] Assuming the capacitor mismatch of the sampling amplification module is 1%, then Therefore, the output D of the temperature sensing circuit is:

[0121] Formula (12)

[0122] Without swapping the capacitor positions, the output D of the temperature sensing circuit is:

[0123] Formula (13)

[0124] As can be seen from the above formulas (12) and (13), after capacitor exchange, the coefficients in the output expression of the temperature sensing circuit are infinitely close to 1. That is, by exchanging capacitors, the capacitor mismatch error is shaped to a higher order (i.e., the square form in formula (11)), which can significantly improve the accuracy of the temperature sensing circuit.

[0125] In some embodiments of this specification, during the temperature sensing process, the temperature sensing module can perform dynamic component matching (DEM) based on control signals. That is, it periodically switches between multiple physically mismatched components of the temperature sensing module, so that the probability and time of use of each component are equal over a long period of time, and the error caused by the mismatch between the components of the temperature sensing module is converted into a high-frequency noise that can be easily filtered out.

[0126] For example, the temperature sensing module may include a switch network, and the temperature sensing module may also be connected to a DEM control signal. The DEM control signal may include control signals that control the opening and closing of multiple switches in the switch network, or the DEM control signal may include control signals in the switch network that control the switches to switch different output terminals. For example, the DEM control signal may include multiple sub-signals, each sub-signal corresponding to the opening / closing control of a switch in the switch network. By controlling multiple switches in the switch network based on multiple sub-signals, DEM can be performed on the temperature sensing module.

[0127] refer to Figure 7 As shown, in some embodiments of this specification, the temperature sensing module may include a bias current generation module, a switching network, and a first transistor (e.g., Figure 7 In the transistor Q1) and the second transistor (e.g. Figure 7 The transistor Q2 in the example. The switch network may include multiple first switches (e.g., ...) configured accordingly. Figure 7 Switches s1a to s8a) and multiple second switches (e.g. Figure 7 Switches s1b to s8b in the transistor, and a third switch corresponding to each transistor (e.g., ... Figure 7 The switch s9a) and the fourth switch (e.g. Figure 7 (Switch S9a in the middle). The first control signal is connected to the bias current generation module, which can control the magnitude of the bias current generated by the bias current generation module.

[0128] The first terminals of each first switch and each second switch are connected to the output terminal of the bias current generation module. The second terminals of multiple first switches are connected in parallel to the first terminals of the third switch corresponding to the first transistor and the first terminals of the fourth switch corresponding to the second transistor. The second terminals of multiple second switches are connected in parallel to the first terminals of the third switch corresponding to the second transistor and the first terminals of the fourth switch corresponding to the first transistor. The second terminals of the third and fourth switches corresponding to the first transistor are connected to the first electrode of the first transistor, and the second terminals of the third and fourth switches corresponding to the second transistor are connected to the first stage of the second transistor. The control electrode and second stage of the first transistor, as well as the control electrode and second electrode of the second transistor, are grounded. The parallel connection of the second terminals of multiple first switches can be connected to the first input terminal of the sampling amplification module, and the parallel connection of the second terminals of multiple second switches can be connected to the second input terminal of the sampling amplification module.

[0129] It is understandable that a DEM can be performed on the temperature sensing module based on the switching network and the bias current generation module, in order to reduce the error caused by the mismatch of various components in the bias current generation module and improve the accuracy of the temperature sensing module.

[0130] It is understood that, based on the aforementioned temperature sensing module, the DEM control signal may include control signals corresponding to multiple first switches, multiple second switches, two third switches, and two fourth switches. The control signal corresponding to each switch may include a first level and a second level, and each switch may close when the control signal is at the first level and open when the control signal is at the second level. For example, the first level may be high and the second level may be low; or the first level may be low and the second level may be high.

[0131] It is understandable that during the DEM (Digital Equation Model) of the temperature sensing module, the control signals for the first and second switches in the switching network can be opposite signals. For example, for Figure 7 When the control signal for switch s1a is at the first level, the control signal for switch s1b is at the second level; when the control signal for switch s1a is at the second level, the control signal for switch s1b is at the first level. Correspondingly, the control signal for the third switch corresponding to each transistor can also be the opposite of the control signal for the third switch. For example, for... Figure 7 In the temperature sensing module, when the control signal of the transistor Q1 corresponding to switch s9a is at the first level, the control signal of switch s9b is at the second level; when the control signal of switch s9a is at the second level, the control signal of switch s9b is at the first level.

[0132] It can be understood that the first transistor and the second transistor can be temperature-sensing elements in a temperature-sensing module, used to sense temperature. The first transistor and the second transistor can be temperature-sensitive transistors, whose internal PN junctions have temperature characteristics. Therefore, based on different temperatures of the object to be sensed, the voltage between the first electrode and the control electrode of the transistor will change accordingly. The temperature of the object to be sensed can be calculated by detecting the voltage difference between the first electrode and the control electrode. For example, the first transistor and the second transistor can be BJT transistors, MOSFET transistors, etc.

[0133] In some embodiments of this specification, the temperature sensing module may include more transistors than in the embodiments described above, with each transistor corresponding to two switches. For example, the temperature sensing module may also include a third transistor and a fourth transistor, each corresponding to a third switch and a fourth switch. In other embodiments, each transistor may correspond to more switches, such as four transistors, each corresponding to four switches. Correspondingly, each current mirror may also correspond to four switches, and the temperature sensing module may include four outputs, etc. This specification does not impose any limitations on these aspects.

[0134] Continue to refer to Figure 7 As shown, in some embodiments of this specification, the bias current generation module may include multiple bias transistors (e.g., Figure 7 The bias current generation module may include transistors MP1~MP8, each of which can be configured to correspond to the first and second switches in the switch network. The bias current generation module may also include a power supply, a current mirror, multiple control transistors, and a bias switch. The bias switch is connected to a first control signal, and the control transistors include a first control transistor (e.g., ...). Figure 7 The transistor MP0 in the middle) and three second control transistors (e.g. Figure 7 In the transistor MPI, multiple bias transistors can mirror the current of the first control transistor, and the second control transistor is used to control the current flowing through the first control transistor under the control of the bias switch.

[0135] Specifically, the control terminals of each bias transistor are connected in parallel and then to the control terminal of the first control transistor. The first stage of the first control transistor and the first terminals of each bias transistor are connected in parallel and then to a power supply. The second terminal of the first control transistor is connected to its own control terminal. The second terminal of each bias transistor is connected to the first terminal of the corresponding first switch and the first terminal of the corresponding second switch. The first terminal of the current mirror is connected to the power supply, and the second terminal of the current mirror is connected to the control terminals of each second control transistor. The second terminals of each control transistor are connected in parallel and grounded. The second terminal of one of the three second control transistors is connected to the second terminal of the current mirror. The second terminal of one of the three second control transistors is connected to the second terminal of the first control transistor. The second terminal of one of the three second control transistors is connected to the second terminal of the first control transistor via a bias switch.

[0136] It is understood that the current flowing through each of the second control transistors can be I, and thus, under the control of the bias switch, the current flowing through the first control transistor can be I or 2I. In other embodiments, the bias current generation module may also include more second control transistors, and thus the current flowing through the first control transistor may also be 3I, 4I, etc. Correspondingly, the bias current generation module can provide the first and second transistors with bias currents of 2 times, 3 times, etc., in different sampling periods, and this specification does not limit this.

[0137] It is understood that the first control transistor, the second control transistor, and the bias transistor can be transistors of the same type, such as NPN transistors or PNP transistors, or they can be transistors of different types. For example, the first control transistor and the bias transistor can be PNP transistors, and the second control transistor can be an NPN transistor. Each transistor can be a BJT transistor, a MOSFET, etc. For example, taking a PNP transistor as the first control transistor and the bias transistor as the second control transistor as the NPN transistor, the first electrode of the first control transistor, the second control transistor, and the bias transistor can be the emitter, and the second electrode can be the collector.

[0138] It is understandable that the number of bias transistors can be related to the number of times the temperature sensing module performs a DEM (Digital Estimation Model). For example, with... Figure 7 Taking the example, the bias current generation module includes 8 bias transistors, each bias transistor corresponding to two switches, namely the first switch and the second switch, which can perform 16 DEMs on the temperature sensing module. The number of DEM operations is twice the number of bias transistors.

[0139] It is understandable that, regardless of the number of current mirrors included in the temperature sensing module, the circuit structure of the temperature sensing module can be equivalent to the following during each DEM process: Figure 3In the structure described above, the current ratio of the two current mirrors in the equivalent temperature sensing module is related to the number of bias transistors contained in the temperature sensing module. For example, if the temperature sensing module contains n bias transistors, then the current ratio of the two current mirrors in the equivalent temperature sensing module is 1:n-1.

[0140] by Figure 7 Taking the structure of the temperature sensing module as an example, the first control signal can correspond to Figure 7 In the circuit diagram, swap4 controls the current of transistor MP0. When the temperature sensing module is working, when swap4=0, the current flowing through transistor MP0 is I; when swap4=1, the current flowing through transistor MP0 is 2I. Transistors MP1~MP8 mirror the current of MP0, therefore swap4 controls the bias current of BJT transistors Q1 and Q2.

[0141] In some embodiments of this specification, the sampling amplification module can perform integral sampling of the output of the temperature sensing module based on the second control signal. Integral sampling can be achieved through a capacitor located in the sampling amplification module. That is, during integration, the capacitor in the sampling amplification module can be reset each time a sample is taken, and the offset of the operational amplifier in the sampling amplification module is stored on the capacitor. After each sample, integration is performed, and the sampling result of the temperature sensing module is transferred to the capacitor for storage. At this time, the offset of the operational amplifier can be canceled out. After multiple samplings are completed, the accumulated sampling results stored on the capacitor are output, which can eliminate operational amplifier offset while suppressing noise interference.

[0142] It can be understood that the sampling amplification module can perform integral sampling of the temperature sensing signal output by the temperature sensing module during DEM (Digital Estimation) based on the second control signal. This integral sampling means the sampling amplification module operates in integral form. That is, each time the temperature sensing module performs a DEM, the sampling amplification module, under the control of the second control signal, can sample and amplify once. The amplified result is not directly output but accumulated at the output of the sampling amplification module. After the dynamic element matching of the temperature sensing module is completed, the sampling amplification module, under the control of the second control signal, can output the accumulated value of multiple samples as the sampled signal. The second control signal can be set corresponding to the DEM control signal to achieve sampling amplification after each DEM by the temperature sensing module. The second control signal can include two levels: a first level and a second level. The sampling amplification module can sample and amplify the output of the temperature sensing module at the first level, and can output the sampled signal obtained from integral sampling while the sampling amplification remains at the first level for an extended period. For example, the first level can be a high level, which can be represented by the number "1", and the second level can be a low level, which can be represented by the number "0"; or, the first level can be a low level, which can be represented by the number "0", and the second level can be a high level, which can be represented by the number "1".

[0143] In the embodiments of this specification, by means of integral sampling, the operational amplifier offset of the sampling amplification module can be canceled in each sampling process, and by integrating multiple samples, noise interference in the operation of the sampling amplification module can be better suppressed, thereby reducing the output error of the sampling amplification module.

[0144] In some embodiments of this specification, integral sampling can be achieved through a capacitor (e.g., one disposed in the sampling amplification module) Figure 4 The feedback capacitor Cf in the sampling amplification module is used to achieve this. That is, during the integration process, the capacitor in the sampling amplification module can be reset at each sampling, and the offset of the operational amplifier in the sampling amplification module is stored on the capacitor. After each sampling, the system is integrated once, and the sampling result of the temperature sensing module is transferred to the capacitor for storage. At this time, the offset of the operational amplifier can be canceled. After multiple samplings are completed, the multiple sampling results stored on the capacitor are accumulated and output. This can eliminate the offset of the operational amplifier and suppress noise interference at the same time.

[0145] In some embodiments of this specification, when the sampling amplification module outputs the integrated sampled voltage signal, it may output a weighted sum of multiple sampled signals, where the weighting coefficient of each signal can be the ratio of the sampling capacitor to the feedback capacitor. For example, when the ratio of the sampling capacitor to the feedback capacitor is 1, the sampling signal output by the operational amplifier can be the sum of multiple samples.

[0146] In the embodiments of this specification, when the temperature sensing circuit is working, it can continuously sense the temperature of the object to be sensed based on the temperature sensing module. During this process, the temperature sensing module can perform DEM based on the DEM control signal, control the magnitude of the bias current in the temperature sensing module based on the first control signal, and output the corresponding temperature sensing signal. Under the control of the second control signal, the sampling amplification module can sample and amplify the temperature sensing signal output by the temperature sensing module after each DEM, and accumulate the result of each sampling amplification at the output terminal of the sampling amplification module. After one cycle of DEM of the temperature sensing module ends, the sampling amplification module can output the accumulated value of multiple sampling results as a sampling signal under the control of the second control signal, and can swap the positions of the feedback capacitor and the sampling capacitor in the sampling amplification module at different integral sampling periods under the control of the fourth control signal. The analog-to-digital conversion module can sample the sampling signal under the control of the third control signal, quantize the sampled signal based on the reference voltage signal, and output a quantized temperature signal.

[0147] In the embodiments of this specification, the DEM control signal enables the DEM of the temperature sensing module. The combination of the DEM control signal and the second control signal allows for simultaneous DEM and integration sampling by the sampling amplification module. This eliminates mismatch errors caused by component mismatch within the temperature sensing module, and further eliminates operational amplifier offset in the sampling amplification module through offset storage during the integration sampling process. The first and fourth control signals can eliminate errors caused by the parasitic resistance of the transistors used for temperature sensing in the temperature sensing module, as well as errors caused by capacitor offset in the sampling amplification module, further improving the accuracy of the temperature sensing circuit.

[0148] In some embodiments of this specification, each control signal may include a first level and a second level. The number of level changes of the DEM control signal within one cycle may correspond to the number of times the temperature sensing module performs DEM. The distribution and proportion of each level in each control signal may be set accordingly. For example, the sampling amplification module may perform sampling amplification during the time period corresponding to the first level of the second control signal, and the analog-to-digital conversion module may perform sampling quantization during the time period corresponding to the first level of the third control signal. Thus, each segment of the first level of the second control signal may be set to cover each level change moment of the DEM control signal, and the first level of the third control signal may be set to be within the time period corresponding to the long duration of the first level of the second control signal.

[0149] In some embodiments of this specification, the temperature sensing module may include a first temperature sensing sub-signal and a second temperature sensing sub-signal. The sampling amplification module integrates and samples the two temperature sensing sub-signals to obtain two sampled sub-signals, including the first sampled sub-signal and the second sampled sub-signal. Correspondingly, the third control signal may include a sampling control sub-signal for sampling the output of the sampling amplification module, and a switching control sub-signal for exchanging the two sampled sub-signals output by the sampling amplification module.

[0150] For example, the first input terminal of the analog-to-digital converter (ADC) module may include a first sub-input terminal and a second sub-input terminal. These two sub-input terminals are respectively connected to the first and second output terminals of the sampling amplification module, or they are respectively connected to the second and first output terminals of the sampling amplification module. Both the sampling control sub-signal and the switching control sub-signal may include a first level and a second level. When the sampling control sub-signal is at the first level, the two sampling sub-signals output by the sampling amplification module can be sampled. When the switching control sub-signal is at the second level, the first sub-input terminal of the ADC module can be connected to the first output terminal of the sampling amplification module pair, and the second sub-input terminal of the ADC module can be connected to the second output terminal of the sampling amplification module pair. Similarly, when the switching control sub-signal is at the first level, the first sub-input terminal of the ADC module can be connected to the second output terminal of the sampling amplification module pair, and the second sub-input terminal of the ADC module can be connected to the first output terminal of the sampling amplification module pair. Different levels of the third control signal can correspond to different sampling periods of different ADC modules.

[0151] In some embodiments of this specification, the analog-to-digital conversion module may include a switch submodule consisting of multiple switches and an analog-to-digital converter. The switch submodule is connected to the output terminal of the sampling amplification module and the input terminal of the analog-to-digital converter. The control terminal of the switch submodule is connected to the switching control sub-signal, and the control terminal of the analog-to-digital converter is connected to the sampling control sub-signal. Furthermore, under the control of the switching control sub-signal, the switch submodule can cause the first and second output terminals of the sampling amplification module to be connected to the first and second sub-input terminals of the analog-to-digital converter, respectively, or the first and second output terminals of the sampling amplification module to be connected to the second and first sub-input terminals of the analog-to-digital converter, respectively. Under the control of the sampling control sub-signal, the analog-to-digital converter can sample the sampling sub-signals input to the two sub-input terminals of the analog-to-digital converter.

[0152] For example, the switching submodule may include two third switching switches and two fourth switching switches. The first sub-input terminal of the analog-to-digital converter can be connected to the first output terminal and the second output terminal of the sampling amplification module through the third switching switches and the fourth switching switches, respectively. The second sub-input terminal of the analog-to-digital converter can be connected to the second output terminal and the first output terminal of the sampling amplification module through the third switching switches and the fourth switching switches, respectively. The control terminals of each third switching switch can be connected to exchange control sub-signals through NOT gates, and the control terminals of each fourth switching switch can be connected to exchange control sub-signals through two series NOT gates.

[0153] Furthermore, taking the switching control signal, which includes both low and high levels, as an example: When the switching control sub-signal is low, the control signals connected to the two third switching switches are high. This connects the first sub-input terminal of the analog-to-digital converter (ADC) to the first output terminal of the sampling amplification module, and the second sub-input terminal of the ADC to the second output terminal of the sampling amplification module. At this time, under the control of the sampling control sub-signal, the ADC can control its first sub-input terminal to sample the first sampling sub-signal output from the first output terminal of the sampling amplification module, and its second sub-input terminal to sample the second sampling sub-signal output from the second output terminal of the sampling amplification module. When the switching control sub-signal is high, the control signals connected to the two fourth switching switches are high. This connects the first sub-input terminal of the ADC to the second output terminal of the sampling amplification module, and the second sub-input terminal of the ADC to the first output terminal of the sampling amplification module. At this time, under the control of the sampling control sub-signal, the ADC can control its first sub-input terminal to sample the second sampling sub-signal output from the second output terminal of the sampling amplification module, and its second sub-input terminal to sample the first sampling sub-signal output from the first output terminal of the sampling amplification module.

[0154] It is understood that in other embodiments, the switching submodule may include more or fewer other devices; the switching control subsignal may also include more other levels; or the first and second sub-input terminals of the analog-to-digital converter may be connected to the first and second output terminals of the sampling amplification module, respectively, when the switching control subsignal is high, and connected to the second and first output terminals of the sampling amplification module, respectively, when the switching control subsignal is low. This specification does not limit this.

[0155] In the embodiments of this specification, based on the third control signal, the input voltage of the analog-to-digital converter (ADC) can be converted from positive to negative by sampling and exchanging the input terminal of the ADC. Then, the difference between the two outputs of the temperature sensing circuit at the digital terminal can be obtained as the sum of the two outputs that eliminate the misalignment of the ADC. Finally, averaging the difference can obtain the final output of the temperature sensing circuit that eliminates the misalignment of the ADC, thereby improving the accuracy of the temperature sensing circuit.

[0156] For example, with Figure 3 Taking the ADC (Analog-to-Digital Converter) as an example, swap2 is the exchange control sub-signal in the third control signal, with the first level being high and the second level being low. Vop and Von are two sampling signals output by the sampling amplification module. Assuming Vos1 is the offset voltage of the comparator within the ADC, when swap2=0, the input signal sampled by the ADC is Vin=Vop-Von, and its actual quantized signal is Vin+Vos1. Let's assume the ADC output is D1. When swap2=1, the input signal sampled by the ADC is -Vin=Von-Vop, and its actual quantized signal is -Vin+Vos1. Let's assume the ADC output is D2. Therefore, subtracting the two ADC outputs D1 and D2 and dividing by 2, the result D=(D1-D2) / 2 is the correct quantization result of Vin. This eliminates the influence of the comparator offset within the ADC and improves the accuracy of the temperature sensing circuit. The two values ​​of swap2 correspond to the two samplings of the ADC.

[0157] In some embodiments of this specification, the temperature sensing circuit may further include a reference generation circuit (e.g., an ADC reference generation circuit) and a bandgap reference circuit (e.g., a BG circuit). The output of the bandgap reference circuit is connected to the input of the reference generation circuit, and the output of the reference generation circuit is connected to the second input of the analog-to-digital converter module. The combination of the bandgap reference circuit and the reference generation circuit can output a reference voltage signal to the analog-to-digital converter module, enabling the analog-to-digital converter module to quantize the sampled signal output by the sampling amplification module based on the reference voltage signal.

[0158] It is understandable that a bandgap reference circuit can be used to generate a highly stable initial voltage that is independent of supply voltage and temperature. The reference generation circuit can then use this initial voltage generated by the bandgap reference circuit to generate a suitable reference voltage signal for the analog-to-digital converter module.

[0159] Since the quantization accuracy of the analog-to-digital converter (ADC) module is related not only to the sampled signal output by the sampling amplification module but also to the reference voltage signal, the accuracy of the output signal of the bandgap reference circuit and / or reference generation circuit can affect the accuracy of the ADC module. The accuracy of the output signal of the bandgap reference circuit and / or reference generation circuit is affected by its offset voltage. Therefore, to further improve the accuracy of the temperature sensing circuit, this can be achieved by eliminating the offset voltage of the bandgap reference circuit and / or reference generation circuit.

[0160] In some embodiments of this specification, the input terminals of the bandgap reference circuit and / or reference generation circuit can be swapped using a swap control signal. The swap control signal may include a first level and a second level. When the swap control signal is at the first level, the input terminals of the corresponding circuit undergo a swapping operation; when the swap control signal is at the second level, the input terminals of the corresponding circuit do not undergo a swapping operation. For example, the first level may be high and the second level may be low; or the first level may be low and the second level may be high.

[0161] Furthermore, the switching operation at the input of the bandgap reference circuit and / or reference generation circuit can be achieved through low-frequency chopping. For example, the low-frequency chopping process for the bandgap reference circuit can include modulation and demodulation. For modulation of the bandgap reference circuit: a chopper switch is added to the input of the core circuit (e.g., an operational amplifier) ​​of the bandgap reference circuit. This switch can be controlled by a switching control signal, which can, for example, alternately switch the polarity of the input signal at a low-frequency clock frequency (e.g., a few kHz to several hundred Hz). Thus, the DC reference signal of the bandgap reference circuit is modulated into an AC square wave signal. Simultaneously, offset and low-frequency noise are also modulated to the vicinity of the corresponding frequency and its odd harmonics. For demodulation of the bandgap reference circuit: after amplification by the core circuit of the bandgap reference circuit, the signal (containing the useful AC square wave and noise) reaches the output. At the output, a synchronous, fully in-phase chopper switch is used to switch the signal again (demodulate). The demodulation process can restore the useful reference signal (which was originally a square wave modulated by the input switch) back to a DC voltage. During demodulation, the offset and noise are modulated a second time, shifting their energy to near a higher frequency. Therefore, the offset voltage can be eliminated by low-pass filtering the demodulated signal. Similarly, the reference generation circuit can employ a similar low-frequency chopping method to achieve input switching.

[0162] In the embodiments described in this specification, the input terminals of the bandgap reference circuit and / or reference generation circuit are swapped by exchanging control signals, and the outputs of the corresponding circuits are also swapped at the same time. Then, by averaging the two quantization outputs of the analog-to-digital conversion module, the error caused by the misalignment of the bandgap reference circuit and / or reference generation circuit can be eliminated, thereby improving the accuracy of the temperature sensing circuit.

[0163] Figure 7 The diagram illustrates a method for controlling a bandgap reference circuit (i.e., by exchanging control signals) Figure 7 (BG in the middle) and / or reference generation circuit (i.e. Figure 7 The input terminals of the ADC reference generation circuit (in the circuit) are swapped. `swap1` is the swap control signal, which can swap the input terminals of BG and the ADC reference generation circuit. It is understood that in other embodiments, `swap1` may swap only the input terminals of one of the BG and ADC reference generation circuits.

[0164] For example, with Figure 7 Taking the swap operation on the input of BG as an example, assume Vos2 is the offset voltage of BG. When swap1=0, the output voltage of BG is Vbg+Vos2, and the output voltage of the ADC reference generation circuit is also Vbg+Vos2; when swap1=1, the output voltage of BG is Vbg-Vos2, and the output voltage of the ADC reference generation circuit is also Vbg-Vos2. If the ADC quantizes the same input signal twice, the reference voltage signal for the first quantization is Vbg+Vos2, and the reference voltage signal for the second quantization is Vbg-Vos2. Since Vos2 is guaranteed to be much smaller than Vbg (approximately 1.2V), adding the two quantization results and dividing by 2 will give an approximation to quantization with Vbg as the reference voltage. This is illustrated by the swap operation on the input of the ADC reference generation circuit using swap1.

[0165] For example, with Figure 7 Taking the swap1 operation on the input of the ADC reference generation circuit as an example, Vos3 is the offset voltage of the ADC reference generation circuit. When swap1=0, the output voltage of BG is Vbg, and the output voltage of the ADC reference generation circuit is Vbg + Vos3; when swap1=1, the output voltage of BG is Vbg, and the output voltage of the ADC reference generation circuit is Vbg - Vos3. If the ADC quantizes the same input signal twice, the reference voltage signal for the first quantization is Vbg + Vos3, and the reference voltage signal for the second quantization is Vbg - Vos3. Since Vos3 is guaranteed to be much smaller than Vbg (approximately 1.2V), adding the two quantization results and dividing by 2 can approximate the quantization performed with Vbg as the reference voltage.

[0166] For example, with Figure 7 Taking the swap1 operation of exchanging the inputs of the BG and ADC reference generation circuits as an example, assuming Vos2 is the offset voltage of the BG and Vos3 is the offset voltage of the ADC reference generation circuit. When swap1=0, the output voltage of the BG is Vbg+Vos2, and the output voltage of the ADC reference generation circuit is Vbg+Vos2+Vos3; when swap1=1, the output voltage of the BG is Vbg-Vos2, and the output voltage of the ADC reference generation circuit is Vbg-Vos2-Vos3. If the ADC quantizes the same input signal twice, the reference voltage signal for the first quantization is Vbg+Vos2+Vos3, and the reference voltage signal for the second quantization is Vbg-Vos2-Vos3. Since Vos2 and Vos3 are guaranteed to be much smaller than Vbg (approximately 1.2V), adding the two quantization results and dividing by 2 will give an approximation to quantization with Vbg as the reference voltage.

[0167] In some embodiments of this specification, by setting multiple control signals and then calculating the outputs of the temperature sensing circuit multiple times, the error term caused by the parasitic resistance of the temperature sensing module, the component mismatch of the temperature sensing module, the operational amplifier offset of the sampling amplification module, the capacitor offset, and the offset of the bandgap reference circuit, the reference generation circuit, and the analog-to-digital conversion module can be eliminated simultaneously, thereby improving the accuracy of the temperature sensing circuit.

[0168] Specifically, during the period when the DEM control signal controls the temperature sensing module to finish DEM, the second control signal can control the sampling amplification module to continuously output the integrated sampling results for a certain period. Then, during this period, the third control signal can control the analog-to-digital converter (ADC) module to sample the sampling signal output by the sampling amplification module, and the input terminals of the ADC module can be switched at different sampling periods. Simultaneously, the input terminals of the bandgap reference circuit and the reference generation circuit can be switched at different sampling periods via the exchange control signal. This process constitutes one sampling cycle. When the second sampling cycle arrives, the fourth control signal can control the position of the sampling capacitor and feedback capacitor in the sampling amplification module to be swapped, and other operating procedures are provided. When the third and fourth sampling cycles arrive, the first control signal can control the adjustment of the bias current generated in the temperature sensing module. Other sampling processes can refer to the first and second sampling cycles respectively. Thus, four sampling cycles constitute one complete temperature measurement cycle, during which the ADC module needs to sample a multiple of 16 times.

[0169] In some embodiments of this specification, the structure of the temperature sensing circuit can be as follows: Figure 7As shown, the temperature sensing module can include 8 bias transistors, enabling 16 DEMs. The timing sequence of switches s1a to s9a is reversed compared to switches s1b to s9b; that is, when switches s1a to s9a are high, switches s1b to s9b are low, and vice versa. The control signals for each switch correspond to the DEM control signals. The first control signal for the temperature sensing module can be swap4. The temperature sensing module can include two outputs: Vip and Vin. The analog-to-digital converter (ADC) module's corresponding swap control sub-signal is swap2, the sampling control sub-signal is adc_clks, and the swap control signals for BG and the ADC reference generation circuit are swap1. The BG output signal is Vbg, and the reference voltage signal output by the ADC reference generation circuit can be Vref. The control signals for the sampling amplification module include pga_clka, pga_clks, cap_rst, and swap3. The timing diagrams for each control signal can be shown as follows: Figure 8 As shown.

[0170] Depend on Figure 8 It can be seen that a complete temperature measurement cycle consists of four parts: tc1, tc2, tc3, and tc4. The working principle of the temperature sensing circuit is as follows: A DEM (Digital Estimation Model) is performed on the temperature sensing module in each part. Each time dynamic element matching is performed, the PGA (Programmable Gate Array) samples the output of the temperature sensing module. A total of 16 DEMs are performed on the temperature sensing module, and the PGA samples 16 values. After all 16 values ​​are sampled, pga_clka is pulled high, the PGA enters amplification mode, and stably outputs the sum of the 16 samples. Then, the ADC (Analog-to-Digital Converter) samples and quantizes the output voltage of the PGA. During the ADC sampling and quantization process, four samples are performed. The input terminals are not swapped in the first two samples, but are swapped in the last two. In odd-numbered samples, the input terminals of BG (Browser Gate) and the ADC reference generation circuit are not swapped, while in even-numbered samples, they are swapped. The ADC obtains four results through four consecutive sampling and quantization operations. In part tc1, swap3 and swap4 are both 0; in part tc2, swap3=1 and swap4=0; in part tc3, swap3=0 and swap4=1; in part tc4, swap3=swap4=1.

[0171] In the embodiments of this specification, the error caused by the PGA operational amplifier offset can be offset by the integral offset storage structure of the PGA; by swapping the input terminals of the ADC, ADC reference generation circuit, and BG, the error caused by the offset of the corresponding circuit module can be eliminated by calculation at the digital end; by performing DEM operation on the temperature sensing module, the error caused by the mismatch of internal components of the temperature sensing module can be eliminated; by adjusting the bias current generated in the temperature sensing module, the error caused by the parasitic resistance of the transistor used for temperature sensing in the temperature sensing module can be eliminated; by swapping the positions of the sampling capacitor and the feedback capacitor in the sampling amplification module, the capacitor mismatch error can be eliminated; thereby improving the accuracy of the temperature sensing circuit without the need for complex calibration processing, and reducing calibration overhead and cost.

[0172] Based on the aforementioned temperature sensing circuit, this specification also provides a chip, including the temperature sensing circuit and processing unit described in the foregoing embodiments.

[0173] The output terminal of the temperature sensing circuit is connected to the processing unit. The processing unit is used to receive the temperature quantization signal output by the temperature sensing circuit and determine the temperature output result based on at least two consecutive temperature quantization signals. The temperature output result is used to characterize the temperature signal sensed by the temperature sensing circuit.

[0174] For example, with Figure 2 Taking the temperature sensing circuit shown as an example, during operation, the temperature sensing module continuously senses the temperature of the object being sensed. During temperature sensing, the bias current of the temperature sensing module can be adjusted based on a first control signal, and a corresponding temperature sensing signal is output. Under the control of a second control signal, the sampling and amplification module samples and amplifies the temperature sensing signal output by the temperature sensing module, and outputs a sampled signal based on the amplification result. At this time, the analog-to-digital conversion module samples the sampled signal under the control of a third control signal, and quantizes the sampled signal based on a reference voltage signal, outputting a quantized temperature signal. This quantized temperature signal can be sent to the processing unit as a primary output of the temperature sensing circuit. When the processing unit receives two consecutive quantized temperature signals D1 and D2, it can calculate the temperature output result based on the formula D = D1 - (D2 - D1).

[0175] In other embodiments, with Figure 7 The temperature sensing circuit shown and Figure 8 Taking the working timing shown as an example, after receiving four consecutive temperature quantization signals D1, D2, D3, and D4, the processing unit can calculate the temperature output result using the formula: D=(D1+D3-D2-D4) / 4.

[0176] In some embodiments of this specification, the processing unit can communicatively connect to the control terminals of each circuit / module of the temperature sensing circuit to output control signals to each circuit / module to control error elimination. For example, the processing unit can communicatively connect to the control terminals of the temperature sensing module, the sampling amplification module, the analog-to-digital conversion module, and the input terminals of the bandgap reference circuit and / or the reference generation circuit, and output corresponding first control signals, second control signals, third control signals, fourth control signals, and exchange control signals to the corresponding circuits / modules to control error elimination of each circuit / module.

[0177] Furthermore, error elimination trigger events or error elimination stop events can be set in the processing unit. When the processing unit detects the corresponding event, it can output a control signal to the temperature sensing circuit or stop outputting control signals to the temperature sensing circuit. For example, the error elimination trigger event can be an event that requires higher temperature measurement accuracy and where the temperature sensor is not calibrated, while the error elimination stop event can be an event where the processing unit or other software performs test calibration and is a multi-point calibration.

[0178] Furthermore, the processing unit can be configured with at least one register, corresponding to at least one of the following components of the temperature sensing circuit: the temperature sensing module, the sampling amplification module, the analog-to-digital converter module, the bandgap reference circuit, and the reference generation circuit. The processing unit can control whether to output control signals to the corresponding circuits / modules of the temperature sensing circuit by setting the values ​​of each register. For example, two registers can be configured, each corresponding to the analog-to-digital converter module and the reference generation circuit, respectively, to output a third control signal and an exchange control signal to the corresponding modules, thereby controlling the connection or disconnection of the control signals of the corresponding modules. Of course, in other embodiments, corresponding registers can also be configured for the temperature sensing module and the sampling amplification module, and the connection or disconnection of the control signals of each circuit / module can be controlled through these registers.

[0179] For example, with Figure 7Taking the temperature sensing circuit as an example, registers rg_adc_vref_swap_en and rg_adc_vin_swap_en can be set in the processing unit. Register rg_adc_vref_swap_en controls the enabling or disabling of the swap1 function corresponding to the ADC reference generation circuit, while register rg_adc_vin_swap_en controls the enabling or disabling of the swap2 function corresponding to the ADC. Furthermore, the processing unit can process the temperature quantization signal output by the temperature sensing circuit based on the values ​​of each register. Specifically, when the value of register rg_adc_vref_swap_en is determined to be 1, the processing unit can calculate the temperature output result based on four consecutive temperature quantization signals D1, D2, D3, and D4 using the formula: D=(D1+D3-D2-D4) / 4. When the value of register rg_adc_vref_swap_en is determined to be 0, the processing unit can calculate the temperature output result based on four consecutive temperature quantization signals D1, D2, D3, and D4 using the formula: D=(D1+D2+D3+D4) / 4.

[0180] Although the process described above includes multiple operations that occur in a specific order, it should be clearly understood that these processes may include more or fewer operations, which may be executed sequentially or in parallel (e.g., using parallel processors or a multithreaded environment).

[0181] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this specification. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0182] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0183] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0184] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0185] Those skilled in the art will understand that the embodiments of this specification can be provided as methods, systems, or computer program products. Therefore, the embodiments of this specification can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, the embodiments of this specification can take the form of computer program products implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0186] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, system embodiments are basically similar to method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments. In the description of this specification, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the embodiments in this specification. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described can be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0187] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of this application.

Claims

1. A temperature sensing circuit, characterized in that, include: The system comprises a temperature sensing module, a sampling amplification module, and an analog-to-digital converter module; wherein, the control terminal of the temperature sensing module is connected to a first control signal, the output terminal of the temperature sensing module is connected to the input terminal of the sampling amplification module, the output terminal of the sampling amplification module is connected to the first input terminal of the analog-to-digital converter module, the first control terminal of the sampling amplification module is connected to a second control signal, the second input terminal of the analog-to-digital converter module is connected to a reference voltage signal, and the control terminal of the analog-to-digital converter module is connected to a third control signal. The temperature sensing module is used to control the magnitude of the bias current in the temperature sensing module based on the first control signal, and output a temperature sensing signal based on the corresponding bias current. The sampling amplification module is used to sample and amplify the output of the temperature sensing module based on the second control signal, and output a sampling signal; The analog-to-digital conversion module is used to sample and quantize the sampled signal based on the third control signal and the reference voltage signal, and output a temperature quantization signal. The sampling amplification module includes an operational amplifier, two sampling capacitors, and two feedback capacitors; The first end of each sampling capacitor is connected to one input terminal of the operational amplifier, and the second end of each sampling capacitor is connected to the first terminal of a first switching switch and the first terminal of a second switching switch. The second terminal of each first switching switch is connected to an output terminal of the temperature sensing module through a first control switch; A first node is provided on the line connecting the first switching switch and the first control switch, and each first node is connected to both ends of a second control switch. A second node is provided between each sampling capacitor and the input terminal of the operational amplifier. Each second node is connected to an output terminal of the operational amplifier through a first control switch. Each second node is also connected to the first terminal of a first switching switch and the first terminal of a second switching switch through a feedback capacitor. The second end of the first switching switch connected to the feedback capacitor is connected to a reset signal via a reset switch, and a third node is provided on the line connecting the first switching switch and the reset switch; The second terminal of the second switching switch connected to the sampling capacitor is connected to the third node of the corresponding sampling amplification circuit, and each third node is also connected to an output terminal of the operational amplifier through a second control switch; The second terminal of the second switching switch, which is connected to the feedback capacitor, is connected to the first node on the sampling amplification loop corresponding to the operational amplifier. It also includes a fourth control signal, which includes sub-signals for controlling the first and second switching switches, and each sub-signal is connected to the control terminals of the first and second switching switches respectively.

2. The temperature sensing circuit according to claim 1, characterized in that, The first control signal is used to control the temperature sensing module to adjust the bias current of the temperature sensing circuit at different sampling periods, and the bias current corresponding to different sampling periods is in a multiple relationship.

3. The temperature sensing circuit according to claim 1 or 2, characterized in that, The temperature sensing module includes two current mirrors and two transistors; The first end of each of the two current mirrors is connected to a power supply, and the second end of each of the two current mirrors is connected to the first terminal of a transistor, and the second terminal and control terminal of the two transistors are grounded. An output node is provided between the first electrode of the two transistors and the current mirror, and the two output nodes are respectively connected to the two input terminals of the sampling amplification module. Two current mirrors are connected to the first control signal and are used to output corresponding bias currents under the control of the first control signal.

4. The temperature sensing circuit according to claim 1 or 2, characterized in that, The temperature sensing module includes a bias current generation module, a switching network, a first transistor, and a second transistor; the switching network includes a plurality of first switches and a plurality of second switches correspondingly arranged, as well as a third switch and a fourth switch corresponding to each transistor. The first control signal is connected to the bias current generation module and is used to control the magnitude of the bias current generated by the bias current generation module. The first terminal of each first switch and the first terminal of each second switch are connected to the output terminal of the bias current generation module. The second terminals of multiple first switches are connected in parallel to the first terminal of the third switch corresponding to the first transistor and the first terminal of the fourth switch corresponding to the second transistor. The second terminals of multiple second switches are connected in parallel to the first terminal of the third switch corresponding to the second transistor and the first terminal of the fourth switch corresponding to the first transistor. The second terminals of the third and fourth switches corresponding to the first transistor are connected to the first electrode of the first transistor, and the second terminals of the third and fourth switches corresponding to the second transistor are connected to the first electrode of the second transistor. The control electrode and the second electrode of the first transistor, as well as the control electrode and the second electrode of the second transistor, are grounded; The second terminals of the plurality of first switches are connected in parallel and then connected to the first input terminal of the sampling amplification module. The second terminals of the plurality of second switches are connected in parallel and then connected to the second input terminal of the sampling amplification module.

5. The temperature sensing circuit according to claim 4, characterized in that, The bias current generation module includes multiple bias transistors, a power supply, a current mirror, multiple control transistors, and a bias switch. Each bias transistor is configured to correspond to a first switch and a second switch in the switch network. The bias switch is connected to the first control signal. The control transistor includes a first control transistor and three second control transistors. The multiple bias transistors can mirror the current of the first control transistor, and each second control transistor is used to control the current flowing through the first control transistor under the control of the bias switch. The first stage of the first control transistor and the first terminals of each bias transistor are connected in parallel and connected to the power supply, and the second terminal of the first control transistor is connected to the control terminal of the first control transistor. The control terminals of each bias transistor are connected in parallel to the control terminal of the first control transistor, and the second terminals of each bias transistor are connected to the first terminals of the corresponding first and second switches. The first end of the current mirror is connected to the power supply, and the second end of the current mirror is connected to the control electrode of each second control transistor. The second electrodes of each control transistor are connected in parallel and grounded. The second terminal of one of the three second control transistors is connected to the second terminal of the current mirror, the second terminal of one of the three second control transistors is connected to the second terminal of the first control transistor, and the second terminal of one of the three second control transistors is connected to the second terminal of the first control transistor through a bias switch.

6. The temperature sensing circuit according to claim 1, characterized in that, The sampling amplification module further includes a second control terminal, which is connected to a fourth control signal. During the process of sampling and amplifying the output of the temperature sensing module based on the second control signal, the sampling amplification module exchanges the sampling capacitor and feedback capacitor of the sampling amplification module based on the fourth control signal and outputs a sampling signal.

7. The temperature sensing circuit according to claim 1, characterized in that, The second control signal includes a first sub-signal, a second sub-signal, and a third sub-signal, each sub-signal being connected to the control terminals of the first control switch, the second control switch, and the reset switch, respectively.

8. The temperature sensing circuit according to claim 1, characterized in that, The sub-signal of the fourth control signal is used to control the closing of the first switching switch and the opening of the second switching switch, or the sub-signal of the fourth control signal is used to control the opening of the first switching switch and the closing of the second switching switch.

9. A chip, characterized in that, include: The temperature sensing circuit and processing unit according to any one of claims 1 to 8, wherein the processing unit is connected to the output terminal of the analog-to-digital conversion module of the temperature sensing circuit, the processing unit is used to receive the temperature quantization signal output by the analog-to-digital conversion module, and determine the temperature output result based on at least two consecutive temperature quantization signals received, the temperature output result being used to characterize the temperature signal sensed by the temperature sensing circuit.

10. The chip according to claim 9, characterized in that, The processing unit is communicatively connected to the control terminal of at least one of the temperature sensing module, sampling amplification module, or analog-to-digital conversion module of the temperature sensing circuit, and the processing unit is used to output corresponding control signals to the control terminals of each module.

11. The chip according to claim 10, characterized in that, When the processing unit detects a preset error elimination trigger event, it outputs a corresponding control signal to the control terminals of each module of the temperature sensing circuit; or, When the processing unit detects a preset error elimination stop event, it stops outputting corresponding control signals to the control terminals of each module of the temperature sensing circuit.

12. The chip according to claim 10, characterized in that, The processing unit is provided with at least one register, which corresponds to at least one of the temperature sensing module, sampling amplification module or analog-to-digital conversion module of the temperature sensing circuit. The value of the register is used to control the on / off state of the control signal output by the processing unit to the corresponding module of the temperature sensing circuit.

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