Wafer test method and device compatible with different platforms

Abstract

The invention belongs to the field of chip testing, and provides a wafer testing method and device compatible with different platforms in order to solve the problems that a chip testing program cannot be compatible with the different platforms, and in order to meet the requirement of full-load testing, hardware equipment often needs to be manually replaced, so that efficiency is low, and cost is high. The method comprises the steps that a program loader identifies a first test machine model and a second test machine model; the program loader calls corresponding channel configuration according to the machine model and loads a test program; through the probe testing interface board, the first testing machine or the second testing machine is used for mass production testing, and the probe testing interface board is compatible with testing head hardware board card resources of the first testing machine and the second testing machine at the same time. According to the invention, two ATE test equipment resources of J750EX and J750HD on a production line can be efficiently utilized, so that the chip test capacity is effectively improved, and the cost is reduced.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of chip testing, and particularly relates to a wafer testing method and device compatible with different platforms. BACKGROUND

[0002] Due to the difference in the hardware configuration of the test head of the J750EX and J750HD test platforms in the automatic test equipment (ATE) of Teradyne, the CP test (Chip Probe) programs of the two platforms cannot be interchanged. This incompatibility causes the test capacity of the semiconductor chip testing factory to be unable to be fully released. Specifically, the test program will limit the selection of the machine, that is, the test programs of J750EX and J750HD cannot be compatible. In order to meet the full-load test requirement, it is often necessary to manually replace the hardware equipment to match the specific program. For example, it may be necessary to reconfigure the board card of the J750EX test machine, such as the DPS board card or the HSD800 digital board card, to be the same as the test platform of J750HD, which undoubtedly increases the huge cost. SUMMARY

[0003] The embodiments of the present application provide a wafer testing method and device compatible with different platforms, which can compatibly and efficiently utilize the resources of the J750EX and J750HD two types of ATE test equipment on the production line, thereby effectively improving the chip test capacity.

[0004] In a first aspect, the embodiments of the present application provide a wafer testing method compatible with different platforms, comprising: The program loader identifies the first test machine model and the second test machine model; The program loader loads the test program according to the channel configuration called according to the machine model; The first test machine or the second test machine is used for mass production test through the probe interface board, and the probe interface board is compatible with the hardware board card resources of the test head of the first test machine and the second test machine.

[0005] In the step of the program loader identifying the first test machine model and the second test machine model, the test machine model is automatically identified by reading the configuration file of the test machine.

[0006] The program loader loads the test program according to the channel configuration called according to the machine model, comprising: The program loader automatically selects the corresponding channel configuration according to the read test machine model to load the test program to automatically adapt to the test machine model, so as to realize the general use of the same test program on different test platforms.

[0007] The step program loader calls corresponding channel configurations according to the machine model, two channel configurations are established, a first channel configuration is suitable for a first test machine, and a second channel configuration is suitable for a second test machine, and a test program is compatible with the first test machine and the second test machine by selecting corresponding channel configurations.

[0008] The program loader calls corresponding channel configurations according to the machine model, and loading a test program includes: defining channel configurations of the first test machine and the second test machine in the test program in advance, and the channel configurations include a one-to-one corresponding connection relationship between pins of a chip and a test machine hardware board card resource channel.

[0009] The needle measurement interface board is connected with a test machine head of the test machine and is also connected with a needle tower, the needle tower is connected with a probe card, and the needle tower and the probe card are 512 channels.

[0010] The first test machine is a J750EX test platform, and the second test machine is a J750HD test platform.

[0011] In a second aspect, the application provides a wafer test device compatible with different platforms, including a program loader, the program loader is used for: identifying a first test machine model and a second test machine model; calling corresponding channel configurations according to the machine model, and loading a test program; further including a needle measurement interface board, and using the first test machine or the second test machine to perform mass production test through the needle measurement interface board, and the needle measurement interface board is compatible with a first test machine and a second test machine test head hardware board card resource.

[0012] In a third aspect, the application provides a computer readable storage medium, and the computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement steps of the method in any one of the above aspects.

[0013] In a fourth aspect, the application provides a chip test system, including the wafer test device compatible with different platforms.

[0014] The wafer test method and device compatible with different platforms have the following beneficial effects: In the present application, without replacing the expensive hardware board card (such as DPS board card, HSD800 board card) inside the test machine, only low-cost compatible test heads and external WPB needle test interface boards are configured for two test platforms. At the same time, the channel configuration (Channel Map) of the test program is modified to ensure compatibility with J750EX and J750HD platforms. In addition, using the self-developed program loader (UI), the machine model can be automatically identified and the corresponding channel configuration can be loaded to realize automatic compatibility with the two platforms. The present application can efficiently utilize the J750EX and J750HD two kinds of ATE test equipment resources on the production line, thereby effectively improving the chip test capacity and reducing the cost. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 A wafer test method flowchart compatible with different platforms of embodiments of the present application is shown. Figure 2 A CP test system architecture diagram is shown. Figure 3 A loading test program logic flowchart in the present application is shown. DETAILED DESCRIPTION

[0016] The present application will be further described below in conjunction with the drawings and embodiments.

[0017] In the following description, the terms "first" and "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance. The following description provides a plurality of embodiments of the present application, and different embodiments can be replaced or combined, so that the present application can also be considered to include all possible combinations of the same and / or different embodiments described. Therefore, if one embodiment includes features A, B, and C, and another embodiment includes features B and D, the present application should also be considered to include one or more embodiments of all other possible combinations containing features A, B, C, and D, although such embodiments can not be explicitly described in the following content.

[0018] As shown in Figure 1 The wafer test method compatible with different platforms of the present application includes: S101, the program loader identifies the first test machine model and the second test machine model; S103, the program loader calls the corresponding channel configuration according to the machine model to load the test program; S105, the production test is carried out by using the first test machine or the second test machine through the needle test interface board, and the needle test interface board is compatible with the first test machine and the second test machine test head hardware board card resources. The following will be introduced respectively.

[0019] The wafer test method compatible with different platforms of the present application includes: (1) The test head (Test Head) of the J750EX tester and the J750HD tester is configured to be compatible with each other WPB (Wafer Prober Board, needle test interface board), and compared with the test head hardware resource board card, the WPB board has low cost.

[0020] Because the internal hardware board card of the test head (Test Head) of J750EX and J750HD is different, in general, the internal hardware resources (such as: power board card and digital board card) of the two cannot be directly used, and the test program cannot be directly used, and the test engineer (TE, referred to as test engineer) needs to develop independent test program on each platform to adapt to the corresponding J750EX / HD test head hardware board card resources. However, since J750HD is an upgraded version of J750EX tester, J750HD can be downward compatible with J750EX test head hardware board card resources, but J750EX cannot be compatible with J750HD test head hardware board card resources, only when the test head digital board card resource channel number is less than 512CH (channel, referred to as channel), the test head resources of the two are completely compatible with each other.

[0021] Design a WPB public board to simultaneously compatible with J750EX (512ch) and J750HD (512ch) test head hardware board card resources, based on 512ch Pogo-Tower (referred to as needle tower) and probe card (Probe card, referred to as probe card) for J750EX and J750HD is completely universal. In this way, the hardware board card resources of the test heads of the two are realized, and the WPB board and the needle tower, the probe card and other resources are completely universal.

[0022] As shown in Figure 2 , the CP test system includes a tester head support 10, a lifting arm 11, a tester head 12, a needle test interface board 13, a needle tower 14, a probe card 15, a wafer 16, a wafer chuck 17, a probe table 18, and a communication interface 19. The tester head 12 is connected with the needle test interface board 13, the needle test interface board 13 is connected with the needle tower 14, and the needle tower 14 is connected with the probe card 15.

[0023] (2) As shown in Figure 1 , Figure 3As shown, the channel configuration (Channel Map) of the J750 test program is modified, two channel configuration files (Channel map) can be established: Chan_Map_J750EX and Chan_Map_J750HD, Chan_Map_J750EX is applicable to J750EX tester, Chan_Map_J750HD is applicable to J750HD tester, which can ensure that the test program can be compatible with J750EX and J750HD two test platforms under the premise of selecting the corresponding channel configuration (Channel map).

[0024] The J750EX / HD test program is developed based on Excel VBT technology, and the test program has the following simple explanations: Home page: all components of the program constitute the Home main page. Pinmap is a resource allocation attribute that describes the wafer pad (or chip pin), such as: GP_2 is I / O (input / output), DVDD1P2 is Power (power).

[0025] Channel map (Channel configuration): defines the one-to-one connection relationship between the pins of the chip and the test machine hardware board card resource channel. For example: the chip pin GP_2 in Site0 corresponds to the test machine digital board card resource CH164, Site1 corresponds to the test machine digital board card resource ch36, Site2 corresponds to the test machine digital board card resource ch102, and Site3 corresponds to the test machine digital board card resource ch230. In this application, the channel configuration corresponding to the two tester board card resources is defined in the test program, such as: the channel configuration file Chan_Map_J750EX applicable to J750EX tester and the channel configuration file Chan_Map_J750HD applicable to J750HD tester, the program loader will select the corresponding channel configuration to configure the program according to the test machine configuration file (config file) read to identify the test machine model (J750EX / J750HD), thereby realizing the same test program on J750EX and J750HD two test platform universal.

[0026] (3) as Figure 1 , Figure 3As shown, a program loader (UI) is developed to automatically identify the J750 machine model and automatically call the corresponding channel configuration (channel map) according to the model to quickly load the test program and start testing. The test machine model is automatically identified by automatically reading the configuration file of the J750 tester, such as whether it is a J750EX tester or a J750HD tester, and then the corresponding channel configuration sheet (channel map sheet) is automatically selected to load the test program according to the read test machine model to automatically adapt to the J750 model, thereby realizing the same test program on the J750EX and J750HD test platform. In this application, the program loader includes a user interface (UI), and the functions include: realizing automatic loading of test programs, and communicating with the probe station through GPIB, which can simplify the operator's loadProgram and improve work efficiency.

[0027] In this application, without replacing the expensive hardware board card (such as DPS board card, HSD800 board card) inside the tester, only a low-cost compatible test head and an external WPB needle test interface board are configured for two test platforms. At the same time, the channel configuration (Channel Map) of the test program is modified to ensure compatibility with J750EX and J750HD platforms. In addition, the self-developed program loader (UI) can automatically identify the machine model and load the corresponding channel configuration to realize automatic compatibility with the two platforms.

[0028] The present application can bring the following advantages: 1. Reduce the hardware investment of WPB interface board in the factory, and use one piece of 512 channel compatible interface board to replace the original need to configure two interface boards; 2. Reduce the complexity of factory equipment management, and J750EX and J750HD with 512 channels can be managed and scheduled as one type of machine, greatly improving the production plan flexibility; 3. Reduce the abnormality caused by the mismatch between the test program and the required machine; 4. Most importantly, this scheme realizes the compatibility of one program with two models (UI needs only a few seconds to switch Channel map at the software level), avoiding the original way of changing the tester hardware board card according to the program (changing the machine + calibration needs 4 hours once), greatly reducing the switching time, and efficiently utilizing the J750EX and J750HD two ATE test equipment resources on the production line, thereby effectively improving the chip test capacity and reducing the cost.

[0029] The application further provides a wafer testing device compatible with different platforms, comprising a program loader, which is used for identifying a first testing machine model and a second testing machine model, loading a testing program according to the machine model by calling a corresponding channel configuration, and further comprising a needle testing interface board, through which mass production testing is performed by using the first testing machine or the second testing machine, and the needle testing interface board is compatible with the first testing machine and the second testing machine testing head hardware board card resources at the same time.

[0030] In the application, the wafer testing device compatible with different platforms and the wafer testing method compatible with different platforms are basically similar, and the related parts are described with reference to the wafer testing method compatible with different platforms.

[0031] The application further provides a chip testing system comprising the wafer testing device compatible with different platforms.

[0032] The application further provides a computer readable storage medium, which stores a computer program, and the program is executed by a processor to realize the wafer testing method compatible with different platforms. The computer readable storage medium can include but is not limited to any type of disk, including a floppy disk, an optical disk, a DVD, a CD-ROM, a micro drive, a magneto-optical disk, a ROM, a RAM, an EPROM, an EEPROM, a DRAM, a VRAM, a flash memory device, a magnetic card or an optical card, a nano system (including a molecular memory IC), or any type of medium or device suitable for storing instructions and / or data.

[0033] In several embodiments provided in the application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division, and actual implementation can have another division manner, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed components can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0034] In each embodiment of the application, each functional unit can be integrated into a processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be realized in the form of hardware or hardware plus software functional unit.

[0035] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. The present application can be variously changed and modified by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the scope of the present application.

Claims

1. A wafer testing method compatible with different platforms, characterized in that, include: The program loader identifies the model of the first test machine and the model of the second test machine. The program loader calls the corresponding channel configuration based on the machine model and loads the test program; Mass production testing is performed using a probe interface board on either a first or second testing machine. The probe interface board is compatible with the hardware board resources of the test heads of both the first and second testing machines.

2. The wafer testing method compatible with different platforms according to claim 1, characterized in that, In the process of identifying the model of the first and second test machines, the program loader automatically identifies the model of the test machine by reading the configuration file of the test machine itself.

3. The wafer testing method compatible with different platforms according to claim 1 or 2, characterized in that, The program loader calls the corresponding channel configuration based on the machine model and loads the test program, including: The program loader automatically selects the corresponding channel configuration based on the read test machine model to load the test program, thus automatically adapting to the test machine model and enabling the same test program to be universal across different test platforms.

4. The wafer testing method compatible with different platforms according to claim 1 or 2, characterized in that, The step program loader calls the corresponding channel configuration according to the machine model and establishes two channel configurations. The first channel configuration is applicable to the first test machine, and the second channel configuration is applicable to the second test machine. The test program selects the corresponding channel configuration to be compatible with the first and second test machines.

5. The wafer testing method compatible with different platforms according to claim 1 or 2, characterized in that, The program loader calls the corresponding channel configuration according to the machine model and loads the test program, including: pre-defining the channel configuration of the first test machine and the second test machine in the test program. The channel configuration includes the one-to-one correspondence between the chip pins and the resource channels of the test machine hardware board.

6. The wafer testing method compatible with different platforms according to claim 1 or 2, characterized in that, The probe interface board connects to the test head of the test machine and also to the probe tower. The probe tower connects to the probe card, and the probe tower and probe card have 512 channels.

7. The wafer testing method compatible with different platforms according to claim 1 or 2, characterized in that, The first test platform is the J750EX test platform, and the second test platform is the J750HD test platform.

8. A wafer testing device compatible with different platforms, characterized in that, It includes a program loader, which is used to: identify the model of the first test machine and the model of the second test machine; call the corresponding channel configuration according to the machine model and load the test program; it also includes a probe interface board, through which mass production testing is performed using the first test machine or the second test machine, and the probe interface board is compatible with the test head hardware board resources of both the first test machine and the second test machine.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps of the method described in any one of claims 1-7.

10. A chip testing system, characterized in that, Includes the wafer testing apparatus compatible with different platforms as described in claim 8.

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