Diamond capacitor and manufacturing method thereof
By employing a stacked structure and multi-layer electrode plate design in diamond capacitors, the problem of insufficient effective capacitor area in existing technologies is solved, achieving improved capacitance size and high voltage withstand performance without increasing device size.
Patent Information
- Application Number
- CN202411112146.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-13
- Publication Date
- 2026-02-13
AI Technical Summary
Existing diamond capacitors have insufficient effective capacitance area without increasing the overall size of the device, which limits their high voltage withstand performance.
By employing a stacked structure design, five regions, including heavily doped and lightly doped regions, are set in the diamond capacitor to form a multilayer electrode plate. The diamond capacitor is then fabricated using CVD and etching techniques, increasing the electrode surface area without increasing the overall size of the device.
Without increasing the overall size of the device, the electrode surface area is effectively increased, the capacitance adjustment capability is improved, and the high voltage resistance performance is enhanced.
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Figure CN121528759A_ABST
Abstract
Description
[Technical Field]
[0001] This invention belongs to the field of microelectronic devices, and specifically relates to a diamond capacitor and its manufacturing method. [Background Technology]
[0002] Existing ceramic insulator capacitors can withstand very high voltages. However, they have several drawbacks: First, their large size prevents them from being integrated as close as possible to the active devices; the parasitic effects caused by the significant distance between active and passive devices increase with switching frequency. Second, ceramic insulator capacitors have poor heat dissipation capabilities; they generate a lot of heat during high-speed charging and discharging, requiring additional heat dissipation devices to ensure that the ceramic insulator capacitors operate at their operating temperature.
[0003] In recent years, diamond-based power devices and integrated power systems have attracted attention due to their ability to manage significantly higher power densities and superior heat dissipation compared to their conventional silicon equivalents. High-power passive devices typically need to support very high voltages (e.g., greater than 1000V or even greater than 3000V). High-power capacitors need to be able to eliminate voltage transients when switching between closed and open circuits to prevent overload damage to active devices.
[0004] Diamond's excellent physicochemical properties make it widely used in many fields. As an indirect bandgap semiconductor material, diamond has a bandgap of approximately 5.2 eV, a thermal conductivity as high as 22 W / (cm·K), and room-temperature electron and hole mobilities as high as 4500 cm² / (Vs) and 3380 cm² / (Vs), respectively, far exceeding those of third-generation semiconductor materials GaN and SiC. Therefore, diamond has broad application prospects in high-power power electronic devices operating at high temperatures and high-frequency, high-power microwave devices. This invention leverages diamond's high heat dissipation (thermal conductivity: 22 W / (cm·K)) and high breakdown voltage (bandgap of approximately 5.2 eV) to fabricate it into a capacitor, enabling the creation of high-voltage, high-temperature resistant capacitors.
[0005] Given the excellent properties of diamond, the French company Diamfab proposed a three-layer diamond capacitor, such as... Figure 1 As shown, layers 2a and 2b are heavily doped diamond, and layer 3 is an intrinsic diamond layer serving as the dielectric layer. While capacitors fabricated using this method exhibit good high-voltage withstand capabilities and heat dissipation, they suffer from insufficient effective capacitor area. According to the capacitance formula:
[0006]
[0007] Where ε0 and ε rLet S be the dielectric constant of vacuum and the relative dielectric constant, respectively; S be the surface area of the electrodes; and d be the distance between the electrodes. In this design, increasing the capacitance of a single device can only be achieved by reducing the distance between the electrodes, i.e., the thickness of layer 3. When the thickness of layer 3 is reduced, the high voltage withstand capability of the device is affected, as excessively high voltages may penetrate the thin dielectric layer. This invention, however, employs a stacked structure, which can effectively increase the surface area S of the electrodes without increasing the overall size of the device, thus allowing for better adjustment of the capacitance compared to existing methods. [Summary of the Invention]
[0008] The purpose of this invention is to provide a diamond capacitor and its manufacturing method. By adopting a stacked structure, the surface area of the electrodes can be effectively increased without increasing the overall size of the device, thereby achieving better adjustment of the capacitance than the prior art.
[0009] To achieve the above objectives, the diamond capacitor of the present invention includes five regions, wherein the first region, the third region, and the fifth region are heavily doped regions, which respectively form the electrode plates of the diamond capacitor. The lead-out electrodes of the diamond capacitor are formed by depositing metal on the lower surface of the first region, the upper surface of the third region, and the upper surface of the fifth region. The lead-out electrodes on the lower surface of the first region and the upper surface of the fifth region are electrically connected to form one electrode, while the metal on the upper surface of the third region forms another electrode. A second region is provided between the first region and the third region, and a fourth region is provided between one side of the third region and the fifth region. The second region and the fourth region form a dielectric layer.
[0010] Based on the above main characteristics, the first, third and fifth regions are heavily doped regions with a doping concentration range of 10¹⁷-10²⁰ atm / cm³.
[0011] Based on the above main features, the metal on the lower surface of the first region, the upper surface of the third region, and the upper surface of the fifth region is gold, titanium, or a combination of the two materials mentioned above.
[0012] Based on the above main characteristics, the fourth region and the second region are lightly doped or undoped single-crystal diamonds, wherein the doping concentration of the lightly doped diamond is <1015 atm / cm3.
[0013] Based on the above main characteristics, the single-layer thickness of the first region and the second region is 1um-10um.
[0014] To achieve the above objectives, the present invention provides a method for manufacturing a diamond capacitor, the method comprising the following steps:
[0015] Step 1: Using CVD, a P-type heavily doped diamond layer is deposited on a single-crystal diamond substrate to form the first region. The thickness of the first region is 1µm-10µm. Borane gas is introduced or boron powder is added to the sample stage during the CVD growth process.
[0016] Step 2: Polish the surface of the first region 1 that has been grown, and then use CVD to grow the second region, the thickness of which is 1um-10um;
[0017] Step 3: Repeat the conditions of Step 1 to grow a P-type heavily doped third region on the second region;
[0018] Step 4: Repeat the conditions of Step 2 to grow the fourth region on the surface of the third region;
[0019] Step 5: Repeat the conditions of Step 1 to grow a P-type heavily doped fifth region on the surface of the fourth region;
[0020] Step 6: Using photolithography and reactive ion beam etching, the steps on the surface of the third region are etched out;
[0021] Step 7: Form the lead-out electrodes of the diamond capacitor by depositing metal on the surfaces of the first and fifth regions, wherein the lead-out electrodes on the lower surface of the first region and the upper surface of the fifth region are electrically connected to form one electrode, and the stepped surface of the third region is formed by depositing metal to form another electrode.
[0022] Based on the above main characteristics, in the above steps, the first region, the third region and the fifth region are heavily doped regions, with a doping concentration range of 10¹⁷-10²⁰ atm / cm³.
[0023] Based on the above main features, the metal on the lower surface of the first region, the stepped surface of the third region, and the upper surface of the fifth region is gold, titanium, or a combination of the two materials mentioned above.
[0024] Based on the above main characteristics, the fourth region and the second region are lightly doped or undoped single-crystal diamonds, with the lightly doped diamond having a doping concentration of <10¹⁵ atm / cm³.
[0025] Compared with existing technologies, the present invention adopts a stacked structure, which effectively increases the surface area of the electrodes without increasing the overall size of the device, thereby enabling better adjustment of the capacitance size than existing methods. [Attached Image Description]
[0026] Figure 1 This is a schematic diagram of the structure of a three-layer diamond capacitor in the prior art.
[0027] Figure 2 A schematic diagram of the structure of the diamond capacitor for implementing the present invention.
[0028] Figure 3 A schematic flowchart illustrating the manufacturing method of the diamond capacitor for implementing the present invention.
Detailed Implementation Methods
[0029] Please see Figure 2 The diagram shows a schematic of the structure of a multilayer diamond capacitor implementing the present invention. The multilayer diamond capacitor implementing the present invention is mainly divided into five regions. Region 1, Region 3, and Region 5 are heavily doped regions (with a doping concentration ranging from 10¹⁷ to 10²⁰ atm / cm³), forming the electrode plates of the diamond capacitor. Metal is deposited on the lower surface of Region 1, the upper surface of Region 3, and the upper surface of Region 5 to form the lead-out electrodes of the diamond capacitor. The lead-out electrodes on the lower surface of Region 1 and the upper surface of Region 5 are electrically connected to form electrode A, while the metal on the upper surface of Region 3 forms electrode B. Electrodes A and B form the positive and negative electrodes of the diamond capacitor. The metal on the lower surface of Region 1, the upper surface of Region 3, and the upper surface of Region 5 can be gold (Au), titanium (Ti), or a combination of both. The metal achieves ohmic contact with Regions 1, 3, and 5.
[0030] In addition, a second region 2 is provided between the first region 1 and the third region 3, and a fourth region 4 is provided between one side of the third region 3 and the fifth region 5. The fourth region 4 is a lightly doped or undoped single crystal diamond, wherein the lightly doped diamond has a doping concentration of <1015 atm / cm3.
[0031] Please see Figure 2 The diagram shows a flow chart illustrating the method for manufacturing the diamond capacitor according to the present invention. The method for manufacturing the diamond capacitor according to the present invention includes the following steps:
[0032] Step 1: Using CVD, a P-type heavily doped diamond layer is deposited on a single-crystal diamond substrate to form the first region 1. The thickness of the single layer of the first region 1 is 1um-10um. Borane gas is introduced during the CVD growth process or boron powder (concentration >99.9%) is added to the sample stage.
[0033] Step 2: Polish the surface of the first region 1 that has been grown, and then use CVD to grow the second region 2, the thickness of the second region 2 being 1um-10um;
[0034] Step 3: Repeat the conditions of Step 1 to grow a P-type heavily doped third region 3 on the second region 2;
[0035] Step 4: Repeat the conditions of Step 2 to grow a fourth region 4 on the surface of the third region 3, wherein the fourth region 4 is a lightly doped or undoped single crystal diamond with a doping concentration of <1015 atm / cm3.
[0036] Step 5: Repeat the conditions of Step 1 to grow a P-type heavily doped fifth region 5 on the surface of the fourth region 4;
[0037] Step 6: Using photolithography and reactive ion beam etching, the steps on the surface of the third region 3 are etched out;
[0038] Step 7: The lead-out electrodes of the diamond capacitor are formed by depositing metal on the surfaces of the first region 1 and the fifth region 5, wherein the lead-out electrodes on the lower surface of the first region 1 and the upper surface of the fifth region 5 are electrically connected to form electrode A, and the stepped surface of the third region 3 is formed by depositing metal to form electrode B.
[0039] In the above steps, the first region 1, the third region 3, and the fifth region 5 are heavily doped regions, with a doping concentration ranging from 10¹⁷ to 10²⁰ atm / cm³. Furthermore, the metal on the lower surface of the first region 1, the step surface of the third region 3, and the upper surface of the fifth region 5 is gold (Au), titanium (Ti), or a combination of both. The fourth region 4 and the second region 2 are lightly doped or undoped single-crystal diamond, with the lightly doped region having a doping concentration <10¹⁵ atm / cm³.
[0040] Although Figure 1 The existing diamond capacitors shown have good high voltage resistance and heat dissipation, but they suffer from insufficient effective capacitor area. According to the capacitance formula:
[0041]
[0042] Where ε0 and ε r Let S be the permittivity of vacuum and the relative permittivity, respectively; S be the surface area of the electrode; and d be the distance between the electrodes. Figure 1 In the illustrated scheme, increasing the capacitance of a single device can only be achieved by reducing the distance between the electrodes, i.e., the thickness of layer number 3. When the thickness of layer number 3 is reduced, the device's high-voltage withstand capability is affected, as excessively high voltages may penetrate the thin dielectric layer. This invention, however, employs a stacked structure, which effectively increases the surface area S of the electrodes without increasing the overall size of the device, thus allowing for better adjustment of the capacitance compared to existing methods.
[0043] It is understood that those skilled in the art can make equivalent substitutions or modifications to the technical solution and inventive concept of the present invention, and all such substitutions or modifications should fall within the protection scope of the appended claims.
Claims
1. A diamond capacitor, wherein the diamond capacitor comprises five regions, wherein a first region, a third region, and a fifth region are heavily doped regions forming electrode plates of the diamond capacitor, and lead electrodes of the diamond capacitor are formed by depositing metal on the lower surface of the first region, the upper surface of the third region, and the upper surface of the fifth region, wherein the lead electrodes on the lower surface of the first region and the upper surface of the fifth region are electrically connected to form one electrode, and the metal on the upper surface of the third region forms another electrode, wherein a second region is provided between the first region and the third region, and a fourth region is provided between one side of the third region and the fifth region, wherein the second region and the fourth region form a dielectric layer.
2. The diamond capacitor as described in claim 1, characterized in that: The first, third, and fifth regions are heavily doped regions with a doping concentration ranging from 10¹⁷ to 10²⁰ atm / cm³.
3. The diamond capacitor as described in claim 1, characterized in that: The metal on the lower surface of the first region, the upper surface of the third region, and the upper surface of the fifth region is gold, titanium, or a combination of the two materials mentioned above.
4. The diamond capacitor as described in claim 1, characterized in that: The fourth region and the second region are lightly doped or undoped single-crystal diamonds, wherein the lightly doped diamonds have a doping concentration of <10¹⁵ atm / cm³.
5. The diamond capacitor as described in claim 1, characterized in that: The single-layer thickness of the first region and the second region is 1um-10um.
6. A method for manufacturing a diamond capacitor, the method comprising the following steps: Step 1: Using CVD, a P-type heavily doped diamond layer is deposited on a single-crystal diamond substrate to form the first region. The thickness of the first region is 1µm-10µm. Borane gas is introduced or boron powder is added to the sample stage during the CVD growth process. Step 2: Polish the surface of the first region 1 that has been grown, and then use CVD to grow the second region, the thickness of which is 1um-10um; Step 3: Repeat the conditions of Step 1 to grow a P-type heavily doped third region on the second region; Step 4: Repeat the conditions of Step 2 to grow the fourth region on the surface of the third region; Step 5: Repeat the conditions of Step 1 to grow a P-type heavily doped fifth region on the surface of the fourth region; Step 6: Using photolithography and reactive ion beam etching, the steps on the surface of the third region are etched out; Step 7: Form the lead-out electrodes of the diamond capacitor by depositing metal on the surfaces of the first and fifth regions, wherein the lead-out electrodes on the lower surface of the first region and the upper surface of the fifth region are electrically connected to form one electrode, and the stepped surface of the third region is formed by depositing metal to form another electrode.
7. The method for manufacturing a diamond capacitor as described in claim 16, characterized in that: In the above steps, the first, third and fifth regions are heavily doped regions, with doping concentrations ranging from 10¹⁷ to 10²⁰ atm / cm³.
8. The method for manufacturing a diamond capacitor as described in claim 16, characterized in that: The metal on the lower surface of the first region, the stepped surface of the third region, and the upper surface of the fifth region is gold, titanium, or a combination of the two materials mentioned above.
9. The method for manufacturing a diamond capacitor as described in claim 16, characterized in that: The fourth region and the second region are lightly doped or undoped single-crystal diamonds, with the lightly doped diamonds having a doping concentration of <10¹⁵ atm / cm³.