Airborne power distribution system

By designing multiple units in the airborne power distribution system to handle aircraft power, the problem of stable power supply for aircraft electronic equipment under extreme power supply conditions was solved, achieving equipment protection and rapid response, and improving the system's integration and reliability.

CN121529478APending Publication Date: 2026-02-13BEIJING INST OF RADIO METROLOGY & MEASUREMENT
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Patent Information

Application Number
CN202511682361.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-17
Publication Date
2026-02-13

AI Technical Summary

Technical Problem

Aircraft electronic equipment is difficult to operate normally under extremely harsh power supply conditions and is easily damaged. Existing technologies cannot provide stable and reliable power supply protection.

Method used

An airborne power distribution system was designed, comprising a lightning protection unit, a filtering unit, a spike signal suppression unit, a reverse connection protection unit, a voltage detection unit, a surge suppression unit, a discharge unit, and an output isolation unit. Through the combined processing of these units, stable power supply and protection for the aircraft are achieved.

Benefits of technology

It achieves stable and reliable power supply to aircraft electronic equipment, protects equipment from damage, and quickly enters a non-operating state in the event of power interruption or undervoltage, thereby improving the system's integration and reliability.

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Abstract

The embodiment of the invention discloses an airborne power distribution system, and the system comprises a lightning protection unit, a filtering unit, a peak signal suppression unit, an anti-reverse connection unit, a voltage detection unit, a surge suppression unit, a discharge unit, a transient interruption maintaining unit, and an output isolation unit. According to the invention, A4J4L4 lightning protection, CS106 400V peak signal suppression, 600V / 10 microseconds peak signal suppression, 80V surge voltage suppression, 200 microseconds transient interruption power failure maintenance, input reversed polarity protection and other processing can be carried out on the direct current 28V power supply of the airplane power supply, so that the power supply input of a plurality of electronic devices needing the direct current 28V power supply of the airplane is stable and reliable, and the plurality of electronic devices are protected from being damaged.
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Description

Technical Field

[0001] This invention relates to the field of DC power supply for aircraft. More specifically, it relates to an airborne power distribution system. Background Technology

[0002] Electronic devices powered by 28V DC from an aircraft require a stable and reliable power input. However, due to the unique flight environment and the characteristics of the aircraft's power supply, several electronic devices on board the aircraft may encounter extreme power supply conditions such as induced lightning strikes, 400V and 600V power line spikes, 80V overvoltage surges, transient power outages, and reverse polarity of the power input. Under these extreme conditions, the electronic devices often fail to function properly or may even be damaged. If these electronic devices are required to function normally under extreme power supply conditions such as induced lightning strikes, 400V and 600V power line spikes, 80V overvoltage surges, and transient power outages, and to remain undamaged by reverse polarity, and to quickly enter a non-operating state during power outages or undervoltage transients, and quickly return to operating status when the power supply returns to normal, then a dedicated circuit must be designed between the aircraft's power supply and the electronic devices requiring 28V DC power from the aircraft. Summary of the Invention

[0003] The purpose of this invention is to provide an airborne power distribution system to solve at least one of the problems existing in the prior art.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: The first aspect of this invention provides an airborne power distribution system, comprising: a lightning protection unit for receiving a first electrical signal, a second electrical signal, and a ground signal, and performing induced lightning protection processing to obtain a third electrical signal and a fourth electrical signal; a filtering unit for receiving the third electrical signal, the fourth electrical signal, and the ground signal, and performing filtering processing to obtain a fifth electrical signal and a sixth electrical signal; a spike signal suppression unit for receiving the fifth signal and the sixth electrical signal, and performing spike signal suppression processing to obtain a seventh electrical signal and an eighth electrical signal; a reverse connection protection unit for receiving the seventh electrical signal and the eighth electrical signal, and performing reverse connection protection processing to obtain a ninth electrical signal and a tenth electrical signal; and a voltage detection unit for receiving the... The seventh and eighth electrical signals are processed by voltage detection to obtain a first control signal; a surge suppression unit is used to receive the ninth, tenth, and first control signals and perform surge suppression processing to obtain an eleventh and twelfth electrical signal; a discharge unit is used to receive the first control signal and perform discharge processing to obtain a second control signal; a momentary interruption holding unit is used to receive the second control signal, the eleventh and twelfth electrical signals and perform momentary interruption holding processing to obtain a thirteenth and fourteenth electrical signal; and an output isolation unit is used to receive the thirteenth and fourteenth electrical signals and perform output isolation processing to obtain a fifteenth and sixteenth electrical signal.

[0005] Optionally, the first input terminal of the lightning protection unit receives the first electrical signal, the second input terminal of the lightning protection unit receives the second electrical signal, and the grounding terminal of the lightning protection unit receives the ground signal; the first input terminal of the filtering unit is connected to the first output terminal of the lightning protection unit, and the second input terminal of the filtering unit is connected to the second output terminal of the lightning protection unit; the first input terminal of the spike signal suppression unit is connected to the first output terminal of the filtering unit, and the second input terminal of the spike signal suppression unit is connected to the second output terminal of the filtering unit; the first input terminal of the reverse connection protection unit is connected to the first output terminal of the spike signal suppression unit, and the second input terminal of the reverse connection protection unit is connected to the second output terminal of the spike signal suppression unit; the first input terminal of the voltage detection unit is connected to the first output terminal of the spike signal suppression unit, and the second input terminal of the voltage detection unit is connected to the second output terminal of the spike signal suppression unit. The surge suppression unit is connected to the first output of the reverse connection protection unit; the surge suppression unit is connected to the first output of the reverse connection protection unit; the surge suppression unit is connected to the third input of the surge suppression unit; the discharge unit is connected to the output of the voltage detection unit; the transient interruption holding unit is connected to the first output of the surge suppression unit; the transient interruption holding unit is connected to the second output of the surge suppression unit; the transient interruption holding unit is connected to the third input of the transient interruption holding unit; the output isolation unit is connected to the first output of the transient interruption holding unit; the output isolation unit is connected to the second output of the transient interruption holding unit; the first output of the output isolation unit outputs the fifteenth electrical signal; and the second output of the output isolation unit outputs the sixteenth electrical signal.

[0006] Optionally, the lightning protection unit includes a first semiconductor device, a second semiconductor device, and a third semiconductor device; a first terminal of the first semiconductor device receives the first electrical signal, the first terminal of the first semiconductor device is connected to the first terminal of the third semiconductor device, and a second terminal of the first semiconductor device is grounded; a second terminal of the third semiconductor device receives the second electrical signal, the second terminal of the third semiconductor device is connected to the first terminal of the second semiconductor device, and the second terminal of the second semiconductor device is connected to the second terminal of the first semiconductor device; a first terminal of the third semiconductor device outputs the third electrical signal, and a second terminal of the third semiconductor device outputs the fourth electrical signal.

[0007] Optionally, the first terminal of the filtering unit receives the third electrical signal, the second terminal of the filtering unit receives the fourth electrical signal, the third terminal of the filtering unit is grounded, the fourth terminal of the filtering unit is connected to the third terminal of the filtering unit, the fifth terminal of the filtering unit outputs the fifth electrical signal, and the sixth terminal of the filtering unit outputs the sixth electrical signal.

[0008] Optionally, the spike signal suppression unit includes a first chip and a second chip; the sixth terminal of the first chip receives the fifth electrical signal, and the sixth terminal of the first chip is connected to the seventh, eighth, and ninth terminals of the first chip, while the tenth terminal of the first chip is left floating; the first terminal of the first chip is connected to the second, third, and fourth terminals of the first chip, and the first terminal of the second chip, while the fifth terminal of the first chip is left floating; the sixth terminal of the second chip receives the sixth electrical signal, and the sixth terminal of the second chip is connected to the seventh, eighth, and ninth terminals of the second chip, while the tenth terminal of the second chip is left floating; the first terminal of the second chip is connected to the second, third, and fourth terminals of the second chip, while the fifth terminal of the second chip is left floating; the sixth terminal of the first chip outputs the seventh electrical signal, and the ninth terminal of the second chip outputs the eighth electrical signal.

[0009] Optionally, the reverse connection protection unit includes a first capacitor, a second capacitor, a third capacitor, a fourth semiconductor device, a fifth semiconductor device, a sixth semiconductor device, a seventh semiconductor device, a first resistor, and a third chip; the first terminal of the first capacitor receives the seventh electrical signal, and the second terminal of the first capacitor receives the eighth electrical signal; the first terminal of the sixth semiconductor device is connected to the first terminal of the first capacitor, the first terminal of the fifth semiconductor device, the first terminal of the third chip, and the fifth terminal of the third chip; the second terminal of the sixth semiconductor device is connected to the second terminal of the first resistor, the ninth terminal of the third chip, the fourteenth terminal of the third chip, the seventh terminal of the third chip, the sixth terminal of the third chip, the twelfth terminal of the third chip, the eleventh terminal of the third chip, and the... The thirteenth terminal of the third chip, the tenth terminal of the third chip, the first terminal of the fourth semiconductor device, and the second terminal of the second capacitor are connected; the second terminal of the fifth semiconductor device is connected to the second terminal and the fourth terminal of the third chip, and the third terminal of the fifth semiconductor device is connected to the third terminal of the third chip, the first terminal of the second capacitor, the first terminal of the third capacitor, and the first terminal of the seventh semiconductor device; the first terminal of the first resistor is connected to the eighth terminal of the third chip; the second terminal of the fourth semiconductor device is connected to the second terminal of the first capacitor, the second terminal of the third capacitor, and the second terminal of the seventh semiconductor device; the first terminal of the seventh semiconductor device outputs the ninth electrical signal, and the second terminal of the seventh semiconductor device outputs the tenth electrical signal.

[0010] Optionally, the voltage detection unit includes a fourth capacitor, an eighth semiconductor device, a ninth semiconductor device, a tenth semiconductor device, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a fourth chip; the first terminal of the eighth semiconductor device receives the seventh electrical signal, and the second terminal of the eighth semiconductor device is connected to the first terminal of the fourth capacitor, the first terminal of the second resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor; the second terminal of the fourth capacitor receives the eighth electrical signal, and the second terminal of the fourth capacitor is connected to the second terminal of the third resistor, the second terminal of the fourth chip, the third terminal of the fourth chip, and the sixth terminal of the fourth chip. The seventh terminal of the fourth chip and the second terminal of the tenth semiconductor device are connected; the second terminal of the second resistor is connected to the first terminal of the third resistor and the eighth terminal of the fourth chip; the fourth terminal of the fourth chip is left floating, and the fifth terminal of the fourth chip is left floating; the second terminal of the fifth resistor is connected to the first terminal of the sixth resistor and the first terminal of the fourth chip; the second terminal of the fourth resistor is connected to the first terminal of the ninth semiconductor device, the second terminal of the sixth resistor is connected to the second terminal of the ninth semiconductor device, and the first terminal of the tenth semiconductor device is connected to the third terminal of the ninth semiconductor device; the third terminal of the ninth semiconductor device outputs the first control signal.

[0011] Optionally, the surge suppression unit includes a fifth capacitor, a sixth capacitor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fifth chip, an eleventh semiconductor device, a twelfth semiconductor device, and a thirteenth semiconductor device; the first terminal of the fifth capacitor receives the ninth electrical signal, and the first terminal of the fifth capacitor is connected to the fifth terminal of the fifth chip, the first terminal of the eleventh semiconductor device, the first terminal of the twelfth semiconductor device, and the first terminal of the thirteenth semiconductor device; the second terminal of the fifth capacitor receives the tenth electrical signal, and the second terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor, the ninth terminal of the fifth chip, the second terminal of the tenth resistor, and the second terminal of the ninth resistor; the second terminal of the eleventh semiconductor device is connected to the second terminal of the twelfth semiconductor device and the second terminal of the thirteenth semiconductor device. The second terminal of the device is connected to the first terminal of the seventh resistor; the second terminal of the seventh resistor is connected to the second terminal of the sixth capacitor and the third terminal of the fifth chip; the sixth terminal of the fifth chip receives the first control signal, the seventh terminal of the fifth chip is left floating, and the eighth terminal of the fifth chip is left floating; the third terminal of the eleventh semiconductor device is connected to the third terminal of the twelfth semiconductor device, the third terminal of the thirteenth semiconductor device, the first terminal of the eighth resistor, the fourth terminal of the fifth chip, and the second terminal of the fifth chip; the first terminal of the tenth resistor is connected to the tenth terminal of the fifth chip; the second terminal of the eighth resistor is connected to the first terminal of the fifth chip and the first terminal of the ninth resistor; the first terminal of the eighth resistor outputs the eleventh electrical signal, and the second terminal of the ninth resistor outputs the twelfth electrical signal.

[0012] Optionally, the discharge unit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a fourteenth semiconductor device, a fifteenth semiconductor device, and a sixteenth semiconductor device; the momentary interruption holding unit includes a sixteenth resistor, a seventeenth semiconductor device, and a seventh capacitor; the first terminal of the eleventh resistor receives the first control signal, and the second terminal of the eleventh resistor is connected to the first terminal of the fourteenth semiconductor device; the second terminal of the fourteenth semiconductor device is connected to the second terminal of the twelfth resistor and the first terminal of the thirteenth resistor; the second terminal of the thirteenth resistor is connected to the first terminal of the fifteenth semiconductor device; the third terminal of the fourteenth semiconductor device receives the twelfth electrical signal, and the third terminal of the fourteenth semiconductor device is connected to the second terminal of the fourteenth resistor and the second terminal of the fifteenth resistor; the first terminal of the twelfth resistor is connected to the tenth... The second terminal of the fifth semiconductor device is connected to the second terminal of the sixteenth semiconductor device; the third terminal of the fifteenth semiconductor device is connected to the first terminal of the sixteenth semiconductor device and the first terminal of the fourteenth resistor, and the third terminal of the sixteenth semiconductor device is connected to the first terminal of the fifteenth resistor; the second terminal of the sixteenth semiconductor device outputs the second control signal; the first terminal of the sixteenth resistor receives the eleventh electrical signal, and the first terminal of the sixteenth resistor is connected to the first terminal of the seventeenth semiconductor device; the second terminal of the sixteenth resistor is connected to the second terminal of the seventeenth semiconductor device, the second terminal of the sixteenth semiconductor device, and the first terminal of the seventh capacitor; the second terminal of the seventh capacitor is connected to the second terminal of the fifteenth resistor; the first terminal of the seventeenth semiconductor device outputs the thirteenth electrical signal, and the second terminal of the seventh capacitor outputs the fourteenth electrical signal.

[0013] Optionally, the output isolation unit includes a seventeenth resistor, an eighteenth semiconductor device, a nineteenth semiconductor device, a sixth chip, and an eighth capacitor; the first terminal of the sixth chip receives the thirteenth electrical signal, and the first terminal of the sixth chip is connected to the fifth terminal of the sixth chip and the first terminal of the eighteenth semiconductor device; the second terminal of the eighteenth semiconductor device is connected to the second terminal of the sixth chip and the fourth terminal of the sixth chip; the third terminal of the eighteenth semiconductor device is connected to the third terminal of the sixth chip, the first terminal of the eighth capacitor, and the first terminal of the nineteenth semiconductor device; the second terminal of the seventeenth resistor receives the thirteenth electrical signal. The fourteenth electrical signal is described above. The second terminal of the seventeenth resistor is connected to the ninth terminal, the fourteenth terminal, the seventh terminal, the sixth terminal, the twelfth terminal, the eleventh terminal, the thirteenth terminal, and the tenth terminal of the sixth chip, the second terminal of the eighth capacitor, and the second terminal of the nineteenth semiconductor device. The first terminal of the seventeenth resistor is connected to the eighth terminal of the sixth chip. The first terminal of the nineteenth semiconductor device outputs the fifteenth electrical signal, and the second terminal of the nineteenth semiconductor device outputs the sixteenth electrical signal.

[0014] The beneficial effects of this invention are as follows: The technical solution described in this invention features a simple, efficient, and flexible circuit design. The core control section utilizes microcircuit devices, resulting in high circuit integration of the airborne power distribution system, saving considerable space and achieving product miniaturization. The main power supply circuit in the airborne power distribution system uses low-on-resistance MOSFETs throughout, leading to low power consumption and facilitating long-term reliable and stable operation. When used between the aircraft power supply and several electronic devices requiring DC 28V power from the aircraft, this airborne power distribution system provides A4J4L4 lightning protection and CS106 protection for the aircraft's DC 28V power supply. Processes such as 400V spike signal suppression, 600V / 10μs spike signal suppression, 80V surge voltage suppression, 200μs transient power failure retention, and input reverse polarity protection ensure a stable and reliable power supply environment for several electronic devices that require DC 28V power from the aircraft, protecting them from damage. In the event of an aircraft power outage or undervoltage transient, if the time when the power supply voltage at the power distribution system inlet is lower than the undervoltage protection voltage threshold exceeds the duration of the transient power failure, the airborne power distribution system output port can achieve millisecond-level no output, allowing several electronic devices to quickly and uniformly enter a non-operating state. Attached Figure Description

[0015] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0016] Figure 1A schematic diagram of the airborne power distribution system provided in an embodiment of the present invention is shown.

[0017] Figure 2 The diagram shows a circuit diagram of the lightning protection unit, filtering unit, and spike signal suppression unit of the airborne power distribution system provided in an embodiment of the present invention.

[0018] Figure 3 The diagram shows a circuit diagram of the reverse connection protection unit of the airborne power distribution system provided in an embodiment of the present invention.

[0019] Figure 4 The diagram shows a circuit schematic of the surge suppression unit of the airborne power distribution system provided in an embodiment of the present invention.

[0020] Figure 5 The diagram shows a circuit diagram of the voltage detection unit of the airborne power distribution system provided in an embodiment of the present invention.

[0021] Figure 6 The diagram shows a schematic of the transient interruption holding unit and discharge unit circuit of the airborne power distribution system provided in an embodiment of the present invention.

[0022] Figure 7 The diagram shows a circuit diagram of the output isolation unit of the airborne power distribution system provided in an embodiment of the present invention. Detailed Implementation

[0023] To more clearly illustrate the present invention, the following description, in conjunction with embodiments and accompanying drawings, further explains the invention. Similar components in the drawings are indicated by the same reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of the present invention.

[0024] Electronic devices powered by 28V DC from an aircraft require a stable and reliable power input. However, due to the unique flight environment and the characteristics of the aircraft's power supply, several electronic devices on board the aircraft may encounter extreme power supply conditions such as induced lightning strikes, 400V and 600V power line spikes, 80V overvoltage surges, transient power outages, and reverse polarity of the power input. Under these extreme conditions, the electronic devices often fail to function properly or may even be damaged. If these electronic devices are required to function normally under extreme power supply conditions such as induced lightning strikes, 400V and 600V power line spikes, 80V overvoltage surges, and transient power outages, and to remain undamaged by reverse polarity, and to quickly enter a non-operating state during power outages or undervoltage transients, and quickly return to operating status when the power supply returns to normal, then a dedicated circuit must be designed between the aircraft's power supply and the electronic devices requiring 28V DC power from the aircraft.

[0025] In view of this, one embodiment of the present invention provides an airborne power distribution system, the system comprising: a lightning protection unit for receiving a first electrical signal, a second electrical signal (e.g., a DC 28V input) and a ground signal, and performing induced lightning protection processing to obtain a third electrical signal and a fourth electrical signal; a filtering unit (e.g., an EMI filtering unit) for receiving the third electrical signal, the fourth electrical signal, and the ground signal, and performing filtering processing to obtain a fifth electrical signal and a sixth electrical signal; a spike signal suppression unit for receiving the fifth signal and the sixth electrical signal, and performing spike signal suppression processing to obtain a seventh electrical signal and an eighth electrical signal; a reverse connection protection unit for receiving the seventh electrical signal and the eighth electrical signal, and performing reverse connection protection processing to obtain a ninth electrical signal and a tenth electrical signal; and a voltage detection unit. The system includes: a measurement unit for receiving the seventh and eighth electrical signals and performing voltage detection processing to obtain a first control signal; a surge suppression unit for receiving the ninth, tenth, and first control signals and performing surge suppression processing to obtain an eleventh and twelfth electrical signal; a discharge unit (e.g., a fast discharge unit) for receiving the first control signal and performing discharge processing to obtain a second control signal; a momentary interruption holding unit for receiving the second control signal, the eleventh and twelfth electrical signals and performing momentary interruption holding processing to obtain a thirteenth and fourteenth electrical signal; and an output isolation unit for receiving the thirteenth and fourteenth electrical signals and performing output isolation processing to obtain a fifteenth and sixteenth electrical signal.

[0026] In a specific example, such as Figure 1 As shown, the airborne power distribution system includes a lightning protection unit, an EMI filtering unit, a spike signal suppression unit, a reverse connection protection unit, a surge suppression unit, a momentary interruption holding unit, a voltage detection unit, a fast discharge unit, and an output isolation unit.

[0027] In a specific example, the airborne power distribution system is located between the aircraft power supply and several electronic devices that require DC 28V power from the aircraft. The aircraft power supply serves as the power input for the airborne power distribution system, which then processes the power and supplies it to the several electronic devices that require DC 28V power. Depending on the operating phase, the total current value of several electronic devices powered by DC 28V varies. The airborne power distribution system performs A4J4L4 lightning protection, CS106400V spike signal suppression, 600V / 10μs spike signal suppression, 80V surge voltage suppression, 200μs transient power failure retention, and input reverse polarity protection on the aircraft's DC 28V power supply. This ensures a stable and reliable power input for the electronic devices that require DC 28V power from the aircraft, protecting them from damage. When the airborne power distribution system detects that the input power supply voltage has been continuously lower than the undervoltage protection voltage threshold for a period exceeding the duration of the transient power failure, it quickly disables the output port of the airborne power distribution system. This is used to ensure that the several electronic devices powered by DC 28V uniformly and quickly enter a non-operating state during aircraft power outages or undervoltage transients.

[0028] This embodiment features a simple, efficient, and flexible circuit design. The core control section utilizes microcircuit devices, resulting in high circuit integration of the airborne power distribution system, saving considerable space and achieving product miniaturization. The main power supply circuit in the airborne power distribution system uses low-on-resistance MOSFETs throughout, leading to low power consumption and promoting long-term reliable and stable operation. Using this airborne power distribution system between the aircraft power supply and several electronic devices requiring DC 28V power from the aircraft provides A4J4L4 lightning protection and CS106 protection for the aircraft's DC 28V power supply. Processes such as 400V spike signal suppression, 600V / 10μs spike signal suppression, 80V surge voltage suppression, 200μs transient power failure retention, and input reverse polarity protection ensure a stable and reliable power supply environment for several electronic devices that require DC 28V power from the aircraft, protecting them from damage. In the event of an aircraft power outage or undervoltage transient, if the time when the power supply voltage at the power distribution system inlet is lower than the undervoltage protection voltage threshold exceeds the duration of the transient power failure, the airborne power distribution system output port can achieve millisecond-level no output, allowing several electronic devices to quickly and uniformly enter a non-operating state.

[0029] In one possible implementation, the first input terminal of the lightning protection unit receives the first electrical signal, the second input terminal of the lightning protection unit receives the second electrical signal, and the grounding terminal of the lightning protection unit receives the ground signal; the first input terminal of the filtering unit is connected to the first output terminal of the lightning protection unit, and the second input terminal of the filtering unit is connected to the second output terminal of the lightning protection unit; the first input terminal of the spike signal suppression unit is connected to the first output terminal of the filtering unit, and the second input terminal of the spike signal suppression unit is connected to the second output terminal of the filtering unit; the first input terminal of the reverse connection protection unit is connected to the first output terminal of the spike signal suppression unit, and the second input terminal of the reverse connection protection unit is connected to the second output terminal of the spike signal suppression unit; the first input terminal of the voltage detection unit is connected to the first output terminal of the spike signal suppression unit, and the second input terminal of the voltage detection unit is connected to the second output terminal of the spike signal suppression unit. The two output terminals are connected; the first input terminal of the surge suppression unit is connected to the first output terminal of the reverse connection protection unit, the second input terminal of the surge suppression unit is connected to the first output terminal of the reverse connection protection unit, and the third input terminal of the surge suppression unit is connected to the output terminal of the voltage detection unit; the input terminal of the discharge unit is connected to the output terminal of the voltage detection unit; the first input terminal of the transient interruption holding unit is connected to the first output terminal of the surge suppression unit, the second input terminal of the transient interruption holding unit is connected to the second output terminal of the surge suppression unit, and the third input terminal of the transient interruption holding unit is connected to the output terminal of the discharge unit; the first input terminal of the output isolation unit is connected to the first output terminal of the transient interruption holding unit, the second input terminal of the output isolation unit is connected to the second output terminal of the transient interruption holding unit, the first output terminal of the output isolation unit outputs the fifteenth electrical signal, and the second output terminal of the output isolation unit outputs the sixteenth electrical signal.

[0030] In one possible implementation, such as Figure 2 As shown, the lightning protection unit includes a first semiconductor device V1, a second semiconductor device V2, and a third semiconductor device V3. The first terminal of the first semiconductor device receives the first electrical signal (e.g., positive DC 28V power supply for an aircraft), and the first terminal of the first semiconductor device is connected to the first terminal of the third semiconductor device. The second terminal of the first semiconductor device is grounded. The second terminal of the third semiconductor device receives the second electrical signal (e.g., negative DC 28V power supply for an aircraft), and the second terminal of the third semiconductor device is connected to the first terminal of the second semiconductor device. The second terminal of the second semiconductor device is connected to the second terminal of the first semiconductor device. The first terminal of the third semiconductor device outputs the third electrical signal (e.g., Vin+), and the second terminal of the third semiconductor device outputs the fourth electrical signal (e.g., Vin-).

[0031] In one possible implementation, such as Figure 2 As shown, the first terminal of the filter unit Z1 receives the third electrical signal, the second terminal of the filter unit receives the fourth electrical signal, the third terminal of the filter unit is grounded, the fourth terminal of the filter unit is connected to the third terminal of the filter unit, the fifth terminal of the filter unit outputs the fifth electrical signal (e.g., Vout+), and the sixth terminal of the filter unit outputs the sixth electrical signal (e.g., Vout-).

[0032] In one possible implementation, such as Figure 2 As shown, the spike signal suppression unit includes a first chip N1 and a second chip N2; the sixth terminal of the first chip receives the fifth electrical signal, and the sixth terminal of the first chip is connected to the seventh, eighth, and ninth terminals of the first chip, while the tenth terminal of the first chip is left floating; the first terminal of the first chip is connected to the second, third, and fourth terminals of the first chip, and the first terminal of the second chip, while the fifth terminal of the first chip is left floating; the sixth terminal of the second chip receives the sixth electrical signal, and the sixth terminal of the second chip is connected to the seventh, eighth, and ninth terminals of the second chip, while the tenth terminal of the second chip is left floating; the first terminal of the second chip is connected to the second, third, and fourth terminals of the second chip, while the fifth terminal of the second chip is left floating; the sixth terminal of the first chip outputs the seventh electrical signal (e.g., positive power supply), and the ninth terminal of the second chip outputs the eighth electrical signal (e.g., negative power supply).

[0033] In a specific example, the circuit principles of the lightning protection unit, EMI filtering unit, and spike signal suppression unit are as follows: Figure 2 As shown. Transient voltage suppressor diodes (TVS diodes) V1 to V3 are used at the inlet of the airborne power distribution module (e.g., airborne power distribution system) to implement induced lightning protection design. A bidirectional TVS diode 15KP150CAS with a pulse peak power of 15000W is used between the positive DC 28V power supply and the shielded housing of the airborne power distribution module, and between the negative DC 28V power supply and the shielded housing of the airborne power distribution module, with a breakdown voltage of 167V and a clamping voltage of 243V. A bidirectional TVS diode SY487CAS with a pulse peak power of 5000W is used between the positive and negative DC 28V power supply, with a breakdown voltage of 111V and a clamping voltage of 162V.

[0034] In a specific example, the EMI filter unit Z1 consists of two sets of common-mode magnetic rings connected in series to form a two-stage filter. By properly matching the X capacitor and Y capacitor, the electromagnetic compatibility performance of the product can be effectively improved.

[0035] In a specific example, the spike signal suppression unit is designed to suppress transient spike voltages of 600V / 10μs (50 positive and 50 negative spikes per minute) as specified in GJB181-86, and transient spike voltages of 400V / 5μs (5Hz-10Hz pulse repetition frequency) as specified in CS106 of GJB151B-2013. The reverse cutoff voltage must be designed to be no less than 80V to prevent damage from an 80V / 50ms voltage surge. The spike signal suppression unit uses the XCM85AS smooth clamping surge protection circuit chip, which can shunt higher currents and quickly clamp the voltage when a transient spike voltage occurs in the line, protecting the system from damage caused by high-power transient impacts. The smooth clamping surge protection circuit chip determines the magnitude of the spike by sampling the voltage, thereby controlling the internal power MOSFET to discharge energy and achieve voltage regulation. XCM85AS maximum peak pulse current (8 / 20μs, non-repetitive pulse, TA=25℃): 60A, maximum peak pulse power (8 / 20μs, non-repetitive pulse, TA=25℃): 5300W, breakdown voltage 87V, clamping voltage 89V.

[0036] In a specific example, the voltage is reduced to the operating voltage range that the subsequent reverse connection protection unit and surge suppression unit can withstand through the lightning protection unit, EMI filtering unit, and spike signal suppression unit circuit. At the same time, the lightning protection unit, EMI filtering unit, and spike signal suppression unit can all withstand reverse polarity of the power supply input (e.g., positive and negative lines are reversed).

[0037] In one possible implementation, such as Figure 3As shown, the reverse connection protection unit includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth semiconductor device V4, a fifth semiconductor device V5, a sixth semiconductor device V6, a seventh semiconductor device V7, a first resistor RA1, and a third chip N3. The first terminal of the first capacitor receives the seventh electrical signal (e.g., positive power supply), and the second terminal of the first capacitor receives the eighth electrical signal (e.g., negative power supply). The first terminal (e.g., cathode) of the sixth semiconductor device is connected to the first terminal of the first capacitor, the first terminal (e.g., S terminal) of the fifth semiconductor device, the first terminal of the third chip, and the fifth terminal of the third chip. The second terminal (e.g., anode) of the sixth semiconductor device is connected to the second terminal of the first resistor, the ninth terminal, the fourteenth terminal, the seventh terminal, the sixth terminal, the twelfth terminal, the eleventh terminal, and the thirteenth terminal of the third chip. The tenth terminal of the third chip, the first terminal (e.g., anode) of the fourth semiconductor device, and the second terminal of the second capacitor are connected; the second terminal (e.g., G terminal) of the fifth semiconductor device is connected to the second terminal and the fourth terminal of the third chip; the third terminal (e.g., D terminal) of the fifth semiconductor device is connected to the third terminal of the third chip, the first terminal of the second capacitor, the first terminal of the third capacitor, and the first terminal (e.g., cathode) of the seventh semiconductor device; the first terminal of the first resistor is connected to the eighth terminal of the third chip; the second terminal (e.g., cathode) of the fourth semiconductor device is connected to the second terminal of the first capacitor, the second terminal of the third capacitor, and the second terminal (e.g., anode) of the seventh semiconductor device; the first terminal of the seventh semiconductor device outputs the ninth electrical signal (e.g., positive power supply output of the reverse connection protection unit, i.e., positive power supply input of the surge suppression unit); the second terminal of the seventh semiconductor device outputs the tenth electrical signal (e.g., negative power supply).

[0038] In a specific example, the principle of the reverse connection protection unit circuit is as follows: Figure 3 As shown. When the input connection is normal, the input supplies power to the subsequent stage due to the presence of the body diode of the N-channel MOSFET V5. When the source (S) voltage of MOSFET V5 is higher than the drain (D) voltage by more than 25mV, the driving circuit based on the XC4355 ideal diode driver N3 operates, pulling the gate high and driving MOSFET V5 to conduct, resulting in normal output. When the input is reversed, the Schottky diode V4 and the body diode of the N-channel MOSFET V5 reverse the circuit, preventing the subsequent stage from outputting and protecting the subsequent circuit from damage. The Schottky diode V4 is an SS310S with a reverse operating peak voltage of 100V. The N-channel MOSFET V5 is a C100N180S7 with a drain-source breakdown voltage of 100V, a drain DC current of 180A, an on-resistance of 3.5mΩ, and a turn-off time of 320ns.

[0039] In one possible implementation, such as Figure 5 As shown, the voltage detection unit includes a fourth capacitor C15, an eighth semiconductor device V21, a ninth semiconductor device V22, a tenth semiconductor device V23, a second resistor R12, a third resistor R13, a fourth resistor R15, a fifth resistor R14, a sixth resistor R16, and a fourth chip N5. The first terminal (e.g., anode) of the eighth semiconductor device receives the seventh electrical signal (e.g., positive power supply). The second terminal (e.g., cathode) of the eighth semiconductor device is connected to the first terminal of the fourth capacitor, the first terminal of the second resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor. The second terminal of the fourth capacitor receives the eighth electrical signal (e.g., negative power supply). The second terminal of the fourth capacitor is connected to the second terminal of the third resistor, the second terminal of the fourth chip, the third terminal of the fourth chip, and the fourth chip N5. The sixth terminal of the fourth chip, the seventh terminal of the fourth chip, and the second terminal of the tenth semiconductor device are connected (e.g., anode); the second terminal of the second resistor is connected to the first terminal of the third resistor and the eighth terminal of the fourth chip; the fourth terminal of the fourth chip is left floating, and the fifth terminal of the fourth chip is left floating; the second terminal of the fifth resistor is connected to the first terminal of the sixth resistor and the first terminal of the fourth chip; the second terminal of the fourth resistor is connected to the first terminal (e.g., E terminal) of the ninth semiconductor device, the second terminal of the sixth resistor is connected to the second terminal (e.g., B terminal) of the ninth semiconductor device, and the first terminal (e.g., cathode) of the tenth semiconductor device is connected to the third terminal (e.g., C terminal) of the ninth semiconductor device; the third terminal of the ninth semiconductor device outputs the first control signal (e.g., #SHDN).

[0040] In a specific example, the #SHDN signal output by the voltage detection unit controls the startup and shutdown of the surge suppressor chip N4. The circuit principle of the voltage detection unit is as follows: Figure 5 As shown. When the input voltage is divided by resistors R12 and R13, and the voltage across resistor R13 is greater than 2.5V, the cathode and anode of the adjustable precision parallel regulator chip N5 are turned on, controlling the emitter (E) and collector (C) of the PNP transistor V22 to conduct. This causes the #SHDN signal to output a high level through the Zener diode V23, activating the surge suppression unit circuit. Conversely, it shuts down the surge suppression unit circuit. The adjustable precision parallel regulator chip N5 uses a 431 chip. Interference is suppressed by filtering with capacitor C15, and a delay effect is achieved through diode V21 combined with capacitor C15, causing the #SHDN signal to respond with a delay. The fast discharge unit's resistor R26 is connected only after the time of the instantaneous power-off process of the input voltage has elapsed. In one possible implementation, such as Figure 4As shown, the surge suppression unit includes a fifth capacitor C10, a sixth capacitor C11, a seventh resistor R7, an eighth resistor R9, a ninth resistor R10, a tenth resistor R8, a fifth chip N4, an eleventh semiconductor device V10, a twelfth semiconductor device V11, and a thirteenth semiconductor device V12. The first terminal of the fifth capacitor receives the ninth electrical signal (e.g., the reverse connection protection unit output is positive, and the surge suppression unit input is positive). The first terminal of the fifth capacitor is connected to the fifth terminal of the fifth chip, the first terminal (e.g., terminal D) of the eleventh semiconductor device, the first terminal (e.g., terminal D) of the twelfth semiconductor device, and the first terminal (e.g., terminal D) of the thirteenth semiconductor device. The second terminal of the fifth capacitor receives the tenth electrical signal (e.g., the power supply is negative). The second terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor, the ninth terminal of the fifth chip, the second terminal of the tenth resistor, and the second terminal of the ninth resistor. The second terminal (e.g., terminal G) of the eleventh semiconductor device is connected to the first terminal of the twelfth semiconductor device. The second terminal (e.g., terminal G), the second terminal (e.g., terminal G) of the thirteenth semiconductor device, and the first terminal of the seventh resistor are connected; the second terminal of the seventh resistor is connected to the second terminal of the sixth capacitor and the third terminal of the fifth chip; the sixth terminal of the fifth chip receives the first control signal, the seventh terminal of the fifth chip is floating, and the eighth terminal of the fifth chip is floating; the third terminal (e.g., terminal S) of the eleventh semiconductor device is connected to the third terminal (e.g., terminal S) of the twelfth semiconductor device, the third terminal (e.g., terminal S) of the thirteenth semiconductor device, the first terminal of the eighth resistor, the fourth terminal of the fifth chip, and the second terminal of the fifth chip; the first terminal of the tenth resistor is connected to the tenth terminal of the fifth chip; the second terminal of the eighth resistor is connected to the first terminal of the fifth chip and the first terminal of the ninth resistor; the first terminal of the eighth resistor outputs the eleventh electrical signal (e.g., positive power supply output of the surge suppression unit), and the second terminal of the ninth resistor outputs the twelfth electrical signal (e.g., negative power supply output).

[0041] In a specific example, the surge suppression unit circuit principle is as follows: Figure 4As shown. Surge suppressor chip N4 controls linear power MOSFETs V10-V12 to isolate surge voltages, protecting downstream circuitry from surge damage. The main structure of surge suppressor chip N4 is based on an LDO structure. When a surge voltage arrives, the circuit enters LDO regulation mode, stabilizing the output voltage at a preset value. The voltage clamping value of the surge suppression unit's power supply output voltage is set by a voltage divider between resistors R9 and R10 when a surge voltage arrives. After the surge suppression unit circuit starts, if the power supply output voltage does not reach the clamping value, the surge suppression unit's power supply output voltage follows the input voltage. The surge suppressor chip N4 uses the SM4356MP, which can achieve 80V high-voltage surge protection and supports voltages up to 100V without damage. When a surge signal is input to the VCC terminal (pin 5) of the SM4356MP, the output voltage rises, causing the FB signal (pin 1) to reach the threshold voltage of the internal control comparator. Through the negative feedback control of the controller chip, the output voltage of GATE (pin 3) is controlled. This negative feedback controls the conduction capability of the power transistor, preventing high voltage components above the clamping voltage from reaching the output, thus protecting the output load. The linear power MOSFET selected is the LE10N002ALF shielded gate trench MOSFET. By introducing a polysilicon field plate, the on-resistance per unit area of ​​the device is reduced while achieving the same breakdown voltage. It features low on-resistance and a wide safe operating area, making it suitable for surge suppression circuits. Based on surge voltage, duration, load current, and the maximum safe operating area of ​​the linear power MOSFET, multiple linear power MOSFETs are connected in parallel to achieve a derating design, improving product reliability.

[0042] In one possible implementation, such as Figure 6As shown, the discharge unit includes an eleventh resistor R22, a twelfth resistor R23, a thirteenth resistor R24, a fourteenth resistor R25, a fifteenth resistor R26, a fourteenth semiconductor device V32, a fifteenth semiconductor device V33, and a sixteenth semiconductor device V34; the instantaneous interruption holding unit includes a sixteenth resistor R21, a seventeenth semiconductor device V31, and a seventh capacitor C21; the first terminal of the eleventh resistor receives the first control signal (e.g., #SHDN), and the second terminal of the eleventh resistor is connected to the first terminal (e.g., terminal B) of the fourteenth semiconductor device; the second terminal (e.g., terminal C) of the fourteenth semiconductor device is connected to the second terminal of the twelfth resistor and the first terminal of the thirteenth resistor; the second terminal of the thirteenth resistor is connected to the first terminal (e.g., terminal B) of the fifteenth semiconductor device; the third terminal (e.g., terminal E) of the fourteenth semiconductor device receives the twelfth electrical signal (e.g., power supply negative), and the third terminal of the fourteenth semiconductor device is connected to the second terminal of the fourteenth resistor and the second terminal of the fifteenth resistor; the first terminal of the twelfth resistor... One end is connected to the second end (e.g., E end) of the fifteenth semiconductor device and the second end (e.g., S end) of the sixteenth semiconductor device; the third end (e.g., C end) of the fifteenth semiconductor device is connected to the first end (e.g., G end) of the sixteenth semiconductor device and the first end of the fourteenth resistor; the third end (e.g., D end) of the sixteenth semiconductor device is connected to the first end of the fifteenth resistor; the second end of the sixteenth semiconductor device outputs the second control signal; the first end of the sixteenth resistor receives the eleventh electrical signal (e.g., positive power supply output from the surge suppression unit); the first end of the sixteenth resistor is connected to the first end (e.g., cathode) of the seventeenth semiconductor device; the second end of the sixteenth resistor is connected to the second end (e.g., anode) of the seventeenth semiconductor device, the second end of the sixteenth semiconductor device, and the first end of the seventh capacitor; the second end of the seventh capacitor is connected to the second end of the fifteenth resistor; the first end of the seventeenth semiconductor device outputs the thirteenth electrical signal; and the second end of the seventh capacitor outputs the fourteenth electrical signal.

[0043] In a specific example, the principle of the transient hold unit circuit is as follows: Figure 6As shown, the aircraft's 28V DC power supply experiences a momentary drop from its normal range to 0V, remaining at 0V for a period before returning to the normal range. During this process, a transient voltage interruption holding unit circuit is used to maintain the power supply to several electronic devices powered by the 28V DC power supply. This unit circuit uses a large-capacity energy storage capacitor as its core. When the aircraft's 28V DC power supply is normal, the large-capacity energy storage capacitor C21 is charged through resistor R21. During a transient power outage, the large-capacity energy storage capacitor discharges to maintain the output voltage of the airborne power distribution module, ensuring the normal power supply to the several electronic devices powered by the 28V DC power supply. The large-capacity energy storage capacitor C21 is a high-energy tantalum hybrid capacitor, composed of tantalum electrolytic capacitors and electrochemical capacitors, which has advantages such as small size, large energy storage capacity, high reliability, and long lifespan. To enable rapid charging of the large-capacity energy storage capacitor C21, a relatively small resistance value needs to be selected for charging. During the instantaneous charging of the large-capacity energy storage capacitor C21, resistor R21 needs to withstand high instantaneous pulse power. Therefore, an RMS6363B surge-resistant thick-film fixed resistor is selected for R21, with a 100ms instantaneous pulse power consumption of 600W. When the power supply voltage at the power distribution module's input is low, the presence of the large-capacity energy storage capacitor prevents the output port of the power distribution module from quickly becoming unresponsive. However, as the output voltage of the power distribution module gradually decreases, some electronic devices may have already entered a non-operating state while others remain operational, resulting in inconsistent states among the electronic devices. Therefore, a fast discharge unit is designed. The circuit principle is as follows: Figure 6 As shown. When the input power supply voltage remains below the undervoltage protection threshold for a period exceeding the duration of the transient power outage, the #SHDN signal output by the voltage detection unit is conditioned by the NPN transistor V32 and PNP transistor V33 in the fast discharge unit. This causes the source (S) and drain (D) of the P-channel MOSFET V34 to conduct, thereby connecting the large-capacity energy storage capacitor C21 to the discharge resistor R26 for rapid discharge. This achieves millisecond-level no output at the power distribution module output port, enabling several electronic devices to uniformly and quickly enter a non-operating state during aircraft power outages or undervoltage transients. The P-channel MOSFET V34 is a C60P42S7, with a drain-source breakdown voltage of -60V, a drain DC current of -42A, an on-resistance of 13mΩ, an on-time of 260ns, and an off-time of 500ns. To enable the large-capacity energy storage capacitor to discharge quickly, resistor R26 needs to be selected with a smaller resistance value. When the large-capacity energy storage capacitor C21 discharges, resistor R26 needs to withstand a high instantaneous pulse power. R26 is selected as an RMS6363B type surge-resistant chip thick film fixed resistor with a power consumption of 600W for a 100ms instantaneous pulse.

[0044] In one possible implementation, such as Figure 7As shown, the output isolation unit includes a seventeenth resistor RA2, an eighteenth semiconductor device V41, a nineteenth semiconductor device V42, a sixth chip N6, and an eighth capacitor C31. The first terminal of the sixth chip receives the thirteenth electrical signal (e.g., a positive power supply output from the surge suppression unit). The first terminal of the sixth chip is connected to the fifth terminal of the sixth chip and the first terminal (e.g., the S terminal) of the eighteenth semiconductor device. The second terminal (e.g., the G terminal) of the eighteenth semiconductor device is connected to the second terminal and the fourth terminal of the sixth chip. The third terminal (e.g., the D terminal) of the eighteenth semiconductor device is connected to the third terminal of the sixth chip, the first terminal of the eighth capacitor, and the first terminal (e.g., the cathode) of the nineteenth semiconductor device. The seventeenth resistor receives the fourteenth electrical signal at its second terminal. The second terminal of the seventeenth resistor is connected to the ninth, fourteenth, seventh, sixth, twelfth, eleventh, thirteenth, and tenth terminals of the sixth chip, the second terminal of the eighth capacitor, and the second terminal (e.g., anode) of the nineteenth semiconductor device. The first terminal of the seventeenth resistor is connected to the eighth terminal of the sixth chip. The first terminal of the nineteenth semiconductor device outputs the fifteenth electrical signal (e.g., positive), and the second terminal of the nineteenth semiconductor device outputs the sixteenth electrical signal (e.g., negative).

[0045] In a specific example, the principle of the output isolation unit circuit is as follows: Figure 7 As shown. In addition to being powered by the aircraft's 28V DC power supply, some electronic devices may also be powered by other sources. The output isolation unit circuit has a reverse-current protection function and uses an XC4355 ideal diode driver N6 to drive an N-channel MOSFET V41. This circuit replaces the traditional Schottky diode solution, reducing power consumption and heat dissipation. The IN1 (IN2) pins of N6, combined with the source (S) of MOSFET V41, and the OUT pin of N6, combined with the drain (D) of MOSFET V41, form the anode and cathode of the equivalent circuit of the ideal diode, respectively. When the source (S) voltage of the N-channel MOSFET V41 is lower than the drain (D) voltage by more than 25mV, the GATE1 (GATE2) pin of N6 turns off MOSFET V41 in approximately 0.3μs through internal circuitry. The N-channel MOSFET V41 is a C100N180S7, with a drain-source breakdown voltage of 100V, a drain DC current of 180A, an on-resistance of 3.5mΩ, and a turn-off time of 320ns. Under normal power supply, the circuit power consumption is low because the on-resistance of the MOSFET is low.

[0046] In summary, the airborne power distribution system of this embodiment is located between the aircraft power supply and several electronic devices that require DC 28V power from the aircraft. It employs a novel circuit to process the aircraft's DC 28V power supply with A4J4L4 lightning protection, CS106 400V spike signal suppression, 600V / 10μs spike signal suppression, 80V surge voltage suppression, 200μs transient power loss retention, and input reverse polarity protection before supplying power to the several electronic devices requiring DC 28V. This provides a stable and reliable power supply environment for the electronic devices, protecting them from damage. It also features high integration and miniaturization. Furthermore, in the event of an aircraft power outage or undervoltage transient, if the inlet voltage of the airborne power distribution system falls below the undervoltage protection threshold for a period exceeding the duration of the transient power loss, the output port of the airborne power distribution system can achieve millisecond-level no output, allowing the several DC 28V powered electronic devices to quickly and uniformly enter a non-operating state.

[0047] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all the implementation methods here. All obvious variations or modifications derived from the technical solutions of the present invention are still within the protection scope of the present invention.

Claims

1. An airborne power distribution system, characterized in that, The system includes: The lightning protection unit is used to receive the first electrical signal, the second electrical signal and the ground signal, and perform induced lightning protection processing to obtain the third electrical signal and the fourth electrical signal; A filtering unit is used to receive the third electrical signal, the fourth electrical signal, and the ground signal, and perform filtering processing to obtain the fifth electrical signal and the sixth electrical signal; A spike signal suppression unit is used to receive the fifth signal and the sixth electrical signal and perform spike signal suppression processing to obtain the seventh electrical signal and the eighth electrical signal; The reverse connection protection unit is used to receive the seventh and eighth electrical signals and perform reverse connection protection processing to obtain the ninth and tenth electrical signals. A voltage detection unit is used to receive the seventh electrical signal and the eighth electrical signal and perform voltage detection processing to obtain a first control signal; A surge suppression unit is used to receive the ninth electrical signal, the tenth electrical signal, and the first control signal, and perform surge suppression processing to obtain the eleventh electrical signal and the twelfth electrical signal; A discharge unit is used to receive the first control signal and perform discharge processing to obtain a second control signal; A momentary interruption holding unit is used to receive the second control signal, the eleventh electrical signal and the twelfth electrical signal and perform momentary interruption holding processing to obtain the thirteenth electrical signal and the fourteenth electrical signal; An output isolation unit is used to receive the thirteenth and fourteenth electrical signals and perform output isolation processing to obtain the fifteenth and sixteenth electrical signals.

2. The airborne power distribution system according to claim 1, characterized in that, The first input terminal of the lightning protection unit receives the first electrical signal, the second input terminal of the lightning protection unit receives the second electrical signal, and the grounding terminal of the lightning protection unit receives the ground signal; The first input terminal of the filtering unit is connected to the first output terminal of the lightning protection unit, and the second input terminal of the filtering unit is connected to the second output terminal of the lightning protection unit. The first input terminal of the spike signal suppression unit is connected to the first output terminal of the filtering unit, and the second input terminal of the spike signal suppression unit is connected to the second output terminal of the filtering unit. The first input terminal of the reverse connection protection unit is connected to the first output terminal of the spike signal suppression unit, and the second input terminal of the reverse connection protection unit is connected to the second output terminal of the spike signal suppression unit. The first input terminal of the voltage detection unit is connected to the first output terminal of the spike signal suppression unit, and the second input terminal of the voltage detection unit is connected to the second output terminal of the spike signal suppression unit. The first input terminal of the surge suppression unit is connected to the first output terminal of the reverse connection protection unit, the second input terminal of the surge suppression unit is connected to the first output terminal of the reverse connection protection unit, and the third input terminal of the surge suppression unit is connected to the output terminal of the voltage detection unit. The input terminal of the discharge unit is connected to the output terminal of the voltage detection unit; The first input terminal of the transient interruption holding unit is connected to the first output terminal of the surge suppression unit, the second input terminal of the transient interruption holding unit is connected to the second output terminal of the surge suppression unit, and the third input terminal of the transient interruption holding unit is connected to the output terminal of the discharge unit. The first input terminal of the output isolation unit is connected to the first output terminal of the transient interruption holding unit, the second input terminal of the output isolation unit is connected to the second output terminal of the transient interruption holding unit, the first output terminal of the output isolation unit outputs the fifteenth electrical signal, and the second output terminal of the output isolation unit outputs the sixteenth electrical signal.

3. The airborne power distribution system according to claim 2, characterized in that, The lightning protection unit includes a first semiconductor device, a second semiconductor device, and a third semiconductor device; The first terminal of the first semiconductor device receives the first electrical signal, the first terminal of the first semiconductor device is connected to the first terminal of the third semiconductor device, and the second terminal of the first semiconductor device is grounded. The second terminal of the third semiconductor device receives the second electrical signal, and the second terminal of the third semiconductor device is connected to the first terminal of the second semiconductor device, and the second terminal of the second semiconductor device is connected to the second terminal of the first semiconductor device. The third electrical signal is output from the first terminal of the third semiconductor device, and the fourth electrical signal is output from the second terminal of the third semiconductor device.

4. The airborne power distribution system according to claim 3, characterized in that, The first terminal of the filtering unit receives the third electrical signal, the second terminal of the filtering unit receives the fourth electrical signal, the third terminal of the filtering unit is grounded, the fourth terminal of the filtering unit is connected to the third terminal of the filtering unit, the fifth terminal of the filtering unit outputs the fifth electrical signal, and the sixth terminal of the filtering unit outputs the sixth electrical signal.

5. The airborne power distribution system according to claim 4, characterized in that, The spike signal suppression unit includes a first chip and a second chip; The sixth terminal of the first chip receives the fifth electrical signal, and the sixth terminal of the first chip is connected to the seventh terminal, the eighth terminal, and the ninth terminal of the first chip, while the tenth terminal of the first chip is left floating. The first end of the first chip is connected to the second end of the first chip, the third end of the first chip, the fourth end of the first chip, and the first end of the second chip, while the fifth end of the first chip is left unconnected. The sixth terminal of the second chip receives the sixth electrical signal, and the sixth terminal of the second chip is connected to the seventh terminal, the eighth terminal, and the ninth terminal of the second chip, while the tenth terminal of the second chip is left floating. The first end of the second chip is connected to the second end, the third end, and the fourth end of the second chip, while the fifth end of the second chip is left unconnected. The sixth terminal of the first chip outputs the seventh electrical signal, and the ninth terminal of the second chip outputs the eighth electrical signal.

6. The airborne power distribution system according to claim 5, characterized in that, The reverse connection protection unit includes a first capacitor, a second capacitor, a third capacitor, a fourth semiconductor device, a fifth semiconductor device, a sixth semiconductor device, a seventh semiconductor device, a first resistor, and a third chip. The first terminal of the first capacitor receives the seventh electrical signal, and the second terminal of the first capacitor receives the eighth electrical signal. The first terminal of the sixth semiconductor device is connected to the first terminal of the first capacitor, the first terminal of the fifth semiconductor device, the first terminal of the third chip, and the fifth terminal of the third chip. The second terminal of the sixth semiconductor device is connected to the second terminal of the first resistor, the ninth terminal of the third chip, the fourteenth terminal of the third chip, the seventh terminal of the third chip, the sixth terminal of the third chip, the twelfth terminal of the third chip, the eleventh terminal of the third chip, the thirteenth terminal of the third chip, the tenth terminal of the third chip, the first terminal of the fourth semiconductor device, and the second terminal of the second capacitor. The second end of the fifth semiconductor device is connected to the second end of the third chip and the fourth end of the third chip, and the third end of the fifth semiconductor device is connected to the third end of the third chip, the first end of the second capacitor, the first end of the third capacitor, and the first end of the seventh semiconductor device. The first end of the first resistor is connected to the eighth end of the third chip; The second terminal of the fourth semiconductor device is connected to the second terminal of the first capacitor, the second terminal of the third capacitor, and the second terminal of the seventh semiconductor device; The first terminal of the seventh semiconductor device outputs the ninth electrical signal, and the second terminal of the seventh semiconductor device outputs the tenth electrical signal.

7. The airborne power distribution system according to claim 6, characterized in that, The voltage detection unit includes a fourth capacitor, an eighth semiconductor device, a ninth semiconductor device, a tenth semiconductor device, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a fourth chip; The first terminal of the eighth semiconductor device receives the seventh electrical signal, and the second terminal of the eighth semiconductor device is connected to the first terminal of the fourth capacitor, the first terminal of the second resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor. The second terminal of the fourth capacitor receives the eighth electrical signal, and the second terminal of the fourth capacitor is connected to the second terminal of the third resistor, the second terminal of the fourth chip, the third terminal of the fourth chip, the sixth terminal of the fourth chip, the seventh terminal of the fourth chip, and the second terminal of the tenth semiconductor device. The second end of the second resistor is connected to the first end of the third resistor and the eighth end of the fourth chip; The fourth terminal of the fourth chip is left floating, and the fifth terminal of the fourth chip is left floating. The second end of the fifth resistor is connected to the first end of the sixth resistor and the first end of the fourth chip; The second end of the fourth resistor is connected to the first end of the ninth semiconductor device, the second end of the sixth resistor is connected to the second end of the ninth semiconductor device, and the first end of the tenth semiconductor device is connected to the third end of the ninth semiconductor device. The third terminal of the ninth semiconductor device outputs the first control signal.

8. The airborne power distribution system according to claim 7, characterized in that, The surge suppression unit includes a fifth capacitor, a sixth capacitor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fifth chip, an eleventh semiconductor device, a twelfth semiconductor device, and a thirteenth semiconductor device; The first terminal of the fifth capacitor receives the ninth electrical signal, and the first terminal of the fifth capacitor is connected to the fifth terminal of the fifth chip, the first terminal of the eleventh semiconductor device, the first terminal of the twelfth semiconductor device, and the first terminal of the thirteenth semiconductor device. The second terminal of the fifth capacitor receives the tenth electrical signal, and the second terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor, the ninth terminal of the fifth chip, the second terminal of the tenth resistor, and the second terminal of the ninth resistor. The second terminal of the eleventh semiconductor device is connected to the second terminal of the twelfth semiconductor device, the second terminal of the thirteenth semiconductor device, and the first terminal of the seventh resistor; The second end of the seventh resistor is connected to the second end of the sixth capacitor and the third end of the fifth chip; The sixth terminal of the fifth chip receives the first control signal, the seventh terminal of the fifth chip is left floating, and the eighth terminal of the fifth chip is left floating. The third terminal of the eleventh semiconductor device is connected to the third terminal of the twelfth semiconductor device, the third terminal of the thirteenth semiconductor device, the first terminal of the eighth resistor, the fourth terminal of the fifth chip, and the second terminal of the fifth chip. The first end of the tenth resistor is connected to the tenth end of the fifth chip; The second end of the eighth resistor is connected to the first end of the fifth chip and the first end of the ninth resistor; The first terminal of the eighth resistor outputs the eleventh electrical signal, and the second terminal of the ninth resistor outputs the twelfth electrical signal.

9. The airborne power distribution system according to claim 8, characterized in that, The discharge unit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a fourteenth semiconductor device, a fifteenth semiconductor device, and a sixteenth semiconductor device; The instantaneous interruption holding unit includes a sixteenth resistor, a seventeenth semiconductor device, and a seventh capacitor; The first terminal of the eleventh resistor receives the first control signal, and the second terminal of the eleventh resistor is connected to the first terminal of the fourteenth semiconductor device. The second terminal of the fourteenth semiconductor device is connected to the second terminal of the twelfth resistor and the first terminal of the thirteenth resistor; The second terminal of the thirteenth resistor is connected to the first terminal of the fifteenth semiconductor device; The third terminal of the fourteenth semiconductor device receives the twelfth electrical signal, and the third terminal of the fourteenth semiconductor device is connected to the second terminal of the fourteenth resistor and the second terminal of the fifteenth resistor; The first terminal of the twelfth resistor is connected to the second terminal of the fifteenth semiconductor device and the second terminal of the sixteenth semiconductor device; The third terminal of the fifteenth semiconductor device is connected to the first terminal of the sixteenth semiconductor device and the first terminal of the fourteenth resistor. The third terminal of the sixteenth semiconductor device is connected to the first terminal of the fifteenth resistor; The second control signal is output from the second terminal of the sixteenth semiconductor device; The first terminal of the sixteenth resistor receives the eleventh electrical signal, and the first terminal of the sixteenth resistor is connected to the first terminal of the seventeenth semiconductor device; The second terminal of the sixteenth resistor is connected to the second terminal of the seventeenth semiconductor device, the second terminal of the sixteenth semiconductor device, and the first terminal of the seventh capacitor; The second terminal of the seventh capacitor is connected to the second terminal of the fifteenth resistor; The first terminal of the seventeenth semiconductor device outputs the thirteenth electrical signal, and the second terminal of the seventh capacitor outputs the fourteenth electrical signal.

10. The airborne power distribution system according to claim 9, characterized in that, The output isolation unit includes a seventeenth resistor, an eighteenth semiconductor device, a nineteenth semiconductor device, a sixth chip, and an eighth capacitor; The first terminal of the sixth chip receives the thirteenth electrical signal, and the first terminal of the sixth chip is connected to the fifth terminal of the sixth chip and the first terminal of the eighteenth semiconductor device; The second terminal of the eighteenth semiconductor device is connected to the second terminal of the sixth chip and the fourth terminal of the sixth chip; The third terminal of the eighteenth semiconductor device is connected to the third terminal of the sixth chip, the first terminal of the eighth capacitor, and the first terminal of the nineteenth semiconductor device. The second terminal of the seventeenth resistor receives the fourteenth electrical signal, and the second terminal of the seventeenth resistor is connected to the ninth terminal, the fourteenth terminal, the seventh terminal, the sixth terminal, the twelfth terminal, the eleventh terminal, the thirteenth terminal, the tenth terminal, the second terminal of the eighth capacitor, and the second terminal of the nineteenth semiconductor device. The first end of the seventeenth resistor is connected to the eighth end of the sixth chip; The first terminal of the nineteenth semiconductor device outputs the fifteenth electrical signal, and the second terminal of the nineteenth semiconductor device outputs the sixteenth electrical signal.

Citation Information

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