Three-layer amorphous metal oxide thin film transistor and preparation method thereof

Abstract

The invention relates to a three-layer amorphous metal oxide thin film transistor and a preparation method thereof, and belongs to the field of thin film transistors. The method comprises the following steps: cleaning a substrate, photoetching the substrate, preparing an In2O3 thin film on the substrate at room temperature by adopting radio frequency magnetron sputtering, depositing an IGZO thin film on the In2O3 thin film at room temperature, preparing a Ga2O3 thin film on the IGZO thin film to serve as a channel layer of the thin film transistor, annealing in an air atmosphere, and preparing a source-drain Al electrode on the channel layer. The method has the advantages that the preparation conditions of the thin film transistor are optimized, the mobility of the TFT is improved by increasing the content of indium on the lower surface of a semiconductor material, the stability of the TFT is improved by increasing the content of gallium on the upper surface of the semiconductor material, the AOS TFT of a multi-active-layer structure is designed and prepared, the contradiction between the mobility and the stability of the TFT is solved, and the electrical performance of a device is improved.

Description

Technical Field

[0001] This invention belongs to the field of thin-film transistors, specifically relating to a three-layer amorphous metal oxide thin-film transistor and its fabrication method. Background Technology

[0002] In recent years, new flat panel display technologies, represented by thin-film transistor liquid crystal displays (TFT-LCDs) and active-matrix organic light-emitting diode displays (AMOLEDs), have gradually replaced technologies such as plasma display panels (PDPs) and field emission displays (FEDs) due to their advantages such as low power consumption, light weight, and high reliability. In TFT-LCD and AMOLED technologies, thin-film transistors (TFTs) are the core microelectronic components that make up the display panel, and their role and status are equivalent to metal-oxide-semiconductor field-effect transistors (MOSFETs) in digital integrated circuits.

[0003] With the increasing application of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) as pixel switching / driver devices in commercial flat panel displays, especially amorphous indium gallium zinc oxide (a-IGZO), amorphous oxide semiconductors have been widely studied as candidate materials for high-performance display technologies due to their advantages such as high mobility, low off-state current, large area uniformity, low-temperature processability, and optical transparency. However, with the rapid development of information technology, the requirements for display technology are constantly increasing. For example, the expected carrier mobility for large-area (>75 Inch), ultra-high-definition (8K), and high-frame-rate (240Hz) displays is approximately 40 cm⁻¹. 2 V -1 S -1 However, commercially available IGZO-based TFTs do not meet these requirements, and their relatively low mobility limits the far-reaching development of new high-quality display applications. Therefore, new high-end displays urgently require amorphous oxide semiconductor thin-film transistors (AOS TFTs) with higher mobility.

[0004] Besides the mobility of AOS TFTs, its threshold voltage (V) thOther characteristics, such as current switching ratio, uniformity, and stability, are equally important. For example, the ideal threshold voltage for an AOS TFT is close to and slightly above 0, as this allows the TFT to be turned on or off with a small voltage, minimizing power consumption. However, under certain bias stresses, the stability of an AOS TFT deteriorates, and its threshold voltage shifts positively or negatively. Excessive threshold voltage shift can lead to a decrease in display quality. For instance, under negative bias illumination stress, the threshold voltage of an AOS TFT generally shifts negatively; under positive bias temperature stress, it will cause a positive shift. In short, the performance of an AOS TFT can be affected by many factors. Only by avoiding the aforementioned significant weaknesses can the development of displays be further promoted. For an ideal AOS TFT, the most important thing is to maintain good stability even as mobility increases. Summary of the Invention

[0005] This invention provides a three-layer amorphous metal oxide thin-film transistor and its fabrication method to solve the problem of conflict between high mobility and stability in AOS TFTs.

[0006] The technical solution adopted by this invention includes the following steps:

[0007] (1) Clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water, and then blow away the residual moisture on the substrate surface with nitrogen.

[0008] (2) Use a photolithography machine to perform photolithography on the substrate to pattern the active layer;

[0009] (3) An In2O3 thin film was prepared on a SiO2 / p-Si substrate using an indium oxide ceramic target at room temperature by radio frequency magnetron sputtering. An IGZO thin film was deposited on the In2O3 thin film using an indium gallium zinc oxide ceramic target at room temperature by radio frequency magnetron sputtering. A Ga2O3 thin film was prepared on the IGZO thin film using a gallium oxide ceramic target at room temperature by radio frequency magnetron sputtering. The Ga2O3 / IGZO / In2O3 three-layer thin film was used as the channel layer of the thin film transistor.

[0010] (4) After removing the photoresist from the thin film surface, anneal in air atmosphere;

[0011] (5) Source and drain Al electrodes are prepared on the channel layer by electron beam evaporation.

[0012] In step (1) of the present invention, the cleaning time of the SiO2 / p-Si substrate is 10 min to 15 min.

[0013] In step (3) of the present invention, the In2O3 thin film is prepared under the following conditions: under pure argon gas, the sputtering power is 70W-90W and the sputtering time is 1.5min-2.5min.

[0014] In step (3), the atomic ratio of indium gallium zinc oxide ceramic target is 1:1:3. IGZO thin film is deposited. The radio frequency magnetron sputtering conditions are: argon-oxygen mixed gas, 90W-110W, sputtering time is 20min-30min.

[0015] In step (3), Ga2O3 thin film is prepared under the following conditions: pure argon gas, sputtering power of 70W-90W, and sputtering time of 1.5min-2.5min.

[0016] In step (3) of this invention, the In2O3 thin film is prepared under the following conditions: sputtering power of 80W and sputtering time of 2min.

[0017] In step (3) of the present invention, the IGZO thin film is deposited under the following conditions: a mixed gas with an Ar to O2 ratio of 95:5 is used, the sputtering power is 100W, the sputtering time is 25min, and the thickness is 50nm.

[0018] In step (3) of this invention, the Ga2O3 thin film is prepared under the following conditions: under pure argon gas, the sputtering power is 80W and the sputtering time is 2min.

[0019] In step (4) of the present invention, the annealing temperature is 350℃~450℃, preferably 400℃, and the time is 1h.

[0020] In step (5) of the present invention, the thickness of the source and drain Al electrodes is 40nm-60nm.

[0021] In step (5) of the present invention, the thickness of the source and drain Al electrodes is 50 nm, wherein the Al electrode patterning is achieved by ultraviolet lithography, the channel width is 300 μm, and the channel spacing is 10 μm.

[0022] A three-layer amorphous metal oxide thin film transistor was obtained by a method for fabricating a three-layer amorphous metal oxide thin film transistor.

[0023] The advantage of this invention is that it optimizes the fabrication conditions of thin-film transistors. By sequentially depositing In2O3, IGZO and Ga2O3 thin films on a SiO2 / p-Si substrate as the channel layer of the TFT, a Ga2O3 / IGZO / In2O3 three-layer amorphous metal oxide thin-film transistor was fabricated, and its electrical performance and stability were studied.

[0024] In the IGZO system, due to the relatively large ionic radius of In, its outermost empty spherical symmetrical s orbitals easily overlap, providing a transport path for charge carriers. Increasing the In content significantly improves mobility. Ga has strong binding affinity with oxygen, making it difficult to form oxygen vacancies and suppressing the generation of free electrons. Ga can effectively reduce the carrier concentration. Meanwhile, in bottom-gate metal-oxide-semiconductor thin-film transistors (MOSFETs), the contact areas between the source and drain and the semiconductor layer are on the upper surface of the semiconductor layer, while the conductive channel is on the lower surface. During MOSFET operation, the high carrier concentration of the metal-oxide-semiconductor material causes the back channel region on the upper surface of the semiconductor layer to turn on prematurely, resulting in poor transistor performance. Therefore, suppressing the carrier concentration on the upper surface of the semiconductor layer and increasing the carrier concentration of the conductive channel on the lower surface of the semiconductor layer becomes crucial. Thus, by increasing the indium content on the lower surface of the semiconductor material to improve TFT mobility and increasing the gallium content on the upper surface of the semiconductor material to improve TFT stability, a multi-active-layer AOS TFT was designed and fabricated to resolve the contradiction between TFT mobility and stability, thereby improving the device's electrical performance. Attached Figure Description

[0025] Figure 1 These are the transfer characteristic curves of the thin-film transistors prepared in Experimental Example 1, Comparative Example 1, and Comparative Example 2.

[0026] Figure 2 These are the transfer characteristic curves of the thin-film transistors prepared in Experimental Example 2, Comparative Example 3, Comparative Example 4 and Comparative Example 5;

[0027] Figure 3 These are the transfer characteristic curves of the thin-film transistors prepared in Experimental Example 3, Comparative Example 6, Comparative Example 7 and Comparative Example 8.

[0028] Figure 4 These are the transfer characteristic curves of the thin-film transistors prepared in Experimental Example 4, Comparative Example 9, and Comparative Example 10.

[0029] Figure 5 This is a schematic diagram of the structure of the Ga2O3 / IGZO / In2O3 three-layer amorphous metal oxide thin film transistor of the present invention;

[0030] Figure 6 This is an XPS depth profile analysis of the Ga2O3 / IGZO / In2O3 thin film of the present invention;

[0031] Figure 7 These are the transfer characteristic curves of the thin-film transistors prepared in Experimental Example 5, Comparative Example 12, Comparative Example 13 and Comparative Example 14.

[0032] Figure 8This is a stability diagram of Experiment Example 5 under positive bias stress (PBS) and negative bias force (NBS) conditions. Detailed Implementation

[0033] Example 1

[0034] Includes the following steps:

[0035] (1) Clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water for 10 min, and then blow away the residual moisture on the substrate surface with nitrogen.

[0036] (2) Use a photolithography machine (ABM / 6 / 350 / NUV / DCCD / M, USA) to perform photolithography on the substrate to pattern the active layer;

[0037] (3) An In2O3 thin film was prepared on a SiO2 / p-Si substrate using radio frequency magnetron sputtering (Kurt. J Lesker PVD75, America) based on an indium oxide ceramic target at room temperature. Under pure argon conditions, the sputtering power was 80W and the sputtering time was 2min. An IGZO thin film was deposited on the In2O3 thin film using radio frequency magnetron sputtering based on an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3 at room temperature. A mixed gas with an Ar and O2 ratio of 95:5 was used, the sputtering power was 100W, the sputtering time was 25min, and the thickness was 50nm. A Ga2O3 thin film was prepared on the IGZO thin film using radio frequency magnetron sputtering based on a gallium oxide ceramic target at room temperature. Under pure argon conditions, the sputtering power was 80W and the sputtering time was 2min. The Ga2O3 / IGZO / In2O3 three-layer thin film was used as the channel layer of the thin film transistor.

[0038] (4) After removing the photoresist from the film surface, anneal at 400°C for 1 hour in air atmosphere;

[0039] (5) A 50 nm thick source / drain Al electrode was fabricated on the active layer by electron beam evaporation, wherein the Al electrode patterning was achieved by ultraviolet lithography, the channel width was 300 μm and the channel spacing was 10 μm.

[0040] Example 2

[0041] Includes the following steps:

[0042] (1) Clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water for 12 min, and then blow away the residual moisture on the substrate surface with nitrogen.

[0043] (2) Use a photolithography machine (ABM / 6 / 350 / NUV / DCCD / M, USA) to perform photolithography on the substrate to pattern the active layer;

[0044] (3) An In2O3 thin film was prepared on a SiO2 / p-Si substrate using radio frequency magnetron sputtering (Kurt. J Lesker PVD75, America) based on an indium oxide ceramic target at room temperature. Under pure argon conditions, the sputtering power was 70W and the sputtering time was 1.5min. An IGZO thin film was deposited on the In2O3 thin film using radio frequency magnetron sputtering based on an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3 at room temperature. An argon-oxygen mixed gas with an Ar and O2 ratio of 90:10 was used, the sputtering power was 90W and the sputtering time was 20min. A Ga2O3 thin film was prepared on the IGZO thin film using radio frequency magnetron sputtering based on a gallium oxide ceramic target at room temperature. Under pure argon conditions, the sputtering power was 70W and the sputtering time was 1.5min. The Ga2O3 / IGZO / In2O3 three-layer thin film was used as the channel layer of the thin film transistor.

[0045] (4) After removing the photoresist from the film surface, anneal at 350°C for 1 hour in air atmosphere;

[0046] (5) A 40 nm thick source / drain Al electrode was fabricated on the active layer by electron beam evaporation, wherein the Al electrode patterning was achieved by ultraviolet lithography, the channel width was 300 μm and the channel spacing was 10 μm.

[0047] Example 3

[0048] Includes the following steps:

[0049] (1) Clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water for 15 min, and then blow away the residual moisture on the substrate surface with nitrogen.

[0050] (2) Use a photolithography machine (ABM / 6 / 350 / NUV / DCCD / M, USA) to perform photolithography on the substrate to pattern the active layer;

[0051] (3) An In2O3 thin film was prepared on a SiO2 / p-Si substrate using radio frequency magnetron sputtering (Kurt. J Lesker PVD75, America) based on an indium oxide ceramic target at room temperature. Under pure argon conditions, the sputtering power was 90W and the sputtering time was 2.5min. An IGZO thin film was deposited on the In2O3 thin film using radio frequency magnetron sputtering based on an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3 at room temperature. An argon-oxygen mixed gas with an Ar and O2 ratio of 85:15 was used, the sputtering power was 110W, and the sputtering time was 30min. A Ga2O3 thin film was prepared on the IGZO thin film using radio frequency magnetron sputtering based on a gallium oxide ceramic target at room temperature. Under pure argon conditions, the sputtering power was 90W and the sputtering time was 2.5min. The Ga2O3 / IGZO / In2O3 three-layer thin film was used as the channel layer of the thin film transistor.

[0052] (4) After removing the photoresist from the film surface, anneal at 450°C for 1 hour in air atmosphere;

[0053] (5) A 60 nm thick source / drain Al electrode was fabricated on the active layer by electron beam evaporation, wherein the Al electrode patterning was achieved by ultraviolet lithography, the channel width was 300 μm and the channel spacing was 10 μm.

[0054] The following experimental examples and comparative examples further illustrate the optimization process and effects of the present invention.

[0055] (I) Optimization of Thin Film Transistor Fabrication Conditions

[0056] (1) Experimental Example 1 optimized the a-IGZO thin film crystal by adjusting the ratio of IGZO target material.

[0057] This experimental example includes the following steps:

[0058] (1) All TFTs in this invention use SiO2 / P-Si as the substrate, and the insulating layer is SiO2 with a thickness of 285nm. First, the SiO2 / p-Si substrate is cleaned with acetone, anhydrous ethanol and deionized water for 10 minutes, and then the residual moisture on the substrate surface is blown away with nitrogen.

[0059] (2) Use a photolithography machine to perform photolithography on the SiO2 / p-Si substrate to pattern the active layer;

[0060] (3) IGZO thin films were deposited at room temperature using radio frequency magnetron sputtering based on an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3. A mixed gas with an Ar and O2 ratio of 95:5 was used, the sputtering power was 100W, the sputtering time was 25min, and the thickness was 50nm.

[0061] (4) After removing the photoresist from the surface of the thin film, anneal at 200°C for 1 hour in air atmosphere.

[0062] (5) A 50 nm thick source / drain Al electrode was fabricated on the active layer by electron beam evaporation, wherein the Al electrode patterning was achieved by ultraviolet lithography, the channel width was 300 μm and the channel spacing was 10 μm.

[0063] Comparative Example 1

[0064] The difference between this comparative example and the experimental example is that the IGZO thin film is deposited at room temperature using an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:1. All other steps and parameters are the same as those in the experimental example.

[0065] Comparative Example 2

[0066] The difference between this comparative example and the experimental example is that the IGZO thin film is deposited at room temperature using an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:4. All other steps and parameters are the same as those in the experimental example.

[0067] The transfer characteristic curves of the thin-film transistors prepared in Experimental Example 1, Comparative Example 1, and Comparative Example 2 are shown below. Figure 1 The electrical performance parameters are shown in Table 1.

[0068] Table 1: Electrical performance parameters of thin-film transistors in Experimental Example 1, Comparative Example 1, and Comparative Example 2

[0069] Experimental Example 1 Comparative Example 1 Comparative Example 2 <![CDATA[Saturation mobility / (cm 2 ·V -1 ·s -1 )]]> 4.19 0.91 3.08 Threshold voltage / V 9.82 14.04 9.78 Subthreshold swing (V / decade) 0.50 0.91 0.65 <![CDATA[Current switching ratio (I ON / I OFF )]]> <![CDATA[1.49×10 9 ]]> <![CDATA[4.51×10 8 ]]> <![CDATA[3.39×10 8 ]]>

[0070] Based on Table 1, from Figure 1 The transfer characteristic curves show that, compared with Comparative Example 1 and Comparative Example 2, Experimental Example 1, based on a target with an indium gallium zinc atomic ratio of 1:1:3, has a higher saturation mobility, a smaller subthreshold swing, a higher current switching ratio, and better electrical performance.

[0071] (2) Experimental Example 2 optimized the a-IGZO thin film transistor by adjusting the sputtering time of IGZO.

[0072] This experimental example includes the following steps:

[0073] (1) First, clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water for 10 min, and then blow away the residual moisture on the substrate surface with nitrogen.

[0074] (2) Use a photolithography machine to perform photolithography on the SiO2 / p-Si substrate to pattern the active layer.

[0075] (3) IGZO thin films were deposited at room temperature using radio frequency magnetron sputtering based on an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3. A mixed gas with an Ar and O2 ratio of 95:5 was used, the sputtering power was 100W, the sputtering time was 25min, and the thickness was 50nm.

[0076] (4) After removing the photoresist from the surface of the thin film, anneal at 200°C for 1 hour in air atmosphere.

[0077] (5) A 50 nm thick source / drain Al electrode was fabricated on the active layer by electron beam evaporation, wherein the Al electrode patterning was achieved by ultraviolet lithography, the channel width was 300 μm and the channel spacing was 10 μm.

[0078] Comparative Example 3

[0079] The difference between this comparative example and the experimental example is that the sputtering time of the IGZO thin film is 15 min, while the other steps and parameters are the same as those in the experimental example.

[0080] Comparative Example 4

[0081] The difference between this comparative example and the experimental example is that the sputtering time of the IGZO thin film is 20 min, while the other steps and parameters are the same as those in the experimental example.

[0082] Comparative Example 5

[0083] The difference between this comparative example and the experimental example is that the sputtering time of the IGZO thin film is 30 min, while the other steps and parameters are the same as those in the experimental example.

[0084] The transfer characteristic curves of the thin-film transistors prepared in Experimental Example 2, Comparative Example 3, Comparative Example 4, and Comparative Example 5 are shown in the figures below, respectively. Figure 2 The electrical performance parameters of (a), (b), (c) and (d) are shown in Table 2.

[0085] Table 2: Electrical performance parameters of thin-film transistors in Experimental Example 2, Comparative Example 3, Comparative Example 4 and Comparative Example 5

[0086] Experimental Example 2 Comparative Example 3 Comparative Example 4 Comparative Example 5 <![CDATA[Saturation mobility / (cm 2 ·V -1 ·s -1 )]]> 3.01 1.34 1.42 1.74 Threshold voltage / V 9.87 14.20 13.66 14.49 Subthreshold swing (V / decade) 0.25 0.90 0.82 1.01 <![CDATA[Current on / off ratio (I ON / I OFF )]]> <![CDATA[1.44×10 9 ]]> <![CDATA[7.16×10 7 ]]> <![CDATA[6.48×10 7 ]]> <![CDATA[6.55×10 8 ]]>

[0087] Based on Table 2, from Figure 2 The transfer characteristic curves (a), (b), (c) and (d) show that, compared with Comparative Examples 3, 4 and 5, Experimental Example 2 with an IGZO thin film sputtering time of 25 min has a higher saturation mobility, a smaller threshold voltage, a smaller subthreshold swing, a higher on / off ratio, and better electrical performance.

[0088] (3) Experiment 3 optimized the a-IGZO thin film transistor by adjusting the annealing temperature of the IGZO thin film transistor.

[0089] This experimental example includes the following steps:

[0090] (1) First, clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water for 10 min, and then blow away the residual moisture on the substrate surface with nitrogen.

[0091] (2) Use a photolithography machine to perform photolithography on the SiO2 / p-Si substrate to pattern the active layer.

[0092] (3) IGZO thin films were deposited at room temperature using radio frequency magnetron sputtering based on an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3. A mixed gas with an Ar and O2 ratio of 95:5 was used, the sputtering power was 100W, the sputtering time was 25min, and the thickness was 50nm.

[0093] (4) After removing the photoresist from the surface of the thin film, anneal at 400°C for 1 hour in air atmosphere.

[0094] (5) A 50 nm thick source / drain Al electrode was prepared on the active layer by electron beam evaporation. The Al electrode patterning was achieved by ultraviolet lithography. The channel width was 300 μm and the channel spacing was 10 μm.

[0095] Comparative Example 6

[0096] The difference between this comparative example and the experimental example is that after removing the photoresist from the thin film surface, it is annealed at 200°C in air atmosphere. All other steps and parameters are the same as those in the experimental example.

[0097] Comparative Example 7

[0098] The difference between this comparative example and the experimental example is that after removing the photoresist from the thin film surface, it is annealed at 300°C in air atmosphere. All other steps and parameters are the same as those in the experimental example.

[0099] Comparative Example 8

[0100] The difference between this comparative example and the experimental example is that after removing the photoresist from the thin film surface, it is annealed at 500°C in air atmosphere. All other steps and parameters are the same as those in the experimental example.

[0101] The transfer characteristic curves of the thin-film transistors prepared in Experimental Example 3, Comparative Example 6, Comparative Example 7, and Comparative Example 8 are shown in the figures below, respectively. Figure 3 The electrical performance parameters of (a), (b), (c) and (d) are shown in Table 3.

[0102] Table 3: Electrical performance parameters of thin-film transistors in Experimental Example 3 and Comparative Examples 6, 7 and 8

[0103] Experimental Example 3 Comparative Example 6 Comparative Example 7 Comparative Example 8 <![CDATA[Saturation mobility / (cm 2 ·V -1 ·s -1 )]]> 6.14 4.19 4.05 6.14 Threshold voltage / V -6.29 9.82 8.95 -0.09 Subthreshold swing (V / decade) 0.54 0.50 1.28 0.55 <![CDATA[Current switching ratio (I ON / I OFF )]]> <![CDATA[5.54×10 8 ]]> <![CDATA[3.68×10 8 ]]> <![CDATA[1.77×10 7 ]]> <![CDATA[4.81×10 7 ]]>

[0104] Based on Table 3, from Figure 3 As can be seen from the transfer characteristic curves of (a), (b), (c) and (d), compared with Comparative Examples 6, 7 and 8, Experimental Example 3, which was annealed at 400°C in air atmosphere, has a higher saturation mobility and switching ratio, and better electrical performance.

[0105] (4) Experiment 4 optimized the three-layer amorphous metal oxide thin film transistor by adjusting the sputtering time of In2O3 in the Ga2O3 / IGZO / In2O3 three-layer amorphous metal oxide thin film transistor.

[0106] This experimental example includes the following steps:

[0107] (1) Clean the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water for 10 min, and then blow away the residual moisture on the substrate surface with nitrogen.

[0108] (2) Use a photolithography machine to perform photolithography on the SiO2 / p-Si substrate to pattern the active layer.

[0109] (3) An In2O3 thin film was prepared on a SiO2 / p-Si substrate using an indium oxide ceramic target at room temperature under pure argon conditions. The sputtering power was 80 W and the sputtering time was 2 min. An IGZO thin film was deposited on the In2O3 thin film using an indium gallium zinc oxide ceramic target with an indium gallium zinc atomic ratio of 1:1:3 at room temperature under pure argon conditions. The sputtering power was 100 W and the sputtering time was 25 min, with a thickness of 50 nm. A Ga2O3 thin film was prepared on the IGZO thin film using a gallium oxide ceramic target at room temperature under pure argon conditions. The sputtering power was 80 W and the sputtering time was 2 min. The Ga2O3 / IGZO / In2O3 three-layer thin film was used as the active layer of the thin film transistor.

[0110] (4) After removing the photoresist from the surface of the thin film, anneal at 400°C for 1 hour in air atmosphere.

[0111] (5) A 50 nm thick source / drain Al electrode was fabricated on the active layer by electron beam evaporation, wherein the Al electrode patterning was achieved by ultraviolet lithography, the channel width was 300 μm and the channel spacing was 10 μm.

[0112] Comparative Example 9

[0113] The difference between this comparative example and Experimental Example 4 is that the In2O3 thin film sputtering time is 1 min, while the other steps and parameters are the same as in Experimental Example 4.

[0114] Comparative Example 10

[0115] The difference between this comparative example and Experimental Example 4 is that the In2O3 film sputtering time is 1.5 min, while the other steps and parameters are the same as in Experimental Example 4.

[0116] Comparative Example 11

[0117] The difference between this comparative example and Experimental Example 4 is that the In2O3 thin film sputtering time is 3 min, while the other steps and parameters are the same as in Experimental Example 4.

[0118] The transfer characteristic curves of the thin-film transistors prepared in Experimental Example 4, Comparative Example 9, Comparative Example 10, and Comparative Example 11 are shown in the figures below, respectively. Figure 4 (a), (b) and (c), the electrical performance parameters are shown in Table 4.

[0119] Table 4: Electrical performance parameters of thin-film transistors in Experimental Example 4 and Comparative Examples 9, 10 and 11

[0120] Experiment Example 4 Comparative Example 9 Comparative Example 10 Comparative Example 11 <![CDATA[Saturation mobility / (cm 2 ·V -1 ·s -1 )]]> 24.84 8.27 9.92 — Threshold voltage / V 1.52 1.30 3.37 — Subthreshold swing (V / decade) 0.34 0.66 0.93 — <![CDATA[Current on / off ratio (I ON / I OFF )]]> <![CDATA[4.62×10 7 ]]> <![CDATA[2.22×10 8 ]]> <![CDATA[2.13×10 8 ]]> —

[0121] Based on Table 4, from Figure 4 As can be seen from the transfer characteristic curves of (a), (b) and (c), the electrical performance of Experimental Example 4, which has an In2O3 film sputtering time of 2 min, is better than that of Comparative Examples 9, 10 and 11.

[0122] (II) Effects of the Ga2O3 / IGZO / In2O3 three-layer thin-film transistor of the present invention

[0123] Example 1 is used as Experiment 5.

[0124] Comparative Example 12

[0125] The difference between this comparative example and Experimental Example 5 is that only a single-layer IGZO thin film was prepared for the active layer of the thin-film transistor, while the other steps and parameters are the same as those in Experimental Example 5.

[0126] Comparative Example 13

[0127] The difference between this comparative example and Experimental Example 5 is that the active layer of the thin-film transistor was only prepared as a bilayer IGZO / In2O3 thin film with In2O3 as the lower layer and IGZO as the upper layer. All other steps and parameters were the same as in Experimental Example 5.

[0128] Comparative Example 14

[0129] The difference between this comparative example and Experimental Example 5 is that only a bilayer Ga2O3 / IGZO thin film with IGZO as the lower layer and Ga2O3 as the upper layer was prepared for the thin film transistor channel layer. All other steps and parameters are the same as in Experimental Example 5.

[0130] Example 5: XPS depth profile analysis of the active layer. Figure 6 As shown, the active layer was etched with Ar ions using a monochromatic Al Kα (1486.6 eV) X-ray source via X-ray photoelectron spectroscopy (XPS, Thermo Fisher Scientific ESCALAB 250Xi). Each etching step lasted 30 seconds, and a total of 19 etching steps were performed. Figure 6 The image shows the concentration distribution of In, Ga, and Zn in the thin film as etching time changes. We can clearly see that when the etching time is between 0-30 s, the Ga content decreases significantly, indicating that the uppermost Ga2O3 film layer is being etched at this time. Between 30 s and 360 s, the In, Ga, and Zn contents remain stable, indicating the IGZO film layer. When the etching time starts from 360 s, both Ga and Zn contents decrease significantly, while the In content increases significantly, indicating that the bottom In2O3 film layer has been etched. From approximately 450 s, the In, Ga, and Zn contents are almost negligible, while the Si content reaches its maximum, indicating that the bottom substrate has been etched. The XPS depth profile analysis fully demonstrates the compositional distribution of the three active layers.

[0131] The transfer characteristic curves of the thin-film transistors prepared in Experimental Example 5 and Comparative Examples 12, 13 and 14 are shown in the figure below. Figure 7 The electrical performance parameters of (a), (b), (c) and (d) are shown in Table 5.

[0132] Table 5: Electrical performance parameters of thin-film transistors in Experimental Example 5 and Comparative Examples 12, 13 and 14

[0133] Experimental Example 5 Comparative Example 12 Comparative Example 13 Comparative Example 14 <![CDATA[Saturation mobility / (cm 2 ·V -1 ·s -1 )]]> 24.84 4.05 15.96 5.99 Threshold voltage / V 1.52 8.95 -0.21 0.54 Subthreshold swing (V / decade) 0.34 1.28 0.47 1.13 <![CDATA[Current switching ratio (I ON / I OFF )]]> <![CDATA[4.62×10 7 ]]> <![CDATA[1.77×10 7 ]]> <![CDATA[2.69×10 8 ]]> <![CDATA[3.41×10 8 ]]>

[0134] Based on Table 5, from Figure 7 As can be seen from the transfer characteristic curves (a), (b), (c), and (d), compared with Comparative Examples 12, 13, and 14, Experimental Example 5 with three-layer Ga2O3 / IGZO / In2O3 exhibits the highest mobility. Figure 8 As shown in (a) and (b), the threshold voltage of Experimental Example 5 showed almost no drift under both positive bias stress (PBS) and negative bias stress (NBS) conditions, indicating that Experimental Example 5 possesses excellent stability. Therefore, Experimental Example 5 exhibits superior overall performance. This is mainly due to the relatively large ionic radius of In, whose outermost empty spherical symmetric s orbitals easily overlap, providing a transport path for charge carriers. Increasing the In content significantly improves mobility. Ga has strong binding affinity with oxygen, making it difficult to form oxygen vacancies and suppressing the generation of free electrons. Ga can effectively reduce the charge carrier concentration. Meanwhile, in bottom-gate metal-oxide-semiconductor thin-film transistors, the contact areas between the source and drain and the semiconductor layer are on the upper surface of the semiconductor layer, while the conductive channel is on the lower surface. During operation, the high charge carrier concentration of the metal-oxide-semiconductor material causes the back channel region on the upper surface of the semiconductor layer to turn on prematurely, resulting in poor transistor performance. Therefore, suppressing the charge carrier concentration on the upper surface of the semiconductor layer and increasing the charge carrier concentration in the conductive channel on the lower surface of the semiconductor layer are crucial. Therefore, the prepared Ga2O3 / IGZO / In2O3 thin film transistor improves the TFT mobility by depositing an In2O3 thin film on the SiO2 / p-Si substrate to increase the indium content on the lower surface of the IGZO, and improves the TFT stability by depositing a Ga2O3 thin film on the upper surface of the IGZO to increase the gallium content on the upper surface of the IGZO. Thus, it achieves good stability even when the mobility of the AOS TFT increases.

Claims

1. A method for fabricating a three-layer amorphous metal oxide thin film transistor, characterized by, It comprises the following steps: (1) cleaning the SiO2 / p-Si substrate with acetone, anhydrous ethanol and deionized water, and then blowing off the residual moisture on the surface of the substrate with nitrogen; (2) performing photoetching on the substrate with a photoetching machine to pattern the active layer; (3) preparing an In2O3 film on the SiO2 / p-Si substrate at room temperature based on an indium oxide ceramic target by radio frequency magnetron sputtering, depositing an IGZO film on the In2O3 film at room temperature by radio frequency magnetron sputtering of an indium gallium zinc oxide ceramic target, and preparing a Ga2O3 film on the IGZO film at room temperature based on a gallium oxide ceramic target by radio frequency magnetron sputtering, the Ga2O3 / IGZO / In2O3 three-layer film serving as the channel layer of the thin film transistor; (4) removing the photoresist on the surface of the film and then annealing in air; (5) preparing a source-drain Al electrode on the active layer by electron beam evaporation.

2. The method for fabricating a three-layer amorphous metal oxide thin-film transistor according to claim 1, characterized in that, In the step (1), the SiO2 / p-Si substrate is cleaned for 10-15 min.

3. The method of claim 1, wherein the method further comprises: In the step (3), the radio frequency magnetron sputtering conditions for preparing the In2O3 film are as follows: under pure argon gas, the sputtering power is 70-90 W, and the sputtering time is 1.5-2.5 min. In the step (3), the radio frequency magnetron sputtering conditions for depositing the IGZO film are as follows: Ar and O2 are mixed at a ratio of 95:5, the sputtering power is 100 W, the sputtering time is 25 min, and the thickness is 50 nm. In the step (3), the radio frequency magnetron sputtering conditions for preparing the Ga2O3 film are as follows: under pure argon gas, the sputtering power is 80 W, and the sputtering time is 2 min.

4. The method of claim 3, wherein the method further comprises: In the step (3), the radio frequency magnetron sputtering conditions for preparing the In2O3 film are as follows: the sputtering power is 80 W, and the sputtering time is 2 min.

5. The method of claim 3, wherein the method further comprises: In the step (4), the annealing temperature is 350-450°C, preferably 400°C, and the time is 1 h.

6. The method of claim 3, wherein the method further comprises: In the step (5), the thickness of the source-drain Al electrode is 40-60 nm.

7. The method of claim 1, wherein the method further comprises: In the step (5), the thickness of the source-drain Al electrode is 50 nm, the Al electrode patterning is achieved by ultraviolet photoetching, the channel width is 300 μm, and the channel spacing is 10 μm.

8. The method of claim 1, wherein the method further comprises:

10. A three-layer amorphous metal oxide thin film transistor prepared by the method according to any one of claims 1-9.

9. The method of claim 8, wherein the method further comprises: ​ ​

Images