Simulation of analog circuits by means of programmable digital logic
By dividing analog circuits into functional blocks and using fixed-point mathematical descriptions to generate computational units to simulate their behavior, the problem of simulating complex analog circuits is solved, achieving fast and accurate simulation results. It is suitable for real-time simulation of analog circuits and controller development.
Patent Information
- Application Number
- CN202480039557.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-16
- Filing Date
- 2024-06-07
- Publication Date
- 2026-02-13
AI Technical Summary
Existing technologies struggle to quickly and accurately simulate complex analog circuits, especially those with high timing control requirements, resulting in high modeling complexity and difficulty in implementation.
The analog circuit is divided into functional blocks, each functional block is assigned a dedicated state space, its behavior is determined by a mathematical description, and computational units are generated to simulate the behavior of the functional blocks. Simulation is performed through programmable digital logic, signal processing is optimized using fixed-point representation, and fast and accurate simulation is achieved using configurable digital logic.
It enables fast and accurate simulation of complex analog circuits. The simulator can operate in the microsecond to nanosecond range, supports real-time simulation, and is suitable for developing and testing digital controllers for analog circuits, thus improving simulation efficiency and accuracy.
Smart Images
Figure CN121532774A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the simulation of analog circuits. More particularly, it relates to the real-time simulation of complex analog circuits. Background Technology
[0002] Analog circuits can be controlled by digital control devices. These control devices can include microcomputers, microcontrollers, or programmable digital logic, such as FPGAs. The control devices can perform control of the analog circuits, where analog signals from the circuits can be fed back to the digital control devices via analog-to-digital converters.
[0003] To develop this control device, the analog circuit can be simulated using another device that behaves identically to the analog circuit. Simulation can be performed using configurable digital logic, which can be configured relatively easily.
[0004] Analog circuits can be very complex and include a large number of active or passive electronic components. In addition, analog circuits may have very high requirements for timing control.
[0005] Known methods for simulating analog circuits require complex mathematical modeling, the computational workload of which can increase quadratically with the number of state-oriented devices considered. Finding a correct model for a given analog circuit can be difficult. Even if a model is found, the complexity of the digital logic required to implement it can be so high that the model is virtually impossible to implement. Summary of the Invention
[0006] Therefore, the objective of this invention is to provide an improved technique for simulating analog circuits using configurable digital logic. This objective is achieved by means of the subject matter of the independent claims. The dependent claims reflect preferred embodiments.
[0007] According to a first aspect of the invention, a method for simulating a predetermined analog circuit by means of programmable digital logic includes the steps of: dividing the analog circuit into functional blocks; assigning a dedicated state space to each functional block; determining a mathematical description of the behavior of these functional blocks in their respective state spaces; describing or generating computing units based on these mathematical descriptions, wherein these computing units functionally simulate the functional blocks; and determining description data for configuring the programmable digital logic such that it implements functional blocks interconnected in a manner similar to the analog circuit.
[0008] The dedicated state space can be described in terms of voltage and / or current for each functional block.
[0009] For example, state space can depict the linear voltage and current of analog circuits, as well as the switching states of transistor switches or nonlinear components such as diodes.
[0010] Switching spaces can, for example, depict frequency-related behavior in the same way as time-varying behavior.
[0011] These mathematical descriptions depict the electrical behavior of these functional blocks in their respective state spaces, and can be represented by network diagrams of circuits or parts thereof, reflection functions, or transfer functions.
[0012] These mathematical descriptions can be, for example, linear equations, approximations, or differential equations, and can be defined in the time domain or frequency domain, and can be time-discrete or continuous.
[0013] These computing units simulate the digital equivalent circuits of the corresponding functional blocks based on the mathematical description of analog circuits or parts thereof.
[0014] By implementing this method, a fast and accurate simulator can be provided for analog circuits. The simulator can operate with very low latency using digital logic, enabling real-time simulation. Here, the time it takes for the simulator to adapt its behavior to that of the analog model can be very short, in the microsecond range, and in a preferred embodiment, in the nanosecond range. Within the configuration framework, the accuracy of the simulator relative to the analog circuit can be controlled.
[0015] The steps of this method can be executed automatically. Starting with a description of an analog circuit, the method progressively generates a configuration that can be used to configure configurable digital logic modules to perform nearly identical functions. Checks can be inserted between conversion steps to ensure that the corresponding conversions are correct and sufficiently accurate. The simulation of the digital logic modules can be used as a digital twin of the analog circuit, for example, for developing controllers for analog circuits, where the simulated circuit is then correspondingly generated and operated as a digital logic module.
[0016] This method enables high-quality simulations even of complex analog circuits, such as those involving multiple state-oriented devices, requiring highly accurate implementation of signal changes over time, or processing very fast signals. Such analog circuits can include, for example, transmitters or receivers of electromagnetic signals, or power converters. Power converters can be used in vehicles, trains, airplanes, or distributed power supplies. Inaccurate controllers can impair energy conversion efficiency. In the worst case, this can lead to the release of large amounts of energy and damage or even destruction of the circuit.
[0017] Analog circuit partitioning can be done manually, but there are also known automated methods. For example, tools like Matlab / Simulink can be used for partitioning. Other tools, such as PLECS, can also be used to determine the state space of functional modules.
[0018] The electrical connection between two functional blocks can be modeled using a current-controlled source and a voltage-controlled source between the two corresponding computational units. Thus, each functional block can be modeled independently and then context-dependent with each other.
[0019] More precisely, the electrical connection between the first functional block and the second functional block of the analog circuit can be modeled by a current source in the first functional block, which is controlled based on the current in the second functional block; and by a voltage source in the second functional block, which is controlled based on the voltage in the first functional block.
[0020] Known methods utilize signal processing in floating-point representation within a computing unit. While this representation is highly accurate, it is complex to process. Therefore, in one implementation, it is preferable to use fixed-point representation to represent these signals.
[0021] Therefore, the range boundaries of the signals existing within the computing unit can be determined. Based on these range boundaries, a fixed-point representation of the signal can be determined, allowing the computing unit to define the signal as a fixed-point value. This simplifies the computing unit and requires fewer resources, thus accelerating computation.
[0022] In one implementation, corresponding functional blocks of the analog circuit are determined. Then, computational units configured to sequentially implement these corresponding functional blocks can be identified.
[0023] Here, it can be utilized that the digital logic computing unit can perform non-fast determinations, allowing the computing unit to sequentially perform determinations for multiple functional blocks in a multiplexed mode. This is particularly useful for analog circuits where specific circuit sections are reused multiple times.
[0024] For example, analog circuitry that processes audio data from a large number of sources in parallel can have separate processing channels, each containing the same analog components. These components could include, for example, frequency-dependent filters, automatically controlled amplifiers, modulators, or demodulators.
[0025] A circuit can be partitioned such that the boundary between two functional blocks passes through a node whose spectral frequency components are minimized during circuit operation. This condition can be passed as an objective function to an automatic segmenter, making the resulting functional blocks easily operable with respect to simulation. In particular, the mathematical description of the behavior of the functional blocks in their state space can possess improved operability.
[0026] Analog circuits can be controlled digitally, and the digital control inputs of a circuit can be simulated using configurable digital logic. Simulation is particularly useful for developing or testing digital controllers for analog circuits.
[0027] Configurable digital logic can simulate an analog-to-digital converter (ADC) that provides analog values to analog circuits in a digital manner. In one implementation, the configurable logic includes the ADC as a module whose electrical connections to other components can be configured. The digital values provided by the ADC can be evaluated by a digital controller in a feedback manner, particularly for performing control of analog circuits.
[0028] In another embodiment, the description data is converted into configuration data for configuring predetermined programmable digital logic, so as to simulate the analog circuit by means of the programmable digital logic. Here, a specific programmable logic can be specified, and the provided configuration data can be applied to that programmable logic.
[0029] In one implementation, the method includes configuring programmable digital logic based on configuration data. This logic can then be configured as a simulator capable of emulating the analog circuit.
[0030] According to another aspect of the present invention, an apparatus for simulating a predetermined analog circuit by means of programmable digital logic includes: a first means for dividing the analog circuit into functional blocks, wherein each functional block is assigned a dedicated state space in the form of voltage and / or current; a second means for determining a mathematical description of the electrical behavior of the functional blocks in the respective state space; a third means for describing or generating computing units that form digital equivalent circuits of the respective functional blocks based on the mathematical descriptions; and a fourth means for determining descriptive data for configuring the programmable digital logic such that the programmable digital logic implements functional blocks interconnected in a manner similar to the analog circuit.
[0031] The device is also configured to perform the method according to the present invention.
[0032] According to another aspect of the invention, description data for describing programmable digital logic to simulate a predetermined analog circuit is created by means of the method described herein. Correspondingly, configuration data for configuring programmable digital logic to simulate a predetermined analog circuit can be created by means of the method described herein. The description data or configuration data can be stored on a computer-readable data carrier.
[0033] According to another aspect of the invention, an application-specific integrated circuit (ASIC) includes digital logic configured based on configuration data described herein. For this purpose, the configuration data can be created using the methods described herein. In another embodiment, digital logic that can only be programmed once, such as OTP (one-time programmable) logic, can be used.
[0034] According to another aspect of the invention, programmable digital logic is configured to simulate a predetermined analog circuit by means of the method described herein.
[0035] The programmable digital logic mentioned in this article can be implemented, in particular, using FPGAs (Field-Programmable Gate Arrays). FPGAs can be configured to form predetermined logic circuits using configuration data. Unlike programming a computer, microcontroller, or controller, this configuration can include the definition of the desired circuit structure. This definition can be expressed using a hardware description language and translated into a configuration file by generating software, specifying how the physical components contained in the FPGA should be electrically connected. Without configuration, the FPGA typically lacks usable functionality. Attached Figure Description
[0036] The features, characteristics, and advantages of the present invention described above, and the ways and methods of achieving these features, will be more clearly and obviously understood in conjunction with the following description of the embodiments, which are illustrated in more detail with reference to the accompanying drawings, wherein: Figure 1 The control system is shown; Figure 2 A schematic model of an analog circuit is shown; Figure 3 A schematic model of an analog circuit with multiple identical functional blocks is shown; Figure 4 The modeling of a linear time-invariant system is shown; Figure 5 This demonstrates the modeling of multiple identical linear time-invariant systems; and Figure 6A flowchart of the method is shown. Detailed Implementation
[0037] Figure 1 A control system 100 is shown, which includes a digital control device 105 that controls an analog circuit 110. For this purpose, the control device 105 can provide digital control values to the analog circuit 110. The digital control values can also be converted into analog values by means of a digital-to-analog converter (DAC), and then used to control the analog circuit 110. The control device 105 is preferably constructed electronically and may, for example, include a programmable microcomputer, a microcontroller, discrete digital circuitry, or a configurable logic module, such as an FPGA.
[0038] Analog circuit 110 may include any wiring of active and / or passive electronic components. These components may in particular include resistors, capacitors, coils, or semiconductors such as diodes, Zener diodes (Z diodes), or transistors. Analog circuit 110 is used for a predetermined purpose, such as converting DC voltage to AC voltage or emitting or receiving electromagnetic radiation.
[0039] Analog circuit 110 can provide analog values, which can be converted into digital values by means of an ADC, and then used by control device 105 to control analog circuit 110. Thus, control of analog circuit 110 can be achieved with respect to a predetermined control objective.
[0040] For example, to develop or test control device 105, analog circuit 110 should be replaced with simulator 120. Preferably, simulator 120 also includes ADC 115. Simulator 120 should be created based on configurable logic in particular. For this purpose, one or more interconnected logic modules can be provided, which can be designed as an array of computing units by means of configuration data. Here, these computing units are designed and interconnected in such a way that simulator 120 behaves the same as analog circuit 110 with respect to control device 105.
[0041] Figure 2 A schematic model of an exemplary analog circuit 110 is shown. The analog circuit 110 can be divided into interconnected functional blocks. Figure 2 In this circuit 110, a first functional block 205 and a second functional block 210 are formed, each of which exemplarily includes a plurality of electrical or electronic devices. The connections between functional blocks 205 are made through node 215.
[0042] like Figure 2As shown in the lower region, functional blocks 205 and 210 can be modeled independently of each other using first and second computing units 218. The connection between functional blocks can be modeled using a first virtual circuit 220 located in the first functional block 205 and a second virtual circuit 225 located in the second functional block 210. The first virtual circuit 220 includes a voltage source 230 connected in series with an ammeter 235 at the connection between the first functional block 205 and node 215. The second virtual circuit 225 includes a current source 240 connected in parallel with a voltmeter 245 at the connection between the second functional block 210 and node 215. Here, the current source 240 is controlled based on the current determined by the ammeter 235; and the voltage source 230 is controlled based on the voltage determined by the voltmeter 245.
[0043] exist Figure 2 The circuit shown in the lower area can be used to model, mathematically describe, and determine suitable digital logic to represent the functional blocks 205 and 210 of the analog circuit 110. Based on this, a computational unit 218 can be determined for each functional block 205 and 210, which consists of elements of configurable digital logic that simulate the corresponding functional block 205 and 210.
[0044] Figure 3 A schematic model of an analog circuit 110 with multiple identical or very similar second functional blocks 210 is shown. Instead of simulating the second functional blocks 210 one-to-one with computing units 218, these second functional blocks can be modeled as individual functional blocks 210 that sequentially perform different functions. For this purpose, a state memory can be inserted to store the state of the second functional blocks 210 until the second functional block is executed on the computing unit 218. An accumulator 250 can sum all currents for feedback to the first virtual circuit 220. The computing unit 218 can sequentially simulate these second functional blocks 210 and exchange corresponding input and output values with other connected functional blocks or computing units 218.
[0045] Figure 4 The functional component 205 is shown as a linear time-invariant system. Functional component 205 typically receives an input signal u and provides an output signal y. Here, the following relationship exists: Functional component 205 can be modeled as a linear time-invariant system (LZI) in the assigned state space.
[0046] Even complex analog circuits 110 can be modeled as LZI connections. To simulate analog circuit 110, each functional component 205 can be implemented as an LZI using appropriate digital logic. To simulate functional component 205, suitable matrices A, B, C, and D representing the corresponding LZI need to be found.
[0047] To implement functional component 205 as a digital logic configuration, it is advantageous to determine the computation of the output signal y based on the input signal u using values represented in fixed-point rather than floating-point. For this purpose, during the operation of functional component 205, the range boundaries of the input signal y and the outputs of matrices A to D can be determined separately. Then, knowing the range boundaries, the floating-point representation can be replaced with a fixed-point representation. Fixed-point representation allows, for example, significantly faster computation of matrix operations.
[0048] Figure 5 It shows the relationship with Figure 3 Modeling of multiple identical linear time-invariant systems is similar. The LZI modeling of functional component 210 is extended by a state memory 250, which includes a memory capable of holding a predetermined number of state values of the functional component 210 to be simulated. The states of the functional component 210 to be simulated can be retrieved from the memory and fed into the LZI representation. In this way, computational units 218 capable of simulating multiple functional components 210 sequentially can be determined. For adjacent computational units 218, sequential simulation may not be recognized, allowing multiple used computational units 218 in the simulator 120 of the analog circuit 110 to behave as if they were multiple individual computational units 218.
[0049] Figure 6 A flowchart is shown of an exemplary method 600 for providing a simulator 120 for simulating a predetermined analog circuit 110. The method 600 can be performed iteratively to provide a simulator 120 implemented by means of configurable digital logic that behaves identically to the analog circuit 110 with respect to input and output signals.
[0050] In step 605, analog circuit 110 can be created or modified. Here, circuit 110 exists as a description 610 that can be processed by a computer, for example as a Simscape file of the Simulink software from the manufacturer The MathWorks. If other software, such as PLECS, is used, the description 610 can exist in a correspondingly different digital format.
[0051] Optionally, the equivalence of description 610 with circuit 110 can be verified. Furthermore, the stability of the created system can be checked.
[0052] In step 615, the analog circuit 110 can be divided into functional blocks 205 and 210. This step can be performed manually, semi-automatically, or automatically. As a result, a segmentation description 620 can be created. The format of this description 620 can depend on the software used for segmentation. Optionally, the equivalence between the segmentation description 620 and the overall description 610 can be verified. At this time, stability testing of the created system can also be performed.
[0053] In step 625, the model of the digital arithmetic unit can be determined semi-automatically or automatically to create digital functional units that can be executed in the logic module. Here, the modeled functional blocks 205, 210 are initially specified in floating-point representation 630. A state space 635 can be assigned to each functional block 205, 210. The equivalence of the created representation 630 to the segmented description 620 can be verified in corresponding tests.
[0054] Based on the segmented description 620, the signal 640 of function blocks 205 and 210 can be tracing. In step 645, a fixed-point conversion can be performed based on the floating-point representation 630 and the signal 640. To do this, the range boundaries of the signal 640 can be determined first. The result of this conversion is the fixed-point representation 650 of the signal 640. Within the framework of this conversion, the data type 655 of the state space can be determined.
[0055] This can verify the equivalence between fixed-point representation 650 and floating-point representation 630. It can also determine whether the performed conversion from floating-point representation 650 to floating-point representation 630 is accurate enough.
[0056] In step 660, multiple second functional components 210 can be serialized. To do this, identical or sufficiently similar second functional components 210 are identified and replaced with a single functional component 210 having a state memory 250 and a controller for sequentially simulating the individual functional components 210. As a result of this step, a fully digital system 665 can be created, including a description of digital logic that can be used to simulate the analog circuit 110. Optionally, the correctness of the performed conversions is also verified here.
[0057] In step 670, HDL code 675 (HDL: Hardware Description Language) can be generated based on the description of system 665. This code can be used to configure a specific device with configurable data logic.
[0058] Although the present invention has been further illustrated and described in detail by way of embodiments, the present invention is not limited to the disclosed examples, and other variations can be derived by those skilled in the art without departing from the scope of protection of the present invention.
Claims
1. A method (600) for simulating a predetermined analog circuit (110) by means of configurable digital logic, wherein, The method (600) includes the following steps: - Divide the analog circuit (110) into functional blocks (205, 210) (615); - Assign (625) a dedicated state space (635) in the form of voltage and / or current to each functional block (205, 210); - Determine a mathematical description of the electrical behavior of the functional blocks (205, 210) in the corresponding state space (635); - Generate (625) computing units (218), which form digital equivalent circuits of corresponding functional blocks (205, 210) based on the mathematical description; as well as - Determine (660) the description data for configuring the configurable digital logic module such that the configurable digital logic module implements functional blocks (205, 210) interconnected in the manner of the analog circuit (110). The electrical connection between the two functional blocks (205, 210) is modeled using a current-controlled current source (240) and a voltage-controlled voltage source (230) between two corresponding computing units (218). Furthermore, the electrical connection between the first and second functional blocks (205, 210) of the analog circuit (110) is modeled by a current source (240) in the first functional block (205) which is controlled based on the current in the second functional block (210); and by a voltage source (230) in the second functional block (210) which is controlled based on the voltage in the first functional block (205).
2. The method (600) according to any one of the preceding claims, wherein, Determine (645) the range boundary of a signal existing in the calculation unit (218); wherein, determine the fixed-point representation of the signal; and wherein, the calculation unit (218) determines the signal as a fixed-point value.
3. The method (600) according to any one of the preceding claims, wherein, Determine the corresponding functional blocks (210) of the analog circuit (110); wherein, determine (660) a calculation unit (218), the calculation unit being configured to implement the corresponding functional blocks (210) in sequence.
4. The method (600) according to any one of the preceding claims, wherein, The circuit (110) is divided such that the boundary between the two functional blocks (205, 210) passes through a node (215), which carries as few spectral frequency components of the signal as possible when the circuit (110) is in operation.
5. The method (600) according to any one of the preceding claims, wherein, The analog circuit (110) can be controlled digitally, and the digital control input of the circuit (110) is simulated through the digital control input of the configurable digital logic.
6. The method (600) according to any one of the preceding claims, wherein, The configurable digital logic additionally emulates the analog-to-digital converter, which is used to provide analog values of the analog circuit (110) digitally.
7. The method (600) according to any one of the preceding claims, wherein, The description data is converted (670) into configuration data for configuring a predetermined programmable digital logic so as to simulate the analog circuit (110) by means of the programmable digital logic.
8. The method (600) according to claim 7, wherein, Configure the programmable digital logic based on the configuration data.
9. An apparatus for simulating a predetermined analog circuit (110) by means of programmable digital logic, wherein, The device includes the following apparatus: - A first device for dividing the analog circuit (110) into functional blocks (205, 210), wherein each functional block (205, 210) is allocated a dedicated state space (635) in the form of voltage and / or current. - A second device for determining a mathematical description of the electrical behavior of the functional blocks (205, 210) in the corresponding state space (635); - A third device for generating a computing unit (218) that forms digital equivalent circuits of corresponding functional blocks (205, 210) based on the mathematical description; and - A fourth device for determining description data for configuring programmable digital logic such that the programmable digital logic implements functional blocks (205, 210) interconnected in a manner similar to the analog circuit (110). Furthermore, the device is configured to perform the method according to any one of the preceding claims.
10. Configuration data for configuring programmable digital logic to simulate a predetermined analog circuit (110), wherein, The configuration data is created by means of the method (600) according to claim 7.
11. An application-specific integrated circuit (ASIC) comprising digital logic configured based on the configuration data according to claim 10.
12. A programmable digital logic, which is configured by means of the method (600) according to claim 8 to simulate a predetermined analog circuit (110).
13. An FPGA comprising the programmable digital logic of claim 12.