Driving circuit

Abstract

The driving circuit is composed of a low-voltage transistor and comprises a high-voltage driving module and a level conversion module, the level conversion module is used for receiving a low-voltage input signal of a chip logic control unit and converting the low-voltage input signal into a grid control signal needed by the high-voltage driving module, and the high-voltage driving module is used for driving the high-voltage driving module to drive the high-voltage driving module to be connected with the chip logic control unit and converting the low-voltage input signal into a grid control signal needed by the high-voltage driving module. And the output module is used for outputting a high-voltage driving signal for write operation of the memory through an output node according to the grid control signal. According to the driving circuit, the high-voltage driving module is controlled to output the high-voltage driving signal for memory writing through a relatively small low-voltage input signal, and each transistor in the circuit is ensured not to be broken down. Due to the adoption of the design of the low-voltage transistor, the occupied area of a chip is reduced, the transmission rate is improved, and the energy consumption is reduced.

Description

TECHNICAL FIELD

[0001] The present specification relates to the technical field of chip manufacturing, and in particular, to a driving circuit. BACKGROUND

[0002] New non-volatile memories such as resistive random access memory (RRAM), magnetic random access memory (MRAM) and phase-change random access memory (PCRAM) etc. usually need a higher voltage (higher than core logic voltage VDD) for write operation, and a lower voltage (usually VDD or lower) for read operation. In the related art, to generate the high voltage for write operation, a high-voltage transistor is usually used for driving in the array. However, since the size of the high-voltage transistor is usually large, the chip area will be significantly increased, and because the high-voltage transistor has a slow charging and discharging speed, the operation speed will be slower and the energy consumption will be higher, which will affect the performance of the chip.

[0003] Therefore, the present specification provides a driving circuit. SUMMARY

[0004] The present specification provides a driving circuit to at least partially solve the above problems existing in the prior art.

[0005] The present specification adopts the following technical solutions:

[0006] The present specification provides a driving circuit, wherein the transistor in the driving circuit is a low-voltage transistor, the driving circuit comprises a level conversion module and a high-voltage driving module, the high-voltage driving module is formed by stacking a plurality of upper driving transistors and a plurality of lower driving transistors in series, the upper driving is connected to a driving power supply, the lower driving is grounded, and an output node of the driving circuit is located between the upper driving and the lower driving;

[0007] The level conversion module is configured to receive a low-voltage input signal of a chip logic control unit, and convert the low-voltage input signal into a gate control signal required by the high-voltage driving module;

[0008] The high-voltage driving module is configured to output, according to the gate control signal, a high-voltage driving signal for memory write operation through the output node;

[0009] Wherein, the maximum rated voltage of the low-voltage transistor is less than the high-level voltage of the high-voltage driving signal, the high-level voltage of the low-voltage input signal is the maximum rated voltage, and the high-level voltage of the high-voltage driving signal is twice the maximum rated voltage.

[0010] Optionally, the driving circuit further comprises a protection module.

[0011] The protection module is configured to monitor the voltage of the high-voltage driving signal, and prevent the voltage of the high-voltage driving signal from flowing back to the upper drive of the high-voltage driving module when the voltage of the high-voltage driving signal exceeds the maximum rated voltage.

[0012] Optionally, the gate control signal comprises a first gate control signal and a second gate control signal.

[0013] The high-voltage driving module is sequentially stacked by the first upper drive tube and the second upper drive tube of the upper drive, and the second lower drive tube and the first lower drive tube of the lower drive, wherein the first upper drive tube is connected to the first gate control signal, and the first lower drive tube is connected to the second gate control signal.

[0014] Optionally, the first gate control signal is driven by the level conversion module between the maximum rated voltage and twice the maximum rated voltage.

[0015] Optionally, the second gate control signal is driven by the level conversion module between 0 voltage and the maximum rated voltage.

[0016] Optionally, when the low-voltage input signal is at a low level, the level conversion module shifts the low-voltage input signal to the maximum rated voltage, and uses the shifted maximum rated voltage as the first gate control signal, and uses the low-voltage input signal as the second gate control signal.

[0017] Optionally, when the low-voltage input signal is at a high level, the level conversion module shifts the low-voltage input signal to twice the maximum rated voltage, and uses the shifted twice the maximum rated voltage as the first gate control signal, and uses the low-voltage input signal as the second gate control signal.

[0018] Optionally, the gate of the second upper drive tube is connected to a first protection signal, and the voltage difference between the first protection signal and the driving power supply, and the voltage difference between the first protection signal and the ground does not exceed the maximum rated voltage.

[0019] Optionally, the gate of the second lower drive tube is connected to a second protection signal, and the voltage difference between the second protection signal and the driving power supply, and the voltage difference between the second protection signal and the ground does not exceed the maximum rated voltage.

[0020] Optionally, the level conversion module is any one of the following circuit structures:

[0021] analog circuit;

[0022] capacitive coupling circuit;

[0023] Latching circuit

[0024] The above at least one technical solution adopted by the present specification can achieve the following beneficial effects:

[0025] In the driving circuit provided by the present specification, a low-voltage transistor is used, which includes a high-voltage driving module and a level conversion module. The level conversion module is used to receive a low-voltage input signal of a chip logic control unit, and convert the low-voltage input signal into a gate control signal required by the high-voltage driving module. The high-voltage driving module is used to output a high-voltage driving signal for memory write operation through the output node according to the gate control signal. The driving circuit controls the high-voltage driving module to output a high-voltage driving signal for memory write operation through a small low-voltage input signal, and ensures that each transistor in the circuit will not be broken down. Since a low-voltage transistor is used, the chip area is reduced, the transmission rate is improved, and the energy consumption is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0026] The accompanying drawings used to provide further understanding of the present specification, form a part of the present specification, the schematic embodiments of the present specification and the description thereof are used to explain the present specification, and do not constitute an improper limitation on the present specification. In the drawings:

[0027] Figure 1 A structural schematic diagram of a driving circuit provided by the present specification is provided.

[0028] Figure 2 A structural schematic diagram of a driving circuit provided by the present specification is provided.

[0029] Figure 3 A circuit structure diagram of a high-voltage driving module provided by the present specification is provided.

[0030] Figure 4 A level conversion module schematic diagram of an analog circuit structure provided by the present specification is provided.

[0031] Figure 5 A voltage change diagram corresponding to the present specification is provided. Figure 4

[0032] Figure 6 A level conversion module schematic diagram of a capacitive coupling circuit structure provided by the present specification is provided.

[0033] Figure 7 A voltage change diagram corresponding to the present specification is provided. Figure 5

[0034] Figure 8 A level conversion module schematic diagram of a latching circuit structure provided by the present specification is provided.​​

[0035] Figure 9 A voltage change diagram corresponding to the embodiment of the present specification is provided in the following table. Figure 8

[0036] A circuit structure diagram of a driving circuit provided by the embodiment of the present specification is provided in the following table. Figure 10 DETAILED DESCRIPTION

[0037] For the purpose, technical solutions and advantages of the present specification to be clearer, the technical solutions of the present specification will be described clearly and completely in the following combined with the embodiments of the present specification and corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present specification, not all the embodiments. Based on the embodiments in the present specification, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present specification.

[0038] The technical solutions provided by the embodiments of the present specification will be described in detail in the following combined with the drawings.

[0039] Figure 1 A structure schematic diagram of a driving circuit provided by the embodiment of the present specification is provided in the following table. Figure 1 As shown in the table, the driving circuit includes a high-voltage driving module and a level conversion module.

[0040] The high-voltage driving module is stacked in series by a plurality of upper driving transistors and a plurality of lower driving transistors, the upper driving is connected to a driving power supply, the lower driving is grounded, and an output node of the driving circuit is located between the upper driving and the lower driving. When the upper driving works, the voltage of the input power supply can be transmitted to the output node, and the high-voltage driving signal is high level. When the lower driving works, 0 voltage can be transmitted to the output node, and the high-voltage driving signal is low level.

[0041] The level conversion module is used for receiving a low-voltage input signal of a chip logic control unit, and converting the low-voltage input signal into a gate control signal required by the high-voltage driving module. The high-voltage driving module is used for outputting a high-voltage driving signal for memory write operation through the output node according to the gate control signal.

[0042] Wherein, the maximum rated voltage of the low-voltage transistor is less than the high level voltage of the high-voltage driving signal, the high level of the low-voltage input signal of the chip logic control unit is the maximum rated voltage of the low-voltage transistor, and the high level voltage of the high-voltage driving signal is twice the maximum rated voltage.

[0043] ​The gate control signal of the upper-drive transistor needs to reach the drive power supply voltage to ensure the upper drive is turned off, allowing the lower drive to safely output 0 voltage. However, the input signals of the chip logic control unit are usually low-voltage input signals, which cannot reach the high voltage value of the drive power supply. Therefore, a level conversion module is needed to shift and amplify the low-voltage input signal of the chip logic control unit, converting it into the gate control signal required by the high-voltage drive module, ensuring that the upper drive can be completely turned off and turned on.

[0044] For example, in some embodiments, if the driving power supply is 2VDD, the low-voltage input signal of the chip logic control unit is 0 / VDD, which is converted to VDD / 2VDD by the level conversion module.

[0045] The driver circuit provided in this manual controls the high-voltage driver module to output a high-voltage drive signal for memory writing using a small, low-voltage input signal, while ensuring that the transistors in the circuit will not be damaged. Due to the use of a low-voltage transistor design, the chip footprint is reduced, the transmission rate is increased, and power consumption is lowered.

[0046] In some embodiments, the drive circuit further includes a protection module, such as... Figure 2 As shown. This protection module is used to monitor the voltage of the high-voltage drive signal. When the voltage of the high-voltage drive signal exceeds the maximum rated voltage of the low-voltage transistor, it prevents the voltage of the high-voltage drive signal from flowing back into the high-voltage drive module.

[0047] This protection module typically includes transient detection and feedback control. By monitoring critical nodes of the circuit in real time, especially during transient voltage switching at the control output node, it generates a protective voltage in the high-voltage drive module circuit to prevent overvoltage in the transistors and prevent high-voltage backflow into the transistors. The protection module performs its monitoring and protection functions completely autonomously without external intervention, supplementing the level conversion module's functionality, providing additional protection, and ensuring the drive circuit is protected even when there are no control signals or other circuit operations.

[0048] In some embodiments, the protection module can monitor the output node. When the voltage of the output node exceeds the maximum rated voltage of the low-voltage transistor, it indicates that the high-voltage drive signal is high. At this time, the protection module shuts off the current path between the output node and the upper drive through feedback control to prevent high voltage from flowing back into the transistor of the upper drive.

[0049] The following is for reference Figure 3 The high-voltage drive module shown here illustrates the drive circuit of this manual.

[0050] In some embodiments, the gate control signal includes a first gate control signal V. PDRV Second gate control signal V NDRV .

[0051] The high-voltage drive module consists of an upper drive transistor MP1 and an upper drive transistor MP2, and a lower drive transistor MN2 and a lower drive transistor MN1, which are sequentially superimposed. The first upper drive transistor is connected to the first gate control signal V. PDRV The first lower drive transistor is connected to the second gate control signal V. NDRV The upper driver is used to drive the high-level output high-voltage drive signal, and the lower driver is used to drive the low-level output high-voltage drive signal. The lower driver is grounded and can also be called the ground driver.

[0052] In some embodiments, the first upper driving transistor MP1 and the second upper driving transistor MP2 are PMOS transistors, and the second lower driving transistor MN2 and the first lower driving transistor MN1 are NMOS transistors.

[0053] like Figure 3 As shown, the node voltage between the first upper driving transistor MP1 and the second upper driving transistor MP2 is V. OH The node voltage between the second upper driving transistor MP2 and the second lower driving transistor MN2 is V. OUT (Output node voltage), the node voltage between the second lower drive transistor MN2 and the first lower drive transistor MN1 is V. OL The first drive transistor MP1 is connected to the drive power supply V. DRV The first lower drive transistor MN1 is grounded, and the gates of the first upper drive transistor MP1, the second upper drive transistor MP2, the second lower drive transistor MN2, and the first lower drive transistor MN1 are respectively connected to V. PDRV V PPROT V NPROT V NDRV .

[0054] In this embodiment, a first gate control signal and a second gate control signal of the drive module can be output through a level conversion module to control the up drive and down drive respectively. When the high-voltage drive signal is high, the gate control signal can control the up drive to turn on and simultaneously control the down drive to turn off, so that the drive power supply is output along the up drive through the output node. When the high-voltage drive signal is low, the gate control signal can control the up drive to turn off and simultaneously control the down drive to turn on, so that 0 voltage is output along the down drive through the output node.

[0055] In some embodiments, the first gate control signal is driven by a level shifting module between the maximum rated voltage and twice the maximum rated voltage.

[0056] Drive power supply V DRVTaking a low-voltage input signal with a high-level voltage of VDD as an example, the high-level voltage of the high-voltage drive signal is equal to the drive power supply voltage 2VDD. Since the high-level voltage of the high-voltage drive signal is twice the maximum rated voltage, the maximum rated voltage of the low-voltage transistor is VDD. In this embodiment, the first gate control signal is driven between VDD and 2VDD by the level conversion module.

[0057] This ensures that the first upper drive transistor can be safely turned off and turned on, and that its VGS and VGD do not exceed the maximum rated voltage.

[0058] In some embodiments, the second gate control signal is driven by a level conversion module between 0 voltage and the maximum rated voltage.

[0059] Drive power supply V DRV Taking VDD as an example, where the high-level voltage of the low-voltage input signal is VDD, then the high-level voltage of the high-voltage drive signal is equal to the drive power supply voltage 2VDD. Furthermore, since the high-level voltage of the high-voltage drive signal is twice the maximum rated voltage, the maximum rated voltage of the low-voltage transistor is VDD. In this embodiment, the second gate control signal is driven between 0 and VDD by the level conversion module.

[0060] This ensures that the first drive transistor can be safely turned off and turned on, and that its VGS and VGD do not exceed the maximum rated voltage.

[0061] In some embodiments, when the low-voltage input signal is low, the level conversion module shifts the low-voltage input signal to the maximum rated voltage, uses the shifted maximum rated voltage as the first gate control signal, and uses the low-voltage input signal as the second gate control signal, so that the upper drive is turned on and the lower drive is turned off, and the drive circuit outputs the drive power supply voltage along the upper drive.

[0062] For example, if the low-voltage input signal is 0 (logic 0), the level shifting module shifts this low-voltage input signal to VDD, using VDD as the first gate control signal and 0 as the second gate control signal. For the first upper driver transistor MP1, its VGS = VDD - 2VDD = -VDD, and it is turned on. For the first lower driver transistor MN1, its VGS = 0 - 0 = 0, and it is turned off. At this time, the output high-voltage drive signal is 2VDD.

[0063] In some embodiments, when the low-voltage input signal is high, the level conversion module shifts the low-voltage input signal to twice the maximum rated voltage, uses the shifted twice the maximum rated voltage as the first gate control signal, and uses the low-voltage input signal as the second gate control signal, so that the upper drive is turned off and the lower drive is cut off, and the drive circuit outputs 0 voltage along the lower drive.

[0064] For example, if the low-voltage input signal is VDD (logic 1), the level shifting module shifts this low-voltage input signal to 2VDD, using 2VDD as the first gate control signal and VDD as the second gate control signal. For the first upper drive transistor MP1, its VGS = 2VDD - 2VDD = 0, so it is off. For the first lower drive transistor MN1, its VGS = VDD - 0 = VDD, so it is on. At this time, the output high-voltage drive signal is 0.

[0065] In some embodiments, the gate of the second upper driving transistor MP2 is connected to the first protection signal V. PPROT First protection signal V PPROT Located in the drive power supply V RRV The voltage is between 0 and 0. This first protection signal is related to the drive power supply V. RRV The voltage difference between them, and the voltage difference with ground, shall not exceed the maximum rated voltage of the low-voltage transistor. For example, when the drive power supply V RRV When the voltage is 2VDD and the maximum rated voltage of the low-voltage transistor is VDD, the first protection signal V... PPROT It can be a VDD.

[0066] This ensures that regardless of whether the output high-voltage drive signal is high (drive power supply V), RRV Even when the voltage is low (0 voltage), the VGS and VGD of the second upper driving transistor MP2 do not exceed the maximum rated voltage of the low-voltage transistor. Simultaneously, when the output high-voltage drive signal is 0 voltage, the second upper driving transistor prevents the high-voltage drive signal from being transmitted to the first upper driving transistor, thus preventing the high-voltage drive signal from reaching node V. OH Above, restrict V OH The voltage is as low as V. PPROT +V TH (V) TH (This refers to the threshold voltage of the low-voltage transistor).

[0067] In some embodiments, the gate of the second lower driving transistor MN2 is connected to the second protection signal V. NPROT Second protection signal V NPROT Located in the drive power supply V RRV The second protection signal is between 0 and 0 voltage. RRV The voltage difference between them, and the voltage difference with ground, shall not exceed the maximum rated voltage of the low-voltage transistor. For example, when the drive power supply V RRV When the maximum rated voltage of the low-voltage transistor is VDD, the second protection signal V... NPROT It can be a VDD.

[0068] This ensures that regardless of whether the output high-voltage drive signal is high (drive power supply V), RRVEven when the voltage is low (0 voltage), the VGS and VGD of the second driving transistor MN2 do not exceed the maximum rated voltage of the low-voltage transistor. Simultaneously, when the output high-voltage driving signal is the driving power supply V... RRV At that time, the high-voltage drive signal is prevented from being transmitted to the first low-voltage drive transistor by the second low-voltage drive transistor, that is, the high-voltage drive signal is prevented from being transmitted to node V. OL Above, restrict V OL The voltage is as low as V. NPROT -V TH (V) TH (This refers to the threshold voltage of the low-voltage transistor).

[0069] In some embodiments, the level conversion module is any of the following circuit structures: analog circuit, capacitive coupling circuit, or latching circuit.

[0070] Figure 4 This is a schematic diagram of a level conversion module for an analog circuit structure provided in an embodiment of this specification, as shown below. Figure 4 As shown, this level conversion module consists of a switching transistor, a resistor, and a bias current. The level conversion corresponding to this embodiment can be as follows: Figure 5 As shown, a low-voltage signal drives the switching transistor. When the switch is open, Vout decreases to 2*VDD-Ibias*R0; when the switch is closed, Vout is pulled up again to 2*VDD.

[0071] Figure 6 This is a schematic diagram of a level conversion module with a capacitively coupled circuit structure provided in an embodiment of this specification, as shown below. Figure 6 As shown, this level conversion module operates on a principle similar to a charge pump. Here, we take the conversion of a low-voltage input signal to 0 / VDD->VDD / 2VDD as an example.

[0072] The level conversion corresponding to this embodiment can be as follows: Figure 7 As shown. In the first stage, the capacitor is pre-charged with voltage, resulting in a voltage across the capacitor (VDD). During driving, one end of the capacitor is driven; through capacitive coupling, the potential jumps to VDD. The capacitor can be constructed using methods such as Metal-Insulator-Metal (MIM), Metal-Oxide-Metal (MOM), and Metal-Oxide-Semiconductor (MOS). The driving voltage value can be adjusted according to the load.

[0073] Figure 8 This is a schematic diagram of a level conversion module for a latch circuit structure provided in an embodiment of this specification. The level conversion module consists of a latch structure from 2VDD to VDD.

[0074] The level conversion corresponding to this embodiment can be as follows: Figure 9 As shown. A low-voltage input signal can drive the transistor to pull down the two latched points OUT and OUTb.

[0075] In some embodiments, the driving circuit of this specification may further include a low-voltage driving module for driving a low-voltage driving signal output for read operations.

[0076] The driving circuit in this embodiment uses a low-voltage transistor design and includes both a high-voltage driving module and a low-voltage driving module. Therefore, it can drive both read and write operations. Furthermore, it is controlled by the low-voltage input signal of the chip logic control unit, which reduces the chip's footprint, increases the transmission rate, and reduces power consumption.

[0077] Figure 10 A circuit diagram of a driving circuit provided in the embodiments of this specification is shown below. Figure 10 As shown, M1-M5 are analog circuit level conversion modules, V BP B VN To simulate the BIAS signal, M2-M3 are clamping circuits, M8-M13 are protection modules used to protect the low-voltage input signal drive, M6-M7 are the upper drive section in the high-voltage drive module used to drive and generate the high-voltage drive signal for write operations, M11-M12 are low-voltage drive modules used to drive and generate the low-voltage drive signal for write operations, and M14-M18 are ground drives used to drive and generate 0 voltage.

[0078] like Figure 10 As shown, the chip operates through PU_2VDD (pulled to 2*VDD), PU_VDD (pulled to VDD), PD (pulled to ground), and SEL / SELb (startup driver). If SEL=0 (SELb=1), the driver does not start, V OUT Constant pull to ground; if SEL=1, VOUT can be driven to 2VDD through PU_2VDD; if SEL=1, VOUT can be driven to VDD through PU_VDD; if SEL=1, VOUT can be driven to ground through PD.

[0079] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0080] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0081] The above description is merely an embodiment of this specification and is not intended to limit this specification. Various modifications and variations can be made to this specification by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification should be included within the scope of the claims of this specification.

Claims

1. A driving circuit, characterized in that, The transistors in the driving circuit are low-voltage transistors. The driving circuit includes a level conversion module and a high-voltage driving module. The high-voltage driving module is composed of multiple upper driving transistors and multiple lower driving transistors stacked in series. The upper driving is connected to the driving power supply, and the lower driving is grounded. The output node of the driving circuit is located between the upper driving and the lower driving. The level conversion module is used to receive low-voltage input signals from the chip logic control unit and convert the low-voltage input signals into gate control signals required by the high-voltage drive module. The high-voltage drive module is used to output a high-voltage drive signal for memory write operations via the output node according to the gate control signal; Wherein, the maximum rated voltage of the low-voltage transistor is less than the high-level voltage of the high-voltage drive signal, the high-level voltage of the low-voltage input signal is the maximum rated voltage, and the high-level voltage of the high-voltage drive signal is twice the maximum rated voltage.

2. The driving circuit as described in claim 1, characterized in that, The drive circuit also includes a protection module; The protection module is used to monitor the voltage of the high-voltage drive signal, and when the voltage of the high-voltage drive signal exceeds the maximum rated voltage, it prevents the voltage of the high-voltage drive signal from flowing back into the upper drive of the high-voltage drive module.

3. The driving circuit as described in claim 1, characterized in that, The gate control signal includes a first gate control signal and a second gate control signal; The high-voltage drive module consists of a first upper drive transistor and a second upper drive transistor for upper drive, and a second lower drive transistor and a first lower drive transistor for lower drive, which are sequentially superimposed. The first upper drive transistor is connected to the first gate control signal, and the first lower drive transistor is connected to the second gate control signal.

4. The driving circuit as described in claim 3, characterized in that, The first gate control signal is driven by the level conversion module between the maximum rated voltage and twice the maximum rated voltage.

5. The driving circuit as described in claim 4, characterized in that, The second gate control signal is driven by the level conversion module between 0 voltage and the maximum rated voltage.

6. The driving circuit as described in claim 5, characterized in that, When the low-voltage input signal is low, the level conversion module shifts the low-voltage input signal to the maximum rated voltage, uses the shifted maximum rated voltage as the first gate control signal, and uses the low-voltage input signal as the second gate control signal.

7. The driving circuit as described in claim 5, characterized in that, When the low-voltage input signal is high, the level conversion module shifts the low-voltage input signal to twice the maximum rated voltage, uses the shifted twice the maximum rated voltage as the first gate control signal, and uses the low-voltage input signal as the second gate control signal.

8. The driving circuit as described in claim 3, characterized in that, The gate of the second upper driving transistor is connected to a first protection signal, and the voltage difference between the first protection signal and the driving power supply, and the voltage difference between the first protection signal and ground, do not exceed the maximum rated voltage.

9. The driving circuit as described in claim 3, characterized in that, The gate of the second lower driving transistor is connected to a second protection signal. The voltage difference between the second protection signal and the driving power supply, and the voltage difference between the second protection signal and ground, do not exceed the maximum rated voltage.

10. The driving circuit as described in claim 1, characterized in that, The level conversion module can be any of the following circuit structures: Analog circuits; Capacitive coupling circuit; Latch circuit.

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