Method and device for suppressing direct current component of parallel inverters under three-phase unbalanced grid connection

Abstract

The application discloses a DC component suppression method and device for three-phase unbalanced grid-connected parallel inverters, and relates to the technical field of three-phase parallel grid-connected inverters. The method comprises the following steps: sampling and filtering the inductance current, and performing Clark coordinate transformation; compensating the zero sequence current through a PR compensator without a proportional coefficient Kp; performing inverse Clark transformation and harmonic injection to generate an initial modulation wave; extracting the DC component of the current, performing sum and difference calculation through a sum and difference calculation unit, and then performing PI compensation; and superimposing the compensation signal to the initial modulation wave to generate a PWM signal. The device comprises a three-phase four-bridge-arm inverter module, a filter / grid-connected inductance group, a filter capacitance group and a DC component suppression module, and solves the problems of excessive DC component, inter-module circulating current and suppression failure during harmonic injection in the prior art when the three-phase unbalanced grid is connected. The application is suitable for three-phase unbalanced conditions, has no circulating current risk, and the DC component meets the grid connection requirements, so that stable and continuous operation of the system can be realized.

Description

Technical Field

[0001] This invention relates to the field of three-phase inverter parallel grid connection technology, specifically to a method and apparatus for suppressing DC component of inverters connected in parallel under three-phase unbalanced grid connection. Background Technology

[0002] In distributed generation systems (such as photovoltaic and energy storage power stations), multiple inverters are often connected in parallel to supply power to the grid in order to meet the grid's demand for power supply capacity. Among them, the three-phase four-arm inverter has become the mainstream topology in three-phase unbalanced grid connection scenarios because it has the ability to adapt to "inconsistent three-phase load power" and "three-phase grid voltage imbalance".

[0003] However, a core technical problem exists when inverters operate in parallel: the AC current output by each inverter module is easily mixed with a "DC component" (i.e., a unidirectional constant component in the AC current, which is a current impurity not allowed by the power grid). This DC component causes two major problems:

[0004] Inter-module circulating current risk: Due to differences in DC components, "internal circulating current" may form between inverter modules (i.e., current does not flow to the grid, but only flows back and forth between parallel modules), which may cause the modules to overheat and overload, triggering the protection mechanism and shutting down, thus affecting the continuous operation of the system.

[0005] Poor grid connection waveform quality: When the DC component is mixed into the grid connection current, it will cause the grid connection current waveform to be distorted. The total harmonic distortion (THD) exceeds the grid access standard and cannot meet the grid connection requirements.

[0006] Existing technological solutions to the above problems have significant drawbacks, making it difficult to balance practicality and stability:

[0007] For example, the patent application with application number CN202411434461.X, entitled "Method, System and Electronic Equipment for DC Circulating Current Suppression in Parallel Operation of Inverters," uses a "PR compensator with proportional coefficient Kp" to handle zero-sequence current, while only performing "summation control" on the DC component. However, this scheme is easily affected by current sampling errors and inconsistencies in control parameters between modules, which can easily lead to new circulating currents. Furthermore, under three-phase unbalanced operating conditions, the DC component suppression effect decreases significantly, and there is still a risk of shutdown.

[0008] Another reference document, application number CN202210995639.2, entitled "Inverter Parallel System and Its Zero-Sequence Current Control Method", only processes the DC component in the zero-sequence loop and does not cover the DC components of all phases, resulting in the DC components of each phase exceeding the standard. Moreover, when "harmonic injection type 3DSVPWM" is used, the DC suppression signal will be canceled by harmonics, and eventually lose the DC suppression effect, and the waveform quality still cannot meet the standard.

[0009] In summary, existing technologies cannot simultaneously achieve the goals of "no circulating current, DC component compliance, and qualified waveform quality" in three-phase unbalanced grid connection scenarios, and a more adaptable and stable solution is urgently needed. Summary of the Invention

[0010] The purpose of this invention is to provide a DC component suppression device and method for inverters connected in parallel under three-phase unbalanced grid connection, which solves the problems of "DC component causing circulating current shutdown when three-phase unbalanced", "excessive waveform distortion", and "suppression failure when harmonic injection" in the prior art, and realizes the stable operation of the inverter parallel system under unbalanced operating conditions.

[0011] The technical solution of this invention is based on "a method as the core and a device as the carrier", as detailed below:

[0012] The method for suppressing the DC component of inverters connected in parallel under three-phase unbalanced grid connection includes the following steps:

[0013] S1: Sample the current of the filter inductor group of each three-phase four-arm inverter module to obtain the sampled current of each filter inductor;

[0014] S2: Perform Clark coordinate transformation on the sampled current to obtain the α-axis current, β-axis current and zero-sequence current;

[0015] S3: The zero-sequence current is compensated by a "PR compensator without proportional coefficient Kp", and the compensation resonant frequency covers 50Hz, 150Hz and 250Hz to obtain the compensated zero-sequence current.

[0016] S4: Perform inverse Clark coordinate transformation on the α-axis current, β-axis current and the compensated zero-sequence current to obtain the transformed current signal; perform harmonic injection processing on the transformed current signal to generate the initial modulation wave signal;

[0017] S5: The DC component is extracted from each sampled current by the DC component extraction unit, and the sum and difference calculation unit performs summation and difference calculation on the DC components of the corresponding filter inductors of each module to obtain the DC component sum signal (total external DC) and the DC component difference signal (DC difference between modules).

[0018] S6: Perform PI compensation on the DC component and the signal and difference signal respectively to obtain the sum compensation signal and the difference compensation signal;

[0019] S7: Superimpose the sum compensation signal and the difference compensation signal onto the initial modulation wave signal to generate the target modulation wave signal; generate a PWM signal based on the target modulation wave signal and output it to the switching transistors of each bridge arm unit.

[0020] DC component suppression device for inverters connected in parallel under three-phase unbalanced grid connection: used to implement the above method, including:

[0021] At least two three-phase four-arm inverter modules, with DC bus capacitors connected in parallel on the DC side and AC inductors connected in parallel through a filter inductor group;

[0022] Grid-connected inductors connect the paralleled AC side to the three-phase power grid;

[0023] The filter capacitor bank is connected in parallel between the grid-connected inductor bank and the three-phase power grid;

[0024] The DC component suppression module includes a DC component extraction unit, a sum and difference calculation unit, and a PI compensation unit. Its input is connected to the current sampling terminal of the filter inductor group, and its output is connected to the PWM signal generation unit.

[0025] The present invention has the following beneficial effects:

[0026] 1. Adaptable to three-phase unbalanced scenarios: Based on a three-phase four-arm topology, it can handle conditions such as uneven load phase distribution and grid voltage imbalance without the need for additional topology adjustments;

[0027] 2. No circulating current risk: The zero-sequence current adopts a "PR compensator without Kp", which only compensates for the key AC frequency and does not process the DC component, thus avoiding circulating current caused by control errors between modules;

[0028] 3. Balance between DC suppression and waveform quality: By combining "summation compensation (controlling the total external DC) + difference compensation (controlling the DC difference between modules)," both external DC pollution and internal circulating current are eliminated; and the compensation signal is superimposed on the modulated wave to avoid suppression failure caused by harmonic injection.

[0029] 4. Stable operation: It can operate continuously in three-phase unbalanced grid connection scenarios without the risk of overload shutdown, meeting the long-term grid access requirements. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the hardware circuit connection of the device of the present invention;

[0031] Figure 2 This is a schematic diagram of the current loop control process of the method of the present invention;

[0032] Figure 3 This is a detailed schematic diagram of the DC component suppression module of the present invention.

[0033] In the diagram: 1. Three-phase four-bridge inverter module; 2. DC bus capacitor; 3. Filter inductor group; 4. Grid-connected inductor group; 5. Filter capacitor group; 6. Three-phase power grid; 7. PWM signal generation unit; 8. DC component suppression module; 9. DC component extraction unit; 10. Sum and difference calculation unit; 11. PI compensation unit. Detailed Implementation

[0034] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0035] like Figures 1 to 3 As shown, the specific embodiments of the DC component suppression method and device for inverters connected in parallel under three-phase unbalanced grid connection according to the present invention are as follows:

[0036] Device structure (corresponding) Figure 1 The details are as follows:

[0037] The device in this embodiment includes two three-phase four-arm inverter modules 1: module A and module B, with the following specific structure:

[0038] DC side structure: The DC sides of module A and module B are connected in parallel, and a DC bus capacitor 2: C_Bus is connected in parallel; the function of DC bus capacitor 2, i.e., C_Bus, is to suppress DC side voltage fluctuations and ensure DC voltage stability.

[0039] Bridge arm unit structure: Each module contains 4 bridge arm units (corresponding to three-phase + zero-sequence channels). Each bridge arm unit consists of 1 upper switch, 1 lower switch, and anti-parallel diodes (such as Q1A-Q8A and corresponding diodes in module A). The switch is used to receive PWM signals to control the on and off states, and the anti-parallel diodes are used to prevent current backflow.

[0040] AC side and filtering structure: The AC output of each module is connected to a set of filter inductors 3 (L1A-L4A for module A, L1B-L4B for module B). Each set of filter inductors 3 contains 4 filter inductors. One end of each filter inductor is connected to the midpoint of the corresponding bridge arm unit, and the other end serves as the AC output. The AC sides of modules A and B are connected in parallel through the filter inductors 3 and then connected to a set of grid-connected inductors 4 (L1-L3, corresponding to three phases). The output of the grid-connected inductors 4 is connected to the three-phase power grid 6 (GridA-GridC), and a set of filter capacitors 5 (C1-C3, corresponding to three phases) is connected in parallel between the grid-connected inductors 4 and the power grid. One end of each filter capacitor in the filter capacitors 5 is connected to the output of the grid-connected inductors 4, and the other end is connected to the system reference ground (the reference ground connection is not shown in the simplified schematic diagram). Its function is to filter out high-frequency harmonics in the grid-connected current.

[0041] DC component suppression module 8: The input terminal of this module is connected to the current sampling terminal of the filter inductor group 3 of module A and module B respectively (used to collect the current of L1A-L4A and L1B-L4B), and the output terminal is connected to the PWM signal generation unit 7 of the two modules to output the sum compensation signal and the difference compensation signal.

[0042] DC component suppression module 8 (corresponding) Figure 3 The specific structure includes:

[0043] DC component extraction unit 9: The input terminal is connected to the current sampling signal of the filter inductor group 3. The internal low-pass filter, sliding filter or averaging algorithm is used to output the DC component corresponding to each sampled current.

[0044] The sum and difference calculation unit 10 contains two sets of operation modules. One set is a "+" operation module (the input is the DC component of the filter inductors corresponding to modules A and B, and the output is the DC component sum signal), and the other set is a "-" operation module (the input is the same as above, and the output is the DC component difference signal).

[0045] PI compensation unit 11: contains two independent PI compensators, which respectively receive the sum signal and difference signal output by the sum and difference calculation unit 10, and output the sum compensation signal and difference compensation signal through proportional-integral operation; the compensation signal is finally superimposed on the initial modulation wave signal to achieve dual suppression of DC component and circulating current.

[0046] Suppression methods (corresponding) Figure 2 The specific steps are as follows:

[0047] Step S1: Current sampling: The current sampling element collects the filter inductor current (I_L1A-I_L4A) of module A and the filter inductor current (I_L1B-I_L4B) of module B to obtain the sampling current of each filter inductor.

[0048] Step S2: Clark coordinate transformation: Input the sampled current collected in step S1 into the Clark coordinate transformation module to convert it into α-axis current (reflecting the related current component of phase A), β-axis current (reflecting the related current component of phase B) and zero-sequence current (reflecting the zero-sequence component when the three phases are unbalanced).

[0049] Step S3: Zero-sequence PR compensation: The zero-sequence current obtained in step S2 is compensated using a "PR compensator without proportional coefficient Kp". The resonant frequency of the PR compensator is set to 50Hz, 150Hz, and 250Hz (covering the fundamental frequency and major low-order harmonics of the power grid). This compensator only compensates for the AC component in the zero-sequence current and does not process the DC component to avoid triggering circulating current between modules.

[0050] Step S4: Inverse Clark Transformation and Harmonic Injection: Input the α-axis current, β-axis current from step S2 and the zero-sequence current after compensation in step S3 into the inverse Clark coordinate transformation module to convert them into transformed current signals corresponding to the original currents; perform "harmonic injection type 3DSVPWM" processing (i.e., harmonic injection processing) on ​​the transformed current signals to generate the initial modulation wave signal;

[0051] Step S5: DC component sum and difference calculation: Extract the DC component from the sampled current in step S1 using the DC component extraction unit 9 (which employs low-pass filtering, sliding filtering, or averaging); input the DC components of the corresponding filter inductors of module A and module B into the sum and difference calculation unit 10; obtain the DC component sum signal (e.g., I_L1A_DC+I_L1B_DC) through the "+" operation module, and obtain the DC component difference signal (e.g., I_L1A_DC-I_L1B_DC) through the "-" operation module.

[0052] Step S6: PI Compensation: Input the DC component sum signal and difference signal obtained in step S5 into two PI compensation units 11 respectively, and perform proportional-integral compensation to obtain the sum compensation signal (SumOut_IDC) and the difference compensation signal (DiffOut_IDC).

[0053] Step S7: PWM signal generation: The sum compensation signal and difference compensation signal from step S6 are superimposed on the initial modulation wave signal from step S4 to generate the target modulation wave signal; the target modulation wave signal is input into the PWM signal generation unit 7 to generate the PWM control signal, which is output to the switching transistors of each bridge arm unit of module A and module B to control the switching transistors to achieve DC component suppression and non-circulating current operation.

[0054] All components mentioned in this article are general standard parts or components known to those skilled in the art. Their structures and principles can be learned by those skilled in the art through technical manuals or conventional experimental methods, so they will not be described in detail here.

[0055] While the specific embodiments of the present invention have been described in detail above, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention, and modifications or variations without creative effort are still within the protection scope of the present invention.

Claims

1. A method for suppressing the DC component of inverters connected in parallel under three-phase unbalanced grid connection, characterized in that, Includes the following steps: S1: Sample the current of the filter inductor group of each three-phase four-arm inverter module to obtain the sampled current of each filter inductor; S2: Perform Clark coordinate transformation on the sampled current to obtain the α-axis current, β-axis current and zero-sequence current; S3: The zero-sequence current is compensated using a PR compensator without a proportional coefficient Kp to obtain the compensated zero-sequence current; S4: Perform inverse Clark coordinate transformation on the α-axis current, β-axis current and the compensated zero-sequence current to obtain the transformed current signal, and perform harmonic injection processing on the transformed current signal to generate an initial modulation wave signal. S5: Extract the DC component from each of the sampled currents through the DC component extraction unit, and perform summation and difference calculation on the DC components of the filter inductors of the same phase in each of the three-phase four-arm inverter modules through the sum and difference calculation unit to obtain the corresponding DC component sum signal and DC component difference signal. S6: Perform PI compensation on the DC component sum signal and the DC component difference signal respectively to obtain the sum compensation signal and the difference compensation signal; S7: The sum compensation signal and the difference compensation signal are superimposed on the initial modulation wave signal to generate the target modulation wave signal. Based on the target modulation wave signal, a PWM signal is generated and output to the switching transistors of each bridge arm unit.

2. The method for suppressing the DC component of inverters connected in parallel under three-phase unbalanced grid connection as described in claim 1, characterized in that: The resonant frequencies of the PR compensator without proportional coefficient Kp in step S3 are 50Hz, 150Hz, and 250Hz.

3. The method for suppressing DC component of inverters connected in parallel under three-phase unbalanced grid connection as described in claim 1, characterized in that: In step S4, the harmonic injection process is a harmonic injection type 3DSVPWM process.

4. The method for suppressing the DC component of inverters connected in parallel under three-phase unbalanced grid connection as described in claim 1, characterized in that: In step S5, the DC component extraction unit uses one of low-pass filtering, sliding filtering, or averaging to extract the DC component from the sampled current.

5. A DC component suppression device for inverters connected in parallel under three-phase unbalanced grid connection, used to implement the method described in any one of claims 1-4, characterized in that: include: At least two three-phase four-arm inverter modules, the DC side of each three-phase four-arm inverter module is connected in parallel with each other, and a DC bus capacitor is connected in parallel to the DC side of each three-phase four-arm inverter module. Each of the three-phase four-arm inverter modules includes four sets of arm units, each set of arm units includes an upper switch and a lower switch connected in series, and each switch has a diode connected in antiparallel across its two ends; Each of the three-phase four-arm inverter modules has an AC output terminal connected to a filter inductor group, and the AC sides of each of the three-phase four-arm inverter modules are connected in parallel through the filter inductor group. The parallel AC side is connected to a grid-connected inductor group, the output terminal of which is connected to the three-phase power grid, and a filter capacitor group is connected in parallel between the grid-connected inductor group and the three-phase power grid. A DC component suppression module, wherein the input terminal of the DC component suppression module is connected to the current sampling terminal of each of the filter inductor groups, and the output terminal is connected to the PWM signal generation unit of each of the three-phase four-bridge arm inverter modules.

6. The DC component suppression device for inverters connected in parallel under three-phase unbalanced grid connection as described in claim 5, characterized in that: The filter inductor group includes four filter inductors corresponding to the three-phase four-arm bridge. One end of each filter inductor is connected to the midpoint of the corresponding bridge arm unit, and the other end serves as the output terminal of the AC side.

7. The DC component suppression device for inverters connected in parallel under three-phase unbalanced grid connection according to claim 5, characterized in that: The grid-connected inductor group includes three grid-connected inductors corresponding to the three phases. One end of each grid-connected inductor is connected to the AC side after parallel connection, and the other end is connected to the corresponding phase of the three-phase power grid.

8. The DC component suppression device for inverters connected in parallel under three-phase unbalanced grid connection according to claim 5, characterized in that: The DC component suppression module includes: A DC component extraction unit is used to extract the DC component from the current of each of the filter inductors; The sum and difference calculation unit is used to perform summation and difference calculations on the DC components of the filter inductors corresponding to each of the three-phase four-arm inverter modules. The PI compensation unit is used to perform PI compensation on the summation and difference results and output the compensation signal to the PWM signal generation unit.

9. The DC component suppression device for inverters connected in parallel under three-phase unbalanced grid connection according to claim 5, characterized in that: The filter capacitor bank includes three filter capacitors corresponding to the three phases. One end of each filter capacitor is connected to the output terminal of the grid-connected inductor bank, and the other end is grounded.

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