Active unloading type modular multilevel converter with direct current fault blocking capability
By introducing short-link controlled energy dissipation channels and distributed unloading strategies into the modular multilevel converter, the problem of insufficient self-blocking capability under DC faults is solved, enabling rapid fault current clearing and orderly energy release, thereby improving the reliability and economy of the system.
Patent Information
- Application Number
- CN202511844414.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-09
- Publication Date
- 2026-02-17
AI Technical Summary
Existing modular multilevel converters lack self-blocking capability under DC fault conditions, have long centralized unloading links with slow response, are difficult to coordinate distributed unloading, and are highly dependent on external DC circuit breakers, making it difficult to meet the requirements of rapid response and economy.
Design an active unloading modular multilevel converter with DC fault interruption capability. By introducing short-link controlled energy dissipation channels on the bridge arm and valve side, and adopting four-stage timing control (bypass-blocking-current interruption-cooperative energy dissipation), a distributed unloading strategy is used, including a first unit, a second unit and a third unit, which are used for the rapid release of residual energy of submodule capacitors, bridge arm inductor energy and stray inductor energy, respectively.
It achieves rapid zeroing of fault current and on-site orderly release of energy stored in bridge arms/submodules, shortens the response path, reduces device stress, improves system reliability and economy, avoids the risk of overload and device damage caused by energy concentration, and maintains system efficiency.
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Figure CN121546934A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of flexible DC transmission technology, and relates to a modular multilevel converter, and more particularly to an active unloading type modular multilevel converter with DC fault interruption capability. Background Technology
[0002] Modular multilevel converters (MMCs), with their excellent scalability and superior output waveform quality, have become the mainstream topology for high-capacity, high-voltage flexible DC transmission systems. In early engineering applications, half-bridge submodules were widely used due to their fewer components, lower losses, and simpler control. However, when severe faults such as pole-to-pole short circuits or single-pole grounding occur on the DC side, the half-bridge submodules lack self-blocking capability because the diodes provide a passive path. The fault current rises rapidly and impacts the power devices, seriously threatening the safe and stable operation of the converter valves and the system. To suppress DC fault currents and release accumulated energy within the system, existing technologies typically rely on external DC circuit breakers or centralized DC unloading devices. However, these methods suffer from slow response times, high system costs, and complex control coordination, making it difficult to meet the high reliability and rapid response requirements of flexible DC transmission.
[0003] Existing research has also proposed various improvement schemes to enhance the MMC's ability to handle DC faults. For example, introducing full / half-bridge hybrid, clamping branches, bypass channels, or active grounding structures at the submodule level, or using distributed energy dissipation methods to shorten the energy release path. For example, Chinese patent CN112636311A discloses a multi-port current-limiting circuit breaker and fault clearing method based on the voltage clamping principle. It uses thyristors as the main switching devices, actively boosts voltage through the voltage clamping branch, and uses the thyristor's semi-controlled nature to cut off the fault. The voltage clamping branch and the fault point form an LC oscillation circuit to turn off the branch thyristor. Subsequently, the near-end converter station charges the voltage clamping branch, thus completing the reclosing. It has the advantages of low conduction loss, good economy, and fast reclosing.
[0004] Existing solutions have improved fault-blocking performance to some extent, but they are generally accompanied by problems such as increased number of devices, increased conduction losses, large bridge arm space occupation, and increased control complexity. At the same time, energy sharing and switching coordination between distributed unloading units are difficult, while centralized unloading has problems such as excessively long links and delayed response. Grid-side DC circuit breaker solutions are difficult to apply on a large scale due to high cost and limited operating time.
[0005] In summary, the existing technology lacks an integrated topology that can achieve rapid current interruption and orderly energy unloading on the source side of the converter. This structure should shorten the fault response path, reduce device stress, and take into account both economy and engineering applicability while ensuring system efficiency. Summary of the Invention
[0006] The purpose of this invention is to overcome the shortcomings of the existing technology and provide an active energy-dissipation (AED-MMC) modular multilevel converter with DC fault interruption capability. It has a fast interruption speed and solves the problems of half-bridge MMC lacking self-blocking under DC fault conditions, having a long and slow centralized unloading link, difficulty in distributed unloading coordination, and high dependence on external DC circuit breakers.
[0007] The objective of this invention can be achieved through the following technical solutions: An active unloading modular multilevel converter with DC fault interruption capability includes bridge arms, each bridge arm comprising multiple half-bridge sub-modules, and further comprising a first unit, a second unit, a DC switch, and a third unit. The first unit is connected in parallel with the half-bridge sub-modules, the second unit is connected in parallel between the upper and lower bridge arms of the same phase, and the third unit is connected to the DC side via the DC switch. The first unit is used for near-end dissipation of residual energy in the sub-module capacitors, the second unit is used for releasing the inductance energy of the bridge arm, and the third unit is used for clearing stray inductance energy. The converter adopts a staged control process of "bypass-blocking-current interruption-coordinated energy dissipation" to achieve distributed capacitor unloading. The component parameters and trigger timing of the first, second, and third units are grouped and tuned based on the target residual voltage ratio, allowable inrush current, and expected decay time. This includes: establishing a converter model and obtaining initial component parameters based on the target residual voltage ratio, allowable inrush current, and expected decay time; setting the trigger timing and performing dynamic iterative simulation based on the current component parameters and the established converter model; determining whether the target residual voltage ratio, allowable inrush current, and expected decay time meet the corresponding index values based on the simulation results; and determining the final component parameters and trigger timing when the simulation results simultaneously meet all three indexes.
[0008] Furthermore, the first unit includes a connected thyristor. and energy-consuming resistor .
[0009] Furthermore, the second unit includes a connected thyristor. and energy-consuming resistor .
[0010] Furthermore, the energy-consuming resistor The resistance value is determined based on the decay time of the excess energy of the bridge arm inductor, the residual excess energy of the bridge arm inductor, and the bridge arm inductance.
[0011] Furthermore, the energy-consuming resistor The resistance value satisfies the following constraints: in: The decay time of the surplus energy of the bridge arm inductor; The ratio of surplus energy remaining in the bridge arm inductor; , For bridge arm inductance.
[0012] Furthermore, the third unit includes a diode D and a power-dissipating resistor connected in series. .
[0013] Furthermore, the energy-consuming resistor The resistance value is determined based on the fault current decay time, the fault current residual ratio, and the stray inductance of the line from the third unit to the fault point.
[0014] Furthermore, the energy-consuming resistor The resistance value satisfies the following constraints: in: This refers to the fault current decay time. The residual fault current ratio; , This refers to the stray inductance of the line from the third unit to the fault point.
[0015] Furthermore, when a DC fault is detected and the valve-side protection is triggered, after all half-bridge submodules have completed the interlocking, the DC switch is disconnected, and the first unit, the second unit, and the third unit are turned on in sequence.
[0016] Furthermore, after the first unit is turned on, it enters the loop establishment stage and the RC exponential decay stage.
[0017] Compared with the prior art, the present invention has the following beneficial effects: 1. While maintaining the high efficiency of the half-bridge main circuit, this invention introduces short-link controlled energy dissipation channels in the sub-modules and valve side, and adopts a phased handling strategy to achieve rapid zeroing of fault current and orderly release of energy stored in the bridge arm / sub-module on-site. This shortens the response path, reduces device stress, and takes into account both system economy and engineering feasibility, significantly reducing the dependence on external DC circuit breakers.
[0018] 2. This invention proposes a four-stage timing control (bypass-blocking-current interruption-coordinated energy dissipation) and a distributed unloading strategy, significantly improving the efficiency of fault current clearing and system reliability. In the coordinated energy dissipation stage, energy is released simultaneously through three parallel unloading paths (AUB, ETB, FCTB), ensuring a balanced distribution of fault energy across multiple paths and avoiding overload and device damage risks caused by excessive energy concentration. The AUB (first unit) rapidly releases residual energy in the submodule capacitors via an RC circuit, preventing prolonged charging of capacitors during faults and thus reducing the risk of capacitor breakdown and damage, protecting system equipment, and ensuring rapid response in the event of a fault. The distributed unloading strategy of this invention not only enables parallel operation of multiple branches but also employs more refined timing control and flexible energy management, ensuring that the capacitors of each submodule can release energy quickly and evenly, avoiding the risks of overvoltage, breakdown, and damage caused by prolonged capacitor charging. This makes the system's energy release process more efficient and precise, greatly improving system reliability.
[0019] 3. This invention achieves fault handling capability without introducing almost no additional steady-state interruption loss, and the system efficiency remains at the half-bridge level.
[0020] 4. The selection and quantity of components in this invention are within an acceptable range for engineering applications, which is beneficial for valve-side integration and thermal management.
[0021] 5. The present invention sets the component parameters and triggering timing of each unit in groups according to the target residual voltage ratio, allowable inrush current and expected decay time, and determines the optimal parameters and triggering timing based on the correlation between each unit, which can ensure that the current interruption and unloading are completed in the millisecond range.
[0022] 6. The resistance value of the energy-consuming resistor in the second unit of the present invention is determined based on the decay time of the surplus energy of the bridge arm inductor, the residual surplus energy of the bridge arm inductor, and the bridge arm inductance. The resistance value of the energy-consuming resistor in the third unit is determined based on the decay time of the fault current, the residual ratio of the fault current, and the stray inductance of the line from the third unit to the fault point. This can take into account the energy dissipation speed, suppress the current surge, and the thermal rating, and quickly complete the current decay.
[0023] 7. The present invention has a clear timing sequence and low control coupling, which helps to improve the safety, reliability and economy of the converter valve under conditions such as pole-to-pole short circuit and single-pole grounding. Attached Figure Description
[0024] Figure 1 This is a schematic diagram of the topology of the modular multilevel converter AED-MMC of the present invention; Figure 2 This is a schematic diagram of the AED-MMC current loop during the bypass stage of the present invention; Figure 3This is a schematic diagram of the AED-MMC current loop during the lockout phase of this invention; Figure 4 This is a schematic diagram of the fault blocking process of the present invention; Figures 5-13 This is a schematic diagram of the simulation results of the present invention, wherein: Figure 5 The curve shows the direct current. Figure 6 This is a DC voltage curve; Figure 7 DC-side power curve; Figure 8 The current curve for the first unit; Figure 9 This is the current curve for the second unit; Figure 10 The current curve for the third unit; Figure 11 The capacitor voltage curve of the upper bridge arm submodule of phase A; Figure 12 The current curve of the upper bridge arm; Figure 13 This is the active power curve on the AC side. Detailed Implementation
[0025] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. These embodiments are based on the technical solution of the present invention and provide detailed implementation methods and specific operating procedures. However, the scope of protection of the present invention is not limited to the following embodiments.
[0026] Example 1 This embodiment provides an active unloading modular multilevel converter with DC fault interruption capability, such as... Figure 1 As shown, based on the traditional half-bridge submodule, a first unit is added (connected in parallel to the submodule capacitor, and controlled by a thyristor). With energy-consuming resistor Composition), the second unit (connected in parallel between the upper and lower bridge arms of the same phase, composed of thyristors) and energy-consuming resistor Composed of controlled energy dissipation of the bridge arm inductor, DC switch, and third unit (the third unit consists of diode D and energy dissipation resistor). It consists of components that introduce fault current into the energy-consuming circuit through unidirectional conductive elements.
[0027] When a DC fault is detected and the valve-side protection is triggered, the control strategy is implemented in the sequence of "bypass - lockout - current interruption - coordinated energy dissipation": first, the faulty phase submodule is bypassed to cut off the continued discharge of the submodule capacitor to the fault point, and then the submodule is locked to prevent the device from being impacted again; after the submodule is locked, the DC switch is disconnected to cut off the main channel return current, and at the same time, the first unit, the second unit and the third unit are turned on, so that the submodule capacitor voltage, the bridge arm inductor energy storage and the fault channel current decay exponentially along their respective short links and return to zero.
[0028] 1. Bypass Phase The fault occurred at Afterwards, the system in After a delay in detection, the fault is identified, and a bypass command is immediately triggered, causing all submodules to enter bypass mode and cutting off the discharge path of the submodule capacitors to the fault point. At this time, the fault current mainly flows along the AC power supply-fault point loop, providing the necessary turn-off boundary conditions for subsequent blocking. The main function of the bypass phase is to quickly suppress capacitor discharge, reduce the initial peak current, and protect subsequent circuits.
[0029] 2. Lockout Phase exist Within the window, the fault current continues to develop. When it reaches the set overcurrent protection threshold, the controller issues a valve-side lockout command, shutting down all bridge arm submodules, eliminating the passive path formed by the anti-parallel diodes, and protecting the IGBTs to operate within the SOA. During the execution window, any DC-side disconnection or unloading channel activation is prohibited to avoid backflow and instability caused by "current interruption without lockout". After lockout is completed, a stable shut-off boundary is formed on the valve side, and the process proceeds to the next stage.
[0030] 3. Flow interruption stage After the interlock confirmation is completed, the controller issues a UFD disconnect command to electrically isolate the converter from the fault path, cutting off the external power supply path for the current. At this time, the controller ensures that the fault current will not flow back to the converter, thereby avoiding secondary impact on the devices. The key to the current disconnection action is to ensure the stability of the circuit and prevent equipment overload while the fault current is isolated.
[0031] 4. Collaborative Energy Consumption Stage Once the UFD is switched on and confirmed, the controller issues a parallel switching command, and the three energy unloading channels start simultaneously, each undertaking a different energy release task: 1) The AUB (first unit) is connected in parallel with the submodule to form an RC circuit, which is responsible for the near-end dissipation of residual energy in the submodule capacitor; 2) The ETB (second unit) is connected between the upper and lower bridge arms of the same phase to form an LR circuit, which is responsible for releasing the inductance energy of the bridge arm; 3) The FCTB (third unit) is connected to the DC side to form a local LR loop, which is responsible for clearing stray inductive energy in the fault channel / line.
[0032] The three circuits start simultaneously and operate independently without crosstalk, ensuring distributed energy unloading and rapid energy clearance. The current in each circuit decays according to its own characteristics, and the current decay process is controlled by RC and LR models respectively. In this way, the energy of the capacitor, the inductance of the bridge arm, and the stray inductance of the line can decay synchronously within a given time, avoiding overheating or imbalance caused by concentrated energy release.
[0033] The resistance, inductance, and trigger timing of each unit are grouped and tuned according to the target residual voltage ratio, allowable inrush current, and expected decay time to ensure that current interruption and unloading are completed in the millisecond range. Under normal operating conditions, each unit is in the off or low-voltage-drop closed state and does not participate in power transmission, thereby maintaining a steady-state loss level and efficiency index comparable to that of the half-bridge main circuit.
[0034] Compared with traditional centralized unloading, the above-mentioned distributed unloading: The distributed unloading design ensures rapid and safe release of capacitor energy, preventing overvoltage due to overcharging and effectively avoiding capacitor breakdown and damage. Through parallel unloading, the energy release process of each branch is relatively independent, ensuring uniform release of fault energy and avoiding overvoltage problems caused by capacitor overcharging, thereby improving system safety and reliability.
[0035] Centralized unloading typically relies on a single energy absorption path, which can easily lead to energy concentration, resulting in overload and device overheating, thus affecting system stability.
[0036] By employing a distributed unloading design, each path operates independently, ensuring uniform energy distribution and avoiding the overload and equipment damage risks associated with centralized unloading. This significantly improves the system's robustness and stability. Distributed unloading and parallel control enhance system robustness, especially in the face of high-power faults. The system can quickly and evenly release fault energy, ensuring load balancing across branches and protecting components. Because each branch operates independently and energy release is parallel, the system can respond immediately to faults, avoiding equipment damage and system instability caused by overload in traditional methods.
[0037] Specifically, the group tuning of the component parameters and trigger timing of the first, second, and third units based on the target residual voltage ratio, allowable inrush current, and expected decay time refers to systematically adjusting the passive parameters and active control of each unit to simultaneously meet the three core indicators of the target residual voltage ratio, allowable inrush current, and expected decay time. In this embodiment, the tuning process is an iterative cycle of modeling → simulation → optimization → verification, including: establishing a converter model; obtaining initial component parameters based on the indicator values of the target residual voltage ratio, allowable inrush current, and expected decay time; setting the trigger timing; performing dynamic iterative simulation based on the current component parameters and the established converter model; judging whether the target residual voltage ratio, allowable inrush current, and expected decay time meet the corresponding indicator values based on the simulation results; fine-tuning the component parameters and trigger timing; and determining the final component parameters and trigger timing when the simulation results simultaneously meet all three indicators.
[0038] The tuning of component parameters and trigger timing can also be determined using optimization algorithms. The objective function of the optimization algorithm can be set as follows: Minimize[(U residual / U target -1) ^2 +(I peak / I allow -1) ^2 +(T decay / T target -1) ^2 ] In the formula, U residual For the actual residual pressure, U target For the target residual pressure, I peak I represents the actual peak inrush current. allow To allow for inrush current, T decay T is the actual decay time. target The desired decay time.
[0039] Understandably, the aforementioned modular multilevel converter can be integrated and deployed without changing the main wiring and control framework of the converter station, and is suitable for high-voltage, large-capacity flexible DC projects and multi-scenario operation conditions including wind power and other source-grid-load systems.
[0040] like Figure 1 As shown, the MMC phase unit consists of upper and lower bridge arms and a DC bus, with a single arm cascaded with a half-bridge submodule and connected in series with the bridge arm inductor. (See diagram) , These are the equivalent resistance and inductance on the AC side, respectively. For bridge arm inductance, , For three-phase AC voltage and current, for Phase current, for The current in the upper and lower bridge arms.
[0041] In this embodiment, a first unit (active unloading unit, AUB) is connected in parallel across the capacitor of the submodule, a second unit (energy transfer unit, ETB) is connected in parallel between the upper and lower bridge arms in the same phase, a DC switch (DC-side fast mechanical switch, UFD) is connected in series in the DC channel, and a third unit (fault current transfer unit, FCTB) is set on the DC side.
[0042] When the system is operating normally, AUB, ETB, and FCTB are in the off state, UFD is closed and its voltage drop is negligible, and the main circuit modulation and circulating current control are consistent with those of a conventional half-bridge MMC. Ignoring the voltage drop of the bridge arm inductors, we have... (1) (2) (3) (4) in, i c This refers to the circulating current component between the bridge arms of the MMC converter station.
[0043] Assume the MMC AC output port voltage is (5) M Modulation factor ( M ∈[0, 1]); ω 0 represents the output angular frequency; φ Let be the phase angle difference. Substituting (3) into (4), and ignoring the voltage across the bridge arm inductor, the voltages of the upper and lower bridge arms can be expressed as follows: (6) (7) when When a bipolar short-circuit fault occurs on the DC side, the control is organized using time stamps and windowed constraints as follows: The time when the fault occurred; after After the detection criteria are confirmed, proceed to... (Bypass completed); fault current in Internal development to the overcurrent threshold, at Actuate valve-side interlock; interlock execution process Completed, then proceed. Disconnecting the UFD achieves DC-side isolation, and turning on the AUB, ETB, and CTB to enter the coordinated energy dissipation phase until the residual voltage / current meets the exit criteria. The fault blocking and submodule unloading process is as follows: (1) In At any moment, a bipolar short-circuit fault occurs on the DC side, causing a sudden drop in the system's equivalent impedance. The submodule capacitors and AC power supply form a discharge branch that converges at the fault point, with the current direction as follows: Figure 2 As shown.
[0044] (2) After a fault is detected, After the detection and decision-making delay, All bridge arm submodules are constantly bypassed to prevent the submodule capacitors from discharging to the fault point and to prevent fault current from damaging the IGBT.
[0045] (3) Due to the inherent delay in the bypass operation of the submodule, in Inside, the submodule capacitors and AC power supply continue to discharge to the fault point, and the fault current continues to increase.
[0046] (4) Fault current in When the current reaches the overcurrent protection threshold, all sub-modules are locked to prevent the IGBT from being damaged.
[0047] (5) After The locking delay, in At this moment, all submodules are locked, and the electrical connection between the submodule capacitors and the main circuit is completely severed. At this point, the fast mechanical switch UFD is disconnected, breaking the DC circuit to prevent fault current backflow. Then, AUB, ETB, and FCTB are turned on, and the fault current attenuation circuit is activated as follows: Figure 3 As shown.
[0048] (6) After The energy decays exponentially, with the submodule capacitor voltage, the surplus energy of the bridge arm inductor, and the short-circuit inrush current all decreasing to 0.
[0049] (7) to At that moment, the total current decays to 0, at which point the fault is cleared.
[0050] Fault interruption unloading process as follows Figure 4 As shown.
[0051] After the submodule is locked out, the short-circuit inrush current is: (8) in: The time when the locking is completed. The start time of submodule bypass. The peak value of the phase voltage. The angular frequency of the power supply. The damping coefficient is... The oscillation angular frequency, It is the equivalent first-order RL constant. This is the equivalent capacitance voltage at the instant the fault occurs. This represents the initial value of the DC current at the instant the fault occurs. The phase branch impedance amplitude, It is a three-phase phase. The phase current lead / lag angle.
[0052] (1) Unit 1 After the submodule completes latching and UFD is disconnected, AUB is turned on, considering the loop equivalent parasitic inductance. The initial stage of AUB (Automatic Circuit Breaker) operation is the "loop establishment" phase, followed by the exponential decay phase of RC (Regulator-Resistant Current). The mathematical model for AUB current is: (9) in: This refers to the AUB conduction time. The time for the AUB current to reach its peak value; The rising segment time constant, , For loop stray loss; C is the decay time constant; C is the submodule capacitance; To accommodate instantaneous current, it is typically very small, close to 0; This represents the peak current of AUB. For the asymptotic current during the rising phase, the AUB cell is considered as an RL-order cell during this stage. Because this stage is extremely short and the capacitor voltage hardly drops, it is approximated in AUB as follows: , Apply the instantaneous capacitor voltage to AUB.
[0053] The energy of the submodule capacitor is dissipated through the energy-consuming resistor. It is converted into heat energy dissipation, as shown in equation (10): (10) in: For unloading time; For the target residual pressure ratio, this embodiment uses 5%. The allowable percentage threshold (usually 0.1).
[0054] (2) Unit 2 ETB channels the surplus energy of the bridge arm inductor through a resistor. Controlled dissipation. Considering the two stages of conduction establishment and controlled decay, the current of ETB exhibits a two-stage first-order characteristic of "first rising and then decaying". The ETB current is a two-stage first-order solution as shown in equation (11): (11) in: This refers to the actual moment when ETB is deployed; This is the moment when the ETB current reaches its peak. For the RL time parameter of ETB, , ; Initial value of instantaneous current applied to ETB; For the rising / decreasing current; This is the peak ETB current.
[0055] To balance energy dissipation rate, suppress current surge, and thermal rating. For The parameter selection is subject to the following constraints: (12) in: The decay time of the surplus energy of the bridge arm inductor; The residual energy ratio of the bridge arm inductor is 5% in this embodiment.
[0056] (3) Unit 3 FCTB via diode and resistor When the fault current is introduced into the energy-consuming resistor, the reverse clamp is not fully established in the initial stage, so the current exhibits a two-stage first-order characteristic of "first rising and then decaying". Its current is shown in equation (13): (13) in: This refers to the actual deployment time of FCTB; This is the moment when the FCTB current reaches its peak. For the RL time parameters of FCTB, , For the stray inductance of the line from FCTB to the fault point, , The stray resistance of the line from FCTB to the fault point; Initialize the instantaneous current for FCTB; For the rising / decreasing current; This is the peak current of FCTB.
[0057] To quickly complete the attenuation of fault current, The parameter selection is subject to the following constraints: (14) in: This refers to the fault current decay time. The residual fault current ratio is 5% in this embodiment.
[0058] This embodiment was verified using the built PSCAD / EMTDP simulation platform, and the detailed simulation parameters are shown in Table 1.
[0059] Table 1 The simulation results of this embodiment are as follows: Figures 5-13 As shown.
[0060] exist A permanent bipolar fault occurred in the system. Following the fault, the DC fault current rose rapidly, reaching approximately 5.43 kA at about 0.1 ms after the fault, triggering the valve-side handling process. The current continued to rise, surging to approximately 6.0 kA around 0.33 ms after the fault, and maintained an upward trend until the valve group was locked out, reaching a peak of approximately 6.58 kA when the valve-side locking was completed (approximately 0.7 ms after the fault). The bipolar short circuit caused the DC voltage and DC-side active power to rapidly drop to 0 within 0.1 ms after the fault.
[0061] During the coordinated energy dissipation phase, the transients of the three short-link branches conform to the equivalent dynamics dominated by first-order attenuation. The unloading current of AUB reaches its maximum value of 9.26kA 0.09ms after conduction, the arm energy transfer current of ETB reaches its maximum value of 2.29kA 0.1ms after conduction, and the fault current transfer current of FCTB reaches its maximum value of 6.08kA 0.1ms after conduction. Finally, the current decays to 0 73.71ms, 14.5ms, and 5.32ms after the fault occurs, respectively. The total current decays to 0 73.71ms after the fault occurs.
[0062] To examine the controllability of internal variables, the time-domain responses of the A-phase upper arm submodule capacitor voltage, arm current, and AC-side active power are presented. The results show that after the UFD is disconnected at approximately 1.0007 s (several hundred microseconds after the fault time), the arm current rapidly decays to zero; at approximately 1.07371 s, the AUB current decays to zero, and the submodule capacitor voltage subsequently drops to near zero; the AC-side active power rapidly decreases to zero and remains stable after the valve group is locked, without any circulating current amplification or power oscillation.
[0063] Simulation results show that the AED-MMC achieves controllable isolation of DC faults under the timing sequence of "detection-blocking-current interruption-coordinated energy dissipation": the peak fault current is controlled and the clearing time is in the millisecond range; the energy release of the submodule capacitors and bridge arm inductors is completed along the short link, avoiding the long link and response lag problem of centralized unloading; under normal operating conditions, each controlled unit does not participate in power transmission and the UFD voltage drop is negligible, the steady-state on-state / switching loss is maintained at the half-bridge level, and no efficiency degradation caused by adding units is observed.
[0064] Example 2 This embodiment provides a control method for an active unloading modular multilevel converter with DC fault blocking capability. Based on the structure of the modular multilevel converter in Embodiment 1, under normal operation, the DC switch is closed, and the first unit, the second unit, and the third unit are in the off or low-voltage-drop closed state. When a DC fault is detected and the valve-side protection is triggered, the DC switch is disconnected, and the first unit, the second unit, and the third unit are turned on in sequence.
[0065] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.
Claims
1. An active unloading modular multilevel converter with DC fault interruption capability, comprising bridge arms, each bridge arm comprising multiple half-bridge sub-modules, characterized in that, It also includes a first unit, a second unit, a DC switch, and a third unit. The first unit is connected in parallel with the half-bridge submodule, the second unit is connected in parallel between the upper and lower bridge arms of the same phase, and the third unit is connected to the DC side through the DC switch. The first unit is used for near-end dissipation of residual energy of the submodule capacitor, the second unit is used for releasing the energy of the bridge arm inductor, and the third unit is used for clearing stray inductor energy. The converter adopts a staged control process of "bypass-blocking-current interruption-coordinated energy dissipation" to realize distributed capacitor unloading. The component parameters and trigger timing of the first, second, and third units are grouped and tuned based on the target residual voltage ratio, allowable inrush current, and expected decay time. This includes: establishing a converter model and obtaining initial component parameters based on the target residual voltage ratio, allowable inrush current, and expected decay time; setting the trigger timing and performing dynamic iterative simulation based on the current component parameters and the established converter model; determining whether the target residual voltage ratio, allowable inrush current, and expected decay time meet the corresponding index values based on the simulation results; and determining the final component parameters and trigger timing when the simulation results simultaneously meet all three indexes.
2. The active unloading modular multilevel converter with DC fault interruption capability according to claim 1, characterized in that, The first unit includes connected thyristors and energy-consuming resistor .
3. The active unloading modular multilevel converter with DC fault interruption capability according to claim 1, characterized in that, The second unit includes connected thyristors. and energy-consuming resistor .
4. The active unloading modular multilevel converter with DC fault interruption capability according to claim 3, characterized in that, The energy-consuming resistor The resistance value is determined based on the decay time of the excess energy of the bridge arm inductor, the residual excess energy of the bridge arm inductor, and the bridge arm inductance.
5. The active unloading modular multilevel converter with DC fault interruption capability according to claim 4, characterized in that, The energy-consuming resistor The resistance value satisfies the following constraints: in: The decay time of the surplus energy of the bridge arm inductor; The ratio of surplus energy remaining in the bridge arm inductor; , For bridge arm inductance.
6. The active unloading modular multilevel converter with DC fault interruption capability according to claim 1, characterized in that, The third unit includes a diode D and a power-dissipating resistor connected in series. .
7. The active unloading modular multilevel converter with DC fault interruption capability according to claim 6, characterized in that, The energy-consuming resistor The resistance value is determined based on the fault current decay time, the fault current residual ratio, and the stray inductance of the line from the third unit to the fault point.
8. The active unloading modular multilevel converter with DC fault interruption capability according to claim 7, characterized in that, The energy-consuming resistor The resistance value satisfies the following constraints: in: This refers to the fault current decay time. The residual fault current ratio; , This refers to the stray inductance of the line from the third unit to the fault point.
9. The active unloading modular multilevel converter with DC fault interruption capability according to claim 1, characterized in that, When a DC fault is detected and the valve-side protection is triggered, all half-bridge submodules are locked out, the DC switch is disconnected, and the first unit, the second unit, and the third unit are turned on in sequence.
10. The active unloading modular multilevel converter with DC fault interruption capability according to claim 1, characterized in that, After the first unit is turned on, it enters the loop establishment stage and the RC exponential decay stage.
Citation Information
Patent Citations
Multi-port current-limiting circuit breaker based on voltage clamping principle, and fault removal method
CN112636311A