Modular multilevel converter sub-module working condition simulation test method and system

Abstract

The invention discloses a modular multi-level converter sub-module working condition simulation test method and a modular multi-level converter sub-module working condition simulation test system. The method comprises the following steps: establishing a mathematical model for describing the relation between current and voltage based on a submodule circuit structure and a working principle so as to obtain a continuous time model; discretizing the continuous time model to obtain a discrete state space model for MPC prediction and control optimization; designing a cost function; and in each control period, the system behavior is predicted again based on the current sampling state in combination with the discrete state space model and the cost function, and the optimal control input is calculated to adjust the on-off state so as to realize the dynamic control of the sub-module. By implementing the method provided by the invention, not only can the real switching behavior under NLC modulation be accurately simulated, but also the control system is simplified, and the requirements of the controller are reduced, so that the efficiency is improved and the system complexity is reduced while the test accuracy is ensured.

Description

Technical Field

[0001] This invention relates, and more specifically, to a method and system for simulating the operating conditions of a modular multilevel converter submodule. Background Technology

[0002] Modular Multilevel Converters (MMCs), as advanced power electronic devices, are widely used in fields such as flexible DC transmission, distributed power grid connection, and high-voltage DC transmission. They consist of a series of series-connected sub-modules, the performance and reliability of which are crucial to the stability of the entire system. To ensure system safety and reliability, sub-modules are typically subjected to operational condition simulation tests before being put into use. However, due to the complex structure and diverse operating conditions of MMCs, traditional testing methods often suffer from high costs, low efficiency, and insufficient testing flexibility, failing to meet the demands of modern engineering for efficient and accurate testing.

[0003] Previously, testing primarily relied on building a complete MMC system and evaluating submodule performance through actual operation. While this method offered high realism, its high cost and massive setup workload limited its application. Subsequently, simplified solutions, such as using current sources to control load current, emerged for basic testing. However, these methods proved inadequate when faced with complex modulation schemes, especially the frequent switching sequence changes caused by near-level approximation modulation. Furthermore, while single-submodule testing based on hysteresis control could reproduce certain load current waveforms, the controller design was complex and lacked scalability, making it unsuitable for multi-submodule testing scenarios.

[0004] To overcome these challenges, researchers have proposed improved test circuit structures, such as introducing auxiliary bridge arms and optimizing current control strategies to achieve more realistic simulations of submodule current, capacitor voltage, and switching timing, while reducing the power requirements of the DC power supply. Other studies suggest using cascaded test circuit structures to accommodate different types of operating condition simulations. Although these methods improve test accuracy, improvements are still needed in terms of control complexity and test efficiency, especially when dealing with large-scale systems where balancing accuracy, efficiency, and practicality is difficult. With the advancement of MPC (Model Predictive Control) technology, its forward-looking optimization capabilities and good dynamic response characteristics make it key to solving this problem. Nevertheless, research on applying MPC to MMC submodule operating condition simulation testing remains limited.

[0005] Therefore, it is necessary to design a new method that can not only accurately simulate the real switching behavior under NLC modulation, but also simplify the control system and reduce the controller requirements, thereby improving efficiency and reducing system complexity while ensuring test accuracy. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method and system for simulating the operating conditions of modular multilevel converter submodules.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: a modular multilevel converter submodule operating condition simulation test method, comprising: Based on the sub-module circuit structure and working principle, a mathematical model describing the relationship between current and voltage is established to obtain a continuous-time model. The continuous-time model is discretized to obtain a discrete state-space model for MPC prediction and control optimization. Design the cost function; Within each control cycle, the system behavior is re-predicted based on the current sampled state, the discrete state-space model, and the cost function, and the optimal control input is calculated to adjust the switch state, thereby realizing the dynamic control of the submodule.

[0008] The further technical solution is as follows: the sub-module circuit structure includes a test unit for the sub-module under test, a current generator module, and a controller unit. The test unit for the sub-module under test is connected to the current generator module. The controller unit is connected to both the test unit for the sub-module under test and the current generator module.

[0009] The further technical solution is as follows: the test unit of the sub-module under test includes an MMC sub-module circuit structure; the current generator module includes a full-bridge circuit, which generates a controllable bridge arm circuit to simulate current fluctuations under actual operating conditions; the controller unit is used to predict and control the behavior of the sub-module in real time using an MPC strategy, and output the optimal duty cycle to accurately adjust the working state of the sub-module.

[0010] Its further technical solution is as follows: Based on the sub-module circuit structure and working principle, a mathematical model describing the relationship between current and voltage is established to obtain a continuous-time model, including: Based on the submodule circuit structure and working principle, Kirchhoff's voltage law is applied to establish the differential equation between current and voltage, and the relationship between current and voltage of inductance, resistance, bridge arm current and capacitor voltage in the submodule circuit structure. Define the relationship between the output voltage and duty cycle of the H-bridge, and construct a new equation based on the differential equation to adjust the state of the four switches of the H-bridge through PWM control input; Based on the dynamic change law of capacitance, a differential equation for the change of capacitor voltage over time is established to correlate the current of the submodule with the capacitor voltage. By integrating the new equation with the differential equation, and assuming that the state variables are the bridge arm current and the capacitor voltage, a continuous-time state equation is formed to obtain a continuous-time model.

[0011] A further technical solution is as follows: discretizing the continuous-time model to obtain a discrete state-space model for MPC prediction and control optimization includes: The continuous-time model is discretized, and the forward Euler method is applied to transform the continuous-time state equation into a difference equation, resulting in a discrete-time state-space model.

[0012] The further technical solution is as follows: the cost function includes error weighted sum, input weighted sum and terminal error.

[0013] The further technical solution is as follows: Within each control cycle, based on the current sampled state and the discrete state-space model and cost function, the system behavior is re-predicted, and the optimal control input is calculated to adjust the switching state, thereby achieving high-performance dynamic control, including: The system receives reference capacitor voltage, bridge arm current, and switching function as inputs, and collects the current capacitor voltage and bridge arm current in real time for feedback. Through a rolling optimization process, it uses the MPC algorithm to calculate the optimal control signal that satisfies the discrete state space model and cost function. The calculated optimal control signal is applied to the system to adjust the switching state in real time, thereby achieving efficient dynamic control of the submodule structure.

[0014] This invention also provides a modular multilevel converter submodule operating condition simulation test system, including: The data model building unit is used to build a mathematical model describing the relationship between current and voltage based on the circuit structure and working principle of the sub-module, so as to obtain a continuous-time model. Discretization unit, used to discretize the continuous-time model to obtain a discrete state-space model for MPC prediction and control optimization; Design unit, used to design cost function; The prediction and adjustment unit is used to re-predict the system behavior based on the current sampled state, combined with the discrete state space model and cost function in each control cycle, and calculate the optimal control input to adjust the switch state, thereby achieving high-performance dynamic control.

[0015] The further technical solution is as follows: the data model establishment unit includes: The differential equation subunit is used to establish the differential equation between current and voltage based on Kirchhoff's voltage law, and the relationship between inductance, resistance, bridge arm current and capacitor voltage in the submodule circuit structure, based on the submodule circuit structure and working principle. The new equation constructs a sub-unit to define the relationship between the output voltage and duty cycle of the H-bridge, and constructs a new equation based on the differential equation to adjust the state of the four switches of the H-bridge through PWM control input; The equation establishes a sub-unit, which is used to establish a differential equation for the change of capacitor voltage over time based on the dynamic change law of capacitor, and to correlate the current of the sub-module with the capacitor voltage. An integration subunit is used to integrate the new equation with the differential equation, assuming the state variables are the bridge arm current and the capacitor voltage, to form a continuous-time state equation and obtain a continuous-time model.

[0016] The further technical solution is as follows: the discretization unit is used to discretize the continuous-time model and apply the forward Euler method to transform the continuous-time state equation into a difference equation to obtain a discrete-time state-space model.

[0017] The advantages of this invention compared to existing technologies are as follows: This invention establishes a continuous-time mathematical model based on the sub-module circuit structure and working principle, which is then discretized into a discrete state-space model suitable for MPC prediction and control optimization. Combined with a carefully designed cost function, it accurately predicts system behavior and calculates the optimal control input to adjust the switching state within each control cycle based on the current sampled state. This method not only accurately simulates real switching behavior under NLC modulation but also avoids complex calculations such as virtual impedance in traditional methods by directly utilizing the state-space model for prediction and control, thus simplifying the control system structure and reducing the performance requirements of the controller. In this way, while ensuring test accuracy, it improves dynamic response speed and efficiency, reduces the overall system complexity, and is particularly suitable for sub-module testing applications in large-scale modular multilevel converter systems.

[0018] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a flowchart illustrating the modular multilevel converter submodule operating condition simulation test method provided in an embodiment of the present invention; Figure 2 A schematic diagram of the MMC three-phase topology provided in an embodiment of the present invention; Figure 3 This is a simulation circuit diagram of the MMC submodule provided in an embodiment of the present invention; Figure 4 The simulation diagram of the analog system circuit provided in the embodiment of the present invention; Figure 5 This is a comparison chart of load current and reference value under normal operating conditions provided in an embodiment of the present invention; Figure 6 This is a diagram showing the error between the load current and the reference value under normal operating conditions, provided in an embodiment of the present invention. Figure 7 This is a comparison chart of the submodule capacitor voltage and reference value under normal operating conditions provided in an embodiment of the present invention. Figure 8 This is a diagram showing the error between the submodule capacitor voltage and the reference value under normal operating conditions, provided in an embodiment of the present invention. Figure 9 This is a comparison chart of load current and reference value under power step disturbance conditions provided in an embodiment of the present invention; Figure 10 This is a diagram showing the error between the load current and the reference value under power step disturbance conditions provided in an embodiment of the present invention. Figure 11 This is a comparison chart of the submodule capacitor voltage and reference value under power step disturbance conditions provided in an embodiment of the present invention. Figure 12 This is a diagram showing the error between the submodule capacitor voltage and the reference value under power step disturbance conditions provided in an embodiment of the present invention. Figure 13 This is a comparison chart of load current and reference value under DC voltage sudden disturbance conditions provided in an embodiment of the present invention; Figure 14 This is a diagram showing the error between the load current and the reference value under DC voltage sudden disturbance conditions provided in an embodiment of the present invention. Figure 15 This is a comparison chart of the submodule capacitor voltage and reference value under DC voltage sudden disturbance conditions provided in an embodiment of the present invention; Figure 16 This is a diagram showing the error between the submodule capacitor voltage and the reference value under DC voltage sudden disturbance conditions provided in an embodiment of the present invention. Figure 17 This is a schematic block diagram of a modular multilevel converter submodule operating condition simulation test system provided in an embodiment of the present invention; Figure 18 A schematic block diagram of a computer device provided for an embodiment of the present invention. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0023] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0024] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0025] Please see Figure 1 , Figure 1 This is a schematic flowchart illustrating the modular multilevel converter submodule operating condition simulation test method provided in this embodiment of the invention. A continuous-time model describing the current-voltage relationship is established based on the submodule's circuit structure and operating principle. This model is then discretized to obtain a discrete state-space model suitable for MPC prediction and control optimization. A cost function, including error weighting, input weighting, and terminal error, is designed. Within each control cycle, the current sampled state, combined with the discrete state-space model and the cost function, is used to re-predict system behavior and calculate the optimal control input to adjust the switching state through a rolling optimization process, achieving high-performance dynamic control of the submodule. This method not only accurately simulates real switching behavior under NLC modulation but also simplifies the control system structure and reduces controller performance requirements. This improves efficiency while ensuring test accuracy, reduces system complexity, and makes the entire test method more concise and efficient, while ensuring the system's real-time response capability and stability.

[0026] Figure 1 This is a flowchart illustrating the modular multilevel converter submodule operating condition simulation test method provided in this embodiment of the invention. Figure 1 As shown, the method includes the following steps S110 to S140.

[0027] S110. Based on the sub-module circuit structure and working principle, establish a mathematical model describing the relationship between current and voltage to obtain a continuous-time model.

[0028] In this embodiment, the continuous-time model refers to a mathematical model that accurately reflects the dynamic relationship between current and voltage within a submodule by establishing a differential equation describing the relationship between current and voltage based on the submodule circuit structure and working principle and by applying Kirchhoff's voltage law. This model provides a foundation for subsequent discretization processing and the application of model predictive control (MPC) strategies.

[0029] Specifically, the sub-module circuit structure includes a test unit for the sub-module under test, a current generator module, and a controller unit. The test unit for the sub-module under test is connected to the current generator module. The controller unit is connected to both the test unit for the sub-module under test and the current generator module.

[0030] The test unit for the submodule under test includes an MMC submodule circuit structure; the current generator module includes a full-bridge circuit, which generates a controllable bridge arm circuit to simulate current fluctuations under actual operating conditions and ensure the authenticity of the test environment; the controller unit is used to predict and control the behavior of the submodule in real time using an MPC strategy, and output the optimal duty cycle to precisely adjust the working state of the submodule.

[0031] Specifically, the test unit for the submodule under test (DUT) is defined as follows: the test unit, the current generator module, and the controller unit. The DUT test unit contains a typical MMC submodule circuit structure, including capacitors and switching devices. The current generator module generates a controllable bridge arm circuit through a full-bridge circuit to simulate current fluctuations under actual operating conditions, ensuring the realism of the test environment. The controller unit employs an MPC strategy to predict and control the submodule behavior in real time, outputting the optimal duty cycle to precisely adjust the submodule's operating state.

[0032] Establish a mathematical model: Based on the circuit structure and working principle described above, apply Kirchhoff's voltage law (KVL) to establish a differential equation describing the relationship between current and voltage.

[0033] Capacitor dynamic variation law: Considering the variation law of capacitor voltage with time, differential equations for the current and capacitor voltage of the associated submodule were established. By integrating these equations, assuming the state variables are the bridge arm current and capacitor voltage, a continuous-time state equation is formed.

[0034] Continuous-time model: The final continuous-time model accurately describes the current and voltage relationship in the submodule, taking into account the influence of factors such as inductance, resistance, bridge arm current, and capacitor voltage. This model lays the foundation for subsequent discretization processing, enabling rolling optimization within each control cycle and calculating the optimal control signal that satisfies a specific cost function using the MPC algorithm, thus achieving efficient dynamic control of the submodule.

[0035] In summary, the continuous-time model established through the above steps not only accurately reflects the dynamic relationship between current and voltage within the MMC submodule, but also provides a solid foundation for subsequent discretization processing and the application of MPC control strategies, thereby achieving high-precision simulation and control of the submodule's operating conditions. This method effectively simplifies control system design, reduces costs, and improves testing efficiency and adaptability.

[0036] In this embodiment, please refer to Figure 2 The test unit for the submodule under test contains a typical MMC submodule circuit structure to simulate the electrical characteristics of a single MMC submodule. This unit includes, but is not limited to: Submodule capacitors: store and release energy to maintain voltage stability.

[0037] Switching devices, such as IGBTs or MOSFETs, are used to control the direction and magnitude of current, thereby regulating voltage levels.

[0038] The current generator module provides controllable bridge arm currents to the submodule under test (DUT), simulating its operating environment in a real MMC system. It mainly consists of a full-bridge circuit that, when powered on, generates specific modes of bridge arm current to mimic current fluctuations under different operating conditions. This allows the DUT to be tested under near-realistic operating conditions.

[0039] The controller unit implements the MPC control strategy, enabling it to predict the behavior of submodules in real time and output the optimal duty cycle, thereby precisely controlling the operating state of the submodules. The main functions of the controller unit include: Real-time prediction and optimization: Calculate the optimal control input based on the current state and expected goals.

[0040] Feedback control: Adjust the control strategy based on real-time collected data to ensure the stability and accuracy of the system.

[0041] like Figure 2 The figure shows a typical three-phase MMC system topology, where each phase consists of an upper arm and a lower arm, with several submodules (SMs) connected in series within each arm. The specific structure of the submodules is shown in the upper right corner of the figure. To suppress current fluctuations, an inductor (Larm) is also connected in series in each phase arm.

[0042] Figure 3 This demonstrates a simplified circuit structure for testing submodule performance. The current generator on the left consists of a full-bridge circuit that generates controllable bridge arm currents. These currents are injected into the submodule under test on the right, which employs a typical MMC half-bridge structure, after passing through an inductor. This configuration helps simulate the current paths and operating conditions in real-world MMC systems.

[0043] In addition, there is a Simulink simulation model, such as Figure 4 As shown, this model integrates components such as an MPC control module, a switching module, and a sampling module. In this model, the MPC controller receives the measured value I of the bridge arm current. armt Measurement value of capacitor voltage U of sub-module ct As input data, the optimal control signal is generated by calculating the prediction error. This signal is used to control the switching state of the current generator, thereby achieving accurate simulation and control of the submodule's operating conditions. The entire loop has real-time feedback and control capabilities, ensuring high-precision operating condition simulation.

[0044] Through the system configuration and circuit design described above, this embodiment proposes an efficient, economical, and flexible method for testing the performance of MMC submodules. This not only improves the accuracy and efficiency of testing but also reduces costs and enhances adaptability to complex operating conditions. This method provides strong support for evaluating and optimizing MMC submodules, promoting the development and application of modular multilevel converter technology.

[0045] In one embodiment, step S110 described above may include steps S111 to S114.

[0046] S111. Based on the sub-module circuit structure and working principle, apply Kirchhoff's voltage law to establish the differential equation between current and voltage, and the relationship between the inductance, resistance, bridge arm current and capacitor voltage in the sub-module circuit structure.

[0047] In this embodiment, based on the circuit structure and operating principle of the submodule, and particularly utilizing Kirchhoff's Voltage Law (KVL), differential equations describing the relationship between the bridge arm current iarm, inductance L, resistance R, H-bridge output voltage uH, and capacitor voltage Uc are established. This process involves considering the influence of the switching signal S in the submodule under test on the circuit state. For example, when S=1, the upper switch is on and the lower switch is off; conversely, the lower switch is off.

[0048] S112. Define the relationship between the output voltage and duty cycle of the H-bridge, and construct a new equation based on the differential equation to adjust the state of the four switches of the H-bridge through PWM control input.

[0049] In this embodiment, the next step is to define the relationship between the output voltage uH of the H-bridge and the duty cycle D. Considering that the PWM control input regulates the states of the four switches of the H-bridge, the relationship between the two can be expressed by the following formula: Where Udc represents the DC power supply voltage and D is the duty cycle. Substituting the above expression for uH into the differential equation obtained in step S111, a new equation is formed, which allows for precise control of the H-bridge's switching state by adjusting the PWM control input.

[0050] S113. Based on the dynamic change law of capacitance, establish the differential equation of capacitor voltage change with time, and correlate the current of submodule and capacitor voltage.

[0051] In this embodiment, a differential equation describing the change of capacitor voltage Uc over time is then established based on the dynamic change law of the capacitor. This step mainly considers the change of current during capacitor charging and discharging, that is: ;here, Indicates the capacitance value of the submodule. u c Indicates capacitor voltage. i arm This represents the current flowing through the bridge arm. S This indicates the switch signal of the submodule under test. S When =1, the switch on the submodule under test T 1 Turn on, switch down T 2 Turn off; S When =0, the switch on the submodule under test T 1 Turn off, switch down T 2 Conduction.

[0052] S114. Integrate the new equation with the differential equation, assuming the state variables are the bridge arm current and the capacitor voltage, to form a continuous-time state equation and obtain a continuous-time model.

[0053] Finally, all the equations obtained in steps S111 to S113 are integrated, assuming the state variables are the bridge arm current x1 = iarm(t) and the capacitor voltage x2 = Uc(t), thus forming a continuous-time state equation. Among them, i arm This represents the current flowing through the bridge arm. u c This represents the capacitor voltage. This is done to facilitate subsequent discretization and optimized control design using model predictive control (MPC) algorithms.

[0054] Example of a continuous-time state equation: .

[0055] in, The vector representing the system's state variables, in this scheme, consists of the bridge arm current and the submodule capacitor voltage, and is used to characterize the dynamic operating state of the submodule at any given time. Represents the rate of change of the state variable over time; A is the system state matrix, composed of the bridge arm inductance. L Circuit resistance R Submodule capacitors C sm The circuit parameters and topology determine the dynamic coupling relationship between state variables; B is the input matrix, describing the influence of control input on state changes; u(t) is the control input of the system, which in this technical solution is the output voltage of the H-bridge. u H Its size is determined by the duty cycle. D The decision is the target control variable for model predictive control (MPC) optimization. A and B are the system matrix and input matrix, respectively, which are calculated based on the previously derived differential equations.

[0056] By executing steps S111 to S114 above, a mathematical model describing the electrical behavior of the submodule can be obtained, which lays the foundation for achieving high-precision operating condition simulation and control using the MPC algorithm. This physics-based method not only improves the accuracy of testing but also simplifies system design, reduces costs, and enhances adaptability.

[0057] In this embodiment, in order to establish the system state model required for MPC predictive control, the mathematical model of the sub-module is first established based on its circuit structure and working principle, including the dynamic equation of capacitor voltage and the dynamic equation of current.

[0058] Based on the MPC simulation circuit diagram and Kirchhoff's Voltage Law (KVL), establish the differential equation between current and voltage: ; in L Indicates the inductance in the circuit. R Indicates the resistance in the circuit. i arm This represents the current flowing through the bridge arm. u H This represents the output voltage of the H-bridge, and Uc represents the capacitor voltage. Furthermore, S This indicates the switch signal of the submodule under test. S When =1, the upper switch T1 of the submodule under test is turned on and the lower switch T2 is turned off. S When =0, the upper switch T1 of the submodule under test is turned off, and the lower switch T2 is turned on.

[0059] Assuming the input variable u = PWM_Current (i.e., the switching states of the four switches in the H-bridge after calculating the optimal duty cycle), and mainly considering the conduction time of the H-bridge (duty cycle D), with the four switches being S1, S2, S3, and S4, the relationship between the output voltage of the H-bridge and the duty cycle D is as follows: Where D represents the H-bridge duty cycle and Udc represents the DC voltage.

[0060] At the same time, the capacitor voltage dynamically satisfies: C sm This refers to the capacitance value of the submodule. u c Indicates capacitor voltage. i arm This represents the current flowing through the bridge arm. S This indicates the on / off state of the submodule under test.

[0061] Based on the above relationships, assuming state variables x1 = iarm(t) and x2 = uc(t), the continuous-time state equation can be written as: ;in: x(t) represents the system's state variable vector, which in this scheme consists of the bridge arm current and the submodule capacitor voltage, and is used to characterize the dynamic operating state of the submodule at any time. Represents the rate of change of the state variable over time; A is the system state matrix, composed of the bridge arm inductance. L Equivalent circuit resistance R Submodule capacitors C sm The circuit parameters and topology determine the dynamic coupling relationship between state variables; B is the input matrix, describing the influence of control input on state changes; u(t) is the control input of the system, which in this scheme is the output voltage of the H-bridge. u H Its size is determined by the duty cycle. D The decision is the target control variable for optimization in Model Predictive Control (MPC).

[0062] S120. Discretize the continuous-time model to obtain a discrete state-space model for MPC prediction and control optimization.

[0063] In this embodiment, the discrete-time state-space model refers to the mathematical model obtained by transforming the continuous-time state equation into a difference equation using the forward Euler method, based on the sampling period and system physical parameters, for digital controller implementation and real-time calculation. It describes the relationship between the changes in system state variables during adjacent sampling periods and the influence of control input on system state changes, and is suitable for the design and optimization of subsequent MPC algorithms.

[0064] Specifically, the continuous-time model is discretized, and the forward Euler method is applied to transform the continuous-time state equation into a difference equation, thereby obtaining a discrete-time state-space model.

[0065] In this embodiment, to facilitate digital controller implementation and real-time calculation, the continuous-time state equation needs to be converted into a discrete-time state-space model. The specific steps are as follows: Application of the forward Euler method: The forward Euler method is used to discretize the continuous-time state equation. Assuming a sampling period of Ts, the discrete-time state-space model can be obtained as follows: , .

[0066] Among them, A d =I+AT s and B d =BT s These represent the discretized system matrix and input matrix, respectively. The first matrix is ​​the discretized system state matrix A. d The first matrix describes the changes in system state variables during adjacent sampling periods; the second matrix is ​​the discretized input matrix B. d This describes the effect of control inputs on changes in the system state. Each element in the matrix is ​​determined by the system's physical parameters and equivalent loop resistance. R Bridge arm inductor L Submodule capacitors C sm Submodule switch status S DC bus voltage U dc and sampling period T s Decide; x ( k ) represents discrete time. k The system state vector, in this scheme, is composed of the bridge arm current and the submodule capacitor voltage; x ( k+ 1) represents the state vector at the next sampling time; u( k () represents the control input at discrete moments, which in this scheme is the output voltage of the H-bridge. u H Its size is determined by the duty cycle. D The decision has been made. This model will be used in the subsequent design and optimization process of the MPC algorithm.

[0067] The output equation is: ; where C is the identity matrix.

[0068] S130, Design the cost function.

[0069] In this embodiment, the cost function includes the error weighted sum, the input weighted sum, and the terminal error.

[0070] In this embodiment, to ensure that the future state of the system is as close as possible to the desired value, while also considering the energy consumption of the control input, a cost function comprising the following three parts is designed: Error-weighted sum: measures the difference between the actual output and the expected output.

[0071] Input weighted sum: Limits the size of the input to avoid excessively large or rapid changes.

[0072] Terminal error: Emphasizes the state error at the final moment.

[0073] Specifically, MPC optimizes the control input to make the future state of the system as close as possible to the desired value. Combining the above three parts, the cost function can be expressed as: That is: Cost function = Error weighted sum + Input weighted sum + Terminal error.

[0074] in, J It represents the overall performance index in the prediction time domain and is the objective function for optimizing the Model Predictive Control (MPC) solution. k Indicates the current sampling time; i For the prediction step index; N To predict the length of the time domain; x ( k + i | k ) indicates at time k Predicting the first under known information conditions i The system state vector in this scheme includes the bridge arm current and the submodule capacitor voltage. u ( k + i | k ) represents the predicted first i Step control input, i.e., the output voltage of the H-bridge u H ; Q This is the state weight matrix, which measures the importance of state deviations. R The input weight matrix is ​​used to limit and control the magnitude variation of the input. F Let be the terminal state weight matrix, emphasizing the state deviation at the predicted final time step. All the above weight matrices are diagonal and positive definite matrices. The optimization objective is to minimize the cost, i.e., min... J MPC minimizes the cost function while satisfying constraints. J This allows us to obtain the optimal control input sequence that makes the future state as close as possible to the desired value.

[0075] S140. In each control cycle, based on the current sampled state and the discrete state space model and cost function, the system behavior is re-predicted, and the optimal control input is calculated to adjust the switch state, thereby realizing the dynamic control of the submodule.

[0076] In this embodiment, the reference capacitor voltage, bridge arm current, and switching function are received as inputs, and the current capacitor voltage and bridge arm current are collected in real time for feedback. Through a rolling optimization process, the optimal control signal that satisfies the discrete state space model and cost function is calculated using the MPC algorithm. The calculated optimal control signal is applied to the system to adjust the switching state in real time, thereby achieving efficient dynamic control of the submodule structure.

[0077] Specifically, within each control cycle, the MPC controller re-predicts the future behavior of the system based on the current sampled state and calculates the optimal control input. The details are as follows: Input the reference capacitor voltage Uc, the bridge arm current iarm, and the switching function S. Real-time acquisition of the current capacitor voltage Uc and bridge arm current iarm serves as the feedback signal.

[0078] Based on the collected data, a discretized mathematical model of the sub-module is established, including the dynamic equations for capacitor voltage and current. This step utilizes the previously discretized state-space model to provide a foundation for subsequent prediction and optimization.

[0079] Design an objective function to optimize voltage stability and current tracking accuracy. The objective function typically includes error-weighted sums, input-weighted sums, and terminal errors to ensure the system output is as close as possible to the desired value while also considering the energy consumption of the control inputs. The objective function is the discrete state-space model described above, and the constraints correspond to the cost function.

[0080] Set safety constraints for switch states, voltage, and current to ensure the safety and stability of system operation.

[0081] The MPC algorithm is used for rolling optimization. Based on the current state, the system behavior in the next few time steps is predicted, and the optimal control input sequence that minimizes the objective function is calculated.

[0082] The obtained optimal control signal is applied to the system to adjust the state of the four switches of the H-bridge in real time, thereby precisely controlling the working state of the submodule.

[0083] Through the above steps, high-performance dynamic control of the submodules is achieved, enabling the system to respond quickly to changes in operating conditions under safety constraints, and ensuring high-precision current tracking capability and voltage stability.

[0084] In summary, the method presented in this embodiment, by combining prediction and optimization, not only improves testing accuracy but also significantly reduces costs and enhances adaptability, making it suitable for submodule performance evaluation and optimization under complex and variable operating conditions. This method is particularly suitable for testing environments requiring high accuracy and fast response in modular multilevel converter (MMC) submodules.

[0085] This embodiment leverages the predictive capabilities and multivariate optimization characteristics of Model Predictive Control (MPC) algorithms to establish a mathematical model of the submodule and predict its future state in advance. This method can simultaneously optimize multiple key parameters such as current, voltage, and switching states, thereby achieving high-precision simulation and comprehensive testing capabilities under complex operating conditions. By optimizing the test circuit structure and control strategy, the dependence on DC power supplies is reduced, simplifying the design of the test system and significantly lowering testing costs. Furthermore, reducing the use of auxiliary equipment makes the overall test system structure more concise and efficient, facilitating practical applications. Utilizing the rolling optimization capability of MPC, it can quickly switch and adapt to various test conditions, significantly shortening the test cycle and improving test efficiency. The flexibility and adaptability of MPC enable it to accurately simulate the dynamic operating state of the submodule under diverse and complex conditions such as load changes and switching frequency variations. Combining the MPC method with MMC submodule operating condition simulation testing achieves a better balance between accuracy, cost, efficiency, and adaptability, providing strong support for the performance evaluation and optimization of MMC submodules and promoting the development and application of modular multilevel converter technology.

[0086] To address the shortcomings of existing technologies, the method of this embodiment aims to solve technical problems including improving the accuracy of operating condition simulation testing of existing modular multilevel converter (MMC) submodules, reducing costs, improving testing efficiency, and enhancing adaptability to complex operating conditions. To this end, this invention proposes an MMC submodule operating condition simulation testing method based on model predictive control (MPC), providing a technical solution that is simple in structure, highly adaptable, highly accurate, and low in implementation cost. This method has the following main technical features: By establishing a discrete state-space model of the MMC submodule and utilizing the MPC algorithm to predict and jointly optimize the control of multiple key quantities such as current, capacitor voltage, and switching states, high-precision operating condition simulation can be achieved under various operating conditions. The direct MPC control strategy avoids complex calculation processes such as virtual impedance, and by rationally configuring the power supply and load, it reduces dependence on expensive equipment and significantly simplifies the overall test circuit structure. Combined with the rolling optimization mechanism and real-time feedback capability of MPC, it can quickly respond to changes in operating conditions, achieving flexible switching and accurate simulation under different loads, voltage levels, and switching modes, significantly improving test efficiency. Compared to traditional PIR control methods, the MPC control strategy proposed in this invention can adapt to the nearest level approximation (NLC) modulation mode, realistically reproducing the dynamic behavior of the MMC submodule under modulation control in actual systems, thus improving simulation accuracy. While ensuring control accuracy, it also considers implementation complexity and control cost, improving the overall practicality and scalability of the submodule test system, making it suitable for both experimental verification and engineering applications.

[0087] By innovatively applying the MPC method, the shortcomings of existing MMC submodule testing methods in terms of accuracy, cost, efficiency, and adaptability are addressed. This provides an efficient, accurate, and economical testing solution, offering strong support for the performance evaluation and optimization of MMC submodules and promoting the development and application of modular multilevel converter technology.

[0088] For example, to verify the technical solution proposed in this embodiment, an MMC submodule operating condition simulation test platform was built based on the Simulink simulation environment. The simulation parameters are shown in Table 1, and the operating conditions of a single submodule are dynamically simulated using the Model Predictive Control (MPC) algorithm.

[0089] Table 1. Submodule Simulation Parameters

[0090] Please see Figure 5 The load current waveform of the operating condition simulation test system is highly consistent with the reference current waveform, indicating that the control strategy proposed in this invention can accurately simulate the bridge arm current characteristics of the MMC system. Simulation analysis reveals that, in the nearest level approximation (NLC) modulation mode, the inflow current and capacitor voltage of the submodule under test (DUT) perfectly match those of the actual MMC system. Furthermore, since the switching sequence of the DUT is the same as that of the actual MMC system, this further verifies that the operating condition simulation test system of this invention can realistically simulate the operation of submodules in an actual MMC.

[0091] For further quantitative analysis, please refer to [link / reference]. Figure 6The simulation results show the error waveform between the load current and the reference value. The peak error of the load current is about 8A, which is only 5% of the peak load current (153A), fully demonstrating the high accuracy of the present invention in current tracking.

[0092] Please see Figure 7 The simulated waveform of the capacitor voltage of the submodule under test is shown. It can be seen that under the predictive control of the MPC algorithm, the submodule capacitor voltage closely matches the reference waveform, exhibiting rapid dynamic response and no significant overshoot. Please refer to [link / reference]. Figure 8 Furthermore, the error waveform between the capacitor voltage and the reference value is given, and the error value is extremely small, which further verifies the effectiveness of the MPC algorithm in voltage control.

[0093] Please see Figure 9 and Figure 10 To verify the system's dynamic response capability, a power step disturbance increasing from 0.6MW to 1MW was applied at 0.7 seconds. Simulation results show that although the peak error of the load current increases slightly, it can still quickly track changes in the reference value.

[0094] Please see Figure 11 and Figure 12 The submodule capacitor voltage remains well balanced after power changes, such as Figure 11 As shown, this proves that the present invention still has reliable tracking capability under power change conditions. Figure 12 Furthermore, the error waveform between the capacitor voltage and the reference value is given, and the error value is extremely small, which once again verifies the effectiveness of the MPC algorithm in voltage control.

[0095] To further test the system's robustness under disturbance conditions, the DC voltage was increased from 5500V to 6000V in 0.7 seconds. Simulation results show that despite significant fluctuations in the reference waveform, the simulation system can quickly adjust and follow the reference value. Please refer to [link to relevant documentation]. Figures 13 to 16 This verifies the adaptability of the present invention under voltage disturbances.

[0096] The simulation results above demonstrate that the method described in this embodiment can accurately reproduce the electrical characteristics of a real MMC system, including high-precision tracking of load current and stable control of capacitor voltage. This system not only meets the requirements of operational condition simulation but also boasts advantages such as fast response, small error, and strong robustness, making it suitable for the testing and verification of MMC submodules.

[0097] The method in this embodiment utilizes MPC model predictive control, demonstrating significant advantages in accurately simulating the operating conditions of actual MMC systems, including higher current tracking accuracy and full compatibility with NLC modulation. Employing a direct control strategy avoids complex computational steps, ensuring test accuracy while significantly reducing computational burden, making it particularly suitable for submodule testing scenarios in large-scale MMC systems.

[0098] Therefore, the method in this embodiment not only achieves accurate simulation of real switching behavior under NLC modulation, simplifies the control system structure, and reduces controller performance requirements, but also improves efficiency and reduces system complexity while ensuring test accuracy. This innovation is of great significance for improving the engineering practicality of MMC submodule testing and ensuring the reliable operation of converter systems.

[0099] The aforementioned modular multilevel converter submodule operating condition simulation test method transforms a continuous-time mathematical model based on the submodule's circuit structure and operating principle into a discrete state-space model suitable for MPC prediction and control optimization through discretization. Combined with a carefully designed cost function, it accurately predicts system behavior and calculates the optimal control input to adjust the switching state within each control cycle based on the current sampled state. This method not only accurately simulates real switching behavior under NLC modulation but also simplifies the control system structure and reduces the performance requirements of the controller by directly utilizing the state-space model for prediction and control, avoiding complex calculations such as virtual impedance found in traditional methods. This ensures test accuracy while improving dynamic response speed and efficiency and reducing overall system complexity, making it particularly suitable for submodule testing applications in large-scale modular multilevel converter systems.

[0100] Figure 17 This is a schematic block diagram of a modular multilevel converter submodule operating condition simulation test system 300 provided in an embodiment of the present invention. Figure 17 As shown, corresponding to the above-described modular multilevel converter submodule operating condition simulation test method, the present invention also provides a modular multilevel converter submodule operating condition simulation test system 300. This modular multilevel converter submodule operating condition simulation test system 300 includes a unit for executing the above-described modular multilevel converter submodule operating condition simulation test method, and the system can be configured in a server. Specifically, please refer to... Figure 17 The modular multilevel converter submodule operating condition simulation test system 300 includes a data model establishment unit 301, a discretization unit 302, a design unit 303, and a prediction and adjustment unit 304.

[0101] The data model building unit 301 is used to establish a mathematical model describing the relationship between current and voltage based on the circuit structure and working principle of the sub-module to obtain a continuous-time model; the discretization unit 302 is used to discretize the continuous-time model to obtain a discrete state-space model for MPC prediction and control optimization; the design unit 303 is used to design the cost function; the prediction and adjustment unit 304 is used to re-predict the system behavior based on the current sampled state combined with the discrete state-space model and the cost function in each control cycle, and calculate the optimal control input to adjust the switching state to achieve high-performance dynamic control.

[0102] In one embodiment, the data model building unit 301 includes: The differential equation subunit is used to establish the differential equation between current and voltage based on Kirchhoff's voltage law, according to the submodule circuit structure and working principle, and to establish the relationship between the inductance, resistance, bridge arm current, and capacitor voltage in the submodule circuit structure. The new equation construction subunit is used to define the relationship between the output voltage and duty cycle of the H-bridge, and to construct a new equation based on the differential equation to adjust the state of the four switches of the H-bridge through PWM control input. The equation establishment subunit is used to establish the differential equation of capacitor voltage changing with time according to the dynamic change law of capacitor, and to associate the submodule current and capacitor voltage. The integration subunit is used to integrate the new equation and the differential equation, assuming that the state variables are bridge arm current and capacitor voltage, to form a continuous-time state equation to obtain a continuous-time model.

[0103] In one embodiment, the discretization unit 302 is used to discretize the continuous-time model and apply the forward Euler method to transform the continuous-time state equation into a difference equation to obtain a discrete-time state-space model.

[0104] In one embodiment, the prediction and adjustment unit 304 is used to receive the reference capacitor voltage, bridge arm current and switching function as input, and to collect the current capacitor voltage and bridge arm current in real time for feedback. Through the rolling optimization process, the optimal control signal that satisfies the discrete state space model and cost function is calculated using the MPC algorithm. The calculated optimal control signal is applied to the system to adjust the switching state in real time, thereby achieving efficient dynamic control of the submodule structure.

[0105] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the above-mentioned modular multilevel converter submodule operating condition simulation test system 300 and each unit can be referred to the corresponding description in the foregoing method embodiments. For the sake of convenience and brevity, it will not be repeated here.

[0106] The aforementioned modular multilevel converter submodule operating condition simulation test system 300 can be implemented as a computer program, which can be used in, for example... Figure 18 It runs on the computer device shown.

[0107] Please see Figure 18 , Figure 18 This is a schematic block diagram of a computer device provided in an embodiment of this application. The computer device 500 can be a server, wherein the server can be a standalone server or a server cluster composed of multiple servers.

[0108] See Figure 18 The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a system bus 501. The memory may include a non-volatile storage medium 503 and internal memory 504.

[0109] The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer program 5032 includes program instructions that, when executed, cause the processor 502 to perform a modular multilevel converter submodule operating condition simulation test method.

[0110] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.

[0111] The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a modular multilevel converter submodule operating condition simulation test method.

[0112] This network interface 505 is used for network communication with other devices. Those skilled in the art will understand that... Figure 18 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 500 to which the present application is applied. The specific computer device 500 may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0113] The processor 502 is used to run the computer program 5032 stored in the memory to implement the modular multilevel converter submodule operating condition simulation test method.

[0114] It should be understood that in the embodiments of this application, the processor 502 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0115] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program includes program instructions and can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.

[0116] Therefore, the present invention also provides a storage medium. This storage medium can be a computer-readable storage medium. The storage medium stores a computer program, wherein when executed by a processor, the computer program causes the processor to perform the modular multilevel converter submodule operating condition simulation test method.

[0117] The storage medium can be any computer-readable storage medium capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory (ROM), magnetic disk, or optical disk.

[0118] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0119] In the embodiments provided by this invention, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For example, the division of each unit is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0120] The steps in the method of this invention can be adjusted, merged, or reduced in order according to actual needs. The units in the system of this invention can be merged, divided, or reduced according to actual needs. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0121] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0122] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for simulating the operating conditions of a modular multilevel converter submodule, characterized in that, include: Based on the sub-module circuit structure and working principle, a mathematical model describing the relationship between current and voltage is established to obtain a continuous-time model. The continuous-time model is discretized to obtain a discrete state-space model for MPC prediction and control optimization. Design the cost function; Within each control cycle, the system behavior is re-predicted based on the current sampled state, the discrete state-space model, and the cost function, and the optimal control input is calculated to adjust the switch state, thereby realizing the dynamic control of the submodule.

2. The modular multilevel converter submodule operating condition simulation test method according to claim 1, characterized in that, The submodule circuit structure includes a test unit for the submodule under test, a current generator module, and a controller unit. The test unit for the submodule under test is connected to the current generator module. The controller unit is connected to both the test unit for the submodule under test and the current generator module.

3. The modular multilevel converter submodule operating condition simulation test method according to claim 2, characterized in that, The test unit for the submodule under test includes an MMC submodule circuit structure; the current generator module includes a full-bridge circuit, which generates a controllable bridge arm circuit to simulate current fluctuations under actual operating conditions; the controller unit is used to predict and control the behavior of the submodule in real time using an MPC strategy, and output the optimal duty cycle to precisely adjust the working state of the submodule.

4. The modular multilevel converter submodule operating condition simulation test method according to claim 1, characterized in that, Based on the sub-module circuit structure and working principle, a mathematical model describing the relationship between current and voltage is established to obtain a continuous-time model, including: Based on the submodule circuit structure and working principle, Kirchhoff's voltage law is applied to establish the differential equation between current and voltage, and the relationship between current and voltage of inductance, resistance, bridge arm current and capacitor voltage in the submodule circuit structure. Define the relationship between the output voltage and duty cycle of the H-bridge, and construct a new equation based on the differential equation to adjust the state of the four switches of the H-bridge through PWM control input; Based on the dynamic change law of capacitance, a differential equation for the change of capacitor voltage with time is established to correlate the submodule current and capacitor voltage. By integrating the new equation with the differential equation, and assuming that the state variables are the bridge arm current and the capacitor voltage, a continuous-time state equation is formed to obtain a continuous-time model.

5. The modular multilevel converter submodule operating condition simulation test method according to claim 1, characterized in that, Discretizing the continuous-time model to obtain a discrete state-space model for MPC prediction and control optimization includes: The continuous-time model is discretized, and the forward Euler method is applied to transform the continuous-time state equation into a difference equation, resulting in a discrete-time state-space model.

6. The modular multilevel converter submodule operating condition simulation test method according to claim 1, characterized in that, The cost function includes the error weighted sum, the input weighted sum, and the terminal error.

7. The modular multilevel converter submodule operating condition simulation test method according to claim 1, characterized in that, Within each control cycle, the system behavior is re-predicted based on the current sampled state, combined with the discrete state-space model and cost function, and the optimal control input is calculated to adjust the switching state, thereby achieving high-performance dynamic control. This includes: The system receives reference capacitor voltage, bridge arm current, and switching function as inputs, and collects the current capacitor voltage and bridge arm current in real time for feedback. Through a rolling optimization process, it uses the MPC algorithm to calculate the optimal control signal that satisfies the discrete state space model and cost function. The calculated optimal control signal is applied to the system to adjust the switching state in real time, thereby achieving efficient dynamic control of the submodule structure.

8. A modular multilevel converter submodule operating condition simulation test system, characterized in that, include: The data model building unit is used to build a mathematical model describing the relationship between current and voltage based on the circuit structure and working principle of the sub-module, so as to obtain a continuous-time model. Discretization unit, used to discretize the continuous-time model to obtain a discrete state-space model for MPC prediction and control optimization; Design unit, used to design cost function; The prediction and adjustment unit is used to re-predict the system behavior based on the current sampled state, combined with the discrete state space model and cost function in each control cycle, and calculate the optimal control input to adjust the switch state, thereby achieving high-performance dynamic control.

9. The modular multilevel converter submodule operating condition simulation test system according to claim 8, characterized in that, The data model building unit includes: The differential equation subunit is used to establish the differential equation between current and voltage based on Kirchhoff's voltage law, and the relationship between inductance, resistance, bridge arm current and capacitor voltage in the submodule circuit structure, based on the submodule circuit structure and working principle. The new equation constructs a sub-unit to define the relationship between the output voltage and duty cycle of the H-bridge, and constructs a new equation based on the differential equation to adjust the state of the four switches of the H-bridge through PWM control input; The equation establishes a sub-unit, which is used to establish a differential equation for the change of capacitor voltage over time based on the dynamic change law of capacitor, and to correlate the current of the sub-module with the capacitor voltage. An integration subunit is used to integrate the new equation with the differential equation, assuming the state variables are the bridge arm current and the capacitor voltage, to form a continuous-time state equation and obtain a continuous-time model.

10. The modular multilevel converter submodule operating condition simulation test system according to claim 8, characterized in that, The discretization unit is used to discretize the continuous-time model and apply the forward Euler method to transform the continuous-time state equation into a difference equation to obtain a discrete-time state-space model.

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