Pantograph-catenary arcing energy detector and detection method thereof

Abstract

The invention relates to a pantograph-catenary arcing energy detector and a detection method thereof. The detector comprises an arcing detector equivalent circuit, a measurement circuit, a comparison circuit and a delay circuit. The arcing detector equivalent circuit converts arcing energy of different power into light current in proportion; the measuring circuit accumulates arcing energy according to light current input by the arcing detector equivalent circuit based on an integrating circuit, and converts light current of the arcing energy into corresponding light voltage; the comparison circuit compares the photovoltage with a reference voltage, and when the photovoltage is greater than the reference voltage, the output trigger control voltage is a high level / power supply voltage; when the light voltage is not greater than the reference voltage, the output trigger control voltage is zero; the delay circuit controls the output delay control voltage based on the interval time of two arcing; when the interval time of the two arcing is smaller than the arcing event window time, the time delay circuit regards the two arcing as the same event; otherwise, the two arcing events are regarded as independent events.

Description

Technical Field

[0001] This invention relates to the field of arc energy detection technology, and in particular to a pantograph-catenary arc energy detector and its detection method. Background Technology

[0002] In electrified railway systems, the pantograph-catenary system (i.e., the pantograph and the overhead contact line) is a crucial link in obtaining electrical energy for the train. During high-speed operation, arcing inevitably occurs between the pantograph and the contact wire. Arcing, accompanied by current flowing through the air gap, generates a high-temperature, high-energy plasma channel. This not only affects the stability of the electrical connection between the pantograph and the contact wire but also leads to the ablation and wear of the carbon sliding plate and the contact wire. Therefore, effective monitoring and assessment of the energy of arcing is essential for ensuring safe railway operation and extending equipment lifespan.

[0003] Arc energy is a physical quantity that measures the actual electrical energy released during the arcing process. It reflects the total energy released onto the materials of the pantograph-catenary system per unit time during the arcing period. Recording arc energy has significant physical implications: on the one hand, it allows for a more accurate assessment of the actual impact of the arc on materials such as the contact wire and carbon sliding plate; on the other hand, changes in energy are directly related to the degree of material heating, ablation, and structural damage. Compared to traditional methods that only record the duration of the arc, which cannot fully reflect its destructiveness due to the same duration, different current and voltage conditions can lead to completely different energy release and ablation effects.

[0004] In the study of wear and damage mechanisms of pantograph-catenary systems, thermal ablation is one of the most significant failure modes. Research and field testing results indicate that the ablation and lifespan of pantograph-catenary materials are primarily influenced by the energy of the arcing process, not just its duration. For example, in sections with prolonged arcing, although the arcing duration is long, the actual arcing current and voltage are low, resulting in limited energy release and minimal abnormal wear on the contact wire and carbon sliding plate. Conversely, in certain high-energy arcing moments, even short arcing durations can generate extreme localized high temperatures, causing severe material damage. Therefore, only by accurately recording and analyzing the arcing energy can the root causes of pantograph-catenary material ablation and wear be truly revealed.

[0005] However, most existing technologies can only record the duration of arcing, but cannot accurately obtain the energy parameters during the arcing process. Test results show that in some operating sections with longer continuous discharge times, the surface wear of the contact conductors did not exhibit significant abnormalities.

[0006] For example, CN108333488A discloses a method for arc detection based on the fusion of ultraviolet, infrared, and optical images, including the following steps: S1: Acquire ultraviolet band signals of the pantograph-catenary; S2: Evaluate the energy level of the arc acquired in S1; S3: Calculate the duration of the arc; S4: Capture images of the pantograph-catenary using an infrared thermal imager and an optical camera; S5: Calculate the average temperature of the pantograph-catenary within the effective area of ​​the infrared thermal imager to determine whether an arc exists; S6: Evaluate the energy level of the arc detected by the infrared thermal imager.

[0007] S7: Region localization and threshold segmentation of the optical image; S8: Evaluation of the arc energy level acquired by the optical camera; S9: Calculation of the final arc energy level. This technical solution detects and classifies arcs using ultraviolet, infrared, and optical images, obtaining two pieces of information: whether an arc exists and its energy level. This allows for accurate, reliable, and safe detection of arcs in railway pantograph-catenary systems and high-voltage lines. However, this technical solution evaluates the "energy level" of the arc through image and signal analysis under multiple channels, including ultraviolet, infrared, and optical. In other words, the conclusion drawn by this technical solution is that the arc energy belongs to a high, medium, or low classification, rather than the absolute energy value of the arc. This energy level evaluation is usually based on indirect physical quantities related to energy, such as image brightness, area, and temperature changes, and is graded by algorithms to reflect the relative "strength" or "hazard" of the arc. This technical solution cannot directly obtain the energy parameters during the arcing process.

[0008] Therefore, this invention proposes a method and apparatus for detecting arc energy, providing another quantifiable key indicator for arc intensity. This not only helps in the in-depth analysis of the causes of abnormal wear of carbon sliding plates and abnormal wear of contact wires, but also provides a scientific basis for the maintenance and optimization of the pantograph-catenary system, thereby improving the operational safety and economy of the entire railway power supply system.

[0009] Furthermore, on the one hand, there are differences in understanding among those skilled in the art; on the other hand, the applicant studied a large number of documents and patents when making this invention, but due to space limitations, not all details and contents were listed in detail. However, this does not mean that the present invention does not possess the features of these prior art. On the contrary, the present invention already possesses all the features of the prior art, and the applicant reserves the right to add relevant prior art to the background art. Summary of the Invention

[0010] Existing arc detection methods work by using a multi-channel image acquisition system combined with signal processing algorithms to establish a qualitative assessment model of arc intensity based on physical indicators such as light intensity distribution, thermal radiation characteristics, and morphological changes in the discharge region. This classification system categorizes discharge events into high-risk, medium-risk, and low-risk levels, reflecting the relative destructive potential of the arc rather than specific energy loss values ​​(such as joules). It is worth noting that this assessment method essentially relies on mathematical modeling of indirect parameters such as brightness gradient and heat flux change rate, using machine learning algorithms to map hazard levels. Therefore, it cannot provide precise energy parameters (such as total released energy or instantaneous power density) during the discharge process.

[0011] To address the shortcomings of existing technologies, the present invention provides a pantograph-catenary arc energy detector from a first aspect. The detector includes an equivalent circuit for an arc detector, a measurement circuit, a comparison circuit, and a delay circuit. The equivalent circuit of the arc detector is used to convert arc energy of different power levels into photocurrent proportionally. The measurement circuit is used to accumulate arc energy based on the photocurrent input to the equivalent circuit of the arc detector using an integrator circuit, and convert the photocurrent of the arc energy into the corresponding photovoltage. The comparator circuit is used to compare the photovoltage with a reference voltage. When the photovoltage is greater than the reference voltage, the output trigger control voltage is high / power supply voltage; when the photovoltage is not greater than the reference voltage, the output trigger control voltage is zero. The delay circuit is used to control the output delay control voltage based on the interval between two arcs. Specifically, when the interval between two arcs is less than the arc event window time, the delay control voltage output by the delay circuit remains low / zero, so that the delay circuit treats the two arcs as the same event; if the interval between two arcs is not less than the arc event window time, the delay control voltage output by the delay circuit becomes high, so that the delay circuit treats the two arcs as independent events. The equivalent circuit of the arc detector, the measurement circuit, and the comparator circuit are electrically connected, and the measurement circuit, the comparator circuit, and the delay circuit are electrically connected to each other.

[0012] This invention achieves direct measurement and event identification of arcing energy by constructing a pantograph-catenary arcing energy detector composed of an equivalent circuit of the arcing detector, a measurement circuit, a comparison circuit, and a delay circuit. The equivalent circuit of the arcing detector converts the arcing energy into photocurrent proportionally, overcoming the limitations of existing technologies that rely on image acquisition and indirect parameter modeling, thus making the energy measurement physically interpretable. The measurement circuit accumulates the photocurrent based on the integration principle to obtain a photovoltage proportional to the arcing energy, reflecting the total energy release during the arcing process and solving the problem that existing technologies cannot provide Joule-level energy parameters. The comparison circuit, by setting a reference voltage threshold, enables the triggering judgment of arcing events, improving the accuracy and response speed of arcing identification. The delay circuit, by setting an arcing event window time, merges and judges consecutive arcing events, avoiding repeated identification of short-interval arcing and improving the pantograph-catenary arcing energy detector's logical judgment capability for arcing events. The overall structure achieves the unification of quantitative measurement of arcing energy and logical event identification, making up for the shortcomings of existing technologies in energy parameter acquisition and event identification.

[0013] According to a preferred embodiment, the phototube forms a switchable path with the photovoltage and ground terminal of the measurement circuit, respectively, which is equivalent to two cases: the presence of arcing and the absence of arcing. When arcing occurs, when a positive current is applied to the phototube, the phototube converts the electromagnetic waves radiated by the arcing into photocurrent. This is equivalent to the case where the switch is closed to the photovoltage terminal.

[0014] This invention constructs two equivalent circuit states—one for the presence of arcing and the other for the absence of arcing—through the combination of a phototube and a switch. When arcing occurs, the phototube, under the influence of a forward current, converts electromagnetic waves into photocurrent, equivalent to the switch closing to the photovoltage terminal, thus achieving a direct response to arcing energy. This structure utilizes the physical characteristics of the phototube to convert arcing energy into an electrical signal, avoiding reliance on complex algorithms in image processing and improving the real-time performance and reliability of the pantograph-catenary arcing energy detector. Simultaneously, the on / off control of the switch provides a dark current compensation mechanism for the pantograph-catenary arcing energy detector, enhancing measurement accuracy and further improving the stability of arcing detection.

[0015] According to a preferred embodiment, the circuit structure of the measurement circuit includes an integrating circuit and a discharging circuit. In the integrating circuit, the non-inverting input of the amplifier is connected to the ground terminal through a first resistor, and the non-inverting input of the amplifier is connected to the photovoltage terminal through a second resistor; the inverting input of the amplifier is connected to the negative voltage terminal of the measurement circuit and is connected to the ground terminal through a third resistor; the output terminal of the amplifier is connected to the positive voltage terminal of the measurement circuit; the two ends of the first capacitor are respectively connected to the positive voltage terminal and the negative voltage terminal of the measurement circuit.

[0016] In the discharge circuit, the circuit formed by the fourth resistor and the first field-effect transistor is connected in parallel with the first capacitor to form the discharge circuit of the first capacitor; the gate of the first field-effect transistor is grounded through the fifteenth resistor and connected to the control terminal.

[0017] The measurement circuit employs a combination of an integrating circuit and a discharging circuit. The integrating circuit, through a feedback structure consisting of an amplifier and a capacitor, integrates the photocurrent and outputs a voltage signal proportional to the arcing energy. This circuit structure, based on the integrating characteristics of the capacitor, effectively accumulates energy changes during the arcing process, providing continuous and stable energy measurement results. The discharging circuit controls the discharge path of the capacitor through a first field-effect transistor, resetting the measurement circuit and providing initial conditions for the next arcing event measurement. This structure not only improves the linearity and accuracy of energy measurement but also enhances the repeatability and stability of the pantograph-catenary arcing energy detector, resolving the energy assessment deviation problem caused by image noise and algorithm errors in existing technologies.

[0018] According to a preferred embodiment, the measurement method of the measurement circuit is as follows: when the first field-effect transistor is turned off, the output voltage of the measurement circuit is:

[0019] Among them, V o0 R1 represents the initial voltage of the first capacitor, i(t) represents the photocurrent output by the phototube, R1 represents the resistance value of the first resistor, R3 represents the resistance value of the third resistor, and C1 represents the capacitance value of the first capacitor.

[0020] The output voltage formula of the measurement circuit reflects the accumulation process of arcing energy, has a clear physical meaning, and can reflect the energy change trend over time in an arcing event. Compared with the existing technology that relies on machine learning models for indirect mapping, this output voltage formula provides an analytical and predictable energy measurement model, enhancing the transparency and verifiability of arcing detection. Meanwhile, the initial voltage V... o0 The existence of this also ensures the measurement continuity of the pantograph-catenary arc energy detector in continuous arcing events, avoiding the energy loss problem caused by the reset of the pantograph-catenary arc energy detector.

[0021] According to a preferred embodiment, the circuit structure of the comparator circuit is as follows: the base of the transistor is connected to the anode of the first diode and the anode of the second diode respectively through the seventeenth resistor; the base of the transistor is connected to the power supply through the seventeenth and eighth resistors; the collector of the transistor is connected to the photovoltage terminal through the sixteenth resistor; the emitter of the transistor is connected to the ground terminal; and the emitter of the transistor is connected to the anode of the first diode and the anode of the second diode respectively through the eleventh resistor; the inverting terminal of the comparator is connected to the ground terminal through the sixth resistor, and the inverting terminal of the comparator is connected to the power supply through the fifth resistor; the inverting terminal of the comparator is connected to the anode of the first diode and the anode of the second diode respectively through the sixth and eleventh resistors; the non-inverting terminal of the comparator is connected to the collector of the transistor and to the photovoltage terminal through the sixteenth resistor; the output terminal of the comparator is connected to the trigger control voltage terminal of the comparator circuit; the cathode of the first diode is connected to the positive voltage terminal of the measurement circuit; and the cathode of the second diode is connected to the delay control voltage terminal.

[0022] The comparator circuit, through a combination of transistors, comparators, and diodes, constructs a circuit structure with stable reference voltage comparison capability. This circuit structure utilizes transistors as voltage followers to ensure the stability of the reference voltage, while the comparator compares the photovoltage with the reference voltage, outputting high / low level signals for subsequent control. The introduction of diodes enhances the circuit's anti-interference capability, preventing reverse voltage from affecting the comparator. This design improves the sensitivity and stability of the comparator circuit, making the triggering judgment of arcing events more accurate, avoiding false positives and false negatives, and compensating for the inaccurate arcing identification problems in existing technologies caused by image processing delays or algorithmic misjudgments.

[0023] According to a preferred embodiment, the circuit structure of the delay circuit is as follows: the VCC terminal of the timer is connected to the power supply; the GND terminal of the timer is connected to the ground terminal; the reset terminal of the timer is connected to the drain of the third field-effect transistor through the ninth resistor and is also connected to the power supply; the discharge terminal of the timer is short-circuited to the threshold terminal, connected to the second capacitor, and connected to the power supply through the seventh resistor, thus forming the core of the delay circuit; the trigger terminal of the timer is connected to the drain of the third field-effect transistor and the second capacitor respectively, and the on / off control signal is controlled by the third field-effect transistor; the trigger terminal of the timer is also connected to the power supply through the ninth resistor; the control terminal of the timer is connected to the ground terminal through the third capacitor to achieve filtering and voltage regulation; the output terminal of the timer is connected to the fourth field-effect transistor... The gate of the first MOSFET is connected to the output delay control signal; the timer output is also connected to ground via the thirteenth resistor; the gate of the second MOSFET is connected to the trigger control voltage terminal of the comparator circuit and to ground via the twelfth resistor; the source of the second MOSFET is connected to ground via the fourteenth resistor and is also connected to the source of the third MOSFET; the gate of the third MOSFET is connected to the trigger control voltage terminal of the comparator circuit; the source of the third MOSFET is connected to ground, and the drain of the third MOSFET is connected to the power supply via the ninth resistor; the drain of the fourth MOSFET is connected to the delay control voltage terminal of the delay circuit and to the power supply via the tenth resistor; the gate of the fourth MOSFET is connected to ground via the thirteenth resistor. The source of the fourth MOSFET is connected to ground.

[0024] The delay circuit employs a structure combining a timer with second and third field-effect transistors. By controlling the charging and discharging process of the second capacitor, it determines the interval between arcing events. This circuit structure can dynamically adjust the delay control voltage based on the time interval between arcing events, thereby determining whether two arcs belong to the same event. This design effectively avoids repeated identification of short-interval arcs and improves the logical judgment capability of the pantograph-catenary arc energy detector for arcing events. Simultaneously, the timer's control terminal is connected to the ground terminal through the third capacitor, enhancing the circuit's filtering and voltage regulation capabilities and improving the anti-interference performance of the pantograph-catenary arc energy detector. The overall structure achieves intelligent identification and logical merging of arcing events, improving the intelligence level of arc detection.

[0025] According to a preferred embodiment, the control principle of the pantograph-catenary arc energy detector includes: when no arc occurs and only dark current exists, the photovoltage input to the comparison circuit is less than the reference voltage. At this time, the delay control voltage of the delay circuit approaches zero, the gates of the second and third field-effect transistors are both at a low level, the second and third field-effect transistors are both in the off state, and the trigger terminal of the timer remains at a high level.

[0026] The timer output is: if V THR If the voltage is greater than 2 / 3VCC, both the output and discharge terminals will output a low level, and the threshold terminal will be at a low level; if VTHR If the voltage is less than 2 / 3VCC, the output and discharge terminals remain in their previous states, with the discharge terminal outputting a low level or exhibiting a high impedance. If the discharge terminal outputs a low level, the output terminal outputs a low level; if the discharge terminal outputs a high impedance, the output terminal remains in its previous state, and the third capacitor charges until V... THR >2 / 3VCC, then both the output and discharge terminals output a low level.

[0027] This control logic ensures low-power operation of the pantograph-catenary arc detection device when there is no arcing and avoids false triggering caused by dark current or noise. Meanwhile, the timer's output logic ensures the stability of the pantograph-catenary arc detection device in the absence of events, preventing malfunctions and improving the reliability of arc detection.

[0028] According to a preferred embodiment, the control principle of the pantograph-catenary arc energy detector includes: when an arc occurs, the equivalent circuit of the arc detector inputs the photocurrent into the measurement circuit, the measurement circuit inputs the photovoltage converted from the photocurrent into the comparison circuit, when the photovoltage is greater than the reference voltage, the trigger control voltage output by the comparison circuit is high level / power supply voltage; both the second and third field-effect transistors are in the on state, the output of the timer outputs a high level, the second capacitor cannot be charged, the delay control voltage output by the delay circuit is zero, the first field-effect transistor is in the off state, and the first capacitor continues to charge until the arc ends.

[0029] This control logic ensures rapid identification of arcing events and synchronization of the energy accumulation process, avoiding energy measurement errors caused by arcing interruptions or short intervals. Simultaneously, the delay circuit's response mechanism ensures complete identification of arcing events, improving the accuracy of arcing energy measurement and the logical consistency of event identification.

[0030] The present invention provides a detection method for a pantograph-catenary arc energy detector from a second aspect. The method includes: electrically connecting an equivalent circuit, a measurement circuit, and a comparison circuit of the arc detector; electrically connecting the measurement circuit, the comparison circuit, and a delay circuit to each other; converting arc energy of different power levels into photocurrent proportionally through the equivalent circuit of the arc detector; accumulating the arc energy based on an integrating circuit using the measurement circuit to collect the photocurrent input to the equivalent circuit of the arc detector, and converting the photocurrent of the arc energy into a corresponding photovoltage; comparing the photovoltage with a reference voltage using the comparison circuit; and when the photovoltage is detected... When the voltage is greater than the reference voltage, the output trigger control voltage is high / power supply voltage; when the voltage is not greater than the reference voltage, the output voltage is zero; the output delay control voltage is controlled by the delay circuit based on the interval between two arcing events; when the interval between two arcing events is less than the arcing event window time, the delay control voltage output by the delay circuit remains low / zero, so that the delay circuit treats the two arcing events as the same event; if the interval between two arcing events is not less than the arcing event window time, the delay control voltage output by the delay circuit is high, so that the delay circuit treats the two arcing events as independent events.

[0031] This detection method constructs a complete arc energy detection process by sequentially connecting the equivalent circuit of the arc detector, the measurement circuit, the comparison circuit, and the delay circuit. The equivalent circuit of the arc detector converts the arc energy into photocurrent proportionally, realizing a physical response to the arc energy and avoiding errors caused by modeling indirect parameters such as brightness gradient and heat flux change rate in traditional image acquisition methods. The measurement circuit accumulates the photocurrent based on the integration principle and outputs a photovoltage proportional to the arc energy, allowing for quantitative measurement of the total energy release during the arcing process, solving the problem that existing technologies cannot provide Joule-level energy parameters. The comparison circuit, by setting a reference voltage threshold, realizes the trigger judgment of arc events, improving the accuracy and response speed of arc identification. The delay circuit, by setting the arc event window time, logically merges or separates continuous arc events, improving the intelligent identification capability of the pantograph-catenary arc energy detector for arc events. The overall method unifies the quantitative measurement of arc energy and the logical identification of events, making up for the shortcomings of existing technologies in energy parameter acquisition and event identification, and improving the accuracy and practicality of arc detection.

[0032] According to a preferred embodiment, the detection method includes: when an arc occurs, the equivalent circuit of the arc detector inputs a photocurrent to a measurement circuit, the measurement circuit inputs a photovoltage converted from the photocurrent to a comparison circuit, and when the photovoltage is greater than a reference voltage, the trigger control voltage output by the comparison circuit is a high level / power supply voltage; in the delay circuit, both the second and third field-effect transistors are in the on state, the output of the timer outputs a high level, the second capacitor cannot be charged, the delay control voltage output by the delay circuit is zero, the first field-effect transistor is in the off state, and the first capacitor continues to charge until the arc ends.

[0033] This control logic ensures the complete identification of arcing events and the synchronous measurement of energy, avoiding energy measurement errors caused by arcing interruptions or short intervals. Simultaneously, the delay circuit's response mechanism improves the logical consistency of arcing event identification and enhances the pantograph-catenary arcing energy detector's dynamic response to the arcing process, thereby improving the accuracy and stability of arcing detection. Attached Figure Description

[0034] Figure 1 This is a complete circuit diagram of the pantograph-catenary arc energy detector provided by the present invention;

[0035] Figure 2 This is a schematic diagram of the circuit partitioning provided by the present invention;

[0036] Figure 3 This is an enlarged schematic diagram of the equivalent circuit of the arc detector provided by the present invention;

[0037] Figure 4 This is an enlarged schematic diagram of the measurement circuit provided by the present invention;

[0038] Figure 5 This is an enlarged schematic diagram of the comparator circuit provided by the present invention;

[0039] Figure 6 This is an enlarged schematic diagram of the delay circuit provided by the present invention;

[0040] Figure 7 This is a schematic diagram of the N-channel enhancement field-effect transistor provided by the present invention;

[0041] Figure 8 This is a schematic diagram of the reverse integrating circuit provided by the present invention.

[0042] List of reference numerals

[0043] S1: Switch; R1: First resistor; R2: Second resistor; R3: Third resistor; R4: Fourth resistor; R5: Fifth resistor; R6: Sixth resistor; R7: Seventh resistor; R8: Eighth resistor; R9: Ninth resistor; R 10 : Tenth resistor; R11 Eleventh resistor; R 12 : Twelfth resistor; R 13 : Thirteenth resistor; R 14 : Fourteenth resistor; R 15 : Fifteenth resistor; R 16 : Sixteenth resistor; R 17 : Seventeenth resistor; C1: First capacitor; C2: Second capacitor; C3: Third capacitor; U 1A Amplifier; U 2A Comparator; U3: Timer; Q1: First field-effect transistor; Q2: Second field-effect transistor; Q3: Third field-effect transistor; Q4: Fourth field-effect transistor; Q5: Transistor; D1: First diode; D2: Second diode; V in+ Photovoltage; V o+ Positive voltage; V o- : Negative voltage; V dis Delay control voltage; V comp Trigger control voltage; VCC: Power supply voltage; V ref : Reference voltage; RST: Reset terminal; TRI: Trigger terminal; THR: Threshold terminal; OUT: Output terminal; DIS: Discharge terminal; CON: Control terminal; 1: Output terminal; 2: Inverting terminal; 3: Non-inverting terminal; 4: Ground terminal; 8: Positive power supply terminal. Detailed Implementation

[0044] The following is a detailed explanation with reference to the accompanying drawings.

[0045] The arcing phenomenon radiates electromagnetic waves into the surrounding space. Compared with the solar spectrum, the spectral characteristics of arcing show a significant radiation peak in the ultraviolet band with wavelengths less than 300 nm (i.e., the "solar blind zone"). This characteristic can be used in photoelectric effect-based detection systems.

[0046] Existing detection technologies utilize the electromagnetic wave characteristics of this wavelength band: in the arcing sensors used, the phototubes are responsive to electromagnetic waves with wavelengths in the range of 220–225 nm or 323–329 nm, but not to electromagnetic waves with wavelengths greater than 330 nm. The arcing sensor converts the energy of electromagnetic waves in the solar blind zone into a square wave signal output at a fixed frequency, and ultimately measures the arcing duration precisely by counting the number of square wave cycles. Therefore, existing technologies can only record the arcing duration, not the arcing energy. However, the energy of the arcing is the root cause of the ablation of the pantograph-catenary material.

[0047] For example, existing arc detection technologies utilize ultraviolet, infrared, and optical imaging to detect and classify the energy of arcing phenomena, thereby determining the presence and energy level of arcing and achieving accurate, reliable, and safe monitoring of arcing in railway pantograph-catenary systems and high-voltage lines. It's important to note that this approach employs multi-channel image and signal processing technology to analyze the "energy level" of the arc. In other words, while this approach can distinguish between high, medium, and low energy levels, it cannot directly obtain the absolute energy value of the arc. This energy level determination primarily relies on indirect physical quantities related to energy, such as image brightness, arc area, and temperature changes, processed by algorithms to reflect the relative strength or potential hazard of the arc. Therefore, this technical solution cannot directly measure the specific energy parameters of the arc.

[0048] To address the shortcomings of existing technologies, this invention provides a pantograph-catenary arc energy detector and its detection method. This invention can also provide a pantograph-catenary arc energy detection circuit board and its circuit structure. Furthermore, this invention can provide a dynamic monitoring system and method for arc energy.

[0049] The core objective of this invention is to construct a dynamic monitoring system for arc energy and to provide a scientific basis for analyzing the causes of defects such as carbon slide plate material deterioration and contact line structural damage by establishing a quantitative evaluation system for arc intensity (such as parameters like energy density and power spectrum distribution).

[0050] Example 1

[0051] like Figure 1 and Figure 2 As shown, the pantograph-catenary arc energy detector of the present invention includes an equivalent circuit for an arc detector, a measurement circuit, a comparison circuit, and a delay circuit. The equivalent circuit for an arc detector, the measurement circuit, and the comparison circuit are electrically connected, and the measurement circuit, the comparison circuit, and the delay circuit are electrically connected to each other.

[0052] Since the connecting lines are continuous, for example, the output terminal of the equivalent circuit of the arc detector is equivalent to the input terminal of the measurement circuit, the present invention does not distinguish between the input terminal and the output terminal in detail when describing the circuit connection relationship.

[0053] like Figure 1 and Figure 2 As shown, the photovoltage terminal (V) of the equivalent circuit of the arc detector in+ The photovoltage terminal (V) of the arc detector equivalent circuit is connected to the second resistor R2 in the measurement circuit. in+ (terminal) and the sixteenth resistor R in the comparator circuit 16 connect.

[0054] like Figure 1 and Figure 2 As shown, the positive voltage terminal (V) of the measuring circuito+ The terminal (V) is connected to the cathode of the first diode D1 in the comparator circuit. The delay control voltage terminal (V) of the measurement circuit is connected to the cathode of the first diode D1 in the comparator circuit. dis The terminal is connected to the cathode of the second diode D2 in the comparator circuit, and also to the tenth resistor R in the delay circuit. 10 Connect to the drain of the fourth field-effect transistor Q4. The negative voltage terminal (V) of the measurement circuit. o- (End) is not connected to the circuit.

[0055] like Figure 1 and Figure 2 As shown, the trigger control voltage terminal (V) of the comparator circuit comp The terminal and the twelfth resistor R of the delay circuit 12 The gates of the second field-effect transistor Q2 and the third field-effect transistor Q3 are connected respectively.

[0056] In this invention, the equivalent circuit of the arc detector is used to convert arc energy of different power levels into photocurrent in a proportional manner, and outputs photovoltage V. in+ Photovoltage is the voltage signal corresponding to photocurrent.

[0057] The measurement circuit includes an integrating circuit and a discharging circuit. The integrating circuit is based on the photovoltage V input to the equivalent circuit of the arc detector. in+ The arc energy is accumulated, and the discharge circuit converts the photocurrent of the arc energy into its corresponding photovoltage V. in+ .

[0058] The comparator circuit is used to convert the photovoltage V in+ With reference voltage V ref Comparison, when the photovoltage V in+ Greater than the reference voltage V ref At that time, the output trigger control voltage V comp The voltage is high (power supply voltage VCC). At this time, the trigger control voltage V... comp It can approach the power supply voltage VCC, that is, it is approximately equal to the power supply voltage VCC. When the photovoltage V in+ Not greater than the reference voltage V ref At that time, the output trigger control voltage V comp It is zero.

[0059] The delay circuit is used to control the delay control voltage V of the output based on the interval between two arc ignitions. dis Preferably, when the interval between two arc ignitions is less than the arc event window time, the output delay control voltage V... dis The voltage level is kept low, causing the delay circuit to treat the two arcing events as a single event. If the interval between the two arcing events is not less than the arcing event window time, the delay control voltage V output by the delay circuit will be... dis The level becomes high, causing the delay circuit to treat the two arcing events as independent events.

[0060] like Figure 3 As shown, "key = space" describes the triggering method of switch S1, meaning that pressing the space bar on the keyboard will control... Figure 3 The switching on and off of switch S1 is controlled. Simple keyboard operation simulates the switch action, facilitating testing of the equivalent circuit of the arc detector under different switching states. "I1" is the identifier for a current source, representing a phototube capable of providing a stable 0.1mA current output, simulating a specific current input in a real circuit. In this invention, the current source is a phototube.

[0061] like Figure 3 As shown, the circuit structure of the equivalent circuit of the arc detector is as follows: the phototube is connected to the photovoltage terminal (V) through switch S1. in+ The phototube and the grounding terminal form a switchable path, respectively equivalent to two cases: the presence of arcing and the absence of arcing. Preferably, one end of the phototube is connected to the grounding terminal, and the other end is grounded through a switchable switch S1. When arcing occurs, with a positive current applied to the phototube, the phototube converts the electromagnetic waves radiated by the arc into a photocurrent. This is equivalent to the switch S1 closing to the photovoltage terminal (V). in+ (End) situation. When switch S1 is closed, the output photovoltage V is... in+ .

[0062] Specifically, the equivalent circuit of the arc detector is a simplified representation of an existing phototube, such as... Figure 3 As shown. The main function of the equivalent circuit of the arc detector is to convert arc phenomena of different power levels into corresponding current signals proportionally. The current signals also constitute the input basis of the entire technical solution of this invention. When an arc occurs, electromagnetic waves are radiated into the surrounding space. Among them, the components with wavelengths less than 320nm in the ultraviolet band are significantly higher than those of background light sources such as natural light. This band is called the "solar blind zone". Under the condition of applying a positive current to the phototube, the electromagnetic waves in the solar blind zone reach the cathode and their energy can be absorbed by electrons. If the energy absorbed by the electrons exceeds their work function, they will be excited into free electrons and migrate to the anode under the action of the electric field, thereby forming a photocurrent. Phototubes with this kind of response characteristic include models such as R7154 and R6354. This invention provides examples of phototube models, as shown in Table 1.

[0063] Table 1: List of Phototube Models

[0064]

[0065] Table 1 lists the cathode unity power response, anode unity power response, amplification factor, maximum average anode current, anode dark current, and maximum anode dark current for each type of phototube. The present invention can use the phototubes listed in Table 1 to fabricate the pantograph-catenary arc energy detector.

[0066] According to a preferred embodiment, the circuit structure of the measurement circuit includes an integrating circuit and a discharging circuit. For example... Figure 4 As shown, the first resistor R1, the third resistor R3, and the amplifier U... 1A Together with the first capacitor C1, they form an integrating circuit. The fourth resistor R4 and the first field-effect transistor Q1 together form a discharge circuit for the first capacitor C1. The output voltage V across the first capacitor C1 is... o =V o+ -V o- The measurement is to be performed.

[0067] Preferably, such as Figure 4 As shown, the first resistor R1 is 10kΩ. The third resistor R3 is 35.7kΩ. The fourth resistor R4 is 5kΩ. The first capacitor C1 is 0.1μF. Amplifier U 1A The model number is LM358AH. The power supply voltage VCC is 15V. The first field-effect transistor Q1 is a 2N7000. Using this section as an example, the size or model number of each component in this invention is exemplary data and not the only implementation.

[0068] like Figure 4 As shown, in the integrating circuit, amplifier U 1A The positive power supply terminal 8 is connected to the power supply, and the ground terminal 4 is connected to the ground terminal. Amplifier U 1A The non-inverting input 3 is connected to the ground terminal through the first resistor R1. Amplifier U 1A The non-inverting terminal 3 is connected to the photovoltage terminal (V) through the second resistor R2. in+ (End). Amplifier U 1A The inverting terminal 2 is connected to the negative voltage terminal of the measuring circuit (V). o- (End), and connected to the ground terminal through the third resistor R3. Amplifier U 1A Output terminal 1 is connected to the positive voltage terminal of the measuring circuit (V). o+ The two ends of the first capacitor C1 are connected to the positive voltage terminal (V). o+ (terminal) and negative voltage terminal (V) o- (End). Connect one end of the first resistor R1 connected to the ground terminal and the other end of the third resistor R3 connected to the ground terminal.

[0069] like Figure 4As shown, in the discharge circuit, the circuit formed by the fourth resistor R4 and the first field-effect transistor Q1 is connected in parallel with the first capacitor C1, forming the discharge circuit for the first capacitor C1. The source of the first field-effect transistor Q1 is connected to the first capacitor C1 and simultaneously connected to the negative voltage terminal (V) of the measuring circuit. o- The drain of the first field-effect transistor Q1 is connected to the first capacitor C1 through the fourth resistor R4 and is also connected to the positive voltage terminal (V) of the measurement circuit. o+ end).

[0070] The gate of the first field-effect transistor Q1 is connected to the fifteenth resistor R. 15 Grounded and its on / off state controlled by a delayed control voltage. Preferably, the fifteenth resistor R 15 It is 1MΩ.

[0071] According to a preferred embodiment, the measurement method of the measurement circuit is as follows: when the first field-effect transistor Q1 is turned off, the output voltage of the measurement circuit is:

[0072] In the above formula, V o Indicates the output voltage, V o0 Let i(t) represent the initial voltage of the first capacitor C1, and i(t) represent the photocurrent output by the phototube. Here, R1 also represents the resistance value of the first resistor, R3 also represents the resistance value of the third resistor, and C1 also represents the capacitance value of the first capacitor. Preferably, when the interval between two arcing events is less than 100μs, it is counted as one arcing event. In this case, the first field-effect transistor Q1 needs to be kept off to retain the previous charging voltage V of the first capacitor C1. o0 .

[0073] Preferably, the output voltage is the same as the initial voltage V. o0 This is relevant. According to GB / T 32592-2023, if the interval between two arcing events is less than 100μs, it is considered as one arcing event, and the arcing time will be accumulated. Therefore, if the interval between two arcing events exceeds 100μs, the first capacitor C1 needs to be discharged in time, and the initial voltage V... o0 It will be affected by the residual charge in the capacitor and will not be zero.

[0074] At the initial voltage V o0 Due to this influence, subsequent measurements of arc energy will be overestimated. At this point, V... dis =15V, the first field-effect transistor Q1 is turned on. Assuming the first field-effect transistor Q1 operates in the saturation region, the discharge time τ of the first capacitor C1 can be expressed as:

[0075] τ = R4C = 0.5μs.

[0076] The second resistor R2 does not participate in the integrating circuit. The function of the second resistor R2, together with the first resistor R1, is to convert the 0–0.1mA current signal into a 0–15V photovoltage V. in+ ,for Figure 5 The comparison circuit shown is used. Preferably, the second resistor R2 is 140kΩ.

[0077] According to the phototube models listed in Table 1, even without arcing (i.e., without the conditions for generating photocurrent), the phototube may still generate a dark current of 10nA to 100nA. Based on the output voltage calculation formula, without restrictions, the first capacitor C1 will be charged in the absence of arcing, leading to an abnormally high output voltage and thus a false alarm. This could also be converted into the initial voltage V in the output voltage calculation formula. o0 This leads to an overestimation of the arcing energy measurement. Therefore, the converted positive voltage V in+ The voltage is 1.5–15 mV, therefore a comparator circuit is required for control.

[0078] The main function of the comparator circuit is to convert the photovoltage V in+ With reference voltage V ref Compare. V ref =100mV. When V iN+ >V ref At that time, V comp =15V, otherwise V comp =0V.

[0079] Preferably, the integrating circuit is not limited to Figure 4 The circuit structure shown can also be Figure 8 The inverting integrator circuit shown is an example. Figure 8 As shown, the inverting integrator circuit consists of an amplifier, a resistor R, and a capacitor C. The input signal U... I Connected to the inverting terminal (u) via resistor R - Terminal (u), in-phase terminal (u) + The terminal is connected to the ground terminal, and capacitor C is connected across the output terminal (u). o The input terminal and the output terminal form a feedback loop.

[0080] Due to the ideal characteristics of the amplifier, the "virtual short" (u) condition is met. + =u - , here u + =0, so u - ≈0, the inverting terminal is "virtual ground") and "virtual open" (the current flowing into the input terminal is approximately 0, i.e., i R ≈i C ).

[0081] Figure 8 The principle of inverse integration is:

[0082] If U I It is a DC signal (U) I =U I0 If the constant is given, then the output voltage u o It changes linearly with time to achieve integration of the input signal, and the negative sign indicates its inverting characteristic. Simply put, it uses the "virtual ground" of the op-amp to stabilize the input current, and the current is accumulated over time through the charging and discharging of capacitor C and converted into voltage output, thus completing the integration.

[0083] like Figure 5 As shown, the circuit structure of the comparator circuit is as follows: the base of transistor Q5 is connected to the seventeenth resistor R. 17 The anodes of the first diode D1 and the second diode D2 are connected respectively. The base of transistor Q5 is connected to the seventeenth resistor R. 17 The eighth resistor R8 is connected to the power supply. The collector of transistor Q5 is connected to the sixteenth resistor R. 16 With photovoltage terminal (V in+ The emitter of transistor Q5 is connected to ground. Simultaneously, the emitter of transistor Q5 is connected through the eleventh resistor R. 11 It is connected to the anode of the first diode D1 and the anode of the second diode D2, respectively.

[0084] Comparator U 2A The positive power supply terminal 8 is connected to the power supply, and its ground terminal 4 is connected to the ground. Comparator U 2A The inverting terminal is connected to the ground terminal through the sixth resistor R6, and the comparator U 2A The inverting terminal is connected to the power supply via the fifth resistor R5. Comparator U 2A The reverse terminal is also connected to the sixth resistor R6 and the eleventh resistor R 11 The anodes of the first diode D1 and the second diode D2 are connected respectively. Comparator (U 2A The non-inverting terminal 3 of transistor Q5 is connected to the collector of transistor Q5. And through the sixteenth resistor R... 16 With photovoltage terminal (V in+ (End) connection. Comparator (U) 2A The output terminal 1 of the comparator circuit is connected to the trigger control voltage terminal (V). comp (End) connection.

[0085] The cathode of the first diode is connected to the positive voltage terminal (V) of the measuring circuit. o+ The cathode of the second diode is connected to the delay control voltage terminal (V). dis (End) connection.

[0086] Preferably, the eleventh resistor R 11 The emitter of transistor Q5 and the sixth resistor R6 are connected to the ground terminal through the same line.

[0087] Preferably, such as Figure 5 As shown, the fifth resistor R5 has a current rating of 14.9 kΩ. The sixth resistor R6 has a current rating of 0.1 kΩ. The eighth resistor R8 has a current rating of 1 kΩ. The eleventh resistor R... 11 It is 1kΩ. The sixteenth resistor R 16 It is 1kΩ. The seventeenth resistor R 17 The ohmmeter is 100kΩ. Comparator U 2A The model number is LM393DG. The first diode D1 is model number 1N3064. The second diode D2 is model number 1N3064. The transistor Q5 is model number 2N2222. This section provides examples of the size and model number of each component.

[0088] Whether the comparator circuit works also depends on the positive voltage V. o+ and delay control voltage V dis Table 2 lists the operating states of the comparator circuit, i.e., the operating states relative to the positive voltage V. o+ and delay control voltage V dis The corresponding various situations.

[0089] Table 2: Operating Status of the Comparator Circuit

[0090]

[0091] As shown in Table 2, when the positive voltage V o+ The voltage ranges from 2 to 15V, with a delay control voltage V. dis When the voltage is 15V, it indicates that the first capacitor C1 is discharging and has a significant residual charge. The comparator circuit is not operating, and the trigger control voltage V is activated at this time. comp =0V.

[0092] When the positive voltage V o+ The voltage range is 0–15V, and the delay control voltage V is... dis When the voltage is 0V, it indicates that an arcing event has been detected, and the first capacitor C1 is charging. The comparator circuit is working normally.

[0093] When the positive voltage V o+ The delay control voltage is 0-2V. dis A voltage of 15V indicates that no arcing has occurred, and the first capacitor C1 has discharged all residual charge. The comparator circuit is operating normally.

[0094] Preferably, the purpose of the delay circuit of the present invention is to calculate the interval between two arc ignitions, thereby controlling the delay control voltage V. dis The core component of the delay circuit is timer U3. Timer U3 is preferably a 555 chip, and its truth table is shown in Table 3.

[0095] Table 3: Truth Table for 555 Chip

[0096]

[0097] Table 3 lists the truth values ​​for the reset terminal RST, trigger terminal TRI, threshold terminal THR, output terminal OUT, and discharge terminal DIS. H represents high level, L represents low level, and X represents irrelevant terms. VCC represents the power supply voltage.

[0098] like Figure 6 As shown, the circuit structure of the delay circuit is as follows: The VCC terminal of timer U3 is connected to the power supply. The GND terminal of timer U3 is connected to the ground terminal. The reset terminal RST of timer U3 is connected to the drain of the third field-effect transistor Q3 through the ninth resistor R9, and is also connected to the power supply. The discharge terminal DIS of timer U3 is shorted to the threshold terminal THR, connected to the second capacitor C2, and connected to the power supply through the seventh resistor R7, thus forming the core of the delay circuit. The trigger terminal TRI of timer U3 is connected to the drain of the third field-effect transistor Q3 and the second capacitor C2 respectively, and is controlled by the on / off signal of the third field-effect transistor Q3. The trigger terminal TRI of timer U3 is also connected to the power supply through the ninth resistor R9. The control terminal CON of timer U3 is connected to the ground terminal through the third capacitor C3 to achieve filtering and voltage regulation. The output terminal OUT of timer U3 is connected to the gate of the fourth field-effect transistor Q4, outputting the delay control signal. The output terminal OUT of timer U3 is also connected to the power supply through the thirteenth resistor R7. 13 Connect to the ground terminal. The gate of the second field-effect transistor Q2 is connected to the trigger control voltage terminal (V) of the comparator circuit. comp (end), and through the twelfth resistor R 12 Connect to the ground terminal. The source of the second field-effect transistor Q2 is connected to the fourteenth resistor R. 14 Connect the ground terminal, and simultaneously connect it to the source of the third field-effect transistor Q3. The gate of the third field-effect transistor Q3 is connected to the trigger control voltage terminal (V) of the comparator circuit. comp The source of the third field-effect transistor Q3 is connected to the ground terminal. The drain of the third field-effect transistor Q3 is connected to the power supply through the ninth resistor R9. The drain of the fourth field-effect transistor Q4 is connected to the delay control voltage terminal (V) of the delay circuit. dis (End) connected, and through the tenth resistor R 10 Connected to the power supply. The gate of the fourth field-effect transistor Q4 is connected to the thirteenth resistor R. 13 Connect to the ground terminal. The source of the fourth field-effect transistor Q4 is connected to the ground terminal.

[0099] like Figure 6 As shown, the seventh resistor R7 has a resistance of 909Ω. The ninth resistor R9 has a resistance of 1kΩ. The tenth resistor R... 10 The resistance is 1kΩ. The twelfth resistor R 12 It is 500kΩ. The thirteenth resistor R 13 It is 1MΩ. The fourteenth resistor R 14The current rating is 5Ω. The second MOSFET Q2 is a 2N7000. The third MOSFET Q3 is a 2N7000. The fourth MOSFET Q4 is a 2N7000. The timer U3 is an LM555CM. This section provides examples of component sizes and models.

[0100] Preferably, the delay circuit uses a second field-effect transistor Q2, a third field-effect transistor Q3, and a fourth field-effect transistor Q4 as control devices. The second field-effect transistor Q2, the third field-effect transistor Q3, and the fourth field-effect transistor Q4 are preferably N-channel enhancement-mode field-effect transistors. The structure of an N-channel enhancement-mode field-effect transistor is as follows... Figure 7 As shown.

[0101] like Figure 7 As shown, the voltage V between the drain D and the source S DS When the voltage is greater than 0, to make the drain D and source S conduct, a voltage greater than the turn-on voltage V needs to be applied to the gate G. GS0 The on-state voltage V GS If V GS <V GS0 If the N-channel enhancement-mode MOSFET is cut off, there will be no conduction between the drain (D) and source (S).

[0102] The control principle of the pantograph-catenary arc energy detector is as follows.

[0103] like Figure 6 As shown, the trigger control voltage terminal (V) comp The terminal is connected to the gates of the second field-effect transistor Q2 and the third field-effect transistor Q3. When no arcing occurs and only dark current exists, the photovoltage V obtained by the measuring circuit is... in+ Less than the reference voltage V ref V in+ <V ref At that time, the delay control voltage V of the delay circuit dis Approaching zero, i.e., trigger control voltage V comp ≈0V. The gates of the second field-effect transistor Q2 and the third field-effect transistor Q3 are both at a low level, and both the second field-effect transistor Q2 and the third field-effect transistor Q3 are in the off state. The trigger terminal TRI of the timer U3 remains at a high level.

[0104] The output state of timer U3 is:

[0105] (1) If V THR If the voltage is greater than 2 / 3VCC, both the output terminal OUT and the discharge terminal DIS will output a low level, and the threshold terminal THR will be at a low level. THR This is the voltage at the threshold terminal THR.

[0106] (2) If V THRIf the voltage is less than 2 / 3VCC, then the output terminal OUT and the discharge terminal DIS remain in their previous states. The discharge terminal DIS outputs a low level or exhibits a high impedance state. If the output of the discharge terminal DIS is low, then the output terminal OUT outputs a low level. If the output of the discharge terminal DIS exhibits a high impedance state, then the output terminal OUT remains in its previous state, and the third capacitor C3 charges until V... THR >2 / 3VCC, after which both the output terminal OUT and the discharge terminal DIS output a low level.

[0107] Preferably, the maximum time required for the above process is: t = 1.1C3R7 = 100μs.

[0108] In the above formula, C3 represents the capacitance value of the third capacitor C3, and R7 represents the resistance value of the seventh resistor R7.

[0109] After the output terminal OUT outputs a low level, the control voltage V is delayed. dis =15V, the first field-effect transistor Q1 is turned on, and the first capacitor C1 does not store charge.

[0110] When an arc occurs, the phototube generates a photocurrent. The equivalent circuit of the arc detector inputs the photocurrent into the measurement circuit, which then converts the photocurrent into a photovoltage V. in+ Input comparator circuit. When the photovoltage V in+ Greater than the reference voltage V ref V in+ >V ref The output voltage of the comparator circuit is the trigger control voltage V. comp =15V. Both the second field-effect transistor Q2 and the third field-effect transistor Q3 are in the conducting state, the internal transistor of timer U3 is turned on, and the output terminal OUT of timer U3 outputs a high level. At the same time, because the third field-effect transistor Q3 is turned on, the second capacitor C2 cannot charge, and the output terminal OUT of timer U3 will remain at 15V. Therefore, the delay control voltage output by the delay circuit is zero, i.e., V. dis =0, the first field-effect transistor Q1 is in the off state, and the first capacitor C1 continues to charge until the arc ends.

[0111] At this time, the trigger control voltage V is activated. comp =0, the second field-effect transistor Q2 and the third field-effect transistor Q3 are both in the off state, the discharge terminal DIS of timer U3 presents a high impedance state, the second capacitor C2 charges to above 2 / 3VCC, and then the discharge terminal DIS outputs a low level, the fourth field-effect transistor Q4 is in the off state, and the delay control voltage V dis =15V, the first field-effect transistor Q1 is turned on, and the first capacitor C1 is discharged.

[0112] The time from the trigger terminal TRI=0 to the discharge terminal DIS outputting a low level is 100μs. If an arc occurs within this time, the first capacitor C1 will not discharge but will continue to charge. According to relevant regulations, two arcs with an interval of less than 100μs are considered as the same arc.

[0113] This invention utilizes a circuit structure to detect the arc energy of the pantograph-catenary system, offering the following technical advantages:

[0114] First, the arcing event window time is set to 100μs. If the interval between two arcing events is less than this time, they are considered as the same event, thus avoiding system delays caused by repeated arcing triggers. This rapid response mechanism enables the pantograph-catenary arcing energy detector to make a judgment and respond immediately when an arcing occurs, which is significantly better than the response lag problem caused by image processing delays in traditional image acquisition and algorithm processing methods.

[0115] Secondly, the equivalent circuit of the arc detector directly converts the arc energy into photocurrent, and the energy accumulation measurement is achieved through an integrating circuit. The output voltage has a linear relationship with the arc energy and has a clear physical meaning. This circuit integration-based measurement method avoids the errors caused by relying on indirect parameters such as image brightness and heat flux in traditional methods, thus improving the accuracy of arc energy measurement. Simultaneously, the comparator circuit sets a reference voltage V... ref For photovoltage V in+ Perform threshold judgment to ensure that the arcing energy only reaches the reference voltage V. ref The subsequent actions are triggered only when the time is right, effectively avoiding false triggering caused by dark current or noise. The delay circuit controls the charging and discharging process of the second capacitor C2 to identify the time window of the arcing event, ensuring more accurate logical judgment of the arcing event and avoiding misjudgment and omission. In addition, the circuit structure of this invention resets the measurement circuit through the discharge mechanism of the first capacitor C1 after the arcing ends, providing accurate initial conditions for the measurement of the next arcing event, further improving the repeatability and consistency of the measurement.

[0116] Third, from the user's perspective, this invention has significant advantages in terms of stability, operability, and intelligent recognition capabilities. This invention achieves direct measurement and event recognition of arc energy through hardware circuitry, eliminating the need for complex image processing algorithms or machine learning models. This reduces the deployment and maintenance costs of the pantograph-catenary arc energy detector and improves its operability and stability.

[0117] Meanwhile, the setting of the arcing event window time (100μs) enables the circuit structure to intelligently identify the continuity of arcing events, avoiding repeated identification of short-interval arcing and improving the intelligence level of the invention. Users can achieve automatic identification and energy assessment of arcing events without manual intervention, improving the automation level and ease of use of the pantograph-catenary arcing detector.

[0118] Furthermore, this invention can continuously accumulate energy during arcing and automatically discharge and reset after arcing ends, ensuring the independence and accuracy of each measurement and providing users with stable and reliable arcing energy assessment results.

[0119] It should be noted that the specific embodiments described above are exemplary. Those skilled in the art can devise various solutions inspired by the disclosure of this invention, and these solutions all fall within the scope of this invention and its protection. Those skilled in the art should understand that this specification and its accompanying drawings are illustrative and not intended to limit the scope of the claims. The scope of protection of this invention is defined by the claims and their equivalents. This specification contains multiple inventive concepts; phrases such as "preferredly" or "according to a preferred embodiment" indicate that the corresponding paragraph discloses an independent concept. The applicant reserves the right to file divisional applications based on each inventive concept.

Claims

1. A pantograph arcing energy detector, characterized by, The detector comprises: The arc detection equivalent circuit proportionally converts arc energy of different power sizes into photocurrent; a measurement circuit that integrates the photocurrent input from the arc detector equivalent circuit to accumulate the arc energy, and converts the photocurrent of the arc energy into a corresponding photo-voltage (V in+ ); comparing circuit compares the photovoltage (V in+ ) with a reference voltage (V ref ), and outputs a trigger control voltage (V comp ) as high / power voltage (VCC) when the photovoltage (V in+ ) is greater than the reference voltage (V ref ), and outputs the trigger control voltage (V comp ) as zero when the photovoltage (V in+ ) is not greater than the reference voltage (V ref ). A delay circuit controls an output delay control voltage (V dis ) based on an interval time between two arcing events; wherein, when the interval time between the two arcing events is less than an arcing event window time, the delay control voltage (V dis ) output by the delay circuit remains low / zero, such that the delay circuit considers the two arcing events as the same event; and when the interval time between the two arcing events is not less than the arcing event window time, the delay control voltage (V dis ) output by the delay circuit becomes high, such that the delay circuit considers the two arcing events as independent events. The arc detection equivalent circuit, the measurement circuit and the comparison circuit are electrically connected, and the measurement circuit, the comparison circuit and the delay circuit are electrically connected with each other.

2. Pantograph arc energy detector according to claim 1, characterized in that The circuit structure of the arc detection equivalent circuit is: The photoelectric tube and the photovoltage end and the ground end form an on-off path through a switch (S1), and is equivalent to two cases of existing arc and non-existing arc respectively; When the arc occurs, the photoelectric tube converts the electromagnetic wave radiated by the arc to the surrounding environment into photocurrent under the condition of applying a forward current to the photoelectric tube; at this time, the switch is equivalent to being closed to the photovoltage end.

3. Pantograph arc energy detector according to claim 1 or 2, characterized in that The circuit structure of the measurement circuit comprises: Integrating circuit, amplifier (U 1A The non-inverting input (3) of the amplifier is connected to the ground terminal through the first resistor (R1), and the amplifier (U) 1A The non-inverting input (3) of the amplifier is connected to the photovoltage input via a second resistor (R2); the amplifier (U) 1A The inverting input (2) of the amplifier is connected to the negative voltage terminal of the measuring circuit, and connected to the ground terminal through the third resistor (R3). 1A The output terminal (1) of the first capacitor (C1) is connected to the positive voltage terminal of the measuring circuit; the two ends of the first capacitor (C1) are connected to the positive voltage terminal and the negative voltage terminal of the measuring circuit, respectively. A discharging circuit, the circuit formed by the fourth resistor (R4) and the first field effect transistor (Q1) is connected in parallel with the first capacitor (C1) and forms the discharging circuit of the first capacitor (C1); the gate of the first field effect transistor (Q1) is grounded through the fifteenth resistor (R 15 ) and is controlled by the delay control voltage (V dis ).

4. Pantograph arc energy detector according to any one of claims 1 to 3, characterized in that The measurement mode of the measurement circuit is: When the first field effect tube (Q1) is disconnected, the output voltage of the measurement circuit is: where V o0 represents the initial voltage of the first capacitor (C1), i(t) represents the photoelectric current of the phototube output, R1 represents the resistance value of the first resistor, R3 represents the resistance value of the third resistor, and C1 represents the capacitance value of the first capacitor.

5. Pantograph arc energy detector according to any one of claims 1 to 4, characterized in that The circuit structure of the comparison circuit is: The base of the triode (Q5) is connected with the anode of the first diode (D1) and the anode of the second diode (D2) through the seventeenth resistor (R 17 ) respectively, and the base of the triode (Q5) is connected with the power supply through the seventeenth resistor (R 17 ) and the eighth resistor (R8). The collector of the triode (Q5) is connected to the photovoltage terminal through the sixteenth resistor (R 16 ) The emitter of the triode (Q5) is connected to the ground, and the emitter of the triode (Q5) is connected to the anode of the first diode (D1) and the anode of the second diode (D2) respectively through the eleventh resistor (R 11 ) The reverse end of the comparator (U 2A ) is connected to the ground end through the sixth resistor (R6), and the forward end of the comparator (U 2A ) is connected to the power supply through the fifth resistor (R5). 2A The reverse end of the comparator (U 11 ) is connected to the anode of the first diode (D1) and the anode of the second diode (D2) through the sixth resistor (R6) and the eleventh resistor (R The in-phase terminal (3) of the comparator (U 2A ) is connected to the collector of the transistor (Q5) and to the photovoltage terminal through the sixteenth resistor (R 16 ) The output end (1) of the comparator (U 2A ) is connected with the trigger control voltage end of the comparison circuit. The cathode of the first diode (D1) is connected with the positive voltage end of the measurement circuit; The cathode of the second diode (D2) is connected with the delay control voltage end.

6. Pantograph arc energy detector according to any one of claims 1 to 5, characterized in that The circuit structure of the delay circuit is: The VCC end of the timer (U3) is connected with the power supply; The GND end of the timer (U3) is connected with the ground end; The reset end (RST) of the timer (U3) is connected with the drain of the third field effect tube (Q3) through the ninth resistor (R9) and the power supply; The discharge end (DIS) of the timer (U3) is short-circuited with the threshold end (THR), connected with the ground end through the second capacitor (C2), and connected with the power supply through the seventh resistor (R7), thereby forming the core of the delay circuit; The trigger end (TRI) of the timer (U3) is connected with the drain of the third field effect tube (Q3) and the second capacitor (C2) respectively, and is controlled by the on-off signal of the third field effect tube (Q3); the trigger end (TRI) of the timer (U3) is also connected with the power supply through the ninth resistor (R9); The control end (CON) of the timer (U3) is connected with the ground end through the third capacitor (C3) to realize filtering and voltage stabilization; The output terminal (OUT) of the timer (U3) is connected with the gate of the fourth field effect transistor (Q4) to output a delay control signal, and the output terminal (OUT) of the timer (U3) is also connected with the ground terminal through the thirteenth resistor (R 13 ). The gate of the second field effect transistor (Q2) is connected to the trigger control voltage end of the comparison circuit, and is connected to the ground end through the twelfth resistor (R 12 ); the source of the second field effect transistor (Q2) is connected to the ground end through the fourteenth resistor (R 14 ), and is connected to the source of the third field effect transistor (Q3). The gate of the third field effect tube (Q3) is connected with the trigger control voltage end of the comparison circuit, the source of the third field effect tube (Q3) is connected with the ground end, and the drain of the third field effect tube (Q3) is connected with the power supply through the ninth resistor (R9); The drain of the fourth field effect transistor (Q4) is connected with the delay control voltage end of the delay circuit, and is connected with the power supply through the tenth resistor (R 10 ); the gate of the fourth field effect transistor (Q4) is connected with the ground end through the thirteenth resistor (R 13 ); and the source of the fourth field effect transistor (Q4) is connected with the ground end.

7. Pantograph arc energy detector according to any one of claims 1 to 6, characterized in that The control principle of the pantograph arc energy detector comprises: When no arc occurs and only dark current exists, the photo-voltage (V in+ ) inputted by the comparison circuit is less than the reference voltage (V ref ), at this time the delay control voltage (V dis ) of the delay circuit tends to zero, the gates of the second field effect transistor (Q2) and the third field effect transistor (Q3) are both at low level, the second field effect transistor (Q2) and the third field effect transistor (Q3) are both in the off state, and the trigger end (TRI) of the timer (U3) continuously keeps high level; The output state of the timer (U3) is: If V THR > 2 / 3VCC, the output terminal (OUT) and the discharge terminal (DIS) both output low level, and the threshold terminal (THR) is at low level. If V THR <2 / 3VCC, the output terminal (OUT) and the discharge terminal (DIS) remain unchanged, and the discharge terminal (DIS) outputs a low level or presents a high resistance state. If the output of the discharge terminal (DIS) is low, the output terminal (OUT) outputs low. If the output of the discharge terminal (DIS) is high impedance, the output terminal (OUT) remains in the previous state, the third capacitor (C3) is charged until V THR >2 / 3VCC, and then the output terminal (OUT) and the discharge terminal (DIS) both output low.

8. Pantograph arc energy detector according to any one of claims 1 to 7, characterized in that The control principle of the pantograph arc energy detector comprises: When an arc occurs, the equivalent circuit of the arc detector inputs a photocurrent into the measurement circuit, and the measurement circuit converts the photocurrent into a photovoltage (V). in+ The input comparator circuit, when the photovoltage (V) in+ ) greater than the reference voltage (V ref When ), the trigger control voltage (V) output by the comparator circuit comp ) represents a high level / power supply voltage (VCC); The second field effect transistor (Q2) and the third field effect transistor (Q3) are both in the on state, the output end (OUT) of the timer (U3) outputs a high level, the second capacitor (C2) cannot be charged, the delay control voltage (V dis ) output by the delay circuit is zero, and the first field effect transistor (Q1) is in the off state. The first capacitor (C1) continues to be charged until the end of the arc.

9. A detection method for a pantograph-catenary arc energy detector, characterized in that, The detection method comprises: The arc detection equivalent circuit, the measurement circuit and the comparison circuit are electrically connected, and the measurement circuit, the comparison circuit and the delay circuit are electrically connected with each other; The arc detection equivalent circuit proportionally converts arc energy of different power sizes into photocurrent; The photo current input of the equivalent circuit of the arc detection device is accumulated by the integrating circuit based on the measurement circuit, and the photo current of the arc energy is converted into corresponding photo voltage (V in+ ). The photovoltage (V in+ ) is compared by a comparison circuit with a reference voltage (V ref ), when the photovoltage (V in+ ) is greater than the reference voltage (V ref ), the output trigger control voltage (V comp ) is high level / power voltage (VCC); when the photovoltage (V in+ ) is not greater than the reference voltage (V ref ), the output trigger control voltage (V comp ) is zero; The delay control voltage (V dis ) outputted by the delay circuit is controlled based on the interval time of two arcing; wherein, when the interval time of two arcing is less than the arcing event window time, the delay control voltage (V dis ) outputted by the delay circuit remains low / zero, so that the delay circuit considers two arcing as the same event; if the interval time of two arcing is not less than the arcing event window time, the delay control voltage (V dis ) outputted by the delay circuit becomes high, so that the delay circuit considers two arcing as independent events.

10. A method of probing according to claim 9, characterised in that, The detection method comprises: When there is an arc, the arc detector equivalent circuit inputs the photoelectric current into the measurement circuit, the measurement circuit converts the photoelectric voltage (V in+ ) into the photoelectric voltage (V in+ ), and when the photoelectric voltage (V in+ ) is greater than the reference voltage (V ref ), the trigger control voltage (V comp ) output by the comparison circuit is high / power voltage (VCC). In the delay circuit, the second field effect transistor (Q2) and the third field effect transistor (Q3) are both in the on state, the output end (OUT) of the timer (U3) outputs a high level, the second capacitor (C2) cannot be charged, the delay control voltage (V dis ) output by the delay circuit is zero, and the first field effect transistor (Q1) is in the off state. The first capacitor (C1) continues to be charged until the end of the arc.

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