Peak voltage absorption circuit and full-bridge converter circuit
By designing a peak voltage absorption circuit and utilizing the cooperation of energy storage elements and switching elements, the problem of device damage caused by peak voltage in semiconductor switching transistor circuits is solved, achieving stable circuit operation and repeated use of energy storage elements.
Patent Information
- Application Number
- CN202511907985.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-17
- Publication Date
- 2026-02-27
AI Technical Summary
In semiconductor switching circuits, due to the presence of parasitic inductance or leakage inductance, the switching transistor will generate voltage spikes during conduction or turn-off, which can damage the device and affect the normal operation of the circuit.
Design a peak voltage absorption circuit, including an energy storage element and a switching element. By controlling the switching element to turn on and off, the peak voltage is absorbed or released to prevent the energy storage element from overloaded.
It effectively suppresses voltage spikes in semiconductor switching circuits, protects devices, ensures normal circuit operation, and allows energy storage elements to be reused.
Smart Images

Figure CN121584994A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of peak voltage absorption technology, and in particular to a peak voltage absorption circuit and a full-bridge converter circuit. Background Technology
[0002] In semiconductor switching circuits, due to the presence of parasitic inductance or leakage inductance, voltage spikes are generated across the switching transistor during conduction, switching on, and switching off. When these voltage spikes exceed the rated voltage for each period in the semiconductor switching circuit, they can damage the device and affect the normal operation of the circuit. Therefore, how to suppress the voltage spikes generated in semiconductor switching circuits has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0003] To solve the above-mentioned technical problems, or at least partially solve them, this disclosure provides a spike voltage absorption circuit and a full-bridge converter circuit, which can suppress spike voltages in the circuit.
[0004] This disclosure provides a spike voltage absorption circuit, including an energy storage element, a first switching element, and a second switching element; The energy storage element and the first switching element are connected in series between the voltage generation node and the reference voltage terminal; The energy storage element and the second switching element are connected in series between the voltage generation node and the ground terminal; When the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, the first switching element is turned on and the second switching element is turned off; when the voltage at the voltage generation node is less than the voltage at the ground terminal, the second switching element is turned on and the first switching element is turned off.
[0005] Optionally, the first switching element includes a first diode, and / or the second switching element includes a second diode; The positive terminal of the first diode is connected to the voltage generation node through an energy storage element, and the negative terminal of the first diode is connected to the reference voltage terminal; the positive terminal of the second diode is connected to the ground terminal, and the negative terminal of the second diode is connected to the voltage generation node through an energy storage element.
[0006] Optionally, the spike voltage absorption circuit may further include a first current limiting element and / or a second current limiting element; The first current-limiting element, the energy storage element, and the second switching element are connected in series between the voltage generation node and the ground terminal; The second current-limiting element, the energy storage element, and the first switching element are connected in series between the voltage generation node and the reference voltage terminal.
[0007] Optionally, if the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, the energy storage element absorbs the voltage at the voltage generation node through the second current limiting element and the first switching element. When the voltage at the voltage generation node is less than the voltage at the reference voltage terminal, the energy storage element releases the absorbed voltage through the first current limiting element and the second switching element.
[0008] Optionally, the spike voltage absorption circuit may also include a first inductor; The first terminal of the first inductor is connected to the voltage generation node, and the second terminal of the first inductor is connected to the reference voltage terminal.
[0009] Optionally, the spike voltage absorption circuit may also include a second inductor and a reference voltage generation module; The first end of the second inductor is connected to the voltage generation node, and the second end of the second inductor is used as the voltage output terminal; the reference voltage generation module is connected between the reference voltage terminal and the ground terminal.
[0010] Optionally, the reference voltage generation module includes a first capacitor and a voltage regulation unit; The first terminal of the first capacitor is connected to the reference voltage terminal and the first terminal of the voltage regulator unit, and the second terminal of the first capacitor and the second terminal of the voltage regulator unit are both connected to the ground terminal.
[0011] This disclosure also provides a full-bridge converter circuit, including a first full-bridge circuit, a second full-bridge circuit, a transformer, and an arbitrary spike voltage absorption circuit as described above; The primary side of the transformer is connected to the first full-bridge circuit, and the secondary side of the transformer is connected to the second full-bridge circuit; the spike voltage absorption circuit is connected between the voltage generation node of the second full-bridge circuit and the ground terminal of the second full-bridge circuit.
[0012] Optionally, the first full-bridge circuit includes a first switching unit, a second switching unit, a third switching unit, and a fourth switching unit; The first end of the first switch unit is connected to the first end of the third switch unit, the second end of the first switch unit is connected to the first end of the second switch unit at the first node, the second end of the second switch unit is connected to the second end of the fourth switch unit, and the second end of the third switch unit is connected to the first end of the fourth switch unit at the second node. The first node and the second node are connected to the primary side of the transformer.
[0013] Optionally, the second full-bridge circuit includes a fifth switching unit, a sixth switching unit, a seventh switching unit, and an eighth switching unit; The first end of the fifth switch unit is connected to the first end of the seventh switch unit, the second end of the fifth switch unit is connected to the first end of the sixth switch unit at the third node, the second end of the sixth switch unit is connected to the second end of the eighth switch unit, and the second end of the seventh switch unit is connected to the first end of the eighth switch unit at the fourth node. The third and fourth nodes are connected to the secondary side of the transformer.
[0014] This disclosure provides a spike voltage absorption circuit and a full-bridge converter circuit. The spike voltage absorption circuit includes an energy storage element, a first switching element, and a second switching element. The energy storage element and the first switching element are connected in series between the voltage generation node and the reference voltage terminal. The energy storage element and the second switching element are connected in series between the voltage generation node and the ground terminal. When the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, the first switching element is turned on and the second switching element is turned off. When the voltage at the voltage generation node is less than the voltage at the ground terminal, the second switching element is turned on and the first switching element is turned off. The voltage generation node is the node in the semiconductor switching transistor circuit that generates the output voltage. When the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, a spike voltage is detected at the voltage generation node. At this time, the first switching element is turned on, connecting the energy storage element to the voltage generation node. The spike voltage generated at the voltage generation node is stored in the energy storage element, thereby achieving the absorption of the spike voltage. When the voltage at the voltage generation node is less than the voltage at the ground terminal, the second switching element is turned on, causing the voltage stored in the energy storage element to be released from the voltage generation node, thereby ensuring that the energy storage element can be repeatedly used in the spike voltage absorption circuit. Thus, this disclosure achieves the suppression of spike voltage generated in the semiconductor switching transistor circuit. Attached Figure Description
[0015] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 This is a schematic diagram of a spike voltage absorption circuit provided in an embodiment of the present disclosure.
[0017] Figure 2 This is a schematic diagram of another spike voltage absorption circuit provided in an embodiment of the present disclosure.
[0018] Figure 3 This is a schematic diagram of another spike voltage absorption circuit provided in an embodiment of the present disclosure.
[0019] Figure 4This is a schematic diagram of a full-bridge converter circuit provided in an embodiment of the present disclosure. Detailed Implementation
[0020] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are set forth in the following detailed description in order to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples thereof.
[0021] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The embodiments will now be described in detail with reference to the accompanying drawings.
[0022] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.
[0023] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.
[0024] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.
[0025] In the embodiments of this application, the term "electrical connection" can refer to a direct electrical connection between two components, or it can refer to an electrical connection between two components via one or more other components.
[0026] In the embodiments of this application, the first node, the second node, and the third node are defined only for the convenience of describing the circuit structure, and the first node, the second node, and the third node are not actual circuit units.
[0027] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.
[0028] Figure 1 This is a schematic diagram of a spike voltage absorption circuit provided in an embodiment of the present disclosure, as shown below. Figure 1 As shown, the spike voltage absorption circuit includes an energy storage element 10, a first switching element 20, and a second switching element 30.
[0029] For example, the energy storage element 10 may be an energy storage capacitor.
[0030] The energy storage element 10 and the first switching element 20 are connected in series between the voltage generation node 41 and the reference voltage terminal 42.
[0031] The energy storage element 10 and the second switching element 30 are connected in series between the voltage generation node 41 and the ground terminal 43.
[0032] When the voltage at voltage generation node 41 is greater than the voltage at reference voltage terminal 42, the first switching element 20 is turned on and the second switching element 30 is turned off; when the voltage at voltage generation node 41 is less than the voltage at ground terminal 43, the second switching element 30 is turned on and the first switching element 20 is turned off.
[0033] For example, voltage generation node 41 is the node in the semiconductor switching transistor circuit that generates the output voltage, and the voltage at reference voltage terminal 42 is the reference voltage for generating spike voltages in the semiconductor switching transistor circuit. When the voltage at voltage generation node 41 is equal to or less than the voltage at reference voltage terminal 42, and equal to or greater than the voltage at ground terminal 43, there is no spike voltage in the semiconductor switching transistor circuit, and both the first switching element 20 and the second switching element 30 are turned off, and the semiconductor switching transistor circuit outputs a normal voltage. When the voltage at voltage generation node 41 is greater than the voltage at reference voltage terminal 42, it is determined that a spike voltage has been generated in the semiconductor switching transistor circuit. At this time, the first switching element 20 is turned on, the second switching element 30 is turned off, and the energy storage element 10 is connected to voltage generation node 41. The energy storage element 10 absorbs the spike voltage generated by the semiconductor switching transistor circuit at voltage generation node 41 through the loop containing the first switching element 20. When the voltage at voltage generation node 41 is less than the voltage at ground terminal 43, the second switching element 30 is turned on and the first switching element 20 is turned off. At this time, the voltage stored in energy storage element 10 is released through voltage generation node 41, thereby enabling energy storage element 10 to be repeatedly used in the spike voltage absorption circuit without being unable to absorb spike voltages due to excessive stored voltage. Thus, this disclosure can suppress spike voltages generated in semiconductor switching transistor circuits.
[0034] As an example, the first switching element includes a first MOSFET, and / or the second switching element includes a second MOSFET.
[0035] The gates of both the first and second MOSFETs are connected to the control circuit. The first terminal of the first MOSFET is connected to the voltage generation node via an energy storage element, and the second terminal of the first MOSFET is connected to the output terminal of the semiconductor switching circuit. The output terminal of the semiconductor switching circuit serves as the reference voltage. The first terminal of the second MOSFET is connected to the voltage generation node via an energy storage element, and the second terminal of the second MOSFET is connected to ground. The control circuit is used to detect the voltage at the voltage generation node and the voltage at the output terminal of the semiconductor switching circuit, i.e., the reference voltage.
[0036] For example, when the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, a voltage spike is determined to have occurred in the semiconductor switching circuit. In this case, the control circuit turns on the first MOSFET and turns off the second MOSFET, connecting the energy storage element to the voltage generation node. The energy storage element absorbs the voltage spike generated at the voltage generation node through the loop containing the first MOSFET. Conversely, when the voltage at the voltage generation node is less than the voltage at the ground terminal, the control circuit turns on the second MOSFET and turns off the first MOSFET. The voltage stored in the energy storage element is then released through the voltage generation node. This allows the energy storage element to be repeatedly used in the voltage spike absorption circuit without becoming unable to absorb further voltage spikes due to excessive stored voltage. Therefore, this disclosure enables the suppression of voltage spikes generated in the semiconductor switching circuit.
[0037] As another example, Figure 2 This is a schematic diagram of another spike voltage absorption circuit provided in an embodiment of the present disclosure. Figure 3 A schematic diagram of another spike voltage absorption circuit provided in this disclosure embodiment is shown below. Figure 2 and Figure 3 As shown, the first switching element 20 includes a first diode D1, and / or the second switching element 30 includes a second diode D2.
[0038] For example, the first terminal of the first switching element 20 is connected to the positive terminal of the first diode D1, and the second terminal of the first switching element 20 is connected to the negative terminal of the first diode D1. The first terminal of the second switching element 30 is connected to the positive terminal of the second diode D2, and the second terminal of the second switching element 30 is connected to the negative terminal of the second diode D2.
[0039] The positive terminal of the first diode D1 is connected to the voltage generation node 41 through the energy storage element 10, and the negative terminal of the first diode D1 is connected to the reference voltage terminal 42; the positive terminal of the second diode D2 is connected to the ground terminal 43, and the negative terminal of the second diode D2 is connected to the voltage generation node 41 through the energy storage element 10.
[0040] For example, when the voltage at voltage generation node 41 is greater than the voltage at reference voltage terminal 42, it is determined that a spike voltage has been generated in the semiconductor switching circuit. At this time, the voltage at the positive terminal of the first diode D1 is greater than the voltage at the negative terminal of the first diode D1, and the voltage at the negative terminal of the second diode D2 is greater than the voltage at the positive terminal of the second diode D2. Therefore, the first diode D1 is turned on, the second diode D2 is turned off, and the energy storage element 10 is connected to the circuit that absorbs voltage through the first diode D1. The energy storage element 10 absorbs the spike voltage generated at voltage generation node 41 by the semiconductor switching circuit through the circuit where the first diode D1 is located. When the voltage at voltage generation node 41 is less than the voltage at ground terminal 43, the voltage at the negative terminal of the first diode D1 is greater than the voltage at the positive terminal of the first diode D1, and the voltage at the positive terminal of the second diode D2 is greater than the voltage at the negative terminal of the second diode D2. Therefore, the first diode D1 is off, and the second diode D2 is on. The energy storage element 10 is connected to the circuit that releases voltage through the second diode D2. At this time, the voltage stored in the energy storage element 10 is released through voltage generation node 41, thereby enabling the energy storage element 10 to be repeatedly used in the spike voltage absorption circuit without being unable to absorb spike voltages due to excessive stored voltage. Thus, this disclosure can suppress spike voltages generated in semiconductor switching transistor circuits.
[0041] In some embodiments, see continue to see Figure 2 and Figure 3 The peak voltage absorption circuit also includes a first current limiting element 51 and / or a second current limiting element 52.
[0042] For example, the first current limiting element 51 and the second current limiting element 52 can both be current limiting resistors.
[0043] The first current limiting element 51, the energy storage element 10, and the second switching element 30 are connected in series between the voltage generation node 41 and the ground terminal 43.
[0044] The second current limiting element 52, the energy storage element 10, and the first switching element 20 are connected in series between the voltage generation node 41 and the reference voltage terminal 42.
[0045] For example, the first end of the second current limiting element 52 is connected to the voltage generation node 41, the second end of the second current limiting element 52 is connected to the first end of the energy storage element 10, the second end of the energy storage element 10 is connected to the first end of the first current limiting element 51 and the first end of the first switching element 20, and the second end of the first current limiting element 51 is connected to the second end of the second switching element 30.
[0046] When the voltage at voltage generation node 41 exceeds the voltage at reference voltage terminal 42, a voltage spike is determined to have occurred in the semiconductor switching circuit. At this point, the first switching element 20 is turned on, the second switching element 30 is turned off, and the energy storage element 10 is connected to the circuit that absorbs voltage through the first switching element 20. The energy storage element 10 absorbs the voltage spike generated at voltage generation node 41 by the semiconductor switching circuit through the second current limiting element 52 and the circuit containing the first switching element 20. Furthermore, the second current limiting element 52 can be used to limit the current in the circuit containing the first switching element 20 during the process of the energy storage element 10 absorbing the voltage spike, thereby preventing excessive current from damaging the energy storage element 10 and the first switching element 20.
[0047] When the voltage at voltage generation node 41 is less than the voltage at ground terminal 43, the first switching element 20 is turned off, the second switching element 30 is turned on, and the energy storage element 10 is connected to the circuit for voltage release through the second diode D2. At this time, the energy storage element 10 releases the voltage stored in the energy storage element 10 to the voltage generation node 41 through the first current limiting element 51 and the circuit containing the second switching element 30. This allows the energy storage element 10 to be repeatedly used in the peak voltage absorption circuit without being unable to absorb peak voltages due to excessive stored voltage. Furthermore, the first current limiting element 51 can be used to limit the current in the circuit containing the second switching element 30 during the voltage release process of the energy storage element 10, thereby preventing damage to the energy storage element 10 and the second switching element 30 due to excessive current.
[0048] It should be noted that, Figure 2 and Figure 3 The spike voltage absorption circuit is shown as an example only, including both the first current limiting element 51 and the second current limiting element 52. The spike voltage absorption circuit may include only the first current limiting element 51 or only the second current limiting element 52. The specific selection of the first current limiting element 51 and the second current limiting element 52 needs to be set according to the actual situation, and no specific limitation is made here.
[0049] In some embodiments, see continue to see Figure 2 The spike voltage absorption circuit also includes a first inductor L1; the first end of the first inductor L1 is connected to the voltage generation node 41, and the second end of the first inductor L1 is connected to the reference voltage terminal 42.
[0050] For example, the voltage generation node 41 of the semiconductor switching transistor circuit is connected to the voltage output terminal through the first inductor L1 to output voltage. When the voltage of the voltage generation node 41 changes, due to the inductive characteristics of the first inductor L1, the voltage at the voltage output terminal changes slowly. Therefore, when the voltage generation node 41 generates a voltage spike, the voltage at the voltage output terminal has not yet changed or the change is very small. So at this time, the voltage at the voltage generation node 41 is greater than the voltage at the voltage output terminal, that is, the voltage at the voltage generation node 41 is greater than the voltage at the reference voltage terminal 42. At this time, the first switching element 20 is turned on, so that the energy storage element 10 is connected to the circuit for voltage absorption through the first switching element 20. The energy storage element 10 absorbs the voltage spike generated by the semiconductor switching transistor circuit at the voltage generation node 41 through the circuit where the first switching element 20 is located. By using the voltage output from the voltage output terminal as the reference voltage terminal 42, this disclosure allows the voltage spike absorption circuit to start absorbing the voltage spike before the voltage output terminal outputs the voltage spike, thereby preventing the voltage spike generated in the semiconductor switching transistor circuit from affecting the load connected to the semiconductor switching transistor circuit.
[0051] In some embodiments, see continue to see Figure 3 The spike voltage absorption circuit also includes a second inductor L2 and a reference voltage generation module 60; the first end of the second inductor L2 is connected to the voltage generation node 41, and the second end of the second inductor L2 is used for the voltage output terminal 44; the reference voltage generation module 60 is connected between the reference voltage terminal 42 and the ground terminal 43.
[0052] For example, the reference voltage generation module 60 generates a reference voltage and provides it to the reference voltage terminal 42. The reference voltage can be adjusted according to voltage requirements. The reference voltage generation module includes a first capacitor C1 and a voltage regulator unit U1. The first end of the first capacitor C1 is connected to the reference voltage terminal 42 and the first end of the voltage regulator unit U1, and the second end of the first capacitor C1 and the second end of the voltage regulator unit U1 are both connected to the ground terminal 43. The voltage regulator unit U1 can be, for example, a Zener transistor or a transient voltage suppressor diode (TVS). The voltage of the reference voltage terminal 42 can be adjusted through the first capacitor C1 and the voltage regulator unit U1, thereby achieving adjustable reference voltage. Therefore, users can independently select the peak voltage absorption standard, thus enabling the first switching element 20 to conduct before the peak voltage is generated, allowing the energy storage element 10 to absorb the voltage. When the voltage at voltage generation node 41 is greater than the reference voltage provided by reference voltage generation module 60, the first switching element 20 is turned on, connecting the energy storage element 10 to the circuit through which the first switching element 20 absorbs voltage spikes generated at voltage generation node 41 by the semiconductor switching circuit via the circuit containing the first switching element 20. Thus, this disclosure enables the suppression of voltage spikes generated in the semiconductor switching circuit.
[0053] Figure 4 This is a schematic diagram of a full-bridge converter circuit provided in an embodiment of the present disclosure, as shown below. Figure 4 As shown, the full-bridge converter circuit includes a first full-bridge circuit 71, a second full-bridge circuit 72, a transformer 73, and a spike voltage absorption circuit 74 corresponding to any of the above embodiments.
[0054] The primary side of transformer 73 is connected to the first full-bridge circuit 71, and the secondary side of transformer 73 is connected to the second full-bridge circuit 72; the spike voltage absorption circuit 74 is connected between the voltage generation node 41 of the second full-bridge circuit 72 and the ground terminal 43 of the second full-bridge circuit 72.
[0055] For example, the first full-bridge circuit 71 includes a first switching unit 711, a second switching unit 712, a third switching unit 713, and a fourth switching unit 714. The first switching unit 711, the second switching unit 712, the third switching unit 713, and the fourth switching unit 714 are all MOSFETs.
[0056] The first end of the first switching unit 711 is connected to the first end of the third switching unit 713. The second end of the first switching unit 711 is connected to the first end of the second switching unit 712 at the first node A. The second end of the second switching unit 712 is connected to the second end of the fourth switching unit 714. The second end of the third switching unit 713 is connected to the first end of the fourth switching unit 714 at the second node B. The first node A and the second node B are connected to the primary side of the transformer 73.
[0057] The second full-bridge circuit 72 includes a fifth switching unit 721, a sixth switching unit 722, a seventh switching unit 723, and an eighth switching unit 724. The fifth switching unit 721, the sixth switching unit 722, the seventh switching unit 723, and the eighth switching unit 724 are all diodes.
[0058] The first end of the fifth switch unit 721 is connected to the first end of the seventh switch unit 723. The second end of the fifth switch unit 721 is connected to the first end of the sixth switch unit 722 at the third node C. The second end of the sixth switch unit 722 is connected to the second end of the eighth switch unit 724. The second end of the seventh switch unit 723 is connected to the first end of the eighth switch unit 724 at the fourth node D. The third node C and the fourth node D are connected to the secondary side of the transformer 73.
[0059] The first terminal of the fifth switching unit 721 and the first terminal of the seventh switching unit 723 are connected to the voltage generation node 41, and the second terminal of the sixth switching unit 722 and the second terminal of the eighth switching unit 724 are connected to the ground terminal 43. When the voltage of the voltage generation node 41 is greater than the voltage of the reference voltage terminal of the spike voltage absorption circuit 74, it is determined that a spike voltage has been generated in the second full-bridge circuit 72. At this time, the first switching element of the spike voltage absorption circuit 74 is turned on, and the second switching element of the spike voltage absorption circuit 74 is turned off, so that the energy storage element of the spike voltage absorption circuit 74 is connected to the voltage generation node 41. The energy storage element absorbs the spike voltage generated by the second full-bridge circuit 72 at the voltage generation node 41 through the loop where the first switching element is located. When the second full-bridge circuit 72 operates in the freewheeling phase, the voltage at voltage generation node 41 is less than the voltage at ground terminal 43. At this time, the second switching element of the spike voltage absorption circuit 74 is turned on, and the first switching element of the spike voltage absorption circuit 74 is turned off. The voltage stored in the energy storage element of the spike voltage absorption circuit 74 is released through voltage generation node 41, thereby enabling the energy storage element to be repeatedly used in the spike voltage absorption circuit 74 without being unable to absorb spike voltages due to excessive stored voltage. Thus, this disclosure can suppress the spike voltage generated in the second full-bridge circuit 72.
[0060] The above are merely specific embodiments of this disclosure, enabling those skilled in the art to understand or implement this disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not to be limited to these embodiments, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A spike voltage absorbing circuit characterized by comprising: The energy storage element, the first switch element and the second switch element are connected in series between a voltage generation node and a reference voltage terminal; The energy storage element and the first switch element are connected in series between the voltage generation node and a ground terminal; The energy storage element and the second switch element are connected in series between the voltage generation node and the ground terminal; When the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, the first switch element is turned on and the second switch element is turned off; When the voltage at the voltage generation node is less than the voltage at the ground terminal, the second switch element is turned on and the first switch element is turned off.
2. The spike voltage sink circuit of claim 1, wherein, The first switch element comprises a first diode, and / or the second switch element comprises a second diode; The anode of the first diode is connected to the voltage generation node through the energy storage element, and the cathode of the first diode is connected to the reference voltage terminal; the anode of the second diode is connected to the ground terminal, and the cathode of the second diode is connected to the voltage generation node through the energy storage element.
3. The spike voltage sink circuit according to claim 1 or 2, characterized in that, Further comprising a first current limiting element, and / or a second current limiting element; The first current limiting element, the energy storage element and the second switch element are connected in series between the voltage generation node and the ground terminal; The second current limiting element, the energy storage element and the first switch element are connected in series between the voltage generation node and the reference voltage terminal.
4. The spike voltage absorbing circuit according to claim 3, wherein When the voltage at the voltage generation node is greater than the voltage at the reference voltage terminal, the energy storage element absorbs the voltage at the voltage generation node through the second current limiting element and the first switch element; When the voltage at the voltage generation node is less than the voltage at the reference voltage terminal, the energy storage element releases the absorbed voltage through the first current limiting element and the second switch element.
5. The spike voltage sink circuit of claim 1 or 2, wherein, Further comprising a first inductor; A first end of the first inductor is connected to the voltage generation node, and a second end of the first inductor is connected to the reference voltage terminal.
6. The spike voltage sink circuit of claim 1 or 2, wherein, Further comprising a second inductor and a reference voltage generation module; A first end of the second inductor is connected to the voltage generation node, and a second end of the second inductor is used as a voltage output terminal; the reference voltage generation module is connected between the reference voltage terminal and the ground terminal.
7. The spike voltage sink circuit of claim 6, wherein, The reference voltage generation module comprises a first capacitor and a voltage stabilizing unit; A first end of the first capacitor and a first end of the voltage stabilizing unit are connected to the reference voltage terminal, and a second end of the first capacitor and a second end of the voltage stabilizing unit are both connected to the ground terminal.
8. A full bridge converter circuit, characterized by The first full-bridge circuit, the second full-bridge circuit, a transformer and the spike voltage absorbing circuit according to any one of claims 1-7 are included; A primary side of the transformer is connected to the first full-bridge circuit, and a secondary side of the transformer is connected to the second full-bridge circuit; the spike voltage absorbing circuit is connected between a voltage generation node of the second full-bridge circuit and a ground terminal of the second full-bridge circuit.
9. The full bridge converter circuit of claim 8, wherein, The first full-bridge circuit comprises a first switch unit, a second switch unit, a third switch unit and a fourth switch unit; A first end of the first switch unit is connected with a first end of the third switch unit, a second end of the first switch unit is connected with a first end of the second switch unit at a first node, a second end of the second switch unit is connected with a second end of the fourth switch unit, a second end of the third switch unit is connected with a first end of the fourth switch unit at a second node; The first node and the second node are connected with a primary side of the transformer.
10. The full bridge converter circuit of claim 8, wherein, The second full-bridge circuit comprises a fifth switch unit, a sixth switch unit, a seventh switch unit and an eighth switch unit; A first end of the fifth switch unit is connected with a first end of the seventh switch unit, a second end of the fifth switch unit is connected with a first end of the sixth switch unit at a third node, a second end of the sixth switch unit is connected with a second end of the eighth switch unit, a second end of the seventh switch unit is connected with a first end of the eighth switch unit at a fourth node; The third node and the fourth node are connected with a secondary side of the transformer.