A bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy and a DC fault clearing method

Abstract

The application provides a bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy and a DC fault clearing method.The fault clearing method of the application reconfigures a specific bridge arm from parallel connection to bidirectional series connection by using a double-channel auxiliary commutation circuit with structural adaptation after detecting a short-circuit fault on the DC side, and executes a dynamic switching control logic in combination with the real-time monitored bridge arm current flow direction to automatically match an optimal counter-pressure path from a plurality of preset transient modes.Through the cooperation of hardware topology reconfiguration and software control strategy, the system reverse electromotive force can be instantaneously increased to the rated voltage level, the current turn-off failure problem caused by insufficient counter-pressure under the bridge arm multiplexing architecture is effectively solved, and the uncontrollable rectification overvoltage risk of the non-multiplexing bridge arm is avoided.

Description

Technical Field

[0001] This invention belongs to the field of power electronics and flexible DC transmission technology, specifically relating to a bridge arm multiplexing type MMC (multilevel converter) system and DC fault clearing method based on structural adaptation and dynamic switching strategy. Background Technology

[0002] With the advancement of the global energy transition, offshore wind power is trending towards deeper waters and larger capacities. Due to the extremely high construction costs and load-bearing limitations of offshore converter platforms, reducing the size and weight of converter stations has become a focus of engineering attention. The Arm-Multiplexed Modular Multilevel Converter (AM-MMC), by multiplexing intermediate arms at different frequencies, saves approximately 25% of the half-bridge sub-module capacitors compared to traditional MMCs while ensuring power quality, significantly improving the economics of offshore platforms.

[0003] However, AM-MMC still faces a fundamental bottleneck in DC fault clearing during large-scale applications. Common fault clearing solutions include: external blocking (DC circuit breaker DCCB): fast protection speed without altering the converter structure, but its size and cost are extremely high, contradicting the lightweight design goals of offshore platforms; topology self-clearing (full-bridge submodule FBSM): possesses inherent reverse voltage capability, but significantly increases the number of components and losses, weakening the cost advantage of AM-MMC; auxiliary converter circuit (ACC): simple structure and low cost, but when applied to AM-MMC based on half-bridge submodules, the bridge arm reuse mechanism limits the reverse electromotive force provided at fault time to only half of the DC bus voltage (approximately 0.5U). dc This cannot meet the requirement of offsetting the AC side line voltage (approximately 0.866U). dc The boundary conditions of ) cause the traditional ACC scheme to fail.

[0004] Therefore, how to achieve rapid and reliable clearance of fault current while maintaining the lightweight advantages of AM-MMC is a key problem that urgently needs to be solved in the field of flexible DC transmission. Summary of the Invention

[0005] To address the aforementioned issues, this invention proposes a bridge arm reuse-type MMC system based on structural adaptation and dynamic switching strategies.

[0006] The technical solution to achieve the purpose of this invention is: a bridge arm multiplexing type MMC system based on structural adaptation and dynamic switching strategy, including: positive DC bus, negative DC bus, three-phase converter branch, bridge arm multiplexing switch group and dual-channel auxiliary converter circuit;

[0007] The bridge arm multiplex switch group includes the first bridge arm multiplex switch K. x1 Second bridge arm multiplexing switch K x2 ;

[0008] The three-phase converter branch includes phases a, b, and c. Each phase branch in the three-phase converter branch includes an upper bridge arm, a middle bridge arm, and a lower bridge arm. The upper bridge arm includes N / 2 half-bridge sub-modules connected in series and a bridge arm resistor R. arm and bridge arm inductor L arm One end of the upper bridge arm is connected to the positive DC collector, and the other end of the upper bridge arm is connected to one end of the middle bridge arm. The middle bridge arm includes N / 2 half-bridge sub-modules connected in series. The first bridge arm multiplexer switch K x1 Multiplexing switch K with the second bridge arm x2 After being connected in series, they are connected in parallel at both ends of the middle bridge arm, with the first bridge arm multiplexing switch K. x1 Multiplexing switch K with the second bridge arm x2 The connection point serves as the input terminal for the three-phase current, where x∈{a, b, c}, and a, b, c represent the three phases; the lower bridge arm includes bridge arm inductors L connected in series. arm Bridge arm resistance R arm And N / 2 half-bridge sub-modules, one end of the lower bridge arm is connected to the other end of the middle bridge arm, and the other end of the lower bridge arm is connected to the negative DC collector point;

[0009] The dual-channel auxiliary converter circuit includes a first auxiliary converter valve group T1, a second auxiliary converter valve group T2, a third auxiliary converter valve group T3, a fourth auxiliary converter valve group T4, a first freewheeling diode valve group D3, a second freewheeling diode valve group D4, a third freewheeling diode valve group D5, and a fourth freewheeling diode valve group D6.

[0010] One end of the first auxiliary converter valve group T1 is connected to the positive DC collector, and the other end is connected to the cathode of the first freewheeling diode valve group D3; the anode of the first freewheeling diode valve group D3 is connected to one end of the half-bridge submodule of the upper bridge arm of the c-phase converter branch, and the cathode of the first freewheeling diode valve group D3 is connected to the first DC inductor L. dc1 The two auxiliary converter valve groups are connected in phase; one end of the second auxiliary converter valve group T2 is connected to the anode of the first freewheeling diode valve group D3, and the other end is connected to the anode of the second freewheeling diode valve group D4; the cathode of the second freewheeling diode valve group D4 is connected to the positive DC collector point, and the anode of the second freewheeling diode valve group D4 is connected to the upper bridge arm resistor R of phase c. arm Phase connection; first DC inductor L dc1 One end is connected to the cathode of the first freewheeling diode valve group D3, and the other end serves as the positive terminal of the DC output; one end of the third auxiliary commutation valve group T3 is connected to the negative DC collector point, and the other end is connected to the cathode of the third freewheeling diode valve group D5; the cathode of the third freewheeling diode valve group D5 is connected to one end of the half-bridge submodule of the lower arm of the c-phase commutation branch, and the anode of the third freewheeling diode valve group D5 is connected to the second DC inductor L. dc2The fourth auxiliary converter valve group T4 is connected to the cathode of the third freewheeling diode valve group D5 at one end and to the cathode of the fourth freewheeling diode valve group D6 at the other end. The anode of the fourth freewheeling diode valve group D6 is connected to the negative DC collector, and the cathode of the fourth freewheeling diode valve group D6 is connected to the lower bridge arm resistor R of phase c. arm Phase connection; second DC inductor L dc2 One end is connected to the anode of the third freewheeling diode valve group D5, and the other end serves as the negative terminal of the DC output.

[0011] This invention also proposes a method for clearing DC faults, comprising the following steps:

[0012] S1: Fault detection and mode switching trigger: Real-time monitoring of DC bus voltage V dc and DC line current i dc When V dc The voltage drops to a preset threshold and the DC line current i dc When the safety threshold is exceeded, a DC bipolar short-circuit fault is determined to have occurred, and the following control operations are performed: All half-bridge submodules in the circuit are bypassed, i.e., the first insulated-gate bipolar transistor (IGBT1) is turned off and the second insulated-gate bipolar transistor (IGBT2) is turned on; the auxiliary converter valves in the auxiliary converter circuit—the first auxiliary converter valve group T1, the second auxiliary converter valve group T2, the third auxiliary converter valve group T3, and the fourth auxiliary converter valve group T4—are turned off; and the upper and lower bridge arm currents i of phases a, b, and c are monitored in real time. arm In the direction of the current flow, the current-to-current switching logic is executed. When it is detected that the upper bridge arm current is positive and the lower bridge arm current is negative, the first bridge arm multiplexing switch K is controlled. x1 Disconnect, second bridge arm multiplexer K x2 When closed, the middle bridge arm and the upper bridge arm form an equivalent upper bridge arm. The bridge arm multiplexing MMC operates in upper bridge arm multiplexing mode. When it detects that the upper bridge arm current is negative and the lower bridge arm current is positive, it controls the second bridge arm multiplexing switch K. x2 Disconnect, first bridge arm multiplexer K x1 When closed, the middle and lower bridge arms form an equivalent lower bridge arm. The bridge arm multiplexing MMC operates in lower bridge arm multiplexing mode. When negative current is detected in both the upper and lower bridge arms, the first bridge arm multiplexing switch K remains unchanged. x1 Multiplexing switch K with the second bridge arm x2 The on / off state;

[0013] S2: Blocking and Fault Clearing: During a fixed time period of bypass, current transfer occurs, and all half-bridge sub-modules in the control circuit are blocked, i.e., the first insulated-gate bipolar transistor IGBT1 and the second insulated-gate bipolar transistor IGBT2 are turned off, and then the topology attenuation process begins, and the DC line current i dc Gradually decrease to 0;

[0014] S3: Fault clearing complete: Upon detecting DC line current i dc After returning to zero, it is determined that the DC bipolar short circuit fault has been cleared.

[0015] Compared with the prior art, the significant advantages of this invention are:

[0016] This invention utilizes a dual-channel auxiliary converter circuit to achieve structural adaptation of the hardware topology, increasing the reverse voltage capability from 0.5U. dc Instantly boosted to N·U c (about U dc This invention solves the fundamental problem of AM-MMC's back electromotive force failing to cover the peak AC voltage in a half-bridge architecture. Through a dynamic switching control strategy based on current flow direction, it breaks the fixed multiplexing pattern, eliminates the uncontrollable current rectification behavior of non-multiplexed arms under fault transients, and ensures that the half-bridge submodule voltage is always within a safe range. It offers extremely high economic and lightweight value: compared to the elimination scheme using full-bridge half-bridge submodules or full-half hybrid topologies, this invention significantly reduces the number of IGBT switching devices while maintaining the capacitor-saving advantage of AM-MMC; evaluation shows that this solution can save approximately 23.29% of construction costs compared to the full-half hybrid topology method.

[0017] The present invention will now be described in further detail with reference to the accompanying drawings. Attached Figure Description

[0018] Figure 1 This invention provides a schematic diagram of the overall topology of a bridge arm multiplexed MMC DC fault clearing system based on structural adaptation.

[0019] Figure 2 This is a schematic diagram of the internal topology and current flow of the half-bridge submodule (HBSM) in this invention.

[0020] Figure 3 This is a detailed circuit diagram of the bridge arm multiplexing switch (on / off + pressure-bearing structure) in this invention.

[0021] Figure 4 This is a detailed circuit diagram of the auxiliary converter valve group (on / off + pressure-bearing structure) in this invention.

[0022] Figure 5 Topology diagram of fault current flow path after auxiliary converter circuit operation.

[0023] Figure 6 This is a logic block diagram of a dynamic switching control strategy based on current direction.

[0024] Figure 7 This is a simulation waveform diagram of the DC fault current clearing process in an embodiment of the present invention. Detailed Implementation

[0025] The present invention will now be described in detail with reference to specific embodiments and accompanying drawings. To more clearly describe the objectives, technical solutions, and advantages of the present invention, the following embodiments are only for illustrative purposes and are not intended to limit the scope of the invention.

[0026] like Figure 1 As shown, a bridge arm multiplexing type MMC system based on structural adaptation and dynamic switching strategy includes: a positive DC bus, a negative DC bus, a three-phase converter branch, a bridge arm multiplexing switch group, and a dual-channel auxiliary converter circuit.

[0027] The bridge arm multiplex switch group includes the first bridge arm multiplex switch K. x1 Second bridge arm multiplexing switch K x2 ;

[0028] The three-phase converter branch includes phases a, b, and c. Each phase branch in the three-phase converter branch includes an upper bridge arm, a middle bridge arm, and a lower bridge arm. The upper bridge arm includes N / 2 half-bridge sub-modules connected in series and a bridge arm resistor R. arm and bridge arm inductor L arm One end of the upper bridge arm is connected to the positive DC collector, and the other end of the upper bridge arm is connected to one end of the middle bridge arm. The middle bridge arm includes N / 2 half-bridge sub-modules connected in series. The first bridge arm multiplexer switch K x1 Multiplexing switch K with the second bridge arm x2 After being connected in series, they are connected in parallel at both ends of the middle bridge arm, with the first bridge arm multiplexing switch K. x1 Multiplexing switch K with the second bridge arm x2 The connection point serves as the input terminal for the three-phase current, where x∈{a, b, c}, and a, b, c represent the three phases; the lower bridge arm includes bridge arm inductors L connected in series. arm Bridge arm resistance R arm And N / 2 half-bridge sub-modules, one end of the lower bridge arm is connected to the other end of the middle bridge arm, and the other end of the lower bridge arm is connected to the negative DC collector point;

[0029] The dual-channel auxiliary converter circuit includes a first auxiliary converter valve group T1, a second auxiliary converter valve group T2, a third auxiliary converter valve group T3, a fourth auxiliary converter valve group T4, a first freewheeling diode valve group D3, a second freewheeling diode valve group D4, a third freewheeling diode valve group D5, and a fourth freewheeling diode valve group D6.

[0030] One end of the first auxiliary converter valve group T1 is connected to the positive DC collector, and the other end is connected to the cathode of the first freewheeling diode valve group D3; the anode of the first freewheeling diode valve group D3 is connected to one end of the half-bridge submodule of the upper bridge arm of the c-phase converter branch, and the cathode of the first freewheeling diode valve group D3 is connected to the first DC inductor L. dc1The two auxiliary converter valve groups are connected in phase; one end of the second auxiliary converter valve group T2 is connected to the anode of the first freewheeling diode valve group D3, and the other end is connected to the anode of the second freewheeling diode valve group D4; the cathode of the second freewheeling diode valve group D4 is connected to the positive DC collector point, and the anode of the second freewheeling diode valve group D4 is connected to the upper bridge arm resistor R of phase c. arm Phase connection; first DC inductor L dc1 One end is connected to the cathode of the first freewheeling diode valve group D3, and the other end serves as the positive terminal of the DC output; one end of the third auxiliary commutation valve group T3 is connected to the negative DC collector point, and the other end is connected to the cathode of the third freewheeling diode valve group D5; the cathode of the third freewheeling diode valve group D5 is connected to one end of the half-bridge submodule of the lower arm of the c-phase commutation branch, and the anode of the third freewheeling diode valve group D5 is connected to the second DC inductor L. dc2 The fourth auxiliary converter valve group T4 is connected to the cathode of the third freewheeling diode valve group D5 at one end and to the cathode of the fourth freewheeling diode valve group D6 at the other end. The anode of the fourth freewheeling diode valve group D6 is connected to the negative DC collector, and the cathode of the fourth freewheeling diode valve group D6 is connected to the lower bridge arm resistor R of phase c. arm Phase connection; second DC inductor L dc2 One end is connected to the anode of the third freewheeling diode valve group D5, and the other end serves as the negative terminal of the DC output.

[0031] In a further embodiment, by controlling the first bridge arm multiplexer K x1 Multiplexing switch K with the second bridge arm x2 To achieve phase multiplexing of the middle bridge arm within the AC cycle; when the first bridge arm multiplexing switch K... x1 Disconnect, second bridge arm multiplexer K x2 When closed, the intermediate bridge arm and the upper bridge arm form an equivalent upper bridge arm, and the bridge arm multiplexing MMC operates in the upper bridge arm multiplexing mode; when the first bridge arm multiplexing switch K... x1 Close, second bridge arm multiplexer K x2 When disconnected, the intermediate bridge arm is reused by the lower bridge arm, forming an equivalent lower bridge arm, and operates in the lower bridge arm multiplexing mode. In this invention, the intermediate bridge arm is switched via a controlled multiplexing switch K. x1 and K x2 Phase reuse is achieved within the AC cycle, thereby saving approximately 25% of the half-bridge module capacitor while ensuring power quality.

[0032] In a further embodiment, each half-bridge sub-module structure includes: a first insulated-gate bipolar transistor (IGBT1), a second insulated-gate bipolar transistor (IGBT2), a first anti-parallel diode D1, a second anti-parallel diode D2, and an energy storage capacitor C; the first IGBT1 and the second IGBT2 are connected in parallel across the energy storage capacitor C; the first anti-parallel diode D1 is connected in reverse parallel with the first IGBT1, and the second anti-parallel diode D2 is connected in reverse parallel with the second IGBT2, as shown below. Figure 2 As shown, zero level or capacitor voltage U is achieved by controlling the switch state. c The output of .

[0033] In a further embodiment, three basic operating states are achieved by controlling the conduction states of the first insulated-gate bipolar transistor IGBT1 and the second insulated-gate bipolar transistor IGBT2: the enabled state, the bypass state, and the latched state. In the enabled state, the first insulated-gate bipolar transistor IGBT1 is turned on and the second insulated-gate bipolar transistor IGBT2 is turned off, and the output of the half-bridge submodule is the terminal voltage U of the energy storage capacitor C. c In bypass mode, the first insulated-gate bipolar transistor (IGBT1) is off and the second insulated-gate bipolar transistor (IGBT2) is on, effectively short-circuiting the output of the half-bridge submodule, resulting in a zero-level output voltage. In latch-up mode, both IGBT1 and IGBT2 are off. At this time, if the half-bridge submodule current I... SM If the current is greater than 0, then the current flows through the second anti-parallel diode D2 to charge the energy storage capacitor C; if the half-bridge submodule I SM If the voltage is less than 0, the current flows through the first anti-parallel diode D1, and the voltage of the energy storage capacitor C remains unchanged.

[0034] In a further embodiment, the first bridge arm multiplexing switch K x1 Second bridge arm multiplexing switch K x2 Phase-connected, first bridge arm multiplexer K x1 Multiplexing switch K with the second bridge arm x2 The connection point serves as the input terminal for three-phase current; the first bridge arm multiplexing switch K x1 It consists of two IGBTs connected in reverse series and N / 2-1 IGBTs connected in series sequentially. One end is connected to the three-phase AC input terminal, and the other end is connected to the connection terminal of the upper and middle bridge arms; the second bridge arm multiplexer K x2 It consists of two IGBTs connected in reverse series and N / 2-1 IGBTs connected in series sequentially. One end is connected to the three-phase AC input terminal, and the other end is connected to the connection terminal of the middle and lower bridge arms; the first bridge arm multiplexer K x1Multiplexing switch K with the second bridge arm x2 The IGBTs connected in reverse series form the switching section, used to achieve bidirectional switching of the bridge arm current; the first bridge arm multiplexer K... x1 Multiplexing switch K with the second bridge arm x2 The pressure-bearing part consists of N / 2-1 IGBTs connected in series, which is used to withstand the transient pressure difference generated by the reconfiguration between the bridge arms during operation.

[0035] In a further embodiment, the first auxiliary converter valve group T1, the second auxiliary converter valve group T2, the third auxiliary converter valve group T3, and the fourth auxiliary converter valve group T4 are composed of two IGBTs connected in reverse series and N / 2-1 IGBTs connected in series in sequence; the first freewheeling diode valve group D3, the second freewheeling diode valve group D4, the third freewheeling diode valve group D5, and the fourth freewheeling diode valve group D6 are composed of N / 2 diodes connected in sequence in the forward direction.

[0036] like Figure 3 and Figure 4 As shown, both the bridge arm multiplex switch and the auxiliary converter valve group adopt a "on / off + pressure-bearing" structure. The on / off part consists of power devices connected in reverse series to achieve bidirectional disconnection; the pressure-bearing part consists of N / 2-1 power devices connected in series to ensure that they are not broken down under the transient voltage difference generated by topology reconfiguration.

[0037] The freewheeling diode valve group (as labeled D3 and D4 in the image) is connected in reverse parallel across the controlled branch to provide the necessary freewheeling path after the switch is activated. The lower channel structure is completely symmetrical to the upper channel and includes auxiliary commutation valve groups T3 and T4 and their freewheeling diode valve groups. Among them, the auxiliary commutation valve group T3 is connected to the negative DC bus (or the negative DC collector point), and T4 is connected to the corresponding internal node of the lower bridge arm.

[0038] The core of the DC fault clearing method proposed in this invention lies in improving reverse voltage capability through hardware reconfiguration and eliminating transient risks through software control. The specific implementation steps are as follows:

[0039] S1: Fault Detection and Mode Switching Trigger: The system monitors the voltage U of the positive / negative DC bus in real time through the sampling unit. dc and line current i dc When a bipolar short-circuit fault is detected (e.g., U...), dc (The current drops sharply to zero and then rapidly increases), and the control system immediately executes protective actions: It bypasses all half-bridge submodules in the circuit, i.e., the first insulated-gate bipolar transistor (IGBT1) is turned off and the second IGBT2 is turned on; it shuts off the auxiliary converter valves in the auxiliary converter circuit: the first auxiliary converter valve group T1, the second auxiliary converter valve group T2, the third auxiliary converter valve group T3, and the fourth auxiliary converter valve group T4; and it monitors the upper and lower bridge arm currents i of phases a, b, and c in real time.arm The direction is determined, and the current-to-current switching logic is executed. When it is detected that the upper bridge arm current is positive and the lower bridge arm current is negative, K is controlled. x1 Disconnect, K x2 When closed, the middle bridge arm and the upper bridge arm form an equivalent upper bridge arm. The bridge arm multiplexing MMC operates in upper bridge arm multiplexing mode. When it detects that the upper bridge arm current is negative and the lower bridge arm current is positive, it controls K. x2 Disconnect, K x1 When closed, the middle and lower bridge arms form an equivalent lower bridge arm. The bridge arm multiplexing MMC operates in lower bridge arm multiplexing mode. When negative current is detected in both the upper and lower bridge arms, K remains unchanged. x1 With K x2 The on / off state;

[0040] like Figure 5 As shown, after the auxiliary valve groups T1 to T4 are turned off, the fault current that originally flowed through the main circuit is forced to switch to the freewheeling diode path. This hardware-level "structural adaptation" forcibly changes the circuit topology, causing the previously parallel upper and lower bridge arms to switch to a bidirectional serial connection mode. At this time, the total number of usable half-bridge submodules in the circuit instantly doubles from N / 2 to N. The maximum back electromotive force established in the system circuit increases from 0.5U. dc Instantly boosted to N·U c (about U dc This satisfies the boundary condition for offsetting the peak AC line voltage, forcing the fault current to cross zero and ultimately clearing the fault.

[0041] Dynamic switching control based on current flow direction: To address the voltage safety issue under fault transients in AM-MMC's unique bridge arm multiplexing mechanism, such as... Figure 6 As shown, the system executes the "current-direction switching" logic, with a dynamic switching process: Real-time acquisition of the upper and lower arm currents of all three phases; determination of the instantaneous direction of the current in each phase's upper and lower arm; for protected phases (including auxiliary circuits): based on their current direction, control the multiplexing switch to connect the power arm to a positive current path, thus forming an effective fault current clearing path. When the arm current i is detected... arm When the current is greater than 0 (current flows into the half-bridge submodule), the bridge arm is determined to be in an effective reverse voltage state, and the control system maintains its connection to the main circuit to dissipate energy. When the current i armWhen the voltage is less than 0, to prevent uncontrolled rectification of the unreused bridge arm through the anti-parallel diode, the system automatically bypasses the bridge arm via diode D2 inside the half-bridge submodule. This dynamic switching mechanism utilizes the "phase complementarity effect" to ensure the stability of the macroscopic equivalent reverse voltage of the DC circuit. For the standard phase (without auxiliary circuit): similarly, according to its current direction, its multiplexing switch is controlled to connect the power bridge arm to the positive current path. The purpose of this is to ensure that the "non-reused half-bridge arm" (negative current side) of this phase is not charged by the line voltage due to insufficient voltage (N*Uc / 2). This process continues to run during the fault clearing phase until the fault current and all abnormal bridge arm circulating currents are completely decayed.

[0042] S2: Multi-period nonlinear blocking clearing: During a fixed time period of bypass, current transfer occurs, and all half-bridge sub-modules in the control circuit are blocked, i.e., the first insulated-gate bipolar transistor IGBT1 and the second insulated-gate bipolar transistor IGBT2 are turned off, and then the variable topology attenuation process begins, and the DC line current i dc Gradually decrease to 0;

[0043] In this step, after the current is completely transferred to the controlled path, the system enters a segmented decay process. During the fault development stage, the half-bridge submodule capacitor discharges violently to the short-circuit point through the bridge arm inductor. During the auxiliary commutation stage, the converter is equivalent to an uncontrolled rectifier bridge; at this time, the risk of current rise due to AC voltage coupling must be considered. During the latch-up clearing stage, the accumulated high back electromotive force (Back-EMF) is used to forcibly extinguish the magnetic field energy in the inductor. The system will experience several characteristic periods of evolution from six-arm conduction to single-loop conduction until the current drops to zero.

[0044] S3: Fault clearing complete: Upon monitoring of DC line current i dc After a complete reset, the control AC side circuit breaker disconnects under arc-free conditions. At this point, the fault point has been physically isolated, the system has completed its clearing task, and is ready for subsequent recovery and restart.

[0045] A simulation model was built in MATLAB / SIMULINK. System parameters: DC voltage ±12.6kV, number of half-bridge submodules per phase N=27, rated capacitor voltage of half-bridge submodule Uc=1.4kV, and number of half-bridge submodules per arm of the multiplexed MMC.

[0046] Fault clearing process: Simulate a DC-side bipolar short-circuit fault at t=2.0s.

[0047] t=2.00005s (0.05ms after the fault): The protection system detects that the DC current exceeds the safety limit and immediately issues a global bypass signal.

[0048] t=2.0008s (0.8ms after the fault): The switching valve of the auxiliary converter circuit is triggered to shut off, and the dynamic switching control starts synchronously.

[0049] t=2.00175s (1.75ms after the fault): Simulation results are as follows Figure 7 As shown, after adopting the solution of the present invention, both the DC current and the three-phase AC current have been successfully attenuated to zero, and there is no reverse charging current in the non-multiplexed bridge arm. The voltage of the half-bridge submodule is stable, and the fault is quickly and reliably cleared, verifying the effectiveness and superiority of the present invention.

Claims

1. A bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy, characterized in that, include: Positive DC bus, negative DC bus, three-phase converter branch, bridge arm multiplex switch group and dual-channel auxiliary converter circuit; The bridge arm multiplex switch group includes the first bridge arm multiplex switch (K) x1 ) and second bridge arm multiplex switch (K x2 ); The three-phase converter branch includes phases a, b, and c. Each phase branch in the three-phase converter branch includes an upper bridge arm, a middle bridge arm, and a lower bridge arm. The upper bridge arm includes N / 2 half-bridge sub-modules connected in series and a bridge arm resistor (R). arm ) and bridge arm inductance (L arm One end of the upper bridge arm is connected to the positive DC collector, and the other end of the upper bridge arm is connected to one end of the middle bridge arm. The middle bridge arm includes N / 2 half-bridge sub-modules connected in series, and the first bridge arm multiplexer (K) x1 ) and the second bridge arm multiplex switch (K x2 The series connection is followed by parallel connection at both ends of the middle bridge arm, and the first bridge arm multiplexer (K) x1 ) and the second bridge arm multiplex switch (K x2 The connection point serves as the input terminal for the three-phase current, where x∈{a, b, c}, and a, b, c represent the three phases; the lower bridge arm includes bridge arm inductors (L) connected in series. arm ), bridge arm resistance (R) arm ) and N / 2 half-bridge sub-modules, one end of the lower bridge arm is connected to the other end of the middle bridge arm, and the other end of the lower bridge arm is connected to the negative DC collector point; The dual-channel auxiliary converter circuit includes a first auxiliary converter valve group (T1), a second auxiliary converter valve group (T2), a third auxiliary converter valve group (T3), a fourth auxiliary converter valve group (T4), a first freewheeling diode valve group (D3), a second freewheeling diode valve group (D4), a third freewheeling diode valve group (D5), and a fourth freewheeling diode valve group (D6). One end of the first auxiliary converter valve group (T1) is connected to the positive DC collector, and the other end is connected to the cathode of the first freewheeling diode valve group (D3); the anode of the first freewheeling diode valve group (D3) is connected to one end of the half-bridge submodule of the upper bridge arm of the c-phase converter branch, and the cathode of the first freewheeling diode valve group (D3) is connected to the first DC inductor (L). dc1 The first auxiliary converter valve group (T2) is connected to the anode of the first freewheeling diode valve group (D3), and the other end is connected to the anode of the second freewheeling diode valve group (D4). The cathode of the second freewheeling diode valve group (D4) is connected to the positive DC collector point, and the anode of the second freewheeling diode valve group (D4) is connected to the upper bridge arm resistor (R) of phase c. arm ) connected in phase; the first DC inductor (L dc1 One end of the third auxiliary converter valve group (T3) is connected to the cathode of the first freewheeling diode valve group (D3), and the other end serves as the positive terminal of the DC output; one end of the third auxiliary converter valve group (T3) is connected to the negative DC collector point, and the other end is connected to the cathode of the third freewheeling diode valve group (D5); the cathode of the third freewheeling diode valve group (D5) is connected to one end of the half-bridge submodule of the lower arm of the c-phase converter branch, and the anode of the third freewheeling diode valve group (D5) is connected to the second DC inductor (L... dc2 The fourth auxiliary converter valve group (T4) is connected to the cathode of the third freewheeling diode valve group (D5) at one end and to the cathode of the fourth freewheeling diode valve group (D6) at the other end; the anode of the fourth freewheeling diode valve group (D6) is connected to the negative DC collector point, and the cathode of the fourth freewheeling diode valve group (D6) is connected to the lower bridge arm resistor (R) of phase c. arm ) connected in phase; second DC inductor (L dc2 One end is connected to the anode of the third freewheeling diode valve group (D5), and the other end serves as the negative terminal of the DC output.

2. The bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy according to claim 1, characterized in that, By controlling the first bridge arm multiplexer switch (K) x1 ) and the second bridge arm multiplex switch (K x2 This enables phase multiplexing of the middle bridge arm within the AC cycle; when the first bridge arm multiplexing switch (K) is activated... x1 ) disconnected, second bridge arm multiplexer (K) x2 When the first bridge arm is closed, the intermediate bridge arm and the upper bridge arm form an equivalent upper bridge arm, and the bridge arm multiplexing MMC operates in the upper bridge arm multiplexing mode; when the first bridge arm multiplexing switch (K) is closed... x1 When the second bridge arm multiplexer (K) is closed, the second bridge arm multiplexer (K) is activated. x2 When disconnected, the intermediate bridge arm is reused to the lower bridge arm to form an equivalent lower bridge arm, and it operates in the lower bridge arm reuse mode.

3. The bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy according to claim 1, characterized in that, Each half-bridge sub-module structure includes: a first insulated-gate bipolar transistor (IGBT1), a second insulated-gate bipolar transistor (IGBT2), a first anti-parallel diode (D1), a second anti-parallel diode (D2), and an energy storage capacitor (C); the first insulated-gate bipolar transistor (IGBT1) and the second insulated-gate bipolar transistor (IGBT2) are connected and connected in parallel across the energy storage capacitor (C); the first anti-parallel diode (D1) is connected in reverse parallel with the first insulated-gate bipolar transistor (IGBT1), and the second anti-parallel diode (D2) is connected in reverse parallel with the second insulated-gate bipolar transistor (IGBT2).

4. The bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy according to claim 3, characterized in that, Three basic operating states are achieved by controlling the conduction states of the first insulated-gate bipolar transistor (IGBT1) and the second insulated-gate bipolar transistor (IGBT2): enabled state, bypass state, and latched state. In the enabled state, the first insulated-gate bipolar transistor (IGBT1) is turned on and the second insulated-gate bipolar transistor (IGBT2) is turned off, and the output of the half-bridge submodule is the terminal voltage U of the energy storage capacitor (C). c In bypass mode, the first insulated-gate bipolar transistor (IGBT1) is off and the second insulated-gate bipolar transistor (IGBT2) is on, effectively short-circuiting the output of the half-bridge submodule, resulting in a zero-level output voltage. In latch-up mode, both the first insulated-gate bipolar transistor (IGBT1) and the second insulated-gate bipolar transistor (IGBT2) are off. At this time, if the current I of the half-bridge submodule is... SM If the current is greater than 0, then the current flows through the first anti-parallel diode (D1) to charge the energy storage capacitor (C); if the half-bridge submodule I... SM If the voltage is less than 0, the current flows through the second anti-parallel diode (D2), and the voltage of the energy storage capacitor (C) remains unchanged.

5. The bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy according to claim 1, characterized in that, First bridge arm multiplex switch (K) x1 ) and second bridge arm multiplex switch (K x2 ) connected in series, the first bridge arm multiplexer (K) x1 ) and the second bridge arm multiplex switch (K x2 The connection point of the first bridge arm multiplexer (K) serves as the input terminal for the three-phase current; x1 It consists of two IGBTs connected in reverse series and N / 2-1 IGBTs connected in series sequentially. One end is connected to the three-phase AC input terminal, and the other end is connected to the connection terminal of the upper and middle bridge arms; the second bridge arm multiplexer (K) x2 It consists of two IGBTs connected in reverse series and N / 2-1 IGBTs connected in series sequentially. One end is connected to the three-phase AC input terminal, and the other end is connected to the connection terminal of the middle and lower bridge arms; the first bridge arm multiplexer (K x1 ) and the second bridge arm multiplex switch (K x2 The IGBTs connected in reverse series in the first bridge arm form the switching section, used to achieve bidirectional switching of the bridge arm current; the first bridge arm multiplexer (K) x1 ) and the second bridge arm multiplex switch (K x2 The pressure-bearing part consists of N / 2-1 IGBTs connected in series, which is used to withstand the transient pressure difference generated by the reconfiguration between the bridge arms during operation.

6. The bridge arm multiplexing MMC system based on structural adaptation and dynamic switching strategy according to claim 1, characterized in that, The first auxiliary converter valve group (T1), the second auxiliary converter valve group (T2), the third auxiliary converter valve group (T3), and the fourth auxiliary converter valve group (T4) are composed of two IGBTs connected in reverse series and N / 2-1 IGBTs connected in series in sequence; the first freewheeling diode valve group (D3), the second freewheeling diode valve group (D4), the third freewheeling diode valve group (D5), and the fourth freewheeling diode valve group (D6) are composed of N / 2 diodes connected in sequence in the forward direction.

7. A DC fault clearing method based on the system described in any one of claims 1 to 6, characterized in that, Includes the following steps: S1: Fault detection and mode switching trigger: Real-time monitoring of DC bus voltage V dc and DC line current i dc When the DC bus voltage V dc The voltage drops to a preset threshold and the DC line current i dc When the safety threshold is exceeded, a DC bipolar short-circuit fault is determined to have occurred, and the following control operations are performed: All half-bridge submodules in the circuit are bypassed, i.e., the first insulated-gate bipolar transistor (IGBT1) is turned off and the second insulated-gate bipolar transistor (IGBT2) is turned on; the auxiliary converter valves in the auxiliary converter circuit—the first auxiliary converter valve group (T1), the second auxiliary converter valve group (T2), the third auxiliary converter valve group (T3), and the fourth auxiliary converter valve group (T4)—are turned off; and the upper and lower bridge arm currents i of phases a, b, and c are monitored in real time. arm In the direction of the current flow, the current-to-current switching logic is executed. When it is detected that the upper bridge arm current is positive and the lower bridge arm current is negative, the first bridge arm multiplexing switch (K) is controlled. x1 ) disconnected, second bridge arm multiplexer (K) x2 When the bridge arm is closed, the middle and upper bridge arms form an equivalent upper bridge arm. The bridge arm multiplexing MMC operates in upper bridge arm multiplexing mode. When the upper bridge arm current is detected to be negative and the lower bridge arm current is detected to be positive, the second bridge arm multiplexing switch (K) is controlled. x2 ) disconnected, first bridge arm multiplexer (K) x1 When the bridge arm is closed, the middle and lower bridge arms form an equivalent lower bridge arm. The bridge arm multiplexing MMC operates in the lower bridge arm multiplexing mode. When the upper bridge arm current is detected to be negative and the lower bridge arm current is negative, the first bridge arm multiplexing switch (K) is not changed. x1 ) and the second bridge arm multiplex switch (K x2 The on / off state of ); S2: Blocking and Fault Clearing: During a fixed time period of bypass, current transfer occurs, and all half-bridge sub-modules in the control circuit are blocked, i.e., both the first insulated-gate bipolar transistor (IGBT1) and the second insulated-gate bipolar transistor (IGBT2) are turned off. Then, a topology attenuation process begins, and the DC line current i... dc Gradually decrease to 0; S3: Fault clearing complete: Upon detecting DC line current i dc After returning to zero, it is determined that the DC bipolar short circuit fault has been cleared.

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