Compensation circuit, compensation method and calibration system

Abstract

The invention relates to a compensation circuit, a compensation method and a calibration system, which are used for connecting a charge pump phase-locked loop circuit. The charge pump phase-locked loop circuit adjusts the control voltage under the action of the charging current and the discharging current; the compensation circuit comprises a detection module and a comparison module, and the detection module is used for being connected with the charge pump phase-locked loop circuit and providing feedback voltage and detection voltage. The feedback voltage is equal to the control voltage, and the magnitude relationship between the detection voltage and the feedback voltage corresponds to the magnitude relationship between the charging current and the discharging current; the comparison module is connected with the detection module and is used for outputting an adjusting signal corresponding to a difference voltage between the control voltage and the detection voltage; the adjusting signal is used for adjusting charging current and / or discharging current of the charge pump phase-locked loop circuit. According to the charge pump phase-locked loop circuit, current mismatch of the charge pump phase-locked loop circuit can be reduced, so that the noise and stray performance of the charge pump phase-locked loop circuit is improved.

Description

Technical Field

[0001] This application relates to the field of current calibration technology, and in particular to compensation circuits, compensation methods and calibration systems. Background Technology

[0002] With the increasing demand for low-jitter, high-purity clock sources in applications such as wireless communication, high-speed interfaces, and precision clock systems, traditional analog phase-locked loops are facing bottlenecks in terms of phase noise, spurious suppression, and integration.

[0003] Charge pump phase-locked loops (CPPLLs) have become the mainstream architecture for preset frequency band frequency synthesizers due to their simple structure, large locking range, and ease of full integration with CMOS (Complementary Metal-Oxide-Semiconductor) technology. They are widely used in scenarios such as RF transceivers, optical communication clock recovery, and processor clock generation. However, when CPPLLs approach femtosecond-level jitter performance, the non-ideal effects of the charge pump itself become the core factor limiting performance. Specifically, the mismatch of the charge pump charging and discharging current introduces periodic voltage ripple on the loop filter. This ripple directly affects the control voltage, leading to problems such as increased reference spurious emissions and exacerbated deterministic jitter.

[0004] Therefore, suppressing current mismatch has become the key to the development of charge pump phase-locked loops into high-performance devices. Summary of the Invention

[0005] Therefore, it is necessary to provide a compensation circuit, compensation method, and calibration system that can improve the mismatch between charging current and discharging current in a charge pump phase-locked loop circuit, in order to address the above-mentioned technical problems.

[0006] In a first aspect, this application provides a compensation circuit for connecting a charge pump phase-locked loop circuit; the charge pump phase-locked loop circuit regulates the control voltage under the action of charging current and discharging current; the compensation circuit includes:

[0007] The detection module is used to connect to the charge pump phase-locked loop circuit and provide feedback voltage and detection voltage; the feedback voltage is equal to the control voltage, and the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging current and the discharging current.

[0008] A comparison module, connected to the detection module, is used to output an adjustment signal corresponding to the voltage difference between the feedback voltage and the detection voltage; the adjustment signal is used to adjust the charging current and / or the discharging current of the charge pump phase-locked loop circuit.

[0009] In one embodiment, the detection module includes:

[0010] A current replication unit is used to provide a charging replication current and a discharging replication current; the charging replication current is in a preset ratio to the charging current, and the discharging replication current is in the preset ratio to the discharging current;

[0011] The detection unit, connected to the current replication unit, is used to connect to the charge pump phase-locked loop circuit, receive the control voltage, provide feedback voltage equal to the control voltage, and provide the detection voltage based on the magnitude relationship between the charging replication current and the discharging replication current.

[0012] In one embodiment, the detection unit includes:

[0013] A linear DC regulator, connected to the current replication unit, is used to connect to the charge pump phase-locked loop circuit, and is connected to the control voltage to provide feedback voltage equal to the control voltage, and to provide a detection current based on the relationship between the charging replication current and the discharging replication current.

[0014] The conversion subunit is connected to the linear DC regulator and converts the detected current into the detected voltage.

[0015] In one embodiment, the linear DC regulator includes:

[0016] The operational amplifier unit has its non-inverting input connected to the current replication unit, its inverting input connected to the charge pump phase-locked loop circuit and connected to the control voltage, and its output connected to the conversion subunit.

[0017] A first controlled current source, wherein the controlled terminal of the first controlled current source is connected to the output terminal of the operational amplifier unit, and the first connection terminal of the first controlled current source is connected to the conversion subunit;

[0018] A first resistor and a second resistor connected to the first resistor, the first resistor also being connected to a second connection terminal of the first controlled current source, and the second resistor also being connected to an equivalent ground terminal, the connection node of the first resistor and the second resistor being used to provide the feedback voltage.

[0019] In one embodiment, the conversion subunit includes:

[0020] The second controlled current source has its controlled terminal and first connection terminal connected to the output terminal of the operational amplifier unit, respectively, and is used to access and transmit the detection current under the control of the operational amplifier unit.

[0021] A third resistor and a fourth resistor connected to the third resistor, the third resistor also being connected to a second connection terminal of the second controlled current source, and the fourth resistor also being connected to the equivalent ground terminal, the connection node of the third resistor and the fourth resistor providing the detection voltage.

[0022] In one embodiment, the resistance values ​​of the first resistor, the second resistor, the third resistor, and the fourth resistor are equal.

[0023] In one embodiment, the current replication unit includes:

[0024] A first current source, the input terminal of which is used to connect to a positive power supply voltage, and the output terminal of which is connected to the detection unit to provide the charging replication current;

[0025] A second current source has its input terminal connected to the output terminal of the first current source and the detection unit. The output terminal of the second current source is used to connect to an equivalent ground terminal. The second current source is used to provide the discharge replication current.

[0026] In one embodiment, the comparison module includes:

[0027] An analog-to-digital converter unit, connected to the detection module, is used to receive the detection voltage and the feedback voltage respectively, and to convert the voltage difference between the detection voltage and the feedback voltage into the adjustment signal in the form of a digital signal.

[0028] Secondly, this application provides a compensation method applied to the compensation circuit described above, to compensate for the charging current and / or discharging current when the charging current and discharging current in the charge pump phase-locked loop circuit are unequal; the compensation method includes:

[0029] When the charge pump phase-locked loop circuit is in a locked state, the feedback voltage and the detection voltage are acquired; the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging current and the discharging current.

[0030] A corresponding adjustment signal is generated based on the voltage difference between the feedback voltage and the detection voltage;

[0031] A compensation current is determined based on the adjustment signal to compensate for the charging current and / or the discharging current until the difference between the feedback voltage and the detection voltage is less than or equal to a preset difference.

[0032] Thirdly, this application provides a calibration system, comprising:

[0033] A charge pump phase-locked loop circuit is used to regulate the control voltage under the influence of charging current and discharging current;

[0034] The compensation circuit described above is connected to the charge pump phase-locked loop circuit.

[0035] The aforementioned compensation circuit, compensation method, and calibration system are used to connect to a charge pump phase-locked loop (PLL) circuit. The PLL circuit adjusts the control voltage under the influence of charging and discharging currents. The compensation circuit includes a detection module and a comparison module. The detection module is connected to the PLL circuit and provides a feedback voltage and a detection voltage. The feedback voltage is equal to the control voltage, and the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging and discharging currents. The comparison module is connected to the detection module and outputs an adjustment signal corresponding to the voltage difference between the control voltage and the detection voltage. The adjustment signal is used to adjust the charging current and / or discharging current of the PLL circuit. Therefore, this application detects the current mismatch in the PLL circuit through the detection module and provides a detection voltage corresponding to the degree of current mismatch and a feedback voltage equal to the control voltage. This allows the comparison module to output a corresponding adjustment signal based on the voltage difference between the control voltage and the detection voltage to compensate and adjust the charging current and / or discharging current, thereby reducing the current mismatch in the PLL circuit and improving its noise and spurious performance. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of the charge pump phase-locked loop circuit in the embodiments of this application;

[0038] Figure 2 The waveforms of charging current, discharging current, net output current, control voltage, and output frequency in the charge pump phase-locked loop circuit under ideal conditions.

[0039] Figure 3 The waveforms of rising edge pulse, falling edge pulse, charging current, discharging current, net output current, control voltage and output frequency are shown under the condition of current mismatch.

[0040] Figure 4 This is one of the structural schematic diagrams of the compensation circuit in one embodiment of this application;

[0041] Figure 5 This is a schematic diagram of the detection module in one embodiment of this application;

[0042] Figure 6 This is a schematic diagram of the detection unit in one embodiment of this application;

[0043] Figure 7 This is a schematic diagram of the structure of a linear DC regulator in one embodiment of this application;

[0044] Figure 8 This is a schematic diagram of the structure of the conversion subunit in one embodiment of this application;

[0045] Figure 9 The waveforms of the electric current, discharge current, net output current, control voltage, and output frequency after compensation and adjustment of the charging current and / or discharging current in one embodiment of this application are shown.

[0046] Figure 10 This is a schematic diagram of the structure of a current replication unit in one embodiment of this application;

[0047] Figure 11 This is a second schematic diagram of the compensation circuit in one embodiment of this application;

[0048] Figure 12 This is a flowchart illustrating the compensation method in one embodiment of this application.

[0049] Explanation of icon numbers:

[0050] 100: Compensation circuit; 110: Detection module; 111: Current replication unit; 1111: First current source; 1112: Second current source; 112: Detection unit; 1121: Linear DC regulator; 211: Operational amplifier unit; 212: First controlled current source; R1: First resistor; R2: Second resistor; 1122: Conversion subunit; 221: Second controlled current source; R3: Third resistor; R4: Fourth resistor; 120: Comparison module; 121: Analog-to-digital converter; 200: Charge pump phase-locked loop circuit. Detailed Implementation

[0051] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0052] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0053] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0054] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0055] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0056] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0057] The compensation circuit provided in this application can be used in a charge pump phase-locked loop circuit to connect to the charge pump phase-locked loop circuit and to compensate and adjust the charging current and discharging current in the charge pump phase-locked loop circuit.

[0058] For example, see Appendix Figure 1 , attached Figure 1A schematic diagram of a charge pump phase-locked loop circuit according to an embodiment of this application is shown. The charge pump phase-locked loop circuit in this embodiment may include a phase detector (PFD), a charge pump (CP), a low-pass filter (LPF), a voltage-controlled oscillator (VCO), and a divider. The charge pump phase-locked loop circuit regulates the control voltage under the action of charging current and discharging current. Specifically, the reference clock signal and the feedback clock signal are connected to a phase detector. The phase detector converts the phase difference between the reference clock signal and the feedback clock signal (the signal after frequency division of the control signal output) into a pulse signal including rising and falling edges: If the phase of the reference clock signal leads the phase of the feedback clock signal (i.e., the frequency of the feedback clock signal is too low and needs to be accelerated), the phase detector outputs a rising edge pulse UP, and the pulse width is positively correlated with the phase difference; if the phase of the feedback clock signal leads the phase of the reference clock signal (i.e., the frequency of the feedback clock signal is too high and needs to be decelerated), the phase detector outputs a falling edge pulse DN, and the pulse width is positively correlated with the phase difference; if the phases of the reference clock signal and the feedback clock signal are perfectly aligned (same frequency and synchronized phase), the phase detector outputs no pulse. A charge pump is connected to the rising edge pulse UP and the falling edge pulse DN output by the phase detector, and converts the rising edge pulse UP and the falling edge pulse DN into current signals accordingly, realizing the conversion of phase difference to current. When the rising edge pulse is valid, the charge pump charges the low-pass filter and outputs a charging current, the magnitude of which is positively correlated with the pulse width (i.e., phase difference) of the rising edge pulse. When the falling edge pulse is active, the charge pump discharges into the low-pass filter, outputting a discharge current that is inversely phase to the charging current and is positively correlated with the pulse width of the falling edge pulse. The charge pump can represent the positive / negative phase difference error through the accumulation of charging / discharging current. The low-pass filter receives the pulsed current output by the charge pump, converting it into a stable DC control voltage VC, while filtering out high-frequency noise (because the charge pump output is a pulsed current containing high-frequency components). When the charge pump outputs charging current, the capacitor in the low-pass filter stores energy, and the control voltage increases with the amount of charge. When the charge pump outputs discharging current, the capacitor in the low-pass filter releases its capacitance, and the control voltage decreases with the amount of charge. Since the magnitude of the control voltage is positively correlated with the total amount of charge injected by the charge pump (i.e., the integral of the phase difference), it can ultimately reflect the accumulated phase error. The voltage-controlled oscillator receives the control voltage output from the low-pass filter and outputs a clock signal whose frequency varies with the magnitude of the control voltage. If the control voltage increases, the frequency of the clock signal increases; if the control voltage decreases, the frequency of the clock signal decreases. Therefore, the change in control voltage directly adjusts the output frequency of the clock signal, realizing the voltage-to-frequency conversion.The distributor receives the high-frequency clock signal output from the voltage-controlled oscillator, divides the clock signal to obtain a feedback clock signal, and feeds it back to the phase detector for comparison with the reference clock signal until the frequency and phase of the reference clock signal and the feedback clock signal are completely consistent, the loop reaches a steady state, and the charge pump phase-locked loop circuit stably outputs the clock at the target frequency.

[0059] When the charge pump phase-locked loop circuit is in steady state, the total charge of the low-pass filter remains constant. At the end of each reference cycle, the amount of charge stored in the low-pass filter is the same as in the previous cycle. When there is no mismatch in the charge pump's charging and discharging currents, no additional current is output to the low-pass filter during both charging and discharging periods. Figure 2 The charge quantity of the low-pass filter remains constant, and the control voltage also remains constant, thus keeping the output frequency of the charge pump phase-locked loop circuit stable. However, in practice, the charge pump current cannot be perfectly matched. Therefore, during the conduction time, an additional net current is output to the low-pass filter, causing a change in the charge quantity. To maintain a constant charge, such as... Figure 3 To compensate for the charge changes mentioned above, a static phase error needs to be generated between the reference clock signal and the feedback clock signal. This results in periodic fluctuations in the control voltage VC, and its frequency also changes periodically. This significantly reduces the phase noise and spurious performance of the charge pump phase-locked loop circuit.

[0060] The applicant's research revealed that to address the mismatch between the charging and discharging currents of the charge pump, the circuit structure layout can be designed, such as with a symmetrical layout, or the structure within the circuit can be altered, such as by increasing the transistor size, to minimize the mismatch and reduce control voltage fluctuations. However, such designs cannot completely eliminate current mismatch and introduce other non-ideal factors, such as random errors in semiconductor manufacturing processes (e.g., threshold voltage deviation, transistor size deviation—increasing transistor size reduces the charge pump's response speed and limits the bandwidth of the charge pump's phase-locked loop circuit), etc.

[0061] Furthermore, leakage current can be reduced by adjusting the size of the transistors inside the charge pump. While this can mitigate current mismatch to some extent, excessively small transistors can increase flicker noise and negatively impact the stability of the charge pump's phase-locked loop circuit. The current mismatch compensation scheme proposed in this application completely solves the problem without introducing other non-ideal factors.

[0062] See appendix Figure 4 , attached Figure 4 The diagram shows a structural schematic of a compensation circuit 100 in one embodiment of this application. The compensation circuit 100 in this embodiment may include a detection module 110 and a comparison module 120.

[0063] The detection module 110 is used to connect to the charge pump phase-locked loop circuit 200 and provides feedback voltage and detection voltage; the feedback voltage is equal to the control voltage, and the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging current and the discharging current.

[0064] The comparison module 120 is connected to the detection module 110 and is used to output an adjustment signal corresponding to the voltage difference between the feedback voltage and the detection voltage; the adjustment signal is used to adjust the charging current and / or discharging current of the charge pump phase-locked loop circuit 200.

[0065] For example, the detection module 110 can be connected to the output node of the control voltage in the charge pump phase-locked loop circuit 200, thereby acquiring the control voltage and converting it into a feedback voltage, making the feedback voltage equal to the control voltage. Furthermore, under the action of the control voltage, a detection voltage corresponding to the magnitude relationship between the charging current and the discharging current can be generated.

[0066] The comparison module 120 is connected to the node that outputs the feedback voltage and the node that outputs the detection voltage of the detection module 110, respectively, to collect the detection voltage and the feedback voltage, realize the detection of the detection voltage and the feedback voltage, and output the corresponding adjustment signal based on the difference between the two. Based on the adjustment signal, the charging current and / or the discharging current can be compensated. For example, the leakage current in the charge pump can be compensated by an additional compensation current source, and even the overall leakage current inside the charge pump can be reduced to 0.

[0067] For example, the comparison module 120 detects the detection voltage and the feedback voltage. If the feedback voltage is greater than the detection voltage, it indicates that the charging replication current is too large, i.e., the charging current is too large, and the discharging current can be increased and / or the charging current decreased. If the feedback voltage is less than the detection voltage, it indicates that the discharging replication current is too large, i.e., the discharging current is too large, and the charging current can be increased and / or the discharging current decreased. When the detection voltage and the feedback voltage are equal, it indicates that the charging current and the discharging current are in a balanced state, there is no mismatch, and the ideal state is achieved.

[0068] In this embodiment, the detection module 110 detects the current mismatch of the charge pump phase-locked loop circuit 200 and provides a detection voltage corresponding to the degree of current mismatch and a feedback voltage equal to the control voltage. This allows the comparison module 120 to output a corresponding adjustment signal based on the voltage difference between the control voltage and the detection voltage, thereby compensating and adjusting the charging current and / or discharging current. This reduces the current mismatch of the charge pump phase-locked loop circuit 200 and improves the noise and spurious performance of the charge pump phase-locked loop circuit 200.

[0069] In some embodiments, see Appendix Figure 5 , attached Figure 5A schematic diagram of the detection module 110 in one embodiment of this application is shown. The detection module 110 in this embodiment may include a current replication unit 111 and a detection unit 112.

[0070] The current replication unit 111 is used to provide charging replication current and discharging replication current. The charging replication current is in a preset ratio to the charging current, and the discharging replication current is in a preset ratio to the discharging current. For example, the preset ratio can be 1, or greater than 1, or greater than 0 and less than 1, and is not limited to these.

[0071] The detection unit 112 is connected to the current replication unit 111 and is used to connect to the charge pump phase-locked loop circuit 200, input the control voltage, provide a feedback voltage equal to the control voltage, and provide a detection voltage based on the magnitude relationship between the charging replication current and the discharging replication current.

[0072] The current replication unit 111 can replicate the charging current and discharging current in the charge pump phase-locked loop circuit 200, thereby obtaining the degree of mismatch between the charging current and discharging current through the replicated charging and discharging currents. For example, when replicating the charging current, the potential connected to each terminal of the sub-unit providing the charging current in the current replication unit 111 is equal to the potential connected to each terminal of the device providing the charging current in the charge pump phase-locked loop circuit 200.

[0073] The detection unit 112 may include a device capable of converting current into voltage, such as a resistor. When the charging and discharging replica currents are unequal, the difference between them is converted into a detection voltage.

[0074] In this embodiment, the feedback voltage and detection voltage are provided by the current replication unit 111 and the detection unit 112, respectively. The detection unit 112 generates the detection voltage based on the charging current copied from the charging current output by the current replication unit 111 and the discharging current copied from the discharging current output. This avoids the compensation current of this application directly detecting the charging current and discharging current, thereby avoiding the introduction of additional circuitry into the charge pump phase-locked loop circuit 200, which would cause additional noise or complexity and affect the frequency coverage of the control voltage. By replicating the charging current and discharging current through the current replication unit 111, not only can the real-time output of the charging current and discharging current be obtained, but it can also be combined with the detection unit 112 to realize the mismatch mapping of the charging current and discharging current. By adjusting the signal, the charging current and / or discharging current can be compensated and adjusted to improve the current mismatch.

[0075] In some embodiments, see Appendix Figure 6 , attached Figure 6A schematic diagram of the detection unit 112 in one embodiment of this application is shown. The detection unit 112 in this embodiment may include a linear DC regulator 1121 and a conversion subunit 1122.

[0076] Linear DC regulator 1121 is connected to current replication unit 111 and is used to connect to charge pump phase-locked loop circuit, input control voltage, provide feedback voltage equal to the control voltage, and provide detection current based on the relationship between charging replication current and discharging replication current. Conversion subunit 1122 is connected to linear DC regulator 1121 and converts detection current into detection voltage.

[0077] For example, the linear DC regulator 1121 in this application embodiment can be a low-dropout linear regulator (LDO), which can maintain the voltage difference between the input control voltage and the output feedback voltage at a preset value, so that the feedback voltage approaches the control voltage, thereby providing a feedback voltage equal to the control voltage.

[0078] The conversion subunit 1122 can realize the conversion of current to voltage. When the linear DC regulator 1121 provides a detection current for the relationship between the magnitude of the charging replication current and the discharging replication current, the detection current is converted to provide a detection voltage.

[0079] In this embodiment, the linear DC regulator 1121 is used to acquire the control voltage and provide a feedback voltage equal to the control voltage. At the same time, the linear DC regulator 1121 acquires the difference current between the charging replication current and the discharging replication current and provides a corresponding detection current. The detection current is converted by the conversion subunit 1122 to provide a detection voltage corresponding to the magnitude relationship between the charging replication current and the discharging replication current.

[0080] In some embodiments, see Appendix Figure 7 , attached Figure 7 A schematic diagram of the structure of a linear DC regulator 1121 according to an embodiment of this application is shown. The linear DC regulator 1121 in this embodiment may include an operational amplifier unit 211, a first controlled current source 212, a first resistor R1, and a second resistor R2 connected to the first resistor R1.

[0081] The non-inverting input of the operational amplifier unit 211 is connected to the current replication unit 111, the inverting input of the operational amplifier unit 211 is used to connect to the charge pump phase-locked loop circuit 200 and input the control voltage, and the output of the operational amplifier unit 211 is connected to the conversion subunit 1122.

[0082] The controlled terminal of the first controlled current source 212 is connected to the output terminal of the operational amplifier unit 211, and the first connection terminal of the first controlled current source 212 is connected to the conversion subunit 1122.

[0083] The first resistor R1 is also connected to the second connection terminal of the first controlled current source 212, and the second resistor R2 is also connected to the equivalent ground terminal. The connection node A between the first resistor R1 and the second resistor R2 is used to provide feedback voltage.

[0084] For example, the first controlled current source 212 can be a MOS transistor (Metal-Oxide-Semiconductor Field-Effect Transistor). When the operational amplifier unit 211 controls the MOS transistor to be in the saturation region, the MOS transistor can transmit a constant detection current, thereby functioning as a controlled source. In other embodiments, the first controlled current source 212 can also be other circuit structures capable of outputting a constant current, and is not limited thereto.

[0085] When the charging current equals the discharging current, i.e. there is no current mismatch in the charge pump phase-locked loop circuit 200, the corresponding charging replication current equals the discharging replication current. The current replication unit 111 does not output current, and no current flows through the linear DC regulator 1121. At this time, IR1=IR2. The first connection terminal of the first controlled current source 212 is connected to the conversion subunit 1122, and no current flows through the conversion subunit 1122. Therefore, the detection voltage output by the conversion subunit 1122 and the feedback voltage provided by the connection node A of the first resistor R1 and the second resistor R2 are equal. At this time, the adjustment signal output by the comparison module 120 indicates that there is no need to compensate for the charging current and the discharging current.

[0086] When the charging current is greater than the discharging current, and the operational amplifier unit 211 is in a steady state, the charging replication current is also correspondingly greater than the discharging replication current. Therefore, the mismatch current (i.e., the difference current between the charging replication current and the discharging replication current) flows through the second resistor R2. Since the negative feedback of the operational amplifier unit 211 makes the feedback voltage equal to the control voltage, when the charge pump phase-locked loop circuit 200 is in a locked state, the current flowing through the second resistor R2 remains unchanged. At this time, the current flowing through the first resistor R1 will decrease. Therefore, there will be a voltage difference between the detection voltage and the feedback voltage, which can generate an adjustment signal to compensate and adjust the charging current and / or discharging current accordingly.

[0087] When the charging current is less than the discharging current, and the operational amplifier unit 211 is in a steady state, the charging replication current is also correspondingly less than the discharging replication current. Therefore, the mismatch current (i.e., the difference current between the charging replication current and the discharging replication current) flows through the second resistor R2. Since the negative feedback of the operational amplifier unit 211 makes the feedback voltage equal to the control voltage, when the charge pump phase-locked loop circuit 200 is in a locked state, the current flowing through the second resistor R2 remains unchanged. At this time, the current flowing through the first resistor R1 will increase. Therefore, there will be a voltage difference between the detection voltage and the feedback voltage, which can generate an adjustment signal to compensate and adjust the charging current and / or discharging current accordingly.

[0088] In this embodiment, the operational amplifier unit 211 can be locked in a steady state, stabilizing the feedback voltage to be equal to the input control voltage, thus locking the feedback voltage at the connection node of the first resistor R1 and the second resistor R2. When the charging replication current and the discharging replication current are unequal, the mismatched current flows as a detection current through the first resistor R1 and the first controlled current source 212 into the conversion subunit 1122. This causes the conversion subunit 1122 to convert the detection current into a detection voltage, thereby enabling the comparison module 120 to generate a corresponding adjustment signal based on the relationship between the detection voltage and the control voltage, achieving compensation adjustment of the charging current and / or discharging current.

[0089] In some embodiments, see Appendix Figure 8 , attached Figure 8 This is a schematic diagram of the structure of the conversion subunit 1122 in one embodiment of this application. The conversion subunit 1122 may include a second controlled current source 221, a third resistor R3, and a fourth resistor R4 connected to the third resistor R3.

[0090] The controlled terminal and the first connection terminal of the second controlled current source 221 are respectively connected to the output terminal of the operational amplifier unit 211, and are used to access and transmit the detection current under the control of the operational amplifier unit 211.

[0091] The third resistor R3 is also connected to the second connection terminal of the second controlled current source 221, and the fourth resistor R4 is also connected to the equivalent ground terminal. The connection node B of the third resistor R3 and the fourth resistor R4 provides the detection voltage.

[0092] In this embodiment, the second controlled current source 221 is similar to the first controlled current source 212 described above, and can also be a MOSFET. When the operational amplifier unit 211 controls the MOSFET to be in the saturation region, the MOSFET can transmit a constant detection current, thereby functioning as a controlled source. In other embodiments, the second controlled current source 221 can also be other circuit structures capable of outputting a constant current, and is not limited to this.

[0093] In this embodiment, the controlled terminal of the second controlled current source 221 is connected to the output terminal of the operational amplifier unit 211 and is controlled by the operational amplifier unit 211. The first connection terminal of the second controlled current source 221 is connected to the first connection terminal of the first controlled current source 212, and the current flowing through the second controlled current source 221 is equal to the current flowing through the first controlled current source 212. Therefore, in the case of a mismatch between the charging current and the discharging current, i.e., a mismatch between the charging replication current and the discharging replication current, the mismatched current flows through the first resistor R1 and the first controlled current source 212 as a detection current into the second controlled current source 221, and is then divided by the third resistor R3 and the fourth resistor R4 to provide a detection voltage to the comparison module 120. Therefore, the comparison module 120 can generate an adjustment signal that can accurately compensate and adjust the charging current and / or discharging current by comparing the detection voltage and the feedback voltage.

[0094] In some embodiments, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are equal.

[0095] In this embodiment, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are equal. By detecting the potential of the connection node between the first resistor R1 and the second resistor R2, and the potential of the connection node between the third resistor R3 and the fourth resistor R4, the mismatch between the charging replication current and the discharging replication current can be directly determined, thereby determining the mismatch between the charging current and the discharging current. By detecting the feedback voltage of the connection node between the first resistor R1 and the second resistor R2, and the detection voltage of the connection node between the third resistor R3 and the fourth resistor R4, an adjustment signal corresponding to the difference between the detection voltage and the feedback voltage can be generated. This allows for appropriate compensation adjustment of the charging current and / or the discharging current, achieving precise matching between the charging current and the discharging current. Figure 9 The net current is 0 in steady state, the output frequency remains stable, the phase error is reduced, and the noise and spurious performance of the circuit is improved.

[0096] In some embodiments, see Appendix Figure 10 , attached Figure 10 A schematic diagram of the current replication unit 111 in one embodiment of this application is shown. The current replication unit 111 in this embodiment may include a first current source 1111 and a second current source 1112. The input terminal of the first current source 1111 is used to connect to a positive power supply voltage, and the output terminal of the first current source 1111 is connected to the detection unit 112 to provide charging replication current.

[0097] The input terminal of the second current source 1112 is connected to the output terminal of the first current source 1111 and the detection unit 112. The output terminal of the second current source 1112 is used to connect to the equivalent ground terminal. The second current source 1112 is used to provide and discharge replication current.

[0098] For example, a current source function can be implemented using a current mirror. For instance, the first current source 1111 is connected to the charging current generation node, and the charging current is replicated through a current mirror (such as a MOSFET current mirror, a metal-oxide-semiconductor field-effect transistor current mirror, or a BJT current mirror-bipolar junction transistor current mirror) to output a stable replicated charging current. Correspondingly, the second current source 1112 can also replicate the discharge current using the same current replication principle as the first current source 1111.

[0099] In this embodiment, the charging current and discharging current are replicated by the first current source 1111 and the second current source 1112, respectively, providing stable replicating charging and discharging currents. This enables current adjustment, accommodating changes in the charging and discharging currents for precise replication. Utilizing a mirror architecture of the current sources, such as a common-gate current mirror, in some embodiments, the comparison module 120 may include an analog-to-digital converter (ADC). The ADC is connected to the detection module 110 and is used to receive the detection voltage and feedback voltage, respectively, converting the voltage difference between the detection voltage and the feedback voltage into a digital signal for adjustment.

[0100] In some embodiments, the comparison module 120 in this application may include an analog-to-digital conversion unit. The analog-to-digital conversion unit is connected to the detection module 110, and is respectively connected to the detection voltage and the feedback voltage, converting the voltage difference between the detection voltage and the feedback voltage into a digital signal for adjustment.

[0101] The analog-to-digital conversion unit can be an ADC (Analog-to-Digital Converter), which can convert continuously changing analog voltage signals into discrete digital signal forms of adjustment signals. For example, the adjustment signal can be a digital control code value, which makes it easy for the controller to read and understand the adjustment signal in order to efficiently compensate and adjust the charging current and / or discharging current.

[0102] In some embodiments, see Appendix Figure 11 , attached Figure 11 This is a second schematic diagram of the compensation circuit 100 according to an embodiment of this application. The compensation circuit 100 in this embodiment may include: a first current source 1111, a second current source 1112, an operational amplifier unit 211, a first MOSFET MP1, a second MOSFET MP2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and an analog-to-digital converter 121. The inverting input terminal of the operational amplifier unit 211 is connected to the control voltage VC output node in the charge pump phase-locked loop circuit 200. It is understood that... Figure 11Only a partial structure of the charge pump phase-locked loop circuit 200 is shown; the remaining structure of the charge pump phase-locked loop circuit 200 can be found in the appendix. Figure 1 Furthermore, a filter circuit can be connected to the connection line between the inverting input terminal of the operational amplifier unit 211 and the charge pump phase-locked loop circuit 200, as shown in the attached diagram. Figure 11 The diagram shows a filter circuit consisting of a first capacitor C1, a second capacitor C2, and a fifth resistor R5, which filters the control voltage VC. The non-inverting input terminal of the operational amplifier unit 211 is connected to the output terminal of the first current source 1111. The output terminal of the first current source 1111 is connected to the input terminal of the second current source 1112. The input terminal of the first current source 1111 is connected to the positive power supply voltage. The output terminal of the second current source 1112 is connected to the equivalent ground terminal. The connection node of the first current source 1111 and the second current source 1112 is also connected to the connection node A of the first resistor R1 and the second resistor R2. The first resistor R1 is also connected to the second connection terminal of the first MOSFET MP1. The second resistor R2 is also connected to the equivalent ground terminal. The output terminal of the operational amplifier unit 211 is connected to the controlled terminal of the first MOSFET MP1. The first connection terminal of the first MOSFET MP1 is connected to the first connection terminal of the second MOSFET MP2. The controlled terminal of the second MOSFET MP2 is connected to the output terminal of the operational amplifier unit 211. The second connection terminal of the second MOSFET MP2 is connected to the third resistor R3. The third resistor R3 is also connected to the fourth resistor R4. The fourth resistor R4 is also connected to the equivalent ground terminal. The connection point B between the third resistor R3 and the fourth resistor R4, and the connection point A between the first resistor R1 and the second resistor R2, are connected to different input terminals of the ADC121. The output terminal of the ADC121 outputs an adjustment signal to compensate and adjust the charging current IUP and / or the discharging current IDN, such as adjusting the attached... Figure 11 The first switch K1 and the second switch K2 in the middle.

[0103] The charging current IU provided by the first current source 1111 is copied to the charging current IUP, and the discharging current ID provided by the second current source 1112 is copied to the discharging current IDN. When IU = ID, that is, when there is no mismatch between the charging current and the discharging current, no current flows through the operational amplifier unit 211, the first resistor R1, and the second resistor R2. At this time, IR1 = IR2. The second MOSFET MP2 copies the current of the first MOSFET MP1, so IR3 = IR4. Thus, VA = VB, and the output code value of the ADC indicates that IUP and IDN are not compensated or adjusted. When Iu > ID, that is, when the charging current is greater than the discharging current, under steady-state conditions, the current flowing through R2 remains unchanged, while the current flowing through R1 decreases. Then the current relationship of each resistor is IR4 = IR3 = IR1 < IR2, therefore VA = VC > VB. The ADC detects the difference between VA and VB and converts it into a digital code value, representing a decrease in IUP and an increase in IDN, until VA = VB. When Iu < ID, meaning the charging current is less than the discharging current, under steady-state conditions, the current flowing through R2 remains constant, while the current flowing through R1 increases. Therefore, the current relationship among the resistors is IR4 = IR3 = IR1 > IR2, and thus VA = VC < VB. The ADC detects the difference between VA and VB and converts it into a digital code value, representing an increase in IUP and a decrease in IDN, until VA = VB. The ADC is used to detect and adjust the charging and discharging currents, achieving precise matching between them.

[0104] In some embodiments, based on the same inventive concept, this application also provides a compensation method applied to the compensation circuit mentioned above. The solution provided by the compensation method in this embodiment is similar to the solution described in the compensation circuit above. Therefore, the specific limitations of one or more compensation method embodiments provided below can be referred to the limitations of the compensation circuit above, and will not be repeated here.

[0105] See appendix Figure 12 , attached Figure 12 A flowchart illustrating a compensation method according to an embodiment of this application is shown. The compensation method provided in this embodiment can compensate for the charging current and / or discharging current when the charging current and discharging current in the charge pump phase-locked loop circuit are unequal. The compensation method provided in this embodiment may include the following steps S1201 to S1203.

[0106] Step S1201: When the charge pump phase-locked loop circuit is in a locked state, the feedback voltage and the detection voltage are acquired; the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging current and the discharging current.

[0107] For example, the charging current and discharging current can be replicated using a current replication unit to obtain the charging replicated current and discharging replicated current respectively. The charging replicated current can be in a preset ratio to the charging current, and the discharging replicated current can be in a preset ratio to the discharging current. The control voltage can be acquired using a linear DC regulator to provide a feedback voltage equal to the control voltage, and a detection current can be provided based on the magnitude relationship between the charging replicated current and the discharging replicated current. The detection current is converted into a detection voltage by a conversion subunit, thereby obtaining the feedback voltage and the detection voltage.

[0108] Step S1202: Generate a corresponding adjustment signal based on the voltage difference between the feedback voltage and the detection voltage.

[0109] Step S1203: Determine the compensation current based on the adjustment signal to compensate for the charging current and / or discharging current until the difference between the feedback voltage and the detection voltage is less than or equal to the preset difference.

[0110] For example, the difference between the feedback voltage and the detection voltage can approach 0 or even be equal to 0 to ensure that the charging current and the discharging current are mismatched.

[0111] For example, when calibrating and compensating the charging and discharging currents, the difference between the detection voltage and the feedback voltage is detected using an analog-to-digital converter. If the feedback voltage is greater than the detection voltage, it indicates that the charging current is too large, meaning the charging current is too high, and the discharging current can be increased and / or the charging current decreased. If the feedback voltage is less than the detection voltage, it indicates that the discharging current is too large, meaning the discharging current is too high, and the charging current can be increased and / or the discharging current decreased. When the detection voltage and the feedback voltage are equal, it indicates that the charging current and the discharging current are in balance, there is no mismatch, and the ideal state has been achieved.

[0112] In this embodiment, when the charge pump phase-locked loop circuit is in a locked state, the feedback voltage and the detection voltage are acquired, ensuring that the feedback voltage is equal to the control voltage of the charge pump phase-locked loop circuit. A corresponding adjustment signal is generated based on the voltage difference between the feedback voltage and the detection voltage. A compensation current is then determined based on the adjustment signal to compensate for the charging current and / or discharging current until the difference between the feedback voltage and the detection voltage is less than or equal to a preset difference. This achieves precise compensation for the charging and discharging currents, effectively avoiding the adverse effects introduced by current mismatch, thereby significantly reducing static errors and improving the noise and spurious performance of the charge pump phase-locked loop circuit.

[0113] It is understood that the compensation method in the embodiments of this application can be executed by a controller, which can be connected to the charge pump phase-locked loop circuit and the compensation circuit to execute the aforementioned compensation method.

[0114] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0115] In some embodiments, this application also provides a calibration system, which may include a charge pump phase-locked loop circuit and a compensation circuit as described in any of the above embodiments. The charge pump phase-locked loop circuit is used to regulate the control voltage under the action of charging current and discharging current; the compensation circuit is connected to the charge pump phase-locked loop circuit.

[0116] In this embodiment, the compensation circuit in any of the above embodiments provides feedback voltage and detection voltage through a current replication unit and a detection unit, respectively. The detection unit generates the detection voltage based on the charging current copied from the charging current output by the current replication unit and the discharging current copied from the discharging current output by the current replication unit. This avoids the compensation current of this application directly detecting the charging current and discharging current, thereby avoiding the introduction of additional circuitry into the charge pump phase-locked loop circuit, which would cause additional noise or complexity and affect the frequency coverage of the control voltage. By replicating the charging current and discharging current through the current replication unit, not only can the real-time output of the charging current and discharging current be obtained, but it can also be combined with the detection unit to realize the mismatch mapping of the charging current and discharging current. By adjusting the signal, the charging current and / or discharging current can be compensated and adjusted to improve the current mismatch. Therefore, the calibration system in this embodiment can realize timely and effective compensation calibration of the charge pump phase-locked loop circuit, improving the noise and spurious performance of the charge pump phase-locked loop circuit.

[0117] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0118] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A compensation circuit, characterized in that, Used to connect the charge pump phase-locked loop circuit; The charge pump phase-locked loop circuit regulates the control voltage under the action of charging current and discharging current; the compensation circuit includes: The detection module is used to connect to the charge pump phase-locked loop circuit and provide feedback voltage and detection voltage; the feedback voltage is equal to the control voltage, and the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging current and the discharging current. A comparison module, connected to the detection module, is used to output an adjustment signal corresponding to the voltage difference between the feedback voltage and the detection voltage; the adjustment signal is used to adjust the charging current and / or the discharging current of the charge pump phase-locked loop circuit.

2. The compensation circuit according to claim 1, characterized in that, The detection module includes: A current replication unit is used to provide a charging replication current and a discharging replication current; the charging replication current is in a preset ratio to the charging current, and the discharging replication current is in the preset ratio to the discharging current; The detection unit, connected to the current replication unit, is used to connect to the charge pump phase-locked loop circuit, receive the control voltage, provide feedback voltage equal to the control voltage, and provide the detection voltage based on the magnitude relationship between the charging replication current and the discharging replication current.

3. The compensation circuit according to claim 2, characterized in that, The detection unit includes: A linear DC regulator, connected to the current replication unit, is used to connect to the charge pump phase-locked loop circuit, and is connected to the control voltage to provide feedback voltage equal to the control voltage, and to provide a detection current based on the relationship between the charging replication current and the discharging replication current. The conversion subunit is connected to the linear DC regulator and converts the detected current into the detected voltage.

4. The compensation circuit according to claim 3, characterized in that, The linear DC regulator includes: The operational amplifier unit has its non-inverting input connected to the current replication unit, its inverting input connected to the charge pump phase-locked loop circuit and connected to the control voltage, and its output connected to the conversion subunit. A first controlled current source, wherein the controlled terminal of the first controlled current source is connected to the output terminal of the operational amplifier unit, and the first connection terminal of the first controlled current source is connected to the conversion subunit; A first resistor and a second resistor connected to the first resistor, the first resistor also being connected to a second connection terminal of the first controlled current source, and the second resistor also being connected to an equivalent ground terminal, the connection node of the first resistor and the second resistor being used to provide the feedback voltage.

5. The compensation circuit according to claim 4, characterized in that, The conversion subunit includes: The second controlled current source has its controlled terminal and first connection terminal connected to the output terminal of the operational amplifier unit, respectively, and is used to access and transmit the detection current under the control of the operational amplifier unit. A third resistor and a fourth resistor connected to the third resistor, the third resistor also being connected to a second connection terminal of the second controlled current source, and the fourth resistor also being connected to the equivalent ground terminal, the connection node of the third resistor and the fourth resistor providing the detection voltage.

6. The compensation circuit according to claim 5, characterized in that, The resistance values ​​of the first resistor, the second resistor, the third resistor, and the fourth resistor are equal.

7. The compensation circuit according to claim 2, characterized in that, The current replication unit includes: A first current source, the input terminal of which is used to connect to a positive power supply voltage, and the output terminal of which is connected to the detection unit to provide the charging replication current; A second current source has its input terminal connected to the output terminal of the first current source and the detection unit. The output terminal of the second current source is used to connect to an equivalent ground terminal. The second current source is used to provide the discharge replication current.

8. The compensation circuit according to claim 1, characterized in that, The comparison module includes: An analog-to-digital converter unit, connected to the detection module, is used to receive the detection voltage and the feedback voltage respectively, and to convert the voltage difference between the detection voltage and the feedback voltage into the adjustment signal in the form of a digital signal.

9. A compensation method, characterized in that, Applied to the compensation circuit as described in any one of claims 1 to 8, to compensate for the charging current and / or discharging current when the charging current and discharging current in the charge pump phase-locked loop circuit are unequal; The compensation method includes: When the charge pump phase-locked loop circuit is in a locked state, the feedback voltage and the detection voltage are acquired; the relationship between the detection voltage and the feedback voltage corresponds to the relationship between the charging current and the discharging current. A corresponding adjustment signal is generated based on the voltage difference between the feedback voltage and the detection voltage; A compensation current is determined based on the adjustment signal to compensate for the charging current and / or the discharging current until the difference between the feedback voltage and the detection voltage is less than or equal to a preset difference.

10. A calibration system, characterized in that, include: A charge pump phase-locked loop circuit is used to regulate the control voltage under the influence of charging current and discharging current; The compensation circuit as described in any one of claims 1 to 8 is connected to the charge pump phase-locked loop circuit.

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