Time slot scheduling method, system and device and readable storage medium

Abstract

The invention discloses a time slot scheduling method, system and device and a readable storage medium. The method comprises the following steps: receiving a to-be-encrypted message, and distributing the to-be-encrypted message to a corresponding cache queue based on a channel identifier carried by the to-be-encrypted message; based on the number of clock cycles required for completing unit message data by the encryption algorithm corresponding to each to-be-encrypted message, a scheduling time interval is configured, and the scheduling time interval comprises a first interval between continuous data units in the same message and a second interval between adjacent messages in the same cache queue; and based on the scheduling time interval, distributing the message to be encrypted from the cache queue to an encryption engine for encryption processing. Compared with the prior art, the message disorder problem caused by different encryption frameworks and / or different encryption algorithm calculation period differences is completely eradicated; the throughput performance and the resource utilization rate of the whole system are obviously improved; and the method has high flexibility and expandability.

Description

Technical Field

[0001] This invention belongs to the field of communication security technology, and specifically relates to a time slot scheduling method, system, device, and readable storage medium. Background Technology

[0002] In the current field of network communication security, using encryption algorithms to protect transmitted data has become a common solution. CBC mode, as a traditional block encryption mode, has a chain-dependent encryption process, which means its encryption process can only be performed serially, making it impossible to apply pipelining techniques to improve throughput. To process more data in a single clock cycle to increase bandwidth, traditional designs attempt to increase the number of encryption rounds processed per cycle. However, this method easily leads to a longer critical path, making timing convergence difficult at high clock frequencies, and the bandwidth improvement is also limited by the serial nature of the encryption. In contrast, GCM mode, based on a counter model, allows its encryption operations to be parallelized, supports pipelining, and can achieve high throughput.

[0003] GCM is often considered the preferred choice in many scenarios due to its parallel processing capabilities, built-in authentication and encryption features, and padding-free operation. However, in actual network devices, there are often scenarios where CBC and GCM modes are used in combination. Because the computation cycles of the two modes differ, when packets from different modes are transmitted alternately in the same channel, packet out-of-order delivery is easily caused by uneven processing speeds. Traditional scheduling schemes often lack flexible and configurable mechanisms, making it difficult to dynamically adjust scheduling slots according to real-time algorithm requirements. This makes it impossible to effectively balance timing convergence, bandwidth optimization, and out-of-order control, which limits the performance and practicality of multi-algorithm hybrid architectures in high-performance network devices.

[0004] Therefore, in order to address the above-mentioned technical problems, it is necessary to provide a time slot scheduling method, system, device, and readable storage medium.

[0005] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0006] The purpose of this invention is to provide a time slot scheduling method, system, device, and readable storage medium that can ensure that the packets to be encrypted in the queue are not out of order in a mixed scenario of multiple encryption algorithms.

[0007] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution: In a first aspect, the present invention provides a time slot scheduling method, applied to a message to be encrypted under a preset encryption framework, comprising: Receive the to-be-encrypted message, and distribute the to-be-encrypted message to the corresponding cache queue based on the channel identifier carried in the to-be-encrypted message; Configure the scheduling time interval based on the number of clock cycles required for the encryption algorithm corresponding to each to-be-encrypted message to complete the unit message data, where the scheduling time interval includes a first interval between consecutive data units within the same message and a second interval between adjacent messages in the same cache queue; Based on the scheduling time interval, distribute the to-be-encrypted message from the cache queue to the encryption engine for encryption processing.

[0008] In one or more embodiments of the present invention, configuring the first interval includes: If the preset encryption framework corresponding to the to-be-encrypted message does not support pipelining operation, configure the first interval to be greater than or equal to the number of clock cycles required for the encryption algorithm corresponding to the to-be-encrypted message to complete the encryption of the unit message data; If the preset encryption framework corresponding to the to-be-encrypted message supports pipelining operation, configure the first interval to be the configurable minimum value.

[0009] In one or more embodiments of the present invention, configuring the second interval includes: For adjacent to-be-encrypted messages in the same queue, the number of clock cycles required for the encryption algorithm corresponding to the prior to-be-encrypted message to complete the unit message data is the first number of cycles, and the number of clock cycles required for the encryption algorithm corresponding to the subsequent to-be-encrypted message to complete the unit message data is the second number of cycles; If the first number of cycles is greater than or equal to the second number of cycles, configure the second interval to be greater than or equal to the difference between the first number of cycles and the second number of cycles; If the first number of cycles is less than the second number of cycles, configure the second interval to be the configurable minimum value.

[0010] In one or more embodiments of the present invention, the method further includes: Configure the maximum number of rounds of encryption processing per unit clock cycle; Based on the maximum number of rounds of encryption processing per unit clock cycle, calculate the number of clock cycles required for encrypting each to-be-encrypted message in the cache queue , where, is the number of rounds required for the encryption algorithm corresponding to the to-be-encrypted message to complete the unit message data, is the maximum number of rounds of encryption processing per unit clock cycle.

[0011] In one or more embodiments of the present invention, the method further includes: Configure multiple registers for controlling the first interval and the second interval.

[0012] In a second aspect, the present invention provides a time slot scheduling system, comprising: The receiving module is used to receive the message to be encrypted and distribute the message to be encrypted to the corresponding buffer queue based on the channel identifier carried in the message to be encrypted; The configuration module is used to configure the scheduling time interval based on the number of clock cycles required to complete the unit message data according to the encryption algorithm corresponding to each message to be encrypted, wherein the scheduling time interval includes a first interval between consecutive data units within the same message and a second interval between adjacent messages. The encryption module is used to distribute the message to be encrypted from the cache queue to the encryption engine for encryption processing based on the scheduling time interval parameter.

[0013] In one or more embodiments of the present invention, configuring the first interval includes: If the preset encryption framework corresponding to the message to be encrypted does not support pipelined operation, then the first interval is configured to be greater than or equal to the number of clock cycles required for the encryption algorithm corresponding to the message to be encrypted to complete the encryption of a unit message data. If the preset encryption framework corresponding to the message to be encrypted supports pipelined operation, then the first interval is configured to be the minimum configurable value.

[0014] In one or more embodiments of the present invention, configuring the second interval includes: For adjacent messages to be encrypted in the same queue, the number of clock cycles required for the encryption algorithm corresponding to the earlier message to be encrypted to complete a unit of message data is the first number of clock cycles, and the number of clock cycles required for the encryption algorithm corresponding to the later message to be encrypted to complete a unit of message data is the second number of clock cycles. If the first number of cycles is greater than or equal to the second number of cycles, then the second interval is configured to be greater than or equal to the difference between the first number of cycles and the second number of cycles. If the first number of cycles is less than the second number of cycles, then the second interval is configured to the minimum configurable value.

[0015] Thirdly, the present invention provides a computer device comprising: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the time slot scheduling method by executing the computer instructions.

[0016] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to execute the time slot scheduling method described above.

[0017] Compared with the prior art, the time slot scheduling method provided by the present invention effectively eliminates the problem of out-of-order packets caused by the difference in calculation cycles of different encryption frameworks and / or different encryption algorithms within the same communication channel by parameterizing the scheduling intervals within and between packets. It avoids the complex back-end sorting logic required by traditional solutions, significantly simplifies the design and reduces processing latency. Furthermore, this invention achieves bandwidth isolation between different encryption algorithms, enabling high-performance encryption framework modes that support pipelines to achieve their maximum throughput without being limited by the lower bandwidth of reused non-pipelined encryption framework modes. This significantly improves the overall system throughput and resource utilization while ensuring data security.

[0018] Finally, the architecture is highly flexible and scalable, and can be adapted to different process nodes, clock frequencies and algorithm combinations simply by configuring registers, providing a general, efficient and reliable hardware solution for Ethernet communication scenarios with high security requirements. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram illustrating an implementation scenario of the time slot scheduling method in one embodiment of the present invention; Figure 2 This is a flowchart of a time slot scheduling method in one embodiment of the present invention; Figure 3 This is a structural block diagram of a time-slot scheduling system according to another embodiment of the present invention; Figure 4 This is a structural block diagram of an electronic device according to one embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of adjacent messages to be encrypted in a specific embodiment of the present invention. Detailed Implementation

[0021] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0022] Unless otherwise expressly stated, throughout the specification and claims, the term "comprising" or its variations such as "including" or "comprises" shall be understood to include the stated elements or components without excluding other elements or other components.

[0023] In existing technical solutions using the CBC encryption framework as an example, a common practice to improve data encryption bandwidth is to execute multiple rounds of function operations in parallel within a single clock cycle at the inherent clock frequency (the number of rounds typically ranges from 1 to 32 rounds). This shortens the encryption processing time for each 16-byte message, thereby increasing the overall data throughput. Simultaneously, the timing of subsequent message input must be strictly controlled; the next message can only be sent to the encryption engine after the current 16-byte message has been encrypted.

[0024] However, this design approach has several problems in practical implementation. First, under certain process conditions, the increased path delay due to integrating multiple rounds of computation within a single cycle can easily lead to timing convergence issues, placing high demands on the timing constraints of the circuit design. Second, even after achieving timing convergence, the system bandwidth improvement is still limited by the upper limit of the maximum number of computation rounds per cycle, limiting further improvement potential. Furthermore, this scheme has strong control requirements on the message input order and timing, resulting in complex input logic design and increasing the difficulty of implementing the control path. On the other hand, this architecture is typically optimized only for CBC mode and fails to simultaneously support other commonly used encryption modes such as GCM (Galois / Counter Mode), leading to a relatively limited application scenario and restricting its flexible use across different security protocols.

[0025] The inventors of this invention have identified the main shortcomings of existing technologies and, based on these shortcomings, proposed a new technical approach: shifting the focus from optimizing the computational strength within the encryption engine to a system-level message scheduling strategy. By configuring the scheduling interval for consecutive data blocks within the same message, and the scheduling interval between different messages within the same channel, a collaborative processing framework capable of sensing algorithm characteristics and dynamically managing data flow timing is constructed.

[0026] For CBC mode, sufficient intra-message intervals are configured to ensure that chained dependencies are satisfied; for GCM mode, the interval can be set to zero to fully utilize its pipeline potential. When the same channel processes messages from different algorithms alternately, the configuration of inter-message intervals ensures that messages are not out of order due to differences in computation cycles. This parameter-configurable scheduling mechanism enables the system to be compatible with different algorithms with a unified architecture, maximizing overall bandwidth while ensuring correctness, and effectively avoiding the timing convergence difficulties of traditional solutions.

[0027] Please refer to Figure 1 The diagram shows an application scenario of the time slot scheduling method provided by the present invention under one embodiment. The scenario specifically includes: a receiving unit 101, a buffer scheduling queue 102, and an encryption engine 103.

[0028] It should be noted that communication connections are established between the receiving unit 101, the buffer scheduling queue 102, and the encryption engine 103. The communication network derived from these communication connections can include various connection types, including but not limited to wired connections, wireless connections, or fiber optic cable connections. Furthermore, this communication network can be a local area network (LAN), a metropolitan area network (MAN), a wide area network (WAN), or any combination of these three.

[0029] The receiving unit 101 is used to receive the message to be encrypted and, based on the parsing of the message header, obtain the channel identifier corresponding to the message to be encrypted. Based on the channel identifier, the message is distributed to the corresponding buffer queue.

[0030] The cache scheduling unit 102 is used to adaptively configure the first interval and the second interval based on the encryption algorithm and encryption framework applicable to the messages to be encrypted in the cache queue.

[0031] The encryption engine 103 is used to encrypt messages in the buffer queue based on the first interval and the second interval to ensure encryption timing.

[0032] It should be noted that the present invention can also be configured to provide user terminals for users to input custom parameters required to implement the present invention, including but not limited to the number of encryption rounds that can be performed per unit time period.

[0033] The user terminal is equipped with computer software programs that match the time slot scheduling method provided in this method; the user terminal may include, but is not limited to, portable electronic devices or wearable electronic devices such as desktop computers (PCs), smartphones, handheld computers, tablet computers, personal digital assistants (PDAs), etc., and the embodiments of this invention do not limit the above contents.

[0034] It should also be noted that the time slot scheduling method of this embodiment can be applied to the time slot scheduling system of this embodiment. This time slot scheduling system can be configured on a terminal. The terminal can include, but is not limited to, PCs (Personal Computers), PDAs (Tablet Computers), smartphones, smart wearable devices, etc.

[0035] Please refer to Figure 2 The diagram shown illustrates a time-slot scheduling process according to an embodiment of the present invention. This time-slot scheduling method specifically includes the following steps: S201: Receive the message to be encrypted, and distribute the message to be encrypted to the corresponding buffer queue based on the channel identifier carried by the message to be encrypted; It is understandable that the existence of messages requiring encryption, coupled with differences in the encryption algorithms and frameworks used for these messages, leads to the problem of out-of-order message delivery, thus giving rise to the technical approach and solution of this invention. Therefore, this technical step is fundamental to the time-slot scheduling of this invention, ensuring that message data is orderly classified and cached before entering encryption processing, thus supporting subsequent scheduling and encryption operations.

[0036] In an exemplary embodiment, a message to be encrypted should at least include: metadata, a channel identifier, and one or more consecutive data units. The metadata includes a packet start signal and a datagram end signal that explicitly identify the beginning and end of a complete data packet. By identifying the channel identifier (such as a HANNER) in the message, data can be distributed to independent buffer queues, avoiding data interference between different channels and laying the foundation for subsequent configurable scheduling.

[0037] Specifically, in one implementation, the mapping relationship between the channel identifier and the cache queue can be clearly defined in a preset mapping rule. After receiving the message to be encrypted, the channel identifier in the message header is parsed, and the message to be encrypted is routed to the corresponding cache queue based on the mapping rule. The cache queue can be a first-in, first-out (FIFO) cache. Each cache queue can be maintained independently or collectively, and the queue depth can be dynamically configured according to the expected traffic to prevent overflow and optimize latency; this embodiment of the invention does not impose any limitations on this.

[0038] S202: Configure the scheduling time interval based on the number of clock cycles required to complete the unit message data based on the encryption algorithm corresponding to each of the messages to be encrypted.

[0039] It should be noted that the out-of-order delivery of messages to be encrypted in existing technologies mainly falls into two categories. One is the out-of-order delivery of consecutive data units within the message itself during the encryption process; the other is the out-of-order delivery of adjacent messages within the same channel during the encryption process. These two types of out-of-order delivery problems are particularly prominent in multi-algorithm hybrid encryption scenarios, severely impacting the reliability of data transmission and system performance.

[0040] Specifically, out-of-order delivery often occurs within the same message to be encrypted in encryption frameworks that do not support pipelining. Taking the CBC encryption framework as an example, the encryption of each 16-byte data unit depends on the encryption result of the previous data unit, forming a strict serial dependency chain. If the previous data unit has not completed its encryption calculation, subsequent data units cannot begin the encryption process. If the scheduling mechanism does not fully consider this dependency and schedules subsequent data units to the encryption engine too early, it will lead to contention for encryption resources among data block units, disrupting the integrity of the encryption chain and causing out-of-order delivery of data units within the same message.

[0041] It should be noted that the pipeline operation described in this invention refers to an efficient data processing method adopted by encryption algorithms that support parallel processing. In this mode, the encryption process of a single 16-byte message can be divided into multiple independent processing stages (such as the round-shifting stage), and the data blocks of different messages can be processed continuously and overlappingly in these stages, just like an industrial production line. When the previous data block enters the next stage, the next data block can enter the current stage, thereby eliminating the idle waiting time between processing units.

[0042] On the other hand, the out-of-order delivery of adjacent messages to be encrypted within the same channel is mainly because when messages using different encryption algorithms are transmitted sequentially on the same channel, the clock cycles required to complete the encryption of a single 16-byte data block vary significantly due to the different computational complexity and mode characteristics of the algorithms themselves.

[0043] For example, if the Eop of an adjacent CBC-SM4 message to be encrypted is processed within the same channel, and the Sop of the next GCM-AES message is immediately scheduled, the encryption completion speed of the GCM mode will be much faster than that of the CBC message that is still being processed, because the GCM mode supports pipelined processing and has a short computation cycle. This "last-come-first-served" phenomenon will inevitably lead to serious out-of-order delivery of messages within the channel.

[0044] Therefore, in this embodiment of the invention, the scheduling time interval includes a first interval between consecutive data units within the same message and a second interval between adjacent messages in the same buffer queue. It should also be noted that, to meet the configuration requirements for the first and second intervals, this invention includes a configuration register. This register stores configurable scheduling parameters, providing a time control basis for message scheduling.

[0045] In an exemplary embodiment, configuring the first interval includes: if the preset encryption framework corresponding to the message to be encrypted does not support pipelined operation, then configuring the first interval to be greater than or equal to the number of clock cycles required for the encryption algorithm corresponding to the message to be encrypted to complete the encryption of a unit message data; if the preset encryption framework corresponding to the message to be encrypted supports pipelined operation, then configuring the first interval to be a configurable minimum value.

[0046] For example, such as Figure 5 The diagram shows adjacent packets to be encrypted in the buffer queue. Packet0 performs CBC-SM4 encryption. The number of clock cycles between the two 16-byte data packets, data0 and data1, is configurable by the register. The corresponding functions are implemented in the algorithm selection control logic and the delay controller. Since the clock cycles required for CBC-SM4 encryption device 1 to complete one encryption are 16, the corresponding register is configured with a value greater than or equal to 16 to ensure that data1 can obtain the encryption result of data0 as input before entering CBC-SM4 encryption device 1.

[0047] In the same implementation scenario, packet1 is the next packet to be encrypted adjacent to packet0 in the same buffer queue. Packet1 performs GCM-AES encryption. This encryption mode framework supports pipelined operation, so adjacent data units data0 and data1 in packet1 can be scheduled consecutively. Therefore, the value of the corresponding register in this mode can be configured to 0. This configuration ensures that the bandwidth of the GCM-AES encryption device is not affected by the CBC-SM4 encryption device.

[0048] In another exemplary embodiment, configuring the second interval includes: for adjacent packets to be encrypted in the same queue, the number of clock cycles required for the encryption algorithm corresponding to the earlier packet to be encrypted to complete a unit packet data is the first number of cycles, and the number of clock cycles required for the encryption algorithm corresponding to the later packet to be encrypted to complete a unit packet data is the second number of cycles; if the first number of cycles is greater than or equal to the second number of cycles, then the second interval is configured to be greater than or equal to the difference between the first number of cycles and the second number of cycles; if the first number of cycles is less than the second number of cycles, then the second interval is configured to be a configurable minimum value.

[0049] For example, following the above... Figure 5The specific embodiment shown is as follows. Packet0 performs CBC-SM4 encryption, while packet1 performs GCM-AES encryption. After packet0 schedules out the eop, the corresponding packet data dataX enters CBC-SM4. As mentioned earlier, GCM-AES requires 8 clock cycles to complete 16-byte data encryption, while CBC-SM4 requires 16 clock cycles. There is an 8-clock-cycle time difference between the two encryption modes. Therefore, after packet0's eop packet data dataX is scheduled out, packet1's soop corresponding data0 cannot be scheduled out in the next clock cycle. Otherwise, before packet0's eop packet data dataX completes CBC-SM4 encryption, packet1's soop data data0 will complete GCM-AES encryption. In this case, packet1's soop data will appear before packet0's eop data, resulting in out-of-order packets on the same channel. Therefore, different messages in the same channel need to have a certain time interval during scheduling. This time interval is also configurable by the register. The minimum value that can be configured is the difference between the clock cycles required by CBC-SM4 encryption device 1 and GCM-AES encryption device 1. This configuration ensures that message out-of-order scheduling will not occur.

[0050] Furthermore, if there is an adjacent next message to be encrypted, packet2, after packet1, and packet2 uses the same encryption framework and corresponding encryption algorithm as packet0, then since the time period required to encrypt the preceding message is shorter than the time period required to encrypt the following message, the second interval between packet1 and packet2 can be set to 0.

[0051] It should be noted that the reason why different encryption algorithms require different time periods is because the number of computation rounds required under different encryption algorithms is different. Therefore, for different implementation scenarios, the time slot scheduling method of the present invention further includes: configuring the maximum number of rounds of encryption processing per unit clock cycle; based on the maximum number of rounds of encryption processing per unit clock cycle, calculating the number of clock cycles required for encryption of each message to be encrypted in the buffer queue, T=⌈N / n⌉, where N is the number of rounds required for the encryption algorithm corresponding to the message to be encrypted to complete a unit of message data, and n is the maximum number of rounds of encryption processing per unit clock cycle.

[0052] S203: Based on the scheduling time interval, distribute the message to be encrypted from the cache queue to the encryption engine for encryption processing.

[0053] Please refer to Figure 3As shown, based on the same inventive concept as the aforementioned time slot scheduling method, one embodiment of the present invention provides a time slot scheduling system 300, including: a receiving module 301, a configuration module 302, and an encryption module 303.

[0054] Specifically, the receiving module 301 is used to receive the message to be encrypted and distribute the message to be encrypted to the corresponding buffer queue based on the channel identifier carried in the message to be encrypted; Configuration module 302 is used to configure the scheduling time interval based on the number of clock cycles required to complete the unit message data according to the encryption algorithm corresponding to each message to be encrypted, wherein the scheduling time interval includes a first interval between consecutive data units within the same message and a second interval between adjacent messages. The encryption module 303 is used to distribute the message to be encrypted from the cache queue to the encryption engine for encryption processing based on the scheduling time interval parameter.

[0055] Please refer to Figure 4 As shown, embodiments of the present invention also provide an electronic device 400, which includes at least one processor 401, a memory 402 (e.g., non-volatile memory), a memory 403, and a communication interface 404, wherein the at least one processor 401, the memory 402, the memory 403, and the communication interface 404 are connected together via an internal bus 405. The at least one processor 401 is used to invoke at least one program instruction stored or encoded in the memory 402, so that the at least one processor 401 performs various operations and functions of the time slot scheduling method described in the various embodiments of this specification.

[0056] In the embodiments of this specification, electronic device 400 may include, but is not limited to: personal computer, server computer, workstation, desktop computer, laptop computer, notebook computer, mobile electronic device, smartphone, tablet computer, cellular phone, personal digital assistant (PDA), handheld device, messaging device, wearable electronic device, consumer electronic device, etc.

[0057] This invention also provides a computer-readable medium carrying computer-executable instructions. When executed by a processor, these instructions can be used to implement various operations and functions of the time slot scheduling methods described in the various embodiments of this specification.

[0058] The computer-readable medium in this invention can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this invention, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0059] In this invention, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. This propagated data signal may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wireline, optical fiber, RF, etc., or any suitable combination thereof.

[0060] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0061] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus, systems, and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0062] The foregoing description of specific exemplary embodiments of the invention is for illustrative and explanatory purposes. These descriptions are not intended to limit the invention to the precise forms disclosed, and it will be apparent that many changes and variations can be made in accordance with the foregoing teachings. The exemplary embodiments were chosen and described in order to explain the specific principles of the invention and its practical application, thereby enabling those skilled in the art to implement and utilize various different exemplary embodiments of the invention, as well as various different choices and variations. The scope of the invention is intended to be defined by the claims and their equivalents.

[0063] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0064] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A time slot scheduling method applied to a to-be-encrypted message under a preset encryption framework, characterized in that, The method comprises: receiving the to-be-encrypted message, and distributing the to-be-encrypted message to a corresponding cache queue based on a channel identifier carried by the to-be-encrypted message; configuring a scheduling time interval based on the number of clock cycles required by the encryption algorithm corresponding to each to-be-encrypted message to complete unit message data, wherein the scheduling time interval comprises a first interval between consecutive data units in the same message and a second interval between adjacent messages in the same cache queue; distributing the to-be-encrypted message from the cache queue to an encryption engine for encryption processing based on the scheduling time interval.

2. The time slot scheduling method of claim 1, wherein, The configuration of the first interval comprises: if the preset encryption framework corresponding to the to-be-encrypted message does not support pipeline operation, configuring the first interval to be greater than or equal to the number of clock cycles required by the encryption algorithm corresponding to the to-be-encrypted message to complete unit message data encryption; if the preset encryption framework corresponding to the to-be-encrypted message supports pipeline operation, configuring the first interval to be a configurable minimum value.

3. The time slot scheduling method of claim 1, wherein, The configuration of the second interval comprises: for the to-be-encrypted messages adjacent in the same queue, the number of clock cycles required by the encryption algorithm corresponding to the former to-be-encrypted message to complete unit message data is a first period number, and the number of clock cycles required by the encryption algorithm corresponding to the latter to-be-encrypted message to complete unit message data is a second period number; if the first period number is greater than or equal to the second period number, configuring the second interval to be greater than or equal to the difference between the first period number and the second period number; if the first period number is less than the second period number, configuring the second interval to be a configurable minimum value.

4. The time slot scheduling method of claim 1, wherein, The method further comprises: configuring a maximum value of the number of rounds of encryption processing per unit clock cycle; The number of clock cycles required for encryption of each of the to-be-encrypted messages in the buffer queue is calculated based on the maximum value of the number of rounds of encryption processing in a unit clock cycle wherein, is the number of rounds of an encryption algorithm corresponding to the to-be-encrypted message required for unit message data, is the maximum value of the number of rounds of encryption processing in a unit clock cycle.

5. The time slot scheduling method of claim 1, wherein, The method further comprises: configuring a plurality of registers for controlling the first interval and the second interval.

6. A time slot scheduling system applied to the time slot scheduling method of any one of claims 1-5, characterized by, The method comprises: a receiving module configured to receive the to-be-encrypted message, and distribute the to-be-encrypted message to a corresponding cache queue based on a channel identifier carried by the to-be-encrypted message; a configuration module configured to configure a scheduling time interval based on the number of clock cycles required by the encryption algorithm corresponding to each to-be-encrypted message to complete unit message data, wherein the scheduling time interval comprises a first interval between consecutive data units in the same message and a second interval between adjacent messages; an encryption module configured to distribute the to-be-encrypted message from the cache queue to an encryption engine for encryption processing based on the scheduling time interval parameter.

7. The time slot scheduling system of claim 6, wherein, The configuration of the first interval comprises: if the preset encryption framework corresponding to the to-be-encrypted message does not support pipeline operation, configuring the first interval to be greater than or equal to the number of clock cycles required by the encryption algorithm corresponding to the to-be-encrypted message to complete unit message data encryption; if the preset encryption framework corresponding to the to-be-encrypted message supports pipeline operation, configuring the first interval to be a configurable minimum value.

8. The time slot scheduling system of claim 6, wherein, The configuration of the second interval comprises: For the to-be-encrypted messages adjacent in the same queue, a number of clock cycles required by an encryption algorithm corresponding to a former to-be-encrypted message to complete unit message data is a first number of cycles, and a number of clock cycles required by an encryption algorithm corresponding to a latter to-be-encrypted message to complete unit message data is a second number of cycles; If the first number of cycles is greater than or equal to the second number of cycles, the second interval is configured to be greater than or equal to a difference between the first number of cycles and the second number of cycles; If the first number of cycles is less than the second number of cycles, the second interval is configured to be a configurable minimum value.

9. A computer device, comprising: The method comprises: a memory and a processor, which are in communication connection with each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the time slot scheduling method in any one of claims 1-5.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions for causing a computer to perform the time slot scheduling method in any one of claims 1-5.

Images