Communication chip reliability test method based on big data analysis

Abstract

The invention relates to the technical field of chip testing, in particular to a communication chip reliability testing method based on big data analysis. Chip data and test data are preprocessed to obtain multiple pieces of preprocessed data, then a test model is created, the performance index of a target chip is calculated based on the test data through the test model, reliability judgment is conducted on the target chip based on the performance index, and multiple normal chips and abnormal chips are obtained. The method comprises the following steps: establishing a performance curve of a real-time chip, performing single classification learning based on a normal chip to obtain a trained test model, finally obtaining a real-time performance curve of the real-time chip, and judging the reliability of the real-time chip in combination with the real-time performance curve and a standard performance curve. The performance curve representing the chip is used as the standard performance curve, so that a user can judge the reliability of the real-time chip according to the standard performance curve, and the reliability test efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of chip testing technology, and more specifically, to a reliability testing method for communication chips based on big data analysis. Background Technology

[0002] Communication chips are the core components for realizing communication functions and play a significant role in data transmission in electronic devices. Communication chips are integrated circuits used for communication functions, undertaking key tasks such as signal transmission, reception, modulation, demodulation, encoding, and decoding, ensuring accurate and efficient transmission of information between different devices and networks.

[0003] Chip reliability is affected by factors such as impurity and dust sensitivity, metallization, chip materials, and packaging during the manufacturing process, requiring strict process control. Reliability testing encompasses high and low temperature testing, thermal resistance testing, and power cycling testing, verifying long-term stability by simulating environments such as temperature, humidity, and mechanical stress.

[0004] Chinese patent CN115473831B discloses a reliability verification method and system for IoT chips. The method obtains a verification strategy based on the IoT chip model and performs a first verification on each pin of the IoT chip to determine the reliability of each pin. Based on the preset functions of each interface of the IoT chip, a second verification is performed on each interface to determine the communication defect characteristics of related pins of each interface, thereby determining the overall communication defect situation of the corresponding interface. A third verification is performed on the IoT chip's network communication to determine its communication capability. Based on the reliability of all pins, the overall communication defect situation of all interfaces, and the communication capability of the IoT chip, the reliability of the IoT chip is determined. However, in the prior art, specific performance judgments are not performed at each test node during the chip testing process, resulting in the inability to promptly detect unreliable target chips. Summary of the Invention

[0005] The purpose of this invention is to provide a reliability testing method for communication chips based on big data analysis, so as to solve the problems mentioned in the background art.

[0006] To address the aforementioned technical problems, one objective of this invention is to provide a reliability testing method for communication chips based on big data analysis, comprising: Collect chip data and test data of the target chip, preprocess the chip data and test data to obtain multiple preprocessed data; Create a test model; The preprocessed data is input into the test model. The test model calculates the performance index of the target chip based on the test data, and the reliability of the target chip is determined based on the performance index. Multiple normal chips and abnormal chips are obtained. Single classification learning is performed based on the normal chips to obtain the trained test model. Real-time data from the real-time chip is input into the trained test model to obtain the real-time performance curve of the real-time chip, and the reliability of the real-time chip is judged by combining the real-time performance curve with the standard performance curve.

[0007] Preferably, the process of acquiring chip data and test data from the target chip, and preprocessing the chip data and test data to obtain multiple preprocessed data, includes the following steps: Select a target chip; Multiple test signals are sent to the functional logic unit under test of the target chip. The output signal of the target chip for each test signal is acquired; the output signal includes electrical data signal and thermal performance data signal; Return to select one target chip, and continue until all target chips have been selected to obtain test data for multiple target chips.

[0008] Preferably, the step of acquiring chip data and test data of the target chip, and preprocessing the chip data and test data to obtain multiple preprocessed data, further includes the following steps: Create a chip database and put both chip data and test data into the chip database; Randomly select chip data and test data of a target chip from the chip data; Determine whether there is duplicate data between the chip data and test data of the target chip; If there is duplicate data between the chip data and test data of the target chip, the duplicate data will be deleted. Returns chip data and test data of a target chip randomly selected from the chip data, until all target chips in the chip database have been selected, resulting in multiple preprocessed data.

[0009] Preferably, the step of inputting preprocessed data into a test model, calculating the performance index of the target chip based on the test data using the test model, determining the reliability of the target chip based on the performance index to obtain multiple normal chips and abnormal chips, and performing single-classification learning based on the normal chips to obtain a trained test model includes the following steps: All preprocessed data are divided into training and test sets according to a random ratio; The training set is input into the test model, and the test model calculates the corresponding performance index based on the test data of each target chip. Based on the chip parameters, multiple representative chips are selected from multiple target chips, thereby creating multiple standard performance curves with the performance parameters of the representative chips. The reliability of the target chip is judged based on the standard performance curve, and the test model is trained by single-classification learning based on the judgment result. Input the test set into the trained test model to verify whether the trained test model has been successfully trained.

[0010] Preferably, the step of inputting the training set into the test model, calculating the corresponding performance index based on the test data of each target chip through the test model, and selecting multiple representative chips from multiple target chips based on chip parameters, thereby creating multiple standard performance curves using the performance parameters of the representative chips, includes the following steps: Randomly select a target chip from the training set; Calculate the electrical and thermal properties of the target chip at each time step; Return to the point where a target chip is randomly selected from the training set, until the electrical and thermal data of each target chip are obtained.

[0011] Preferably, the step of inputting the training set into the test model, calculating the corresponding performance index based on the test data of each target chip through the test model, and selecting multiple representative chips from multiple target chips based on chip parameters to create multiple standard performance curves using the performance parameters of the representative chips, further includes the following steps: Cluster analysis is performed on all target chips to obtain multiple representative chips; Obtain the electrical and thermal specifications for each representative chip; Based on electrical and thermal data indicators, standard performance curves are created for each representative chip, resulting in multiple standard performance curves. Each standard performance curve is the performance index of the target chip corresponding to the representative chip.

[0012] Preferably, the step of inputting real-time data from the real-time chip into the trained test model to obtain the real-time performance curve of the real-time chip, and combining the real-time performance curve with the standard performance curve to determine the reliability of the real-time chip, includes the following steps: Collect real-time data from the chip; the real-time data includes real-time chip data and real-time test data; Real-time test data is input into the trained test model, and the real-time performance curve of the real-time chip is calculated through the trained test model. Cluster analysis is performed on real-time chips based on real-time chip data to obtain representative chips corresponding to the real-time chips. Obtain the standard performance curve of the representative chip, and combine the standard performance curve of the representative chip with the real-time performance curve of the real-time chip to determine the reliability of the real-time chip.

[0013] Preferably, the step of obtaining the standard performance curve of the representative chip and combining the standard performance curve of the representative chip with the real-time performance curve of the real-time chip to determine the reliability of the real-time chip includes the following steps: Set the error threshold and deviation threshold; Calculate the error between the real-time performance curve and the standard performance curve for each test node, and determine whether the error is greater than or equal to the error threshold. If the error between the real-time performance curve and the standard performance curve is greater than or equal to the error threshold, then the test node is recorded as a deviation node. Calculate the percentage of deviation nodes in the real-time performance curve and determine whether the percentage of deviation nodes is greater than or equal to the deviation threshold. If the proportion of deviation nodes is greater than or equal to the deviation threshold, the reliability of the real-time chip is unqualified.

[0014] On the other hand, this application also provides a communication chip reliability testing system based on big data analysis, applied to the communication chip reliability testing method based on big data analysis described in any one of the foregoing. The system includes a testing component, a data acquisition component, and a computing component. The testing component performs reliability testing on the target chip; the data acquisition component acquires chip data and test data of the target chip; the computing component is communicatively connected to the data acquisition component, and calculates a standard performance curve of the target chip based on the chip data and test data. Based on the standard performance curve, the reliability of the template chip is determined, and unreliable target chips are identified in a timely manner.

[0015] Preferably, the acquisition component includes a chip data acquisition module and a test data acquisition module. The chip data acquisition module acquires chip data of the target chip, and the test data acquisition module acquires test data of the target chip.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows: By collecting chip data and test data of the target chip, preprocessing the chip data and test data to obtain multiple preprocessed data sets, and then creating a test model, the preprocessed data is input into the test model. The test model calculates the performance index of the target chip based on the test data, and the reliability of the target chip is determined based on the performance index, resulting in multiple normal chips and abnormal chips. Single-classification learning is then performed based on the normal chips to obtain a trained test model. Finally, real-time data of the real-time chip is input into the trained test model to obtain the real-time performance curve of the real-time chip. The reliability of the real-time chip is judged by combining the real-time performance curve with a standard performance curve. This application establishes a performance curve by calculating the thermal and electrical performance indicators of the target chip, and then clusters representative chips from multiple target chips. The performance curve of the representative chip is used as the standard performance curve, allowing users to judge the reliability of the real-time chip based on the standard performance curve, thereby improving the efficiency of reliability testing. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating a reliability testing method for communication chips based on big data analytics. Figure 2 This is a connection diagram of a communication chip reliability testing system based on big data analysis. Reference numerals: 100, Test component; 200, Acquisition component; 201, Chip data acquisition module; 202. Test data acquisition module; 300. Calculation component. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Example 1

[0019] like Figure 1 As shown, one of the objectives of this invention is to provide a reliability testing method for communication chips based on big data analysis, comprising the following steps: S100: Collects chip data and test data of the target chip, preprocesses the chip data and test data to obtain multiple preprocessed data; S200, Create a test model; S300 inputs preprocessed data into the test model, calculates the performance index of the target chip based on the test data through the test model, and determines the reliability of the target chip based on the performance index, obtaining multiple normal chips and abnormal chips. Then, it performs single-classification learning based on the normal chips to obtain the trained test model. The S400 inputs real-time data from the real-time chip into the trained test model to obtain the real-time performance curve of the real-time chip, and combines the real-time performance curve with the standard performance curve to determine the reliability of the real-time chip.

[0020] It should be noted that by collecting chip data and test data of the target chip, preprocessing the chip data and test data to obtain multiple preprocessed data sets, a test model is created. The preprocessed data is then input into the test model, which calculates the performance index of the target chip based on the test data. Based on the performance index, the reliability of the target chip is determined, resulting in multiple normal chips and abnormal chips. Single-classification learning is then performed on the normal chips to obtain a trained test model. Finally, real-time data of the real-time chip is input into the trained test model to obtain the real-time performance curve of the real-time chip. The reliability of the real-time chip is then judged by combining the real-time performance curve with a standard performance curve. This application establishes a performance curve by calculating the thermal and electrical performance indicators of the target chip. Then, representative chips are obtained by clustering from multiple target chips, and the performance curve of the representative chip is used as the standard performance curve. This allows users to judge the reliability of the real-time chip based on the standard performance curve, thereby improving the efficiency of reliability testing.

[0021] In one embodiment of this application, step S100 includes the following steps: S110, select a target chip; S120 sends various test signals to the functional logic unit under test of the target chip; S130, Acquire the output signal of the target chip for each test signal; the output signal includes electrical data signal and thermal performance data signal; Specifically, the electrical data signals include the voltage, current, and frequency of the target chip, and the thermal performance data includes high-temperature aging test data, heat dissipation efficiency test data, and thermal cycling test data. S140, return to select one target chip, until all target chips have been selected, to obtain test data for multiple target chips.

[0022] It should be noted that by sending multiple test signals to the target chip through the test component and collecting the output signal of the target chip under each test signal, the user can calculate the performance parameter curve of the target chip based on these output signals. The more types of output signals collected, the more comprehensive the performance curve of the target chip will be.

[0023] In one embodiment of this application, step S100 further includes the following steps: S150, create a chip database and put both chip data and test data into the chip database; S151, randomly select chip data and test data of a target chip from the chip data; S152, determine whether there is duplicate data between the chip data and test data of the target chip; S153, If there is duplicate data between the chip data and test data of the target chip, delete the duplicate data; S154 returns the chip data and test data of a target chip randomly selected from the chip data, until all target chips in the chip database have been selected, resulting in multiple preprocessed data.

[0024] It should be noted that since invalid data such as duplicate or missing data may appear during the collection process, preprocessing is required before training to improve data quality and make the trained test model more reliable in order to avoid such invalid data affecting the training of the test model.

[0025] In one embodiment of this application, step S300 includes the following steps: S310, divide all preprocessed data into training and test sets according to a random ratio; S320 inputs the training set into the test model, calculates the corresponding performance index based on the test data of each target chip, and selects multiple representative chips from multiple target chips based on the chip parameters, thereby creating multiple standard performance curves based on the performance parameters of the representative chips. S330 performs reliability assessment of the target chip based on standard performance curves, and performs single-classification learning on the test model based on the assessment results to obtain the trained test model. S340: Input the test set into the trained test model to verify whether the trained test model has been successfully trained.

[0026] It should be noted that when dividing the training set and the test set, the proportion of the training set should be greater than that of the test set to ensure that there are enough training samples in the training set.

[0027] After dividing the training and test sets, the standard performance curve of each representative chip is calculated through the test model. Based on the standard performance curve, the test model is used for single-class learning. Since chip reliability is a binary classification problem, namely "reliable" and "unreliable", the test model only needs to be able to classify the target chip into one of the two categories. Therefore, this application can use only reliable target chips as learning samples for the test model, so that the goal of the test model is to learn the features of reliable target chip samples and build a model to determine whether a new sample belongs to that category.

[0028] After obtaining the trained test model, the test set can be input into the trained test model, and the response time / accuracy of the trained test model can be used as the judgment criterion.

[0029] In one embodiment of this application, step S320 includes the following steps: S321, randomly select a target chip from the training set; S322, calculate the electrical and thermal data of the target chip at each moment; S323 returns a target chip randomly selected from the training set until the electrical and thermal data of each target chip are obtained.

[0030] It should be noted that the electrical specifications of the target chip can be calculated using Formula 1. Formula 1; in, This refers to the electrical specifications of the target chip at the t-th test node. These are timing performance test data. These are transient performance test data. , as well as These are characteristic coefficients; The thermal data parameters of the target chip are calculated using Formula 2. Formula 2; in, It is the thermal data index of the target chip at the t-th test node. These are thermal cycling test data. These are high-temperature aging data. This is overheat protection data. These are heat dissipation test data; by calculating the electrical and thermal data indicators of the target chip using Formula 1 and Formula 2, the electrical and thermal data indicators of the same test node can be coupled together to obtain a data set.

[0031] In one embodiment of this application, step S320 includes the following steps: S324 performs cluster analysis on all target chips to obtain multiple representative chips; Specifically, the K-means clustering method can be used to cluster the target chips; S325, obtains the electrical and thermal data of each representative chip; S326 creates standard performance curves for each representative chip based on electrical and thermal data indicators, resulting in multiple standard performance curves. Each standard performance curve is the performance index of the target chip corresponding to the representative chip.

[0032] It should be noted that since there are many different types of target chips and the representative chips are obtained by clustering, each representative chip can represent a type of target chip. Therefore, each data group of the representative chip can correspond to a point. Thus, for each representative chip, the standard performance curve of the representative chip can be obtained by connecting all the data groups of the representative chip in sequence according to the order of the test nodes. The horizontal axis of the standard performance curve is the thermal data index, and the vertical axis is the electrical index.

[0033] In one embodiment of this application, step S400 includes the following steps: S410, acquires real-time data from the real-time chip; the real-time data includes real-time chip data and real-time test data; S420 inputs real-time test data into the trained test model and calculates the real-time performance curve of the real-time chip through the trained test model; S430 performs cluster analysis on real-time chips based on real-time chip data to obtain representative chips corresponding to the real-time chips. S440 obtains the standard performance curve of the representative chip, and combines the standard performance curve of the representative chip with the real-time performance curve of the real-time chip to determine the reliability of the real-time chip.

[0034] It should be noted that after obtaining the trained test model, you only need to input the real-time test data of the real-time chip into the trained test model to obtain the real-time electrical and thermal performance indicators of the real-time chip through the trained test model. Based on the real-time electrical and thermal performance indicators, the real-time performance curve of the real-time chip can be created.

[0035] After obtaining the real-time performance curve, the reliability of the real-time chip is determined by comparing the real-time performance curve with the standard performance curve. In order to obtain the closest standard performance curve, the real-time chips are clustered based on the real-time chip data to obtain the representative chip that is closest to the real-time chip. The standard performance curve of the representative chip is used as the reference curve for the real-time performance curve.

[0036] In one embodiment of this application, step S440 includes the following steps: S441, set the error threshold and deviation threshold; S442, calculate the error between the real-time performance curve and the standard performance curve for each test node, and determine whether the error is greater than or equal to the error threshold. S443, if the error between the real-time performance curve and the standard performance curve is greater than or equal to the error threshold, then the test node is recorded as the deviation node. S444: Calculate the percentage of deviation nodes in the real-time performance curve and determine whether the percentage of deviation nodes is greater than or equal to the deviation threshold. S445, if the proportion of deviation nodes is greater than or equal to the deviation threshold, the reliability of the real-time chip is unqualified. Specifically, if the proportion of deviation nodes is less than the deviation threshold, then the reliability of the real-time chip is qualified.

[0037] It should be noted that the error threshold is a metric for judging the real-time performance curve relative to the standard performance curve at each test node, and it is applied to the judgment of a single performance parameter. The deviation threshold, on the other hand, is a judgment on the real-time performance curve relative to the standard performance curve as a whole. Therefore, it is necessary to first calculate all data points on the real-time performance curve whose error relative to the standard performance curve is greater than or equal to the error threshold. These data points are actually the points with large errors relative to the corresponding data points on the standard performance curve at a certain test node, indicating that there is a problem with the operation of the real-time chip at that test node. These data points can be recorded as error data points. Then, the proportion of error data points on the real-time performance curve is calculated. If the proportion of error data points exceeds the deviation threshold, it means that the real-time chip is very prone to errors and is therefore unreliable, and thus its reliability is unqualified.

[0038] like Figure 2 As shown, in one embodiment of this application, a communication chip reliability testing system based on big data analysis is also provided, applied to the communication chip reliability testing method based on big data analysis described in any of the foregoing. The system includes a testing component 100, a data acquisition component 200, and a computing component 300. The testing component 100 performs reliability testing on the target chip. The data acquisition component 200 acquires chip data and test data of the target chip. The computing component 300 is communicatively connected to the data acquisition component 200. The computing component 300 calculates a standard performance curve of the target chip based on the chip data and test data, thereby determining the reliability of the template chip based on the standard performance curve and promptly identifying unreliable target chips.

[0039] It should be noted that the reliability test of the target chip is completed by the test component, the acquisition component collects the chip data of the target chip and the test data during the test process, and inputs all the data into the computing component. The computing component creates a standard performance curve for each target chip based on the chip data and test data, and selects multiple representative chips from multiple target chips, thereby judging the reliability of the target chip based on the standard performance curve of the representative chips.

[0040] In one embodiment of this application, the acquisition component 200 includes a chip data acquisition module 201 and a test data acquisition module 202. The chip data acquisition module 201 acquires chip data of the target chip, and the test data acquisition module 202 acquires test data of the target chip.

[0041] It should be noted that by collecting corresponding data information through different acquisition modules, data leakage can be avoided, and cross-referencing between different types of data can also be prevented, thus avoiding data pollution.

[0042] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A reliability testing method for communication chips based on big data analysis, characterized in that, include: Collect chip data and test data of the target chip, preprocess the chip data and test data to obtain multiple preprocessed data; Create a test model; The preprocessed data is input into the test model. The test model calculates the performance index of the target chip based on the test data, and the reliability of the target chip is determined based on the performance index. Multiple normal chips and abnormal chips are obtained. Single classification learning is performed based on the normal chips to obtain the trained test model. Real-time data from the real-time chip is input into the trained test model to obtain the real-time performance curve of the real-time chip, and the reliability of the real-time chip is judged by combining the real-time performance curve with the standard performance curve.

2. The communication chip reliability testing system based on big data analysis according to claim 1, characterized in that: The process involves collecting chip data and test data from the target chip, preprocessing the chip data and test data to obtain multiple preprocessed data sets, including the following steps: Select a target chip; Multiple test signals are sent to the functional logic unit under test of the target chip. The output signal of the target chip for each test signal is acquired; the output signal includes electrical data signal and thermal performance data signal; Return to select one target chip, and continue until all target chips have been selected to obtain test data for multiple target chips.

3. The communication chip reliability testing system based on big data analysis according to claim 2, characterized in that: The process of acquiring chip data and test data from the target chip, preprocessing the chip data and test data to obtain multiple preprocessed data sets, also includes the following steps: Create a chip database and put both chip data and test data into the chip database; Randomly select chip data and test data of a target chip from the chip data; Determine whether there is duplicate data between the chip data and test data of the target chip; If there is duplicate data between the chip data and test data of the target chip, the duplicate data will be deleted. Returns chip data and test data of a target chip randomly selected from the chip data, until all target chips in the chip database have been selected, resulting in multiple preprocessed data.

4. The communication chip reliability testing method based on big data analysis according to claim 3, characterized in that: The process of inputting preprocessed data into a test model, calculating the performance index of the target chip based on the test data using the test model, determining the reliability of the target chip based on the performance index, obtaining multiple normal chips and abnormal chips, and performing single-classification learning based on the normal chips to obtain a trained test model includes the following steps: All preprocessed data are divided into training and test sets according to a random ratio; The training set is input into the test model, and the test model calculates the corresponding performance index based on the test data of each target chip. Based on the chip parameters, multiple representative chips are selected from multiple target chips, thereby creating multiple standard performance curves with the performance parameters of the representative chips. The reliability of the target chip is judged based on the standard performance curve, and the test model is trained by single-classification learning based on the judgment result. Input the test set into the trained test model to verify whether the trained test model has been successfully trained.

5. The communication chip reliability testing system based on big data analysis according to claim 4, characterized in that: The process of inputting the training set into the test model, calculating the corresponding performance index based on the test data of each target chip, and selecting multiple representative chips from multiple target chips based on chip parameters to create multiple standard performance curves using the performance parameters of the representative chips includes the following steps: Randomly select a target chip from the training set; Calculate the electrical and thermal properties of the target chip at each time step; Return to the point where a target chip is randomly selected from the training set, until the electrical and thermal data of each target chip are obtained.

6. The communication chip reliability testing system based on big data analysis according to claim 5, characterized in that: The process of inputting the training set into the test model, calculating the corresponding performance index based on the test data of each target chip, and selecting multiple representative chips from multiple target chips based on chip parameters to create multiple standard performance curves using the performance parameters of the representative chips, also includes the following steps: Cluster analysis is performed on all target chips to obtain multiple representative chips; Obtain the electrical and thermal specifications for each representative chip; Based on electrical and thermal data indicators, standard performance curves are created for each representative chip, resulting in multiple standard performance curves. Each standard performance curve is the performance index of the target chip corresponding to the representative chip.

7. The communication chip reliability testing system based on big data analysis according to claim 6, characterized in that: The process of inputting real-time data from the real-time chip into the trained test model to obtain the real-time performance curve of the real-time chip, and combining the real-time performance curve with a standard performance curve to determine the reliability of the real-time chip, includes the following steps: Collect real-time data from the chip; the real-time data includes real-time chip data and real-time test data; Real-time test data is input into the trained test model, and the real-time performance curve of the real-time chip is calculated through the trained test model. Cluster analysis is performed on real-time chips based on real-time chip data to obtain representative chips corresponding to the real-time chips. Obtain the standard performance curve of the representative chip, and combine the standard performance curve of the representative chip with the real-time performance curve of the real-time chip to determine the reliability of the real-time chip.

8. The communication chip reliability testing system based on big data analysis according to claim 7, characterized in that: The process of obtaining the standard performance curve of a representative chip and combining it with the real-time performance curve of the real-time chip to determine the reliability of the real-time chip includes the following steps: Set the error threshold and deviation threshold; Calculate the error between the real-time performance curve and the standard performance curve for each test node, and determine whether the error is greater than or equal to the error threshold. If the error between the real-time performance curve and the standard performance curve is greater than or equal to the error threshold, then the test node is recorded as a deviation node. Calculate the percentage of deviation nodes in the real-time performance curve and determine whether the percentage of deviation nodes is greater than or equal to the deviation threshold. If the proportion of deviation nodes is greater than or equal to the deviation threshold, the reliability of the real-time chip is unqualified.

9. A communication chip reliability testing system based on big data analysis, applied to the communication chip reliability testing method based on big data analysis as described in any one of claims 1 to 8, characterized in that, include: Test components; The target chip is subjected to reliability testing using the aforementioned test components; Data acquisition components; The acquisition component acquires chip data and test data of the target chip. Computing components; The computing component is communicatively connected to the acquisition component. The computing component calculates the standard performance curve of the target chip based on chip data and test data, thereby judging the reliability of the template chip based on the standard performance curve and promptly identifying target chips with unacceptable reliability.

10. The communication chip reliability testing system based on big data analysis according to claim 9, characterized in that, The acquisition components include a chip data acquisition module and a test data acquisition module. The chip data acquisition module acquires chip data of the target chip, and the test data acquisition module acquires test data of the target chip.

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