Mask and preparation method thereof

Abstract

The invention relates to a mask plate and a preparation method thereof, the mask plate is provided with a mask pattern area and a peripheral area surrounding the mask pattern area, and the mask plate comprises a first substrate layer, a second substrate layer and a heat dissipation layer. The first substrate layer is at least located in the peripheral area, and a first opening is formed in the first substrate layer. The second substrate layer is located on one side of the first substrate layer and provided with a mask pattern, and the mask pattern is located in the mask pattern area and exposed by the first opening. The heat dissipation layer is located in the peripheral area and located on the same side of the first substrate layer with the second substrate layer, and the heat dissipation layer is connected with the second substrate layer.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a photomask and a method for its fabrication. Background Technology

[0002] With the development of integrated circuit technology, the critical dimensions of devices are shrinking, and the types and number of devices contained in a single chip are increasing, which means that any slight difference in the manufacturing process can affect the performance of the devices.

[0003] To minimize product costs, the goal is to fabricate as many device units as possible on a limited substrate. Since the advent of Moore's Law, the industry has proposed various semiconductor structure designs and process optimizations to meet current product demands. Summary of the Invention

[0004] Based on this, this application provides a mask that can prevent deformation of the mask due to thermal effects during exposure, and a method for preparing the mask thereon.

[0005] A mask having a mask pattern area and a peripheral area surrounding the mask pattern area, the mask comprising:

[0006] A first substrate layer, at least located in the peripheral region, and having a first opening within the first substrate layer;

[0007] A second substrate layer is located on one side of the first substrate layer and has a mask pattern, the mask pattern being located in the mask pattern area and exposed by the first opening;

[0008] A heat dissipation layer is located in the peripheral area and is on the same side of the first substrate layer as the second substrate layer, and the heat dissipation layer is connected to the second substrate layer.

[0009] In one embodiment, the mask further includes:

[0010] A heat sink structure is provided, wherein the heat sink is connected to the side of the heat sink layer away from the first substrate layer, and has a second opening that exposes the mask pattern.

[0011] In one embodiment, the heat sink structure includes a mesh metal structure.

[0012] In one embodiment, the mask further includes an isolation layer located between the second substrate layer and the first substrate layer, the isolation layer having a third opening communicating with the first opening to expose the mask pattern.

[0013] In one embodiment, the second substrate layer is located in the mask pattern area, and the heat dissipation layer is connected to the sidewall of the second substrate layer.

[0014] In one embodiment,

[0015] The mask also includes an isolation layer located between the second substrate layer and the first substrate layer, the isolation layer having a third opening that communicates with the first opening to expose the mask pattern;

[0016] Both the isolation layer and the second substrate layer are located in the mask pattern area;

[0017] The heat dissipation layer is located on the surface of the first substrate layer.

[0018] In one embodiment, the first substrate extends from the peripheral region to the mask pattern region, and the sidewall of the third opening is flush with the sidewall of the first opening.

[0019] In one embodiment, the heat dissipation layer includes an adhesive layer, a metal diffusion barrier layer, and a thermally conductive layer stacked sequentially.

[0020] A method for preparing a photomask, comprising:

[0021] A substrate is provided, the substrate including a first substrate material layer and a second substrate material layer, and a mask pattern region and a peripheral region surrounding the mask pattern region are defined on the substrate;

[0022] A heat dissipation layer is formed on the substrate in the peripheral region, the heat dissipation layer and the second substrate material layer are located on the same side of the first substrate material layer and are connected to the second substrate material layer;

[0023] The second substrate material layer is etched to form a second substrate layer with a mask pattern located in the mask pattern area;

[0024] The first substrate material layer is etched to form a first substrate layer having a first opening that exposes the mask pattern.

[0025] In one embodiment, after etching the first substrate material layer to form the first substrate layer having the first opening, the method further includes:

[0026] The heat dissipation layer is welded to the heat sink structure, which has a second opening. After welding, the second opening exposes the mask pattern.

[0027] In one embodiment, the substrate further includes an isolation material layer located between the first substrate material layer and the second substrate material layer, and after etching the first substrate material layer to form a first substrate layer having a first opening, the method further includes:

[0028] The isolation material layer located in the mask pattern area is etched to expose the mask pattern.

[0029] In one embodiment, the substrate includes an SOI substrate.

[0030] In one embodiment, prior to forming the heat dissipation layer located in the peripheral region on the substrate, the process includes:

[0031] The second substrate material layer located in the peripheral region is removed by etching.

[0032] In one embodiment, after the etching removes the second substrate material layer located in the peripheral region, the method further includes:

[0033] Etching removes the insulating material layer located in the peripheral area;

[0034] When forming a heat dissipation layer located in the peripheral region on the substrate, the heat dissipation layer is formed on the first substrate material layer located in the peripheral region.

[0035] In one embodiment,

[0036] When etching the first substrate material layer to form a first substrate layer with a first opening, the first substrate layer extends from the peripheral region to the mask pattern region.

[0037] The etching of the isolation material layer located in the mask pattern area to expose the mask pattern includes:

[0038] Using the first substrate layer as a mask, the isolation material layer is etched to form an isolation layer with a third opening.

[0039] In one embodiment, forming a heat dissipation layer on the substrate located in the peripheral region includes:

[0040] An adhesive material layer, a metal diffusion barrier material layer, and a thermally conductive material layer are sequentially formed on a substrate;

[0041] The thermally conductive material layer, the metal diffusion barrier material layer, and the adhesive material layer are etched sequentially to form the thermally conductive layer, the metal diffusion barrier layer, and the adhesive layer, respectively.

[0042] The aforementioned photomask and its fabrication method describe a photomask with a patterned area and a peripheral area surrounding the patterned area. A heat dissipation layer is formed in the peripheral area, connecting to a second substrate layer containing the patterned mask. Therefore, during photomask exposure, when the electron beam bombards the second substrate layer of the patterned mask, heat from the second substrate layer can rapidly diffuse to the connected heat dissipation layer and be quickly released through radiation. Thus, this application effectively prevents heat accumulation in the second substrate layer located in the patterned mask area during exposure, thereby effectively preventing photomask deformation. Therefore, when the photomask based on this application is exposed, the shape and overlay accuracy of the pattern formed on the wafer can be effectively guaranteed, thereby improving device performance. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a flowchart of a method for preparing a mask provided in one embodiment;

[0045] Figures 2 to 8 This is a cross-sectional schematic diagram of the structure obtained during the fabrication process of the mask provided in one embodiment;

[0046] Figure 9 A schematic cross-sectional view of the mask provided in another embodiment;

[0047] Figure 10 A top view of a mask provided for yet another embodiment;

[0048] Figure 11 for Figure 10 A three-dimensional schematic diagram of the mask shown.

[0049] Explanation of reference numerals in the attached figures:

[0050] 100-First substrate layer, 1001-First substrate material layer, 200-Second substrate layer, 2001-Second substrate material layer, 300-Isolation layer, 3001-Isolation material layer, 400-Heat dissipation layer, 410-Adhesive layer, 420-Metal diffusion barrier layer, 430-Heat conductive layer, 4001-Heat dissipation material layer, 500-Heat dissipation structure, 10-First opening, 20-Second opening, 30-Third opening, 40-Mask opening, A1-Mask pattern area, A2-Outer perimeter area. Detailed Implementation

[0051] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0053] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0054] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0055] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0056] As mentioned in the background section, since the advent of Moore's Law, the industry has proposed various semiconductor structure designs and process optimizations to meet the needs of current products.

[0057] In the field of integrated circuit manufacturing, the reduction in resolution of photolithography systems is a key factor driving the continuation of Moore's Law. However, during photolithography exposure, thermal effects often occur, leading to mask deformation. Mask deformation affects the shape of the imaged pattern and the overlay accuracy with previous layers, thereby impacting device performance.

[0058] For example, electron beam proximity lithography systems have high theoretical resolution, as well as advantages such as simple structure and low energy consumption, making them a promising lithography technology solution.

[0059] When using an electron beam proximity lithography system for exposure, the high-energy electron beam intermittently bombards the photomask, causing severe thermal effects and resulting in deformation of the photomask due to expansion and contraction.

[0060] Based on this, embodiments of this application provide a photomask and its fabrication method, which can prevent the photomask from deforming due to thermal effects during exposure. Furthermore, the photomask and its fabrication method of this application can be applied, but are not limited to, to electron beam proximity lithography systems.

[0061] In one embodiment, see Figure 1 A method for preparing a photomask is provided, comprising the following steps:

[0062] Step S10, please refer to Figure 2 A substrate is provided, the substrate including a first substrate material layer 1001 and a second substrate material layer 2001, and a mask pattern area A1 and a peripheral area A2 surrounding the mask pattern area A1 are defined on the substrate;

[0063] For step S30, please refer to... Figure 5 A heat dissipation layer 400 is formed on the substrate in the peripheral region A2. The heat dissipation layer 400 and the second substrate material layer 2001 are located on the same side of the first substrate material layer 1001 and are connected to the second substrate material layer 2001.

[0064] For step S40, please refer to... Figure 6 The second substrate material layer 2001 is etched to form a second substrate layer 200 with a mask pattern 40 located in the mask pattern area A1;

[0065] For step S50, please refer to... Figure 7 The first substrate material layer 1001 is etched to form a first substrate layer 100 having a first opening 10, the first opening 10 exposing the mask pattern 40.

[0066] In step S10, please refer to Figure 2 The materials of the first substrate material layer 1001 and the second substrate material layer 2001 can be the same or different, depending on the actual needs. The surface of the second substrate material layer 2001 away from the first substrate material layer 1001 can be used as the front side of the substrate, and the surface of the first substrate material layer 1001 away from the second substrate material layer 2001 can be used as the back side of the substrate.

[0067] The mask pattern area A1 is used to form the mask pattern 40.

[0068] There can be one mask pattern area A1, and the mask pattern area A1 can be located in the central region of the substrate. In this case, the heat dissipation layer 400 subsequently formed in the peripheral region A2 can provide sufficient and effective heat dissipation for the mask pattern area A1.

[0069] Of course, the number and position of the mask pattern area A1 are not limited to this. For example, there can be multiple mask pattern areas A1, which can be evenly and symmetrically distributed on the substrate so that the heat dissipation layer 400 of the peripheral area A2 can dissipate heat evenly to each mask pattern area A1.

[0070] In step S30, please refer to Figure 4 First, a heat-dissipating material layer 4001 can be formed. Then, please refer to... Figure 5 The heat dissipation material located in the mask pattern area A1 is removed to form a heat dissipation layer 400 located in the peripheral area A2. The heat dissipation layer 400 can be a multi-layer structure or a single-layer structure; there is no limitation on this.

[0071] The heat dissipation layer 400 and the second substrate material layer 2001 are located on the same side of the first substrate material layer 1001. Simultaneously, the heat dissipation layer 400 is connected to the second substrate material layer 2001. The specific positional relationship between the heat dissipation layer 400 and the second substrate material layer 2001 can be set according to actual needs.

[0072] In step S40, please refer to Figure 6The second substrate material layer 2001 can be etched from the front side of the substrate to pattern it, thereby forming a mask pattern 40 in the mask pattern area A1. One mask pattern 40 can be formed within one mask pattern area A1. The same mask pattern 40 can include multiple mask openings 41.

[0073] As an example, the second substrate material layer 2001 can be etched by electron beam direct writing lithography, thereby forming a mask pattern 40 with a fine structure.

[0074] Of course, the etching method for the second substrate material layer 2001 is not limited to this; other etching methods such as optical lithography can also be used.

[0075] In step S50, please refer to Figure 7 The method of etching the first substrate material layer 1001 may include, but is not limited to, optical lithography.

[0076] The first substrate material layer can be etched from the back side of the substrate to form the first opening 10. A first opening 10 can be formed corresponding to a mask pattern area A1 to expose the corresponding mask pattern 40.

[0077] When using a mask for exposure, an electron beam (or optical beam) irradiates the mask pattern area A1, passes through the mask opening 41 and the first opening 10 in the mask pattern 40, and reaches the wafer to be processed, thereby transferring the mask pattern 40 onto the wafer.

[0078] In this embodiment, a heat dissipation layer 400 is formed in the peripheral region A2 before the mask pattern 40 is formed in the mask pattern area A1. The heat dissipation layer 400 is connected to the second substrate layer 200 where the mask pattern 40 is located. Therefore, when the mask is exposed and an electron beam or optical beam bombards the second substrate layer 200 of the mask pattern area A1, the heat on the second substrate layer 200 can be quickly diffused to the connected heat dissipation layer 400 and rapidly radiated out through the heat dissipation layer 400. Therefore, this embodiment can effectively prevent the second substrate layer 200 located in the mask pattern area A1 from accumulating heat during the exposure process, thereby effectively preventing mask deformation. Therefore, when the mask formed based on the method of this embodiment is exposed, the shape and overlay accuracy of the pattern formed on the wafer can be effectively guaranteed, thereby improving device performance.

[0079] In one embodiment, see Figure 10 as well as Figure 1 After step S50, the following steps are also included:

[0080] In step S70, the heat dissipation layer 400 is welded to the heat sink structure 500. The heat sink structure 500 has a second opening 20. After welding, the second opening 20 exposes the mask pattern 40.

[0081] As an example, the size of the second opening 20 can be the same as the size of the first opening 10 or the size of the mask pattern area A1. Of course, the size of the second opening 20 can also be different, as long as it ensures that after welding, the second opening 20 exposes the mask pattern, so as not to affect the irradiation of the electron beam, etc.

[0082] As an example, the heat sink structure 500 may include a mesh metal structure. The mesh metal structure can effectively increase the heat radiation area of ​​the heat sink structure 500.

[0083] The materials used for mesh metal structures can include, but are not limited to, metals with good heat dissipation properties such as aluminum. The specific mesh shape of the mesh metal structure can be set according to actual needs, for example, it can be quadrilateral, hexagonal, octagonal, etc.

[0084] In this embodiment, the heat dissipation layer 400 is welded to the heat sink structure 500, thereby adding the heat sink structure 500 to the mask. The heat sink structure 500 usually has a large thickness, which can effectively increase the heat radiation area and efficiency of the mask and improve the temperature stability of the mask.

[0085] Of course, in other embodiments, the heat sink structure 500 may not need to be welded into the mask. Alternatively, in other embodiments, the heat dissipation layer 400 may be configured as a mesh to increase its heat dissipation area.

[0086] In one embodiment, see Figure 2 The substrate also includes an isolation material layer 3001 located between the first substrate material layer 1001 and the second substrate material layer 2001.

[0087] As an example, the substrate includes an SOI substrate. In this case, the second substrate material layer 2001 can be the top silicon layer of the SOI substrate. The first substrate material layer 1001 can be the bottom silicon layer of the SOI substrate. The isolation material layer 3001 can be a buried oxide layer in the SOI substrate.

[0088] Of course, the substrate is not limited to this. For example, an isolation material layer 3001 and a second substrate material layer 2001 may be formed sequentially on the first substrate material layer 1001 to form a substrate.

[0089] At this point, in step S40, please refer to Figure 6 The isolation material layer 3001 can be used as an etching stop layer to etch the second substrate material layer 2001, thereby forming the second substrate layer 200. In step S50, please refer to... Figure 7 The isolation material layer 3001 can be used as an etching stop layer to etch the first substrate material layer 1001, thereby forming the first substrate layer 100.

[0090] After step S50, the following is also included:

[0091] For step S60, please refer to... Figure 8 The isolation material layer 3001 located in the mask pattern area A1 is etched to expose the mask pattern 40.

[0092] After the mask pattern 40 is exposed, when the mask is used for exposure, the electron beam and other particles can effectively pass through the mask pattern to reach the wafer to be processed.

[0093] In this embodiment, the isolation material layer 3001 between the first substrate material layer 1001 and the second substrate material layer 2001 can serve as an etch stop layer for both, thereby protecting the other while one of the first substrate material layer 1001 and the second substrate material layer 2001 is being etched. Especially after the second substrate layer 200, including the mask pattern 40, is formed, using the isolation material layer 3001 as an etch stop layer to etch the first substrate material layer 1001 can effectively protect the mask pattern 40, thereby preventing damage or deformation of the mask pattern 40.

[0094] In one embodiment, prior to step S30, the method further includes:

[0095] Step S21, please refer to Figure 3 The second substrate material layer 2001 located in the peripheral region A2 is removed by etching.

[0096] First, a first patterned photoresist can be formed on the second substrate material layer 2001. The first patterned photoresist covers the second substrate material layer 2001 of the mask pattern area A1 and exposes the second substrate material layer 2001 of the peripheral area A2.

[0097] Then, using the first patterned photoresist as a mask, the second substrate material layer 2001 of the mask pattern area A1 is protected, and the second substrate material layer 2001 of the peripheral area A2 is etched away.

[0098] At this point, after the heat dissipation layer 400 is formed in the peripheral region A2 in step S30, the heat dissipation layer 400 is connected to the side of the second substrate material layer 2001. After the second substrate material layer 2001 is etched in step S40 to form the second substrate layer 200, the second substrate layer 200 is located in the mask pattern region A1, and the heat dissipation layer 400 is connected to the sidewall of the second substrate layer 200. Therefore, the heat generated on the second substrate layer 200 in the mask pattern region A1 during exposure can be quickly and effectively transferred to the heat dissipation layer 400, and then quickly released through the heat dissipation layer 400.

[0099] Of course, in other embodiments, the second substrate material layer 2001 located in the peripheral region A2 may not be removed. In this case, after the second substrate layer 200 is formed, the heat dissipation layer 400 connects to the surface of the second substrate layer 200 that is away from the first substrate layer 100. The heat generated on the second substrate layer 200 in the mask pattern region A1 during exposure can first be transferred to the second substrate layer 200 in the peripheral region A2, and then to the heat dissipation layer 400, thereby being released through the heat dissipation layer 400.

[0100] In one embodiment, see Figure 3 After step S21, the following steps are also included:

[0101] Step S22: Etch away the isolation material layer 3001 located in the peripheral area A2.

[0102] After etching away the second substrate material layer 2001 located in the peripheral region A2, the isolation material layer 3001 located in the peripheral region A2 can be etched away using the first patterned photoresist as a mask. Then, the first patterned photoresist is removed.

[0103] In step S30, a heat dissipation layer 400 is formed on the first substrate material layer 1001 located in the peripheral region A2.

[0104] Specifically, please refer to Figure 4 as well as Figure 5 First, a heat dissipation material layer 4001 can be formed on the surfaces of the first substrate material layer 1001, the isolation material layer 3001, and the second substrate material layer 2001 after the isolation material layer 3001 located in the peripheral region A2 is removed. Then, a second patterned photoresist can be formed on the heat dissipation material layer 4001. The second patterned photoresist covers the heat dissipation material layer 4001 in the peripheral region A2, exposing the heat dissipation material layer 4001 in the mask pattern region A1. Then, using the second patterned photoresist as a mask, the heat dissipation material layer 4001 in the peripheral region A2 is protected, and the heat dissipation material layer 4001 in the mask pattern region A1 is etched away, thereby forming a heat dissipation layer 400 on the first substrate material layer 1001 in the peripheral region A2. Afterwards, the second patterned photoresist is removed.

[0105] At this time, the heat dissipation layer 400 connected to the sidewall of the second substrate layer 200 forms the surface of the first substrate material layer 1001, thereby forming a thicker heat dissipation layer 400 to increase the adhesion between the heat dissipation layer 400 and the first substrate layer 100, so that the heat dissipation layer 400 is not easy to fall off.

[0106] In other embodiments, the insulating material layer 3001 located in the peripheral area A2 may not need to be removed.

[0107] In one embodiment, see Figure 7In step S50, when etching the first substrate material layer 1001 to form a first substrate layer 100 with a first opening 10, the first substrate layer 100 extends from the peripheral region A2 to the mask pattern region A1.

[0108] Step S60 includes:

[0109] Step S61: Using the first substrate layer 100 as a mask, the isolation material layer 3001 is etched to form an isolation layer 300 with a third opening 30.

[0110] At this time, the sidewall of the third opening 30 in the isolation layer 300 can be flush with the sidewall of the first opening 10 in the first substrate layer 100.

[0111] Please see Figure 8 When the second substrate material layer 2001 and the isolation material layer 3001 located in the peripheral region A2 are removed in the preceding steps (steps S21 and S22), after step 61, there is still a remaining isolation material layer 3001 in the mask pattern region A1, and this part of the isolation material layer 3001 forms the isolation layer 300.

[0112] If the isolation material layer 3001 of the peripheral area A2 is not removed in the current step, after step 61, the formed isolation layer 300 and the first substrate layer 100 extend from the peripheral area A2 to the mask pattern area A1 at the same time.

[0113] In this embodiment, by extending the first substrate layer 100 from the peripheral region A2 to the mask pattern region A1, the support for the second substrate layer 200 located in the mask pattern region A1 can be strengthened, effectively preventing the second substrate layer 200 located in the mask pattern region A1 from falling off.

[0114] In other embodiments, the first substrate layer 100 formed in step S50 may also be located only in the peripheral region A2. In this case, when the second substrate material layer 2001 and the isolation material layer 3001 located in the peripheral region A2 are removed in the preceding steps (steps S21 and S22), the isolation material layer 3001 can be completely removed after step 61, so that the final mask does not include the isolation layer 300. Alternatively, if the isolation material layer 3001 in the peripheral region A2 is not removed in the preceding steps, the isolation layer 300 formed after step 61 is also located only in the peripheral region A2 and does not extend to the mask pattern region A1.

[0115] In one embodiment, step S30 includes:

[0116] Step S31: An adhesive material layer, a metal diffusion barrier material layer, and a thermally conductive material layer are sequentially formed on the substrate;

[0117] In step S32, the thermally conductive material layer, the metal diffusion barrier material layer, and the adhesive material layer are etched sequentially to form the thermally conductive layer 430, the metal diffusion barrier layer 420, and the adhesive layer 410, respectively.

[0118] The adhesive layer may be made of materials including, but not limited to, titanium. The metal diffusion barrier layer may be made of materials including, but not limited to, titanium nitride, and the thermally conductive layer may be made of materials including, but not limited to, tungsten.

[0119] An adhesive layer, a metal diffusion barrier layer, and a thermally conductive layer form the heat dissipation material layer 4001. Please refer to [link / reference] after etching. Figure 9 The heat dissipation layer 400 is formed by the heat-conducting layer 430, the metal diffusion barrier layer 420, and the adhesive layer 410.

[0120] The adhesive layer 410 increases the adhesion between the heat dissipation layer 400 and the substrate, thereby preventing the heat dissipation layer 400 from falling off. During the mask fabrication process, the adhesive layer can effectively bond the heat dissipation material layer 4001 to the substrate as a whole, preventing the heat dissipation material layer 4001 from detaching and being damaged, thus preventing contamination such as particulate defects during the mask fabrication process.

[0121] The metal diffusion barrier layer 420 effectively prevents metal in the thermally conductive layer 430 from diffusing to the first substrate layer 100. This prevents contamination of the processing equipment used to prepare the mask. Furthermore, when the mask is used for exposure, the first substrate layer 100 faces the wafer, thus preventing metal contamination of the wafer by the first substrate layer 100 and affecting product quality.

[0122] The thermally conductive layer 430 can conduct heat well, thus facilitating thermal radiation or heat transfer to the heat sink structure 500.

[0123] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0124] Based on the same inventive concept, this application also provides a mask, which can be formed by, but is not limited to, the mask preparation method described above.

[0125] In one embodiment, see Figure 8 or Figure 9 The invention also provides a mask, including a first substrate layer 100, a second substrate layer 200, and a heat dissipation layer 400.

[0126] The mask has a mask pattern area A1 and an outer area A2 surrounding the mask pattern area A1. The number of mask pattern areas A1 can be one or more.

[0127] The first substrate layer 100 is located at least in the peripheral region A2. That is, the first substrate layer 100 may be located only in the peripheral region A2, or it may extend from the peripheral region A2 to the mask pattern region A1. The first substrate layer 100 has a first opening 10.

[0128] The second substrate layer 200 is located on one side of the first substrate layer 100. The second substrate layer 200 has a mask pattern 40.

[0129] The mask pattern 40 is located in the mask pattern area A1. The first opening 10 exposes the film pattern. One mask pattern 40 can be formed within one mask pattern area A1. The same mask pattern 40 can include multiple mask openings 41. And for each mask pattern area A1, a first opening 10 can be formed to expose the corresponding mask pattern 40.

[0130] The heat dissipation layer 400 is located in the peripheral area A2. The heat dissipation layer 400 and the second substrate layer 200 are located on the same side of the first substrate layer 100, and the heat dissipation layer 400 is connected to the second substrate layer 200. The specific positional relationship between the heat dissipation layer 400 and the second substrate layer 200 can be set according to actual needs.

[0131] In this embodiment, a heat dissipation layer 400 is provided in the peripheral region A2. The heat dissipation layer 400 is connected to the second substrate layer 200 where the mask pattern 40 is located. Therefore, when the mask is exposed and the electron beam bombards the second substrate layer 200 of the mask pattern region A1, the heat on the second substrate layer 200 can be quickly diffused to the connected heat dissipation layer 400 and rapidly radiated out through the heat dissipation layer 400. Therefore, this embodiment can effectively prevent the second substrate layer 200 located in the mask pattern region A1 from accumulating heat during the exposure process, thereby effectively preventing mask deformation. Therefore, based on this embodiment, when the mask is exposed, the shape and overlay accuracy of the pattern formed on the wafer can be effectively guaranteed, thereby improving device performance.

[0132] In one embodiment, see Figure 10 as well as Figure 11 The mask also includes a heat sink structure 500. The heat sink structure 500 is connected to the heat sink layer 400 on the side of the heat sink layer 400 away from the first substrate layer 100 and has a second opening 20 that exposes the mask pattern 40.

[0133] As an example, the heat sink structure 500 can be soldered to the heat dissipation layer 400.

[0134] As an example, the size of the second opening 20 can be the same as the size of the first opening 10 or the size of the mask pattern area A1. Of course, the size of the second opening 20 can also be different, as long as the second opening 20 exposes the mask pattern 40.

[0135] As an example, the heat sink structure 500 may include a mesh metal structure. The mesh metal structure can effectively increase the heat radiation area of ​​the heat sink structure 500.

[0136] The materials used for mesh metal structures can include, but are not limited to, metals with good heat dissipation properties such as aluminum. The specific mesh shape of the mesh metal structure can be set according to actual needs, for example, it can be quadrilateral, hexagonal, octagonal, etc.

[0137] In this embodiment, a heat sink structure 500 is added to the mask. The heat sink structure 500 typically has a large thickness, which can effectively increase the heat radiation area and efficiency of the mask, and improve the temperature stability of the mask.

[0138] In one embodiment, the mask further includes an isolation layer 300 located between the second substrate layer 200 and the first substrate layer 100. The isolation layer 300 has a third opening 30 that communicates with the first opening 10 to expose the mask pattern 40.

[0139] The isolation layer 300 can be located in the outer area A2, or in the mask pattern area A1, or it can extend from the outer area A2 to the mask pattern area A1.

[0140] As an example, the second substrate 200, the first substrate 100, and the isolation layer 300 between them can be formed from an SOI substrate. In this case, the materials of the second substrate 200 and the first substrate 100 can be silicon, and the material of the isolation layer 300 can be silicon oxide.

[0141] Of course, the form and material of the second substrate layer 200, the first substrate layer 100 and the isolation layer 300 are not limited to this, and can be set according to actual needs.

[0142] In one embodiment, the second substrate layer 200 is located in the mask pattern area A1, and the heat dissipation layer 400 is connected to the sidewall of the second substrate layer 200.

[0143] In this embodiment, when a mask is used for exposure, the heat generated on the second substrate layer 200 of the mask pattern area A1 can be quickly and effectively transferred to the heat dissipation layer 400, and then quickly released through the heat dissipation layer 400.

[0144] In one embodiment, the mask further includes an isolation layer 300 located between the second substrate layer 200 and the first substrate layer 100. The isolation layer 300 has a third opening 30. The third opening 30 communicates with the first opening 10 to expose the mask pattern 40.

[0145] The isolation layer 300 and the second substrate layer 200 are both located in the mask pattern area A1. The heat dissipation layer 400 is located on the surface of the first substrate layer 100. At this time, the portion of the first substrate layer 100 located in the peripheral area A2 is covered by the heat dissipation layer 400.

[0146] At this point, a thicker heat dissipation layer 400 can be formed to increase the adhesion between the heat dissipation layer 400 and the first substrate layer 100, thereby making the heat dissipation layer 400 less likely to fall off.

[0147] In one embodiment, the first substrate layer 100 extends from the peripheral region A2 to the mask pattern region A1, and the sidewall of the third opening 30 is flush with the sidewall of the first opening 10.

[0148] In one embodiment, the heat dissipation layer 400 includes an adhesive layer 410, a metal diffusion barrier layer 420, and a thermally conductive layer 430 stacked sequentially.

[0149] The adhesive layer 410 may be made of, but is not limited to, titanium. The metal diffusion barrier layer 420 may be made of, but is not limited to, titanium nitride, and the thermally conductive layer 430 may be made of, but is not limited to, tungsten.

[0150] The adhesive layer 410 increases the adhesion between the heat dissipation layer 400 and the substrate, thereby preventing the heat dissipation layer 400 from falling off.

[0151] The metal diffusion barrier layer 420 effectively prevents metal in the thermally conductive layer 430 from diffusing to the first substrate layer 100. This prevents contamination of the processing equipment used to prepare the mask. Furthermore, when the mask is used for exposure, the first substrate layer 100 faces the wafer, thus preventing metal contamination of the wafer by the first substrate layer 100 and affecting product quality.

[0152] The thermally conductive layer 430 can conduct heat well, thus facilitating thermal radiation or heat transfer to the heat sink structure 500.

[0153] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0154] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0155] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A photomask, characterized in that, The mask plate includes a mask pattern area and a peripheral area surrounding the mask pattern area, the mask plate comprising: A first substrate layer, at least located in the peripheral region, and having a first opening within the first substrate layer; A second substrate layer is located on one side of the first substrate layer and has a mask pattern, the mask pattern being located in the mask pattern area and exposed by the first opening; A heat dissipation layer is located in the peripheral area and is on the same side of the first substrate layer as the second substrate layer, and the heat dissipation layer is connected to the second substrate layer.

2. The mask according to claim 1, characterized in that, The mask also includes: A heat sink structure is provided, wherein the heat sink is connected to the side of the heat sink layer away from the first substrate layer, and has a second opening that exposes the mask pattern.

3. The mask according to claim 2, characterized in that, The heat sink structure includes a mesh metal structure.

4. The mask according to claim 1, characterized in that, The mask also includes an isolation layer located between the second substrate layer and the first substrate layer, the isolation layer having a third opening that communicates with the first opening to expose the mask pattern.

5. The photomask according to claim 1, characterized in that, The second substrate layer is located in the mask pattern area, and the heat dissipation layer is connected to the sidewall of the second substrate layer.

6. The photomask according to claim 5, characterized in that, The mask also includes an isolation layer located between the second substrate layer and the first substrate layer, the isolation layer having a third opening that communicates with the first opening to expose the mask pattern; Both the isolation layer and the second substrate layer are located in the mask pattern area; The heat dissipation layer is located on the surface of the first substrate layer.

7. The photomask according to claim 6, characterized in that, The first substrate extends from the peripheral region to the mask pattern region, and the sidewall of the third opening is flush with the sidewall of the first opening.

8. The photomask according to claim 1, characterized in that, The heat dissipation layer includes an adhesive layer, a metal diffusion barrier layer, and a thermally conductive layer stacked in sequence.

9. A method for preparing a photomask, characterized in that, include: A substrate is provided, the substrate including a first substrate material layer and a second substrate material layer, and a mask pattern region and a peripheral region surrounding the mask pattern region are defined on the substrate; A heat dissipation layer is formed on the substrate in the peripheral region, the heat dissipation layer and the second substrate material layer are located on the same side of the first substrate material layer and are connected to the second substrate material layer; The second substrate material layer is etched to form a second substrate layer with a mask pattern located in the mask pattern area; The first substrate material layer is etched to form a first substrate layer having a first opening that exposes the mask pattern.

10. The method for preparing a photomask according to claim 9, characterized in that, After etching the first substrate material layer to form a first substrate layer with a first opening, the method further includes: The heat dissipation layer is welded to the heat sink structure, which has a second opening. After welding, the second opening exposes the mask pattern.

11. The method for preparing a photomask according to claim 9, characterized in that, The substrate further includes an isolation material layer located between the first substrate material layer and the second substrate material layer. After etching the first substrate material layer to form a first substrate layer with a first opening, the method further includes: The isolation material layer located in the mask pattern area is etched to expose the mask pattern.

12. The method for preparing a photomask according to claim 11, characterized in that, The substrate includes an SOI substrate.

13. The method for preparing a photomask according to claim 11, characterized in that, Before forming the heat dissipation layer located in the peripheral region on the substrate, the process includes: The second substrate material layer located in the peripheral region is removed by etching.

14. The method for preparing a photomask according to claim 13, characterized in that, After the etching removes the second substrate material layer located in the peripheral region, the method further includes: Etching removes the insulating material layer located in the peripheral area; When forming a heat dissipation layer located in the peripheral region on the substrate, the heat dissipation layer is formed on the first substrate material layer located in the peripheral region.

15. The method for preparing a photomask according to claim 11 or 14, characterized in that, When etching the first substrate material layer to form a first substrate layer with a first opening, the first substrate layer extends from the peripheral region to the mask pattern region. The etching of the isolation material layer located in the mask pattern area to expose the mask pattern includes: Using the first substrate layer as a mask, the isolation material layer is etched to form an isolation layer with a third opening.

16. The method for preparing a photomask according to claim 9, characterized in that, The step of forming a heat dissipation layer on the substrate located in the peripheral region includes: An adhesive material layer, a metal diffusion barrier material layer, and a thermally conductive material layer are sequentially formed on a substrate; The thermally conductive material layer, the metal diffusion barrier material layer, and the adhesive material layer are etched sequentially to form the thermally conductive layer, the metal diffusion barrier layer, and the adhesive layer, respectively.

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