Machine learning model training method, method for evaluating compiling quality of quantum circuit and related device

Abstract

The invention discloses a machine learning model training method, a method for evaluating the compiling quality of a quantum circuit and a related device, and belongs to the technical field of quantum computing, and the method comprises the steps: obtaining theoretical operation results and actual operation results of a plurality of quantum circuits, the actual operation result is an operation result of the compiled quantum circuit in the target quantum hardware, and all the quantum circuits are compiled in the same compiling mode; determining a label of a corresponding quantum circuit according to the difference between the theoretical operation result and the actual operation result; line features of the compiled quantum line are extracted, and the line features at least comprise one feature reflecting the structure of the compiled quantum line; and training the selected machine learning model used for evaluating the compiling quality of the quantum circuit by using the determined labels and the extracted circuit features for the quantum circuit. By applying the embodiment of the invention, the accuracy of an evaluation result can be improved.

Description

Technical Field

[0001] This application belongs to the field of quantum computing technology, and in particular to a machine learning model training method, a method for evaluating the compilation quality of quantum circuits, and related devices. Background Technology

[0002] Quantum circuit compilation plays a crucial role in the practical application of quantum computing, especially in the research and deployment of quantum algorithms. Through compilation, not only can the efficient operation of quantum algorithms on target quantum devices be ensured, but the accuracy and reliability of the algorithms are also improved. The function of quantum circuit compilation is to transform quantum algorithms into a form that the target quantum device can execute. Specifically, it transforms a quantum algorithm presented as a set of quantum gates into a quantum circuit executable by a specific quantum device. In this process, factors such as the physical limitations, topology, and set of quantum gates of the quantum device must all be taken into consideration.

[0003] Accurate and effective evaluation of compilation quality provides researchers and engineers in the field of quantum computing with a unified standard and reference, facilitating comparisons of different compilation methods, sharing experiences and results, and thus promoting continuous innovation and development in quantum circuit compilation technology. Furthermore, high-quality quantum circuit compilation is a prerequisite for ensuring the accuracy and reliability of quantum computing results. Poor compilation quality may lead to increased quantum gate error rates and exacerbated interference between qubits, resulting in biased calculation results. Evaluation allows for the timely identification and correction of these potential problems, ensuring the credibility of quantum computing results and promoting the practical application of quantum computing technology in scientific research, cryptography, chemistry, and other fields.

[0004] Currently, the evaluation of quantum circuit compilation quality mainly relies on indicators such as the depth of the compiled quantum circuit and the number of quantum logic gates. This evaluation method only considers the structure of the quantum circuit itself and does not take into account the characteristics of quantum hardware, resulting in a relatively one-sided evaluation and low accuracy of the results. Summary of the Invention

[0005] The purpose of this application is to provide a method for training machine learning models, a method for evaluating the compilation quality of quantum circuits, and related apparatus, with the aim of improving the accuracy of the evaluation results.

[0006] One embodiment of this application provides a machine learning model training method, the method comprising:

[0007] The theoretical and actual operating results of multiple quantum circuits are obtained, wherein the actual operating results are the operating results of the compiled quantum circuits in the target quantum hardware, and all quantum circuits are compiled in the same way;

[0008] By utilizing the difference between theoretical and actual operating results, the corresponding quantum circuit labels are determined;

[0009] Extract the circuit features of the compiled quantum circuit, wherein the circuit features include at least one feature reflecting the structure of the compiled quantum circuit;

[0010] The machine learning model selected for evaluating the compilation quality of quantum circuits is trained using the labels determined for quantum circuits and the extracted circuit features.

[0011] Optionally, the machine learning model is a random forest regressor or a gradient boosting decision tree.

[0012] Optionally, determining the label of the corresponding quantum circuit by utilizing the difference between the theoretical and actual operating results includes:

[0013] The degree of difference between the probability distribution of the theoretical operating results and the probability distribution of the actual operating results is used as the label for the corresponding quantum circuit.

[0014] Optionally, the degree of difference between the probability distribution of the theoretical results and the probability distribution of the actual results can be represented by the Hellinger distance or KL divergence.

[0015] Optionally, the circuit features may also include the features of the qubits occupied by the compiled quantum circuit in the target quantum hardware.

[0016] Another embodiment of this application provides a method for evaluating the quality of quantum circuit compilation, the method comprising:

[0017] Obtain the compiled target quantum circuit, wherein the compilation method of the target quantum circuit is the same as the compilation method of the quantum circuit used to train the machine learning model;

[0018] Extract the circuit features of the compiled target quantum circuit;

[0019] The extracted circuit features are processed using a pre-trained machine learning model to obtain the compilation quality evaluation result of the target quantum circuit. The machine learning model is trained using the machine learning model training method in any of the above embodiments.

[0020] Another embodiment of this application provides a machine learning model training apparatus, the apparatus comprising:

[0021] The result acquisition module is used to obtain the theoretical and actual operating results of multiple quantum circuits. The actual operating results are the results of the compiled quantum circuits running in the target quantum hardware. All quantum circuits are compiled using the same compilation method.

[0022] The tag determination module is used to determine the tag of the corresponding quantum circuit by utilizing the difference between the theoretical and actual operation results;

[0023] The feature extraction module is used to extract the circuit features of the compiled quantum circuit, wherein the circuit features include at least one feature reflecting the structure of the compiled quantum circuit;

[0024] The training module is used to train a selected machine learning model for evaluating the compilation quality of quantum circuits using labels determined for quantum circuits and extracted circuit features.

[0025] Another embodiment of this application provides an apparatus for evaluating the compilation quality of quantum circuits, the apparatus comprising:

[0026] A module for obtaining the compiled target quantum circuit, wherein the compilation method of the target quantum circuit is the same as that of the quantum circuit used to train the machine learning model;

[0027] The extraction module is used to extract the circuit features of the compiled target quantum circuit;

[0028] The evaluation module is used to process the extracted circuit features using a pre-trained machine learning model to obtain the compilation quality evaluation result of the target quantum circuit, wherein the machine learning model is trained using the machine learning model training method in any of the above embodiments.

[0029] Another embodiment of this application provides a computer device including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the machine learning model training method or the method for evaluating the compilation quality of quantum circuits in any of the above embodiments.

[0030] Another embodiment of this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a computer, causes the computer to perform the machine learning model training method or the method for evaluating the compilation quality of quantum circuits in any of the above embodiments.

[0031] Compared to existing technologies, this application uses the difference between theoretical and actual operating results to determine the labels during training. Furthermore, it trains the quantum circuit using the circuit characteristics and labels of the compiled quantum circuit. By comparing the probability distributions of theoretical and actual operating results, the operational quality of the quantum circuit on the target hardware can be comprehensively evaluated. This evaluation not only considers the theoretical performance of the quantum circuit but also incorporates the characteristics of the actual hardware, accurately reflecting the performance of the quantum circuit in real-world environments. This makes the trained model more consistent with practical application scenarios and allows for a more accurate assessment of the compilation quality of the quantum circuit. Attached Figure Description

[0032] Figure 1 An example system block diagram of a method for training machine learning models and evaluating the compilation quality of quantum circuits provided in this application embodiment;

[0033] Figure 2 A flowchart illustrating a machine learning model training method provided in this application embodiment;

[0034] Figure 3 A flowchart illustrating a method for evaluating the compilation quality of quantum circuits, provided as an embodiment of this application;

[0035] Figure 4 A structural diagram of a machine learning model training device provided in an embodiment of this application;

[0036] Figure 5 A structural diagram of a device for evaluating the compilation quality of quantum circuits provided in this application embodiment;

[0037] Figure 6 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application. Detailed Implementation

[0038] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0039] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0040] Classical computers use transistors to encode information in binary data, such as bits, where each bit can represent a value of 1 or 0. These 1s and 0s act as switches to drive the functions of a classical computer. If there are n bits of data, there are 2^n possible classical states, and one state is represented at a time.

[0041] Quantum computers use quantum processors that operate on data represented by qubits, also known as quantum bits. A qubit can represent the classical binary states "0" or "1", or a superposition of "0" and "1". Because it can represent a superposition of "0" and "1", a qubit can represent both "0" and "1" states simultaneously. For example, if there are n bits of data, n quantum states can be represented simultaneously. Furthermore, qubits in a superposition can be correlated with each other, a phenomenon known as entanglement. The state of one qubit (whether it's 1, 0, or both) can depend on the state of another qubit, and more information can be encoded within two entangled qubits. Based on the principles of superposition and entanglement, qubits enable quantum computers to perform functions that might be relatively complex and time-consuming for classical computers.

[0042] Please refer to Figure 1 This illustration shows an example system block diagram of a method for training machine learning models and evaluating the compilation quality of quantum circuits, provided in one embodiment of this application. System 100 may be a hybrid computing system comprising a combination of one or more quantum computers, quantum systems, and / or classical computers. Figure 1 In the example shown, system 100 may include a quantum system 110 and a classical computer 120. In one implementation, the quantum system 110 and the classical computer 120 may be configured to communicate via one or more wired and / or wireless connections (e.g., wireless networks). The quantum system 110 may include a quantum chipset consisting of one or more quantum chips, comprising various hardware components for processing data encoded in qubits. The quantum chipset may be a quantum computing core surrounded by infrastructure to protect the quantum chips from electromagnetic noise sources, mechanical vibration sources, heat sources, and other noise sources that can degrade the performance of the quantum chips. The classical computer 120 may be electronically integrated with the quantum system 110 via any suitable wired and / or wireless electronic connection.

[0043] exist Figure 1 In the example shown, quantum system 110 can be any suitable set of components capable of performing quantum operations on a physical system. Quantum operations, for example, can be quantum logic gate operations that manipulate the quantum states of qubits to evolve and / or become entangled. Figure 1In the illustrated example embodiment, the quantum system 110 may include a measurement and control unit 111, an interface 112, and a quantum chip 113. In some embodiments, all or part of each of the measurement and control unit 111, interface 112, and quantum chip 113 may be located in a cryogenic environment to facilitate the performance of quantum operations. The quantum chip 113 may be any hardware capable of processing information using quantum states. This hardware may include multiple qubits and means for coupling or entanglement of the qubits to process information using quantum states. Qubits may include, but are not limited to, charge qubits, flux qubits, phase qubits, spin qubits, and ion qubits. The quantum chip may include a set of quantum logic gates configured to perform quantum logic operations on the qubits stored in a quantum register. The quantum gates may include one or more single-qubit gates, two-qubit gates, and / or other multi-qubit gates.

[0044] The measurement and control unit 111 can be any combination of digital computing devices capable of performing quantum computing (e.g., executing quantum circuits) in conjunction with interface 112. This digital computing device may include a digital processor and memory for storing and executing quantum instructions using interface 112. The digital computing device may also include a communication protocol device for receiving instructions and sending the results of the performed quantum computing to a classical computer. Additionally, the digital computing device may include a communication interface having interface 112. In one embodiment, the measurement and control unit 111 may be configured to receive classical instructions (e.g., from classical computer 120) and convert these classical instructions into measurement and control instructions for interface 112. The measurement and control instructions provided by the measurement and control unit 111 to interface 112 may be, for example, digital signals indicating which quantum gates in a quantum gate array need to be applied to the qubits to perform a specific function. Interface 112 may be configured to convert these digital signals into analog signals (e.g., analog pulses of microwave pulses), which can be used to apply quantum gates to the qubits to manipulate the interactions between the qubits.

[0045] Interface 112 may be a classical-quantum interface, comprising a combination of devices capable of receiving instructions from the integrated measurement and control unit 111 and converting those instructions into a means for implementing quantum operations. In one embodiment, interface 112 may convert instructions from the integrated measurement and control unit 111 into drive signals capable of driving or manipulating qubits, and / or applying quantum gates to qubits. Additionally, interface 112 may be configured to convert signals received from the quantum chip 113 into digital signals capable of being processed and transmitted by the integrated measurement and control unit 111. Devices included in interface 112 may include, but are not limited to, digital-to-analog converters, analog-to-digital converters, waveform generators, attenuators, amplifiers, optical fibers, lasers, and filters. Interface 112 may further include circuitry configured to measure multiple qubits after the application of quantum gates, wherein the measurements may produce results represented in classical bits. Each measurement performed by interface 112 may be read out to a device connected to the quantum system 110, such as a classical computer 120. The multiple measurement results provided by interface 112 may represent probabilistic results.

[0046] The classical computer 120 can include hardware components such as a processor and storage devices (e.g., including memory devices and classical registers) for processing data encoded in classical bits. In one embodiment, the classical computer 120 can be configured to provide the quantum system 110 with various control signals, instructions, and data encoded in classical bits. Further, quantum states measured by the quantum system 110 can be read out by the classical computer 120, and the classical computer 120 can store the measured quantum states as classical bits in classical registers. In one embodiment, the classical computer 120 can be any suitable combination of computer-executable hardware and / or computer-executable software capable of executing the preparation module 121 to perform quantum computation using data stored in the data storage module 122 as part of the construction and computation. The data storage module 122 can be a repository for data to be analyzed using quantum computing algorithms and the results of that analysis. The preparation module 121 can be a program or module capable of preparing classical data from the data storage module 122 as part of a quantum circuit implementation. Preparation module 121 can be instantiated as part of a larger algorithm, such as an application programming interface (API) function call, or by resolving hybrid classical-quantum computing into aspects of quantum and classical computing. For example, preparation module 121 can generate instructions for creating quantum circuits using quantum gates. In an embodiment, such instructions can be stored by the measurement and control unit 111 and can be instantiated by components of interface 112 to execute, enabling quantum operations of quantum gates to be performed on quantum chip 113.

[0047] The classic computer 120 may be a laptop computer, desktop computer, vehicle-integrated computer, smart mobile device, tablet device, and / or any other suitable classic computing device. Additionally or alternatively, the classic computer 120 may also operate as part of a cloud computing service model, such as Software as a Service (SaaS), Platform as a Service (PaaS), or Infrastructure as a Service (IaaS). The classic computer 120 may also reside in a cloud computing deployment model, such as a private cloud, community cloud, public cloud, or hybrid cloud.

[0048] See Figure 2 , Figure 2 The machine learning model training method provided in this application includes the following steps:

[0049] S201: Obtain the theoretical and actual operating results of multiple quantum circuits, wherein the actual operating results are the operating results of the compiled quantum circuits in the target quantum hardware, and all quantum circuits are compiled using the same compilation method.

[0050] This application yields two types of operational results for multiple quantum circuits. One type is the theoretical operational result, which is the result of the quantum circuit operation obtained through theoretical calculations, specifically the result obtained using a simulator. The other type is the actual operational result, which is the result obtained by actually running the compiled quantum circuit on target quantum hardware (such as a specific quantum computer). Furthermore, all these quantum circuits are compiled using the same compilation method. This ensures that the compilation method remains consistent during subsequent evaluation of compilation quality, preventing interference with the comparison of results.

[0051] The quantum circuits used as training data can include constructed random quantum circuits or benchmark quantum circuits. These quantum circuits can include one or more of the following: quantum circuits for quantum volume (QV) benchmarking, quantum circuits for circuit layer operations per second (CLOPS) benchmarking, quantum circuits for random benchmarking, or quantum circuits for cross-entropy benchmarking. The quantum circuits used as training data can be those whose theoretical operating results are relatively simple to obtain; specifically, they can be quantum circuits whose theoretical operating results can be obtained without complex theoretical calculations.

[0052] S202: Determine the label of the corresponding quantum circuit by utilizing the difference between the theoretical and actual operating results.

[0053] This label reflects the relationship between the actual operation of the quantum circuit and its theoretical expectations. For example, it may indicate the quality of compilation or whether there are significant deviations. Specifically, it could be fidelity, error rate, etc.

[0054] S203: Extract the circuit features of the compiled quantum circuit, wherein the circuit features include at least one feature reflecting the structure of the compiled quantum circuit.

[0055] These circuit features must include at least one feature that reflects the structure of the compiled quantum circuit. The circuit features of the compiled quantum circuit are extracted. Structural features can include structural features such as the number, type, and arrangement of quantum gates, as well as performance features such as the depth, width, and qubit usage of the quantum circuit. Specific circuit features also include the characteristics of the qubits occupied by the compiled quantum circuit in the target quantum hardware, such as the specific number of qubits used. The characteristic of the qubits occupied by the compiled quantum circuit in the target quantum hardware provides more comprehensive information about how the quantum circuit operates on actual hardware. This helps to more accurately evaluate the quality of the compiled quantum circuit because it takes into account the physical characteristics of the qubits, such as coherence time and error rate.

[0056] By extracting these features, the structural information of the compiled quantum circuit can be quantified for subsequent use in training machine learning models.

[0057] S204: Train the selected machine learning model for evaluating the compilation quality of the quantum circuit using the labels determined for the quantum circuit and the extracted circuit features.

[0058] By combining defined quantum circuit labels with extracted circuit features, a selected machine learning model is trained using this data. This machine learning model is specifically designed to evaluate the compilation quality of quantum circuits. By continuously learning from these labeled and feature-rich quantum circuit data, the model gradually grasps the relationship between compilation quality, circuit features, and differences in execution results, thus enabling a more accurate assessment of quantum circuit compilation quality. During training, methods such as cross-validation can be used to verify the model's performance, ensuring that the model can accurately predict the compilation quality of quantum circuits.

[0059] The objective of this application is to evaluate the effectiveness of different compilation methods. For a specific chip, a specific compilation method is used, and the compilation quality is judged based on the actual running results. To evaluate the effectiveness of different compilation methods, the method provided in this application is used to train corresponding machine learning models for each method. To evaluate the chip's performance on the circuit operation results, the same compilation method and the same quantum circuit can be used. Because the actual running results differ, corresponding machine learning models can be trained separately for different quantum chips to evaluate the performance of the same quantum circuit on different quantum chips, thereby obtaining better performance results.

[0060] This application uses the difference between theoretical and actual running results to determine the labels during training. Training is then performed using the circuit features and labels of the compiled quantum circuit. By comparing the probability distributions of theoretical and actual running results, the running quality of the quantum circuit on the target hardware can be comprehensively evaluated. This evaluation not only considers the theoretical performance of the quantum circuit but also incorporates the characteristics of the actual hardware, accurately reflecting the performance of the quantum circuit in a real-world environment. This makes the trained model more consistent with practical application scenarios and allows for a more accurate assessment of the compilation quality of the quantum circuit. Quantum circuit compilation involves tasks such as qubit mapping, gate synthesis, and quantum circuit optimization. Its quality is usually measured by performance metrics, such as the number of gates and circuit depth. However, the correlation between these metrics and the actual execution quality on quantum hardware is unclear and not a simple linear relationship. By extracting the features of the quantum circuit and training it using a machine learning model, the compilation quality of the quantum circuit can be evaluated quickly and efficiently. This method not only improves evaluation efficiency but also captures complex nonlinear relationships, further enhancing the accuracy of the evaluation. This application utilizes the circuit characteristics of the compiled quantum circuit, which better reflects the correlation, to evaluate the compilation quality of the quantum circuit. This evaluation method is result-oriented, that is, the quantum circuit with good compilation quality will have operating results that are closer to the theoretical distribution.

[0061] In some embodiments of this application, the machine learning model may be a random forest regressor or a gradient boosting decision tree.

[0062] Random forest regressors are machine learning algorithms based on multiple decision trees. They construct multiple decision trees and combine their predictions (e.g., by averaging) to obtain the final prediction. The advantage of using random forest regressors for training in evaluating the quality of quantum circuit compilation is that:

[0063] By constructing multiple decision trees using randomly sampled data and features, the risk of overfitting is reduced. Each tree is trained on a different subset of data, thereby improving the model's generalization ability.

[0064] Random forest regressors can provide an importance assessment for each feature, helping to understand which features have the greatest impact on quantum circuit compilation quality. This is very helpful for optimizing the compilation process and improving quantum circuit design;

[0065] Evaluating the quality of quantum circuit compilation often involves a large number of features. Random forest regressors can effectively handle high-dimensional data without the need for dimensionality reduction or complex feature selection.

[0066] Random forest regressors are highly robust to outliers and noisy data, requiring minimal preprocessing. This is particularly advantageous for evaluating potentially noisy data in quantum circuit compilation quality assessments.

[0067] Random forest regressors can capture nonlinear relationships and interactions in data, which is very effective for evaluating complex feature relationships in quantum circuit compilation quality.

[0068] The training process of a random forest regressor can be parallelized, making it suitable for handling large-scale datasets and offering relatively fast training speeds.

[0069] The implementation of random forest regressors is relatively simple, and key parameters (such as the number of trees, maximum depth, etc.) can be quickly adjusted experimentally, making them suitable for rapid deployment and optimization in evaluating the compilation quality of quantum circuits.

[0070] Taking the random forest regressor as an example of a machine learning model, the training process is explained as follows:

[0071] First, the existing dataset is divided into training and test sets according to a certain ratio. Common ratios include 7:3 and 8:2. For example, 70% of the data can be used as the training set and 30% as the test set. The purpose of this division is to allow the model to learn and train on the training set, while retaining a portion of unseen data (the test set) to evaluate the model's actual performance, thus better reflecting the model's performance on new data.

[0072] After dividing the training set, the random forest regressor is trained using this set. The random forest regressor is an ensemble learning algorithm consisting of multiple decision trees, each trained on a randomly selected subset of features and samples. By combining the predictions from multiple trees, the random forest regressor achieves more accurate and stable predictions.

[0073] To improve the performance of a random forest regressor, its hyperparameters need to be optimized. Hyperparameters are parameters set before model training, not parameters learned from training data. Grid search is a commonly used hyperparameter optimization method that exhaustively searches through predefined combinations of hyperparameters to find the optimal combination for model performance. For example, grid search can be performed on hyperparameters such as the number of decision trees (n_estimators), the maximum depth (max_depth), and the minimum number of samples required for each split (min_samples_split).

[0074] During the grid search process, the model tries different combinations of hyperparameters and calculates corresponding evaluation metrics on the cross-validation set, such as mean squared error (MSE) and coefficient of determination (R²). 2Based on the results of these evaluation metrics, the optimal combination of hyperparameters is identified to achieve the best performance of the model on the validation set. Then, the model is retrained using this optimal hyperparameter combination to improve its predictive performance on the test set.

[0075] To more accurately evaluate model performance, cross-validation is employed. Cross-validation involves further dividing the training set into multiple subsets, then performing multiple rounds of training and validation. Each round, one subset is selected as the validation set, and the remaining subsets are used as the training set. Common cross-validation methods include k-fold cross-validation, such as dividing the dataset into 5 or 10 folds. Through cross-validation, the average of multiple evaluation metrics can be obtained, providing a more comprehensive understanding of the model's performance and generalization ability on the training set, and avoiding evaluation bias caused by the randomness of data partitioning.

[0076] After model training and hyperparameter optimization, the final performance of the model is evaluated using a test set. The correlation coefficient is used as the evaluation metric, measuring the degree of linear correlation between predicted and actual values, ranging from -1 to 1. A correlation coefficient close to 1 indicates a high positive correlation between predicted and actual values, meaning the model's predictions closely match reality, indicating good predictive performance. Conversely, a correlation coefficient close to 0 indicates no linear correlation, suggesting poor predictive performance. Calculating the correlation coefficient on the test set provides a direct understanding of the model's accuracy in predicting compilation quality, thus determining whether the model can effectively solve practical problems.

[0077] Gradient boosting decision trees are also a type of machine learning algorithm based on decision trees. They iteratively build decision trees, with each tree attempting to correct the prediction errors of the preceding trees. By gradually improving the model's predictive ability along the gradient descent direction of the loss function, they can be used for regression tasks. The advantage of using gradient boosting decision trees for training in evaluating the quality of quantum circuit compilation is:

[0078] Gradient boosting decision trees construct models with high prediction accuracy by gradually reducing prediction residuals, which can accurately evaluate the compilation quality of quantum circuits.

[0079] The local learning characteristics of decision trees make gradient boosting decision trees more robust to outliers and less susceptible to individual noise points, making them suitable for processing noisy data in evaluating the compilation quality of quantum circuits.

[0080] Each decision tree can be viewed as a set of rules, and the model's predictions can be interpreted by examining the decision paths of each tree, which helps to understand the key factors in evaluating the quality of quantum circuit compilation.

[0081] Gradient boosting decision trees can be used for regression tasks, and can also be applied to classification tasks by setting different objective functions, which can flexibly adapt to different needs in evaluating the compilation quality of quantum circuits.

[0082] Gradient boosting decision trees can capture nonlinear relationships and interactions in data, which is very effective for evaluating the complex feature relationships that may exist in the compilation quality of quantum circuits.

[0083] Gradient boosting decision trees do not require strict standardization or regularization of data, can automatically handle different feature scales, and are robust to missing values, which may be an advantage in evaluating the compilation quality of quantum circuits.

[0084] Gradient boosting decision trees are suitable for handling both categorical and numerical features. Furthermore, categorical features do not require special encoding and can be directly input, which is very convenient when dealing with multiple features in evaluating the compilation quality of quantum circuits.

[0085] Gradient boosting decision trees naturally possess the function of feature selection, which can rank the importance of features, thereby helping to identify key features that affect the compilation quality of quantum circuits;

[0086] Gradient boosting decision trees combine the prediction results of multiple weak learners, which can effectively reduce errors and have strong generalization ability.

[0087] In some embodiments of this application, determining the label of the corresponding quantum circuit by utilizing the difference between theoretical and actual operating results may include:

[0088] The degree of difference between the probability distribution of the theoretical operating results and the probability distribution of the actual operating results is used as the label for the corresponding quantum circuit.

[0089] The probability distribution of theoretical execution results is obtained by simulating the operation of the quantum circuit using a quantum simulator, yielding the probability distribution of the theoretical output. The probability distribution of actual execution results is obtained by deploying the compiled quantum circuit on the target quantum hardware, executing it multiple times, and collecting the probability distribution of the actual output. Statistical methods are used to calculate the degree of difference between the theoretical and actual probability distributions. This degree of difference can serve as a label for the quantum circuit. This method can effectively evaluate the fidelity of the quantum circuit and provide a basis for subsequent compilation quality evaluation. In this way, we can better understand the performance of the quantum circuit on actual hardware and optimize the compilation process to improve the performance and reliability of the circuit.

[0090] The degree of difference between the probability distribution of theoretical operating results and the probability distribution of actual operating results is represented by the Hellinger distance or KL divergence.

[0091] Hellinger distance is a metric used to measure the difference between two probability distributions. It calculates the distance between them by comparing the square root probabilities of the two distributions, offering advantages such as symmetry and boundedness. Hellinger distance uniformly accounts for the differences between the two probability distributions across all values, avoiding bias due to extreme values ​​or specific regions. In quantum circuit compilation, whether a compilation error affects the probability of a few quantum states or widely impacts multiple quantum states, Hellinger distance comprehensively and relatively fairly reflects the overall difference, accurately assessing compilation quality.

[0092] The Hellinger distance ranges from 0 to 1, where 0 represents that the two distributions are completely identical, indicating perfect compilation quality and that the actual results are in perfect agreement with the theoretical results; and 1 represents that the two distributions are completely different, indicating extremely poor compilation quality. This boundedness gives the evaluation results clear physical meaning and intuitive interpretability, making it easy for researchers to quickly understand the level of compilation quality.

[0093] In quantum computing, actual results are influenced by various factors and may differ slightly from theoretical results. The Hellinger distance is extremely sensitive to these minute changes, accurately capturing subtle differences in probability distributions. This helps researchers promptly identify potential problems in quantum circuit compilation, detecting even very small compilation errors, which facilitates fine-tuning and optimization of the compilation algorithm.

[0094] Hellinger distance possesses several desirable mathematical properties, such as symmetry and the ability to satisfy the triangle inequality. Symmetry means that the differences between theoretical and actual distributions are the same regardless of the order in which they are compared, ensuring consistency and reliability in practical evaluations. The triangle inequality property facilitates reasonable reasoning and analysis when comparing multiple quantum circuits or different compilation schemes, providing a more rigorous mathematical foundation for evaluating compilation quality.

[0095] KL divergence focuses on the key differences between two probability distributions, quickly identifying the parts that significantly impact the overall discrepancy. In quantum circuit compilation, this helps identify critical points where actual results deviate significantly from theoretical expectations, allowing researchers to target these key areas for analysis and improvement, thus enhancing compilation quality. KL divergence has a clear physical meaning in information theory, representing the amount of information lost when approximating one distribution with another. From this perspective, evaluating quantum circuit compilation quality provides a deeper understanding of information loss during the compilation process. The evolution of quantum states and measurement results in quantum computing are probabilistic, and KL divergence, defined based on probability distributions, is well-suited to this characteristic. It accurately describes changes in the probability distribution of quantum circuit execution results, whether caused by errors in quantum gates, decoherence of qubits, or other factors during compilation, effectively reflecting these changes and providing an accurate basis for evaluating compilation quality.

[0096] See Figure 3 , Figure 3 The method for evaluating the compilation quality of quantum circuits provided in this application includes the following steps:

[0097] S301: Obtain the compiled target quantum circuit, wherein the compilation method of the target quantum circuit is the same as the compilation method of the quantum circuit used to train the machine learning model;

[0098] S302: Extract the circuit features of the compiled target quantum circuit;

[0099] S303: Using a pre-trained machine learning model, process the extracted circuit features to obtain the compilation quality evaluation result of the target quantum circuit, wherein the machine learning model is trained using the machine learning model training method in any of the above embodiments.

[0100] During compilation, the target quantum circuit is the quantum circuit whose compilation quality needs to be evaluated. Quantum programming frameworks (such as QPanda3, TensorCircuit, etc.) can be used to compile the target quantum circuit to obtain the compiled target quantum circuit.

[0101] The compiled quantum circuit is compiled in the same way as the quantum circuit used to train the machine learning model, which ensures that the compilation method is consistent. Only by ensuring that the compilation method is the same can the subsequent evaluation using the machine learning model be comparable and reliable. In this way, the compilation quality of the target quantum circuit can be judged based on the same compilation rules.

[0102] The extracted features of the target quantum circuit are input into the trained machine learning model. The machine learning model processes and analyzes these features based on the rules and knowledge it has learned during training, and finally outputs an evaluation result, which is a judgment on the compilation quality of the target quantum circuit.

[0103] This application's machine learning model uses the difference between theoretical and actual operating results to determine the labels during training. It is trained using the circuit features and labels of the compiled quantum circuit. By comparing the probability distributions of theoretical and actual operating results, the operational quality of the quantum circuit on the target hardware can be comprehensively evaluated. This evaluation not only considers the theoretical performance of the quantum circuit but also incorporates the characteristics of the actual hardware, accurately reflecting the performance of the quantum circuit in a real-world environment. This makes the trained model more consistent with practical application scenarios and allows for a more accurate assessment of the compilation quality of the quantum circuit.

[0104] By rapidly processing the features of quantum circuits using machine learning models, compiler quality can be efficiently evaluated. This approach is faster than traditional manual evaluation methods and is particularly suitable for large-scale quantum circuit evaluation. Machine learning models can capture complex nonlinear relationships, providing more accurate compiler quality evaluation results. Through learning from training data, the model can identify key features affecting compiler quality, thereby improving the accuracy of the evaluation.

[0105] See Figure 4 , Figure 4 A machine learning model training apparatus provided in this application embodiment may include:

[0106] The result acquisition module 401 is used to obtain the theoretical and actual operating results of multiple quantum circuits, wherein the actual operating results are the operating results of the compiled quantum circuits in the target quantum hardware, and all quantum circuits are compiled in the same way.

[0107] The tag determination module 402 is used to determine the tag of the corresponding quantum circuit by utilizing the difference between the theoretical operation results and the actual operation results;

[0108] The feature extraction module 403 is used to extract the circuit features of the compiled quantum circuit, wherein the circuit features include at least one feature reflecting the structure of the compiled quantum circuit.

[0109] Training module 404 is used to train a selected machine learning model for evaluating the compilation quality of quantum circuits using labels determined for quantum circuits and extracted circuit features.

[0110] See Figure 5 , Figure 5An apparatus for evaluating the compilation quality of quantum circuits, provided in an embodiment of this application, may include:

[0111] The module 501 is used to obtain the compiled target quantum circuit, wherein the compilation method of the target quantum circuit is the same as the compilation method of the quantum circuit used to train the machine learning model.

[0112] Extraction module 502 is used to extract the circuit features of the compiled target quantum circuit;

[0113] Evaluation module 503 is used to process the extracted circuit features using a pre-trained machine learning model to obtain the compilation quality evaluation result of the target quantum circuit, wherein the machine learning model is trained using the machine learning model training method in any of the above embodiments.

[0114] The specific functions and effects of the aforementioned machine learning model training device or quantum circuit compilation quality evaluation device can be explained by referring to other embodiments of this application, and will not be repeated here. Each sub-circuit in the machine learning model training device or quantum circuit compilation quality evaluation device can be implemented entirely or partially through software, hardware, or a combination thereof. Each sub-circuit can be embedded in or independent of the processor in a computer device in hardware form, or it can be stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each of the above sub-circuits.

[0115] Please see Figure 6 This application also provides a computer device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the machine learning model training method or the method for evaluating the compilation quality of quantum circuits in any of the above embodiments. Please refer to [link to relevant documentation]. Figure 6 The computer device can be a classical computer or a quantum computer.

[0116] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the machine learning model training method or the method for evaluating the compilation quality of quantum circuits in any of the above embodiments.

[0117] This application also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the machine learning model training method or the method for evaluating the compilation quality of quantum circuits in any of the above embodiments.

[0118] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0119] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and the implementation methods in this application are not limited in this respect.

[0120] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0121] It is understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software sub-circuits in the decoding processor. The software sub-circuits can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method.

[0122] It is understood that the memory in the embodiments of this application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Specifically, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0123] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0124] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0125] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0126] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0127] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0128] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A method for training a machine learning model, characterized in that, The method includes: The theoretical and actual operating results of multiple quantum circuits are obtained, wherein the actual operating results are the operating results of the compiled quantum circuits in the target quantum hardware, and all quantum circuits are compiled in the same way; By utilizing the difference between theoretical and actual operating results, the corresponding quantum circuit labels are determined; Extract the circuit features of the compiled quantum circuit, wherein the circuit features include at least one feature reflecting the structure of the compiled quantum circuit; The machine learning model selected for evaluating the compilation quality of quantum circuits is trained using the labels determined for quantum circuits and the extracted circuit features.

2. The method according to claim 1, characterized in that, The machine learning model is a random forest regressor or a gradient boosting decision tree.

3. The method according to claim 1 or 2, characterized in that, The method of determining the corresponding quantum circuit label by utilizing the difference between theoretical and actual operating results includes: The degree of difference between the probability distribution of the theoretical operating results and the probability distribution of the actual operating results is used as the label for the corresponding quantum circuit.

4. The method according to claim 3, characterized in that, The degree of difference between the probability distribution of theoretical operating results and the probability distribution of actual operating results is represented by the Hellinger distance or KL divergence.

5. The method according to claim 1, characterized in that, The circuit characteristics also include the characteristics of the qubits occupied by the compiled quantum circuit in the target quantum hardware.

6. A method for evaluating the compilation quality of quantum circuits, characterized in that, The method includes: Obtain the compiled target quantum circuit, wherein the compilation method of the target quantum circuit is the same as the compilation method of the quantum circuit used to train the machine learning model; Extract the circuit features of the compiled target quantum circuit; The extracted circuit features are processed using a pre-trained machine learning model to obtain the compilation quality evaluation result of the target quantum circuit, wherein the machine learning model is trained using the machine learning model training method described in any one of claims 1 to 5.

7. A machine learning model training device, characterized in that, The device includes: The result acquisition module is used to obtain the theoretical and actual operating results of multiple quantum circuits. The actual operating results are the results of the compiled quantum circuits running in the target quantum hardware. All quantum circuits are compiled using the same compilation method. The tag determination module is used to determine the tag of the corresponding quantum circuit by utilizing the difference between the theoretical and actual operation results; The feature extraction module is used to extract the circuit features of the compiled quantum circuit, wherein the circuit features include at least one feature reflecting the structure of the compiled quantum circuit; The training module is used to train a selected machine learning model for evaluating the compilation quality of quantum circuits using labels determined for quantum circuits and extracted circuit features.

8. An apparatus for evaluating the compilation quality of quantum circuits, characterized in that, The device includes: A module for obtaining the compiled target quantum circuit, wherein the compilation method of the target quantum circuit is the same as that of the quantum circuit used to train the machine learning model; The extraction module is used to extract the circuit features of the compiled target quantum circuit; An evaluation module is used to process the extracted circuit features using a pre-trained machine learning model to obtain the compilation quality evaluation result of the target quantum circuit, wherein the machine learning model is trained using the machine learning model training method described in any one of claims 1 to 5.

9. A computer device comprising a memory and a processor, the memory storing a computer program, the processor executing the computer program to implement the machine learning model training method of any one of claims 1-5 or the method for evaluating the compilation quality of quantum circuits of claim 6.

10. A computer-readable storage medium having a computer program stored thereon, which, when executed by a computer, causes the computer to perform the machine learning model training method of any one of claims 1-5 or the method for evaluating the compilation quality of quantum circuits of claim 6.

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