SOT-MTJ device and preparation method thereof

Abstract

The invention provides an SOT-MTJ device, and the device comprises two bottom metal layers which are formed on a substrate; the two bottom through holes are opposite to the two bottom metal layers one by one; the SOT track layer is positioned on the two bottom through holes and is in contact with the two bottom through holes; an MTJ film stack on the SOT track layer; wherein the bottom through hole comprises two conducting layers, the first conducting layer located on the lower layer is made of a low-resistivity conducting material, and the second conducting layer located on the upper layer and in direct contact with the SOT track layer is made of a high-resistivity conducting material. According to the invention, the overturning efficiency of the SOT-MTJ device can be improved.

Description

Technical Field

[0001] This invention relates to the field of magnetic memory technology, and in particular to an SOT-MTJ device and its fabrication method. Background Technology

[0002] The Spin-Orbit Torque-Magnetic Tunnel Junction (SOT-MTJ) mainly utilizes the spin polarization current generated by the heavy metal orbital layer to flip the magnetic moment of the free layer to achieve data writing. It features fast writing speed, unlimited erase and write cycles, and read-write separation.

[0003] In existing patented technologies, the resistivity of the bottom via in the self-aligned SOT-MTJ device structure is much smaller than that of the heavy metal track layer, typically by two orders of magnitude. During writing, the current density in the part of the SOT track layer that contacts the bottom via is relatively low, which greatly reduces the flipping efficiency. Summary of the Invention

[0004] In view of this, the present invention provides an SOT-MTJ device and a method for fabricating the same, which can improve the switching efficiency of the SOT-MTJ device.

[0005] In a first aspect, the present invention provides an SOT-MTJ device, comprising: Two bottom metal layers are formed on the substrate; Two bottom through holes are positioned opposite each of the two bottom metal layers, with each bottom through hole located on the opposite bottom metal layer; SOT orbital layer for generating spin polarization current, the SOT orbital layer being located on and in contact with the two bottom vias; MTJ film stacks are located on the SOT orbital layer; The bottom via comprises two conductive layers: the lower conductive layer is made of a low-resistivity conductive material, and the upper conductive layer, which is in direct contact with the SOT track layer, is made of a high-resistivity conductive material.

[0006] Optionally, the resistivity of the first conductive layer is less than 50 uΩ·cm, and the resistivity of the second conductive layer is greater than 500 uΩ·cm.

[0007] Optionally, the material of the first conductive layer is W or Cu, and the material of the second conductive layer is any one of NiCrSi alloy, NiCrAlSi alloy, TaNx and TiNx.

[0008] Optionally, the thickness of the second conductive layer is less than 10 nm.

[0009] Optionally, it also includes a metal hard mask layer located on the MTJ film stack.

[0010] Optionally, the SOT orbital layer, the MTJ film stack, and the metal hard mask layer have the same shape.

[0011] Optionally, if the SOT track layer is elongated, the two bottom through holes are arranged along the length of the elongated SOT track layer; if the SOT track layer is elliptical, the two bottom through holes are arranged along the major axis of the elliptical SOT track layer; if the SOT track layer is circular, the two bottom through holes are arranged along any diameter of the circular SOT track layer.

[0012] Optionally, the SOT track layer is in contact with or in complete contact with the top portion of the two bottom through holes.

[0013] Secondly, the present invention provides a method for fabricating an SOT-MTJ device, the method comprising: Two bottom metal layers are formed on the substrate; Two opposing bottom through holes are formed on the two bottom metal layers; The two bottom through holes are filled with conductive material, which consists of two layers: the lower first conductive layer uses a low resistivity conductive material, and the upper second conductive layer, which is in direct contact with the SOT track layer, uses a high resistivity conductive material. The SOT orbital layer film, each layer of MTJ film, and the metal hard mask layer film are deposited sequentially. The SOT orbital layer film, each layer of the MTJ film, and the metal hard mask layer film are etched to form a stacked structure including the SOT orbital layer, the MTJ film stack, and the metal hard mask layer. A protective layer and a dielectric layer are deposited on the stacked structure.

[0014] Optionally, the SOT orbital layer film, each layer of the MTJ film, and the metal hard mask layer film are self-aligned and etched from top to bottom using the same etching pattern.

[0015] The SOT-MTJ device and its fabrication method provided by this invention fill two layers of metal in the bottom via, wherein an ultrathin high resistivity material is grown in the upper layer near the SOT orbital layer. Without significantly increasing the write channel resistance, the high resistivity material reduces the current shunting effect of the bottom via during writing, thereby increasing the current density of the part of the SOT orbital layer in contact with the bottom via, thus improving the switching efficiency of the SOT-MTJ device. Attached Figure Description

[0016] Figure 1This is a schematic diagram of the structure of an SOT-MTJ device in one embodiment of the present invention; Figures 2 to 10 This is a schematic diagram of the process flow for fabricating an SOT-MTJ device in one embodiment of the present invention. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and not intended to limit the scope of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention. Furthermore, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concepts of this disclosure.

[0018] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0019] In the context of this disclosure, when a layer / element is referred to as being "above" another layer / element, the layer / element may be directly above the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "above" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0020] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0021] This invention provides an SOT-MTJ device, such as... Figure 1 As shown, the SOT-MTJ device includes: Two bottom metal layers, 1011 and 1012, are formed on the substrate; Two bottom vias 1021 and 1022 are respectively opposite to two bottom metal layers 1011 and 1012, with each bottom via located on the opposite bottom metal layer; SOT orbital layer 103 is used to generate spin polarization current. SOT orbital layer 103 is located on and in contact with two bottom vias 1021 and 1022. MTJ membrane stack 104 is located on SOT orbital layer 103; Each bottom via 1021 or 1022 includes two conductive layers. The first conductive layer located in the lower layer of the bottom via 1021 is marked as 1021A, and the second conductive layer located in the upper layer of the bottom via 1021 that is in direct contact with the SOT track layer 103 is marked as 1021B. Similarly, the two conductive layers in the bottom via 1022 are marked as 1022A and 1022B. 1021A and 1022A use a low resistivity conductive material, while 1021B and 1022B use a high resistivity conductive material.

[0022] In the above structure, the bottom metal layers 1011 and 1012 and the bottom vias 1021 and 1022 are all formed in the interlayer dielectric layer. The interlayer dielectric layer can be silicon oxide, fluorinated silicon glass (FSG), carbon-doped silicon oxide, oxides formed from tetraethyl orthosilicate (TEOS), phosphosilicate glass (PSG), low-k dielectric materials, etc.

[0023] The MTJ film stack 104 includes at least a free layer, a barrier layer, and a reference layer, wherein the free layer is located at the bottom of the MTJ film stack 104 and is in contact with the SOT orbital layer 103. The specific structure of the MTJ film stack 104 can be referred to in the prior art, and will not be described in detail here.

[0024] The SOT orbital layer 103 is made of a heavy metal or topological material with a large spin Hall angle, such as W, Ta, Pt, or BiSe. These materials have relatively high resistivity. When a write current flows through the SOT orbital layer 103, a spin-polarized current is generated due to the spin-orbit coupling effect.

[0025] In one implementation, the resistivity of the lower first conductive layers 1021A and 1022A is less than 50 uΩ·cm, and the resistivity of the upper second conductive layers 1021B and 1022B needs to be one order of magnitude higher than the resistivity of the SOT orbital layer 103, that is, the resistivity of the second conductive layer should be higher than 500 uΩ·cm.

[0026] In one implementation, the lower first conductive layers 1021A and 1022A can be metals with good electrical conductivity, such as W or Cu, and the upper second conductive layers 1021B and 1022B can be metal compounds, such as any one of NiCrSi alloy, NiCrAlSi alloy, TaNx, and TiNx. The materials that can be chosen are not limited to these.

[0027] In one implementation, the upper second conductive layers 1021B and 1022B are made very thin, with a thickness not exceeding 10nm.

[0028] In one implementation, the SOT track layer 103 is in contact or in complete contact with the top portion of the two bottom vias 1021 and 1022, which needs to ensure that write current can flow through it.

[0029] Furthermore, such as Figure 1 As shown, the SOT-MTJ device also includes a metal hard mask layer 105 located on the MTJ film stack 104. The metal hard mask layer 105 is a mask layer remaining after the MTJ film stack 104 is etched and formed.

[0030] In this embodiment, the SOT orbital layer 103, the MTJ film stack 104, and the metal hard mask layer 105 have the same shape, which is determined by the etching process. The SOT orbital layer 103, the MTJ film stack 104, and the metal hard mask layer 105 are obtained by etching the same etching pattern in one go. The specific shape can be a strip, an ellipse, or a circle.

[0031] It is understandable that if the SOT track layer 103 is elongated, the two bottom through holes 1021 and 1022 are arranged along the length of the elongated SOT track layer; if the SOT track layer 103 is elliptical, the two bottom through holes 1021 and 1022 are arranged along the major axis of the elliptical SOT track layer; if the SOT track layer 103 is circular, the two bottom through holes 1021 and 1022 are arranged along any diameter of the circular SOT track layer.

[0032] Furthermore, such as Figure 1 As shown, the SOT-MTJ device also includes a protective layer 106, which covers the four sides and the top surface of the stacked structure of the SOT orbital layer 103, the MTJ film stack 104 and the metal hard mask layer 105. In addition, there is a top through-hole 107 and a top metal layer 108.

[0033] In the SOT-MTJ device of this invention, the bottom via is filled with two layers of metal, wherein an ultrathin high resistivity material is grown on the upper layer near the SOT orbital layer. Without significantly increasing the write channel resistance, the high resistivity material reduces the current shunting effect of the bottom via during writing, thereby increasing the current density of the part of the SOT orbital layer in contact with the bottom via and thus improving the switching efficiency of the SOT-MTJ device.

[0034] On the other hand, embodiments of the present invention also provide a method for fabricating an SOT-MTJ device. Figures 2 to 10 A cross-sectional view of the device structure corresponding to each process step of the fabrication method is shown. The fabrication method includes the following steps: Step 1: Reference Figure 2 Two bottom metal layers 2011 and 2012 are formed on the substrate, and these two bottom metal layers 2011 and 2012 serve as metal interconnects.

[0035] Step 2: Reference Figure 3 Two bottom vias 2021 and 2022 are formed on two bottom metal layers 2011 and 2012, respectively. Specifically, this involves first depositing an etching barrier layer and an interlayer dielectric layer, and then etching out the bottom vias 2021 and 2022, which need to be aligned with the positions of the bottom metal layers.

[0036] Step 3: Fill the two bottom vias 2021 and 2022 with conductive material. The conductive material consists of two layers: the lower conductive layer uses a low-resistivity conductive material, and the upper conductive layer, which is in direct contact with the SOT track layer, uses a high-resistivity conductive material. (Reference) Figures 4 to 7 Specifically, the process includes: depositing a layer of low-resistivity conductive material 202A, such as W or Cu, followed by polishing or etching to retain only the conductive material 202A within the vias, leaving a certain distance between it and the top of the vias, thus obtaining the lower first conductive layers 2021A and 2022A. Next, a layer of high-resistivity conductive material 202B is deposited, such as any one of NiCrSi alloy, NiCrAlSi alloy, TaNx, and TiNx. The actual materials that can be chosen are not limited to these. Then, polishing or etching is performed to retain only the conductive material 202B within the vias, at which point the vias need to be filled, resulting in the upper second conductive layers 2021B and 2022B.

[0037] Step 4: As Figure 8 As shown, SOT orbital layer film 203, MTJ layer films 204, and metal hard mask layer film 205 are deposited sequentially.

[0038] Step 5: As Figure 9 As shown, the SOT orbital layer film 203, the MTJ film layers 204, and the metal hard mask film 205 are etched to form a stacked structure including the SOT orbital layer, the MTJ film stack, and the metal hard mask layer. A protective layer 206 and a dielectric layer are deposited on the stacked structure. During the etching process, the stacked structure composed of the SOT orbital layer film 203, the MTJ film layers 204, and the metal hard mask film 205 is self-aligned and etched from top to bottom using the same etching pattern. After etching, the SOT orbital layer, the MTJ film stack, and the metal hard mask layer have the same shape.

[0039] Step 6: As Figure 10 As shown, a top through-hole 207 and a top metal layer 208 are further formed.

[0040] The fabrication method of this invention allows for self-aligned etching of the SOT orbital layer film, MTJ layers, and metal hard mask layer film using the same etching pattern from top to bottom. When performing self-aligned etching on the SOT-MTJ, it is no longer necessary to precisely control the etching stop position on the nanometer-thick SOT orbital layer, thus increasing the MTJ etching window and improving on-chip device yield. The resulting SOT-MTJ device exhibits high flip-flop efficiency.

[0041] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0042] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An SOT-MTJ device, characterized in that, include: Two bottom metal layers are formed on the substrate; Two bottom through holes are positioned opposite each of the two bottom metal layers, with each bottom through hole located on the opposite bottom metal layer. SOT orbital layer for generating spin polarization current, the SOT orbital layer being located on and in contact with the two bottom vias; MTJ film stacks are located on the SOT orbital layer; The bottom via comprises two conductive layers: the lower conductive layer is made of a low-resistivity conductive material, and the upper conductive layer, which is in direct contact with the SOT track layer, is made of a high-resistivity conductive material.

2. The SOT-MTJ device according to claim 1, characterized in that, The resistivity of the first conductive layer is less than 50 uΩ·cm, and the resistivity of the second conductive layer is greater than 500 uΩ·cm.

3. The SOT-MTJ device according to claim 1, characterized in that, The first conductive layer is made of W or Cu, and the second conductive layer is made of any one of NiCrSi alloy, NiCrAlSi alloy, TaNx and TiNx.

4. The SOT-MTJ device according to claim 1, characterized in that, The thickness of the second conductive layer is less than 10 nm.

5. The SOT-MTJ device according to claim 1, characterized in that, Also includes: A metal hard mask layer is located on the MTJ film stack.

6. The SOT-MTJ device according to claim 5, characterized in that, The SOT orbital layer, the MTJ film stack, and the metal hard mask layer have the same shape.

7. The SOT-MTJ device according to claim 6, characterized in that, If the SOT track layer is elongated, the two bottom through holes are arranged along the length of the elongated SOT track layer; if the SOT track layer is elliptical, the two bottom through holes are arranged along the major axis of the elliptical SOT track layer; if the SOT track layer is circular, the two bottom through holes are arranged along any diameter of the circular SOT track layer.

8. The SOT-MTJ device according to claim 1, characterized in that, The SOT track layer is in contact with or in complete contact with the top portion of the two bottom through holes.

9. A method for fabricating an SOT-MTJ device, characterized in that, The method includes: Two bottom metal layers are formed on the substrate; Two opposing bottom through holes are formed on the two bottom metal layers; The two bottom through holes are filled with conductive material, which consists of two layers: the lower first conductive layer uses a low resistivity conductive material, and the upper second conductive layer, which is in direct contact with the SOT track layer, uses a high resistivity conductive material. The SOT orbital layer film, each layer of MTJ film, and the metal hard mask layer film are deposited sequentially. The SOT orbital layer film, each layer of the MTJ film, and the metal hard mask layer film are etched to form a stacked structure including the SOT orbital layer, the MTJ film stack, and the metal hard mask layer. A protective layer and a dielectric layer are deposited on the stacked structure.

10. The method according to claim 9, characterized in that, The SOT orbital layer film, each layer of the MTJ film, and the metal hard mask layer film are etched from top to bottom using the same etching pattern.

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